JP4941435B2 - Method for producing compound semiconductor epitaxial wafer - Google Patents

Description

  The present invention relates to a method for manufacturing a compound semiconductor epitaxial wafer, and more particularly to a method for manufacturing a compound semiconductor epitaxial wafer in which an epitaxial layer growth method can be set in accordance with the warp of a base substrate.

  As a compound semiconductor, a group III nitride semiconductor is characterized by its wide band gap and is used as a material for a high-efficiency light-emitting device that covers a wide wavelength range from ultraviolet to visible light.

  Group III nitride semiconductors have high saturation electron velocities and high breakdown electric fields, so that they are being developed as electronic device materials for use in high-frequency regions, and are being put into practical use. Social expectations for electronic devices consisting of

  Conventionally, when a nitride semiconductor is grown, a technique related to the temperature condition of the nucleation layer directly formed on the substrate has been reported for the purpose of relaxing the lattice mismatch between the substrate and the nitride semiconductor epitaxial layer. ing.

  It has been reported that the growth temperature at the time of forming the AlN layer as the nucleation layer is most preferably 1200 ° C. as shown in Patent Document 1. When the AlN layer is formed at this temperature, the AlN surface is flattened.

JP 2005-32823 A

  This Patent Document 1 reports that the optimum growth temperature of the AlN nucleation layer is 1200 ° C., regardless of the warpage of the substrate, and that the device characteristics are good. However, when in-plane variation occurs in the wafer due to warpage of the single crystal substrate, there arises a problem that the yield of the device is greatly reduced.

  That is, a single crystal substrate composed of a plurality of elements thermally expands at a high temperature and warps. The substrate shape change during growth due to warpage changes the growth surface temperature of the epitaxial crystal during the growth of the nucleation layer and the nitride semiconductor layer thereon, and as a result, the crystal growth distribution in the wafer surface varies ( For example, this causes a problem of generating variation in electrical characteristics after chip formation.

  Although there is no report on the problem of in-plane variation due to the warpage of the substrate, the warpage becomes more prominent as the temperature increases, and the influence of the warpage becomes larger as the wafer size increases.

  Actually, when the growth temperature of the AlN layer as the nucleation layer was high, the AlGaN layer grown thereon had a high Al composition near the center of the wafer and a low Al composition around the substrate. However, when the growth temperature of the nucleation layer was low, the Al composition of the AlGaN layer grown thereon was almost uniform in the plane.

  Since mitigating warpage during growth greatly affects control of the in-plane distribution of crystal quality, knowledge about the correlation between warpage and temperature is indispensable for the production of epitaxial wafers.

  Accordingly, an object of the present invention is to set the optimum growth temperature of the nucleation layer with respect to the warpage of each single crystal substrate, thereby reducing variations in the crystal growth distribution in the wafer surface and making a step in manufacturing a device. It is an object of the present invention to provide a method for producing a compound semiconductor epitaxial wafer with improved yield.

The present invention was devised to achieve the above object, and the invention of claim 1 forms a nucleation layer on a single crystal substrate composed of a plurality of elements, and a single layer or a nucleation layer is formed on the nucleation layer. In a compound semiconductor epitaxial wafer manufacturing method for forming a plurality of nitride semiconductor layers, a warp α (μm) of a single crystal substrate is measured at room temperature before forming the nucleation layer, and the nucleation layer is This is a method for producing a compound semiconductor epitaxial wafer in which the growth temperature T (° C.) during formation is T <4α + 1180 with respect to the warp α (μm) of the single crystal substrate.

  The invention of claim 2 is the method for producing a compound semiconductor epitaxial wafer according to claim 1, wherein the nucleation layer is made of AlN.

  The invention according to claim 3 is the method for producing a compound semiconductor epitaxial wafer according to claim 1 or 2, wherein the diameter of the single crystal substrate is 100 mm or more.

  Invention of Claim 4 is a manufacturing method of the compound semiconductor epitaxial wafer in any one of Claims 1-3 in which the said single crystal substrate consists of SiC.

  The invention of claim 5 is the method for producing a compound semiconductor epitaxial wafer according to any one of claims 1 to 4, wherein the thickness of the single crystal substrate is 350 μm or more and 450 μm or less.

The invention of claim 6, prepared anti Riga different single crystal substrate at room temperature before forming the nucleation layer, the nucleation layer by a plurality of growth temperature for each reaction Ri of the single crystal substrate After the formation, the in-plane variation (%) of the sheet resistance is measured for each of the plurality of wafers obtained by forming the nitride semiconductor layer on the nucleation layer, and the variation is less than 6%. the 6% or more and variation defective claim 1 this variation results were plotted as growth temperature and anti Rio parameters determine the variation good and variations of poor distribution, an approximate expression for the variation excellent and dispersion defect of the boundary It is a manufacturing method of the compound semiconductor epitaxial wafer of description.

  According to the present invention, by setting the optimum growth temperature of the nucleation layer with respect to the warp of each single crystal substrate, variation in the crystal growth distribution in the wafer surface is reduced, and the yield in manufacturing the device is reduced. An improved compound semiconductor epitaxial wafer can be obtained.

  DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, a preferred embodiment of the invention will be described with reference to the accompanying drawings.

  FIG. 1 is a cross-sectional view of a compound semiconductor epitaxial wafer manufactured by a compound semiconductor epitaxial wafer manufacturing method showing a preferred embodiment of the present invention.

  As shown in FIG. 1, a compound semiconductor epitaxial wafer 10 is formed on a single crystal substrate 1 made of SiC, a nucleation layer 2 made of AlN, and formed on the nucleation layer 2. And a nitride semiconductor layer 3 containing AlGaN.

  Single crystal substrate 1 is a base on which a nitride semiconductor is grown. As the single crystal substrate 1, a substrate having a diameter of 100 mm or more is used. This is because a warp α (μm) is small in a single crystal substrate having a diameter of less than 100 mm, so that variations are unlikely to occur and the need for taking countermeasures is small. Furthermore, the thickness of the single crystal substrate 1 is 350 μm or more and 450 μm or less. This is because the single crystal substrate 1 having a diameter of about 100 mm generally has a thickness in this range.

  The nucleation layer 2 is for relaxing the lattice mismatch between the single crystal substrate 1 and the nitride semiconductor layer 3.

  In the present invention, the warp α (μm) of the single crystal substrate 1 is measured before the nucleation layer 2 is formed, and the growth temperature T (° C.) at the time of forming the nucleation layer 2 is determined. For the warp α (μm), T <4α + 1180.

  4 and 5 are diagrams for explaining a method of measuring warpage α (μm).

  As shown in FIGS. 4 and 5, the warp α (μm) is defined by a distance d from the height of the center of the surface of the single crystal substrate 1 to the focal surface (based on three points on the surface) in the unclamped state. It takes a negative value if it is convex below the reference, and a positive value if it is convex upward.

  Hereinafter, the basis of the relationship between the warp α (μm) of the single crystal substrate 1 and the growth temperature T when forming the nucleation layer 2 will be described.

  The present inventors pay attention to the warp α (μm) of a single crystal substrate to be used for a single crystal substrate having a diameter of 100 mm made of a plurality of elements, and correlate with the variation in the crystal growth distribution in the wafer surface of the single crystal substrate. As a result of the investigation, when a single crystal substrate having a large warp α (μm) is used, the in-plane variation becomes large, and when a single crystal substrate having a small warp α (μm) is used, the in-plane variation becomes relatively small. As a result of growing the nucleation layer with lowering, it was found that the in-plane variation was reduced.

  From the above, it was found that the in-plane variation depends on the warp α (μm) of the single crystal substrate used and the growth temperature T (° C.) of the nucleation layer.

  FIG. 2 is a diagram for explaining a problem caused by warpage of a single crystal substrate.

  As shown in FIG. 2A, when the single crystal substrate 1 has no warp α (μm), when the single crystal substrate 1 is heated to grow crystals, the susceptor 4 for fixing and heating the single crystal substrate 1 Since the heat transfer to and from the single crystal substrate 1 is substantially uniform and the temperature of the single crystal substrate 1 is substantially uniform, the crystal growth rate within the single crystal substrate 1 surface and variations in Al doping are unlikely to occur.

  However, as shown in FIG. 2B, when the single crystal substrate 1 has a warp α (μm) (when the warp α (μm) is large), heat is transferred between the susceptor 4 and the single crystal substrate 1. Is not uniform within the surface of the single crystal substrate 1, crystals with different growth temperatures are formed. That is, the outer peripheral side of the crystal does not grow at the temperature as designed.

  Therefore, the crystal growth rate and Al doping vary, resulting in a problem that predetermined characteristics (such as electrical characteristics) cannot be obtained. When the single crystal substrate 1 has a warp α (μm), the warp α (μm) may be further increased by heating the single crystal substrate 1.

  Accordingly, the inventors of the present invention focused on the uniformity of the crystal quality of the epitaxial layer before performing epitaxial growth on the single crystal substrate 1 and tried to predict the optimal growth temperature at which crystals with good uniformity can be produced.

  FIG. 3 shows the results of measurement of in-plane variation in sheet resistance when a compound semiconductor epitaxial wafer is manufactured under the conditions (1) to (3) shown below. % Or more) are summarized based on the two parameters of the warp α (μm) of the single crystal substrate and the growth temperature T (° C.) of the nucleation layer.

  (1) When the warp α (μm) at room temperature before growth of the nitride semiconductor layer of the single crystal substrate is 10, 3, −8, −16, −24 (μm), respectively, the nucleation layer is 1100 After growing at 0 ° C., a nitride semiconductor layer was grown thereon.

  (2) Nucleation when the warpage α (μm) at room temperature before the growth of the nitride semiconductor layer of the single crystal substrate is 8, 2, -11, -13, -19, and -25 (μm), respectively. After the layer was grown at 1150 ° C., a nitride semiconductor layer was grown thereon.

  (3) Nucleation when warp α (μm) at room temperature before growth of the nitride semiconductor layer of the single crystal substrate is 7, 3, −1, −9, −12, −19 (μm), respectively. After the layer was grown at 1200 ° C., a nitride semiconductor layer was grown thereon.

  The warp α (μm) in each of the above (1) to (3) was determined by analyzing the phase difference of light generated by laser light irradiation.

  From the experimental results shown in FIG. 3, the boundary between good and bad variations was expressed as T = 4α + 1180 using the warp α (μm) of the single crystal substrate 1 and the growth temperature T of the nucleation layer 2 as parameters.

  The temperature located on the straight line represented by T = 4α + 1180 is considered to be a temperature boundary at which the single crystal substrate 1 warps sharply, and the linear equation representing this boundary can produce a crystal with good uniformity. Enables prediction of optimum temperature.

  For these reasons, the growth temperature T when forming the nucleation layer 2 is set to T <4α + 1180.

  According to the compound semiconductor epitaxial wafer 10 of the present invention, the warp α (μm) of the single crystal substrate 1 is measured, and the growth temperature T (° C.) at the time of forming the nucleation layer 2 is determined as the warp of the single crystal substrate 1. By setting T <4α + 1180 with respect to α (μm), variations in crystal growth distribution in the surface of the compound semiconductor epitaxial wafer 10 can be reduced.

  That is, the ratio of acquiring wafers with good in-plane variation increases, and the acquisition rate of wafers with large variations can be reduced.

  Therefore, the yield at the time of manufacturing a device can be improved by using the compound semiconductor epitaxial wafer 10 as a device material.

  Next, a more specific method for manufacturing the compound semiconductor epitaxial wafer 10 according to the present invention will be further described.

  Compound semiconductor epitaxial wafer 10 measures warp α (μm) of single crystal substrate 1 made of SiC, and forms nucleation layer 2 made of AlN on growth rate T (T <4α + 1180) on single crystal substrate 1. Then, the nitride semiconductor layer 3 containing AlGaN is formed on the nucleation layer 2.

  The growth temperature at the time of forming the nitride semiconductor layer 3 is preferably set to a conventionally known temperature (for example, about 1100 ° C.).

  In short, according to the method of manufacturing the compound semiconductor epitaxial wafer 10 of the present invention, the optimum growth temperature T (T <4α + 1180) of the nucleation layer 2 is set according to the warp α (μm) of each single crystal substrate 1. By doing so, it is possible to obtain the compound semiconductor epitaxial wafer 10 that can reduce the variation in the crystal growth distribution in the wafer surface and improve the yield when manufacturing the device.

  Although the nitride semiconductor layer 3 is a single layer in the present embodiment, it may be a plurality of layers.

Example 1
The single crystal substrate 1 is a 100 mm diameter semi-insulating SiC single crystal (thickness 365 μm), and the warpage α (μm) at room temperature before the growth of the nitride semiconductor layer 3 of the single crystal substrate 1 is 10, 3 respectively. , −8, −16, −24 (μm), after the nucleation layer 2 is grown at 1100 ° C., the nitride semiconductor layer 3 is grown thereon, and the in-plane variation in sheet resistance is measured. did. The warping α (μm) was determined as a distance from the height of the wafer surface center in the unclamped state to the focal surface (3-point reference surface) in the unclamped state by analyzing the phase difference of the light generated by laser light irradiation.

  Assuming that the in-plane variation is less than 6% and that the variation is 6% or more, the single crystal substrate 1 has a warp α (μm) larger than that at the boundary of −16. The wafer had good variation, and the epitaxial wafer having a warp α (μm) less than that resulted in poor variation.

(Example 2)
The single crystal substrate 1 is a 100 mm diameter semi-insulating SiC single crystal (thickness: 368 μm), and the warp α (μm) at room temperature before the growth of the nitride semiconductor layer 3 of the single crystal substrate 1 is 8, 2 respectively. , −11, −13, −19, −25 (μm), after the nucleation layer 2 is grown at 1150 ° C., the nitride semiconductor layer 3 is grown on the nucleation layer 2 to increase the in-plane sheet resistance. Variation was measured. The warping α (μm) was determined as a distance from the height of the wafer surface center in the unclamped state to the focal surface (3-point reference surface) in the unclamped state by analyzing the phase difference of the light generated by laser light irradiation.

  Assuming that the in-plane variation is less than 6% and that the variation is 6% or more, the single crystal substrate 1 has a warp α (μm) greater than that at the boundary of −13. The wafer had good variation, and the epitaxial wafer having a warp α (μm) less than that resulted in poor variation.

(Example 3)
The single crystal substrate 1 is a 100 mm diameter semi-insulating SiC single crystal (thickness: 364 μm), and the warpage α (μm) at room temperature before the growth of the nitride semiconductor layer 3 of the single crystal substrate 1 is 7, 3 respectively. , −1, −9, −12, −19 (μm), the nucleation layer 2 is grown at 1200 ° C., and then the nitride semiconductor layer 3 is grown on the nucleation layer 2 to increase the sheet resistance. Variation was measured. The warping α (μm) was determined as a distance from the height of the wafer surface center in the unclamped state to the focal surface (3-point reference surface) in the unclamped state by analyzing the phase difference of the light generated by laser light irradiation.

  Epitaxial wafer having a warp α (μm) of a value higher than that at the boundary of the warp α (μm) of the single crystal substrate 1 assuming that the in-plane variation is less than 6% and that the variation is 6% or more. The epitaxial wafer having a good curvature and a warp α (μm) less than that resulted in a poor dispersion.

It is sectional drawing of the compound semiconductor epitaxial wafer manufactured by this invention. FIGS. 2A and 2B are diagrams for explaining a problem caused by warpage of a single crystal substrate. It is the figure which put together the curvature and growth temperature of a single crystal substrate as a parameter about the variation in the sheet resistance of a compound semiconductor epitaxial wafer. It is a figure explaining the measuring method of curvature (alpha) (micrometer). It is a figure explaining the measuring method of curvature (alpha) (micrometer).

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Single crystal substrate 2 Nucleation layer 3 Nitride semiconductor layer 10 Compound semiconductor epitaxial wafer

Claims (6)

In a method for producing a compound semiconductor epitaxial wafer, in which a nucleation layer is formed on a single crystal substrate composed of a plurality of elements, and a single layer or a plurality of nitride semiconductor layers are formed on the nucleation layer, the nucleation layer is formed The warp α (μm) of the single crystal substrate is measured at room temperature before forming, and the growth temperature T (° C.) when forming the nucleation layer is determined with respect to the warp α (μm) of the single crystal substrate. , T <4α + 1180, A method for producing a compound semiconductor epitaxial wafer.
  The method for producing a compound semiconductor epitaxial wafer according to claim 1, wherein the nucleation layer is made of AlN.   The method for producing a compound semiconductor epitaxial wafer according to claim 1 or 2, wherein the diameter of the single crystal substrate is 100 mm or more.   The method for producing a compound semiconductor epitaxial wafer according to claim 1, wherein the single crystal substrate is made of SiC.   The method for producing a compound semiconductor epitaxial wafer according to claim 1, wherein the single crystal substrate has a thickness of 350 μm or more and 450 μm or less. After the anti Riga different single crystal substrate at room temperature before forming the nucleation layer was prepared to form a nucleation layer by a plurality of growth temperature for each Ri anti of the single crystal substrate, the nucleus For each of a plurality of wafers obtained by forming a nitride semiconductor layer on the generation layer, in-plane variation (%) of sheet resistance is measured, and variation less than 6% is good, and variation of 6% or more is bad. obtains a variation good and variations of failure distribution by plotting this variation results in growth temperature and anti Rio parameters, a compound semiconductor epitaxial wafer according to claim 1 for obtaining an approximate expression for the variation excellent and dispersion defect of the boundary Manufacturing method.

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