JP4935290B2 - Solid-state imaging device, driving method of solid-state imaging device, and imaging device - Google Patents

Description

  The present invention relates to a solid-state imaging device used as an imaging device, a driving method of the solid-state imaging device, and an imaging device.

  In general, solid-state imaging devices are charge transfer type solid-state imaging devices represented by CCD (Charge Coupled Device) image sensors and XY address type solid-state imaging represented by CMOS (Complementary Metal-oxide Semiconductor) image sensors. Broadly divided into devices. This type of solid-state imaging device is mainly used as an imaging device for various imaging devices such as a video camera for moving image shooting and a digital still camera for still image shooting.

  The solid-state imaging device has a pixel array in which a plurality of pixels are arranged in a matrix, and a photoelectric conversion element provided for each pixel in the pixel array generates and accumulates signal charges corresponding to incident light. The signal charge accumulated there is read out as a pixel signal. In addition, in a color-compatible solid-state imaging device, a color filter having a spectral transmission characteristic that transmits light in a specific wavelength range is provided for each pixel, and an electrical signal photoelectrically converted by incident light according to the spectral characteristic is used. A color image is obtained by performing desired color signal processing.

  Conventionally, as an arrangement of color filters, as shown in FIG. 16, a solid-state imaging device using primary color filters of red (R), green (G), and blue (B) which are the three primary colors of light is often used. ing. The color filter arrangement shown in the figure is called a primary color Bayer arrangement (G checkered RB color difference line sequential method). If the color filter arrangement of a certain row is an arrangement of R, G, R, G,. By arranging the color filter array as G, B, G, B,..., The G color filters are arranged in an alternating checkered pattern. Here, a pixel that detects (receives) light incident through the R color filter is referred to as an “R pixel”. Similarly, a pixel that detects light incident through the G color filter is referred to as “G pixel”, and a pixel that detects light incident through the B color filter is referred to as “B pixel”.

  In the primary color Bayer arrangement, G pixels, which are more sensitive than R pixels and B pixels, are arranged at twice the density of R pixels and B pixels, and the G pixels are arranged in a checkered pattern so that they are perpendicular to the horizontal direction. It is characterized in that the arrangement of G pixels is symmetric in both directions. This is because human vision is highly sensitive to G light, and as a result, the primary color Bayer array is generally said to have high resolution and good color reproducibility. However, due to spectral characteristics, complementary color filters using cyan (Cy), magenta (Mg), yellow (Ye), and green (G) color filters have a higher spectral transmittance than the primary color Bayer arrangement, especially in camcorders. It is said that this complementary color filter is often used.

  In recent years, there has been a demand for improving the quality of captured images under low illuminance in image input devices using solid-state imaging devices such as digital still cameras and camcorders. In imaging under low illuminance, it is common to slow the shutter speed, use a lens with a bright aperture value, or use an external light source such as a flash.

  However, when the shutter speed is slowed down, the quality of the captured image is degraded, such as camera shake and subject blur, and the resolution of the image is lowered. In addition, when a lens with a bright aperture value is used, there is a disadvantage that the size of the lens becomes large, or the aperture value is limited due to the structure of a zoom lens, and the lens cannot be very bright. Also, when using an external light source such as a flash, there are drawbacks such as having to carry the flash or increasing the power consumption by using the flash. In many cases, it cannot be used to protect the subject.

  In general, a light source having a low color temperature and a large amount of infrared light is often used under low illumination conditions. Therefore, the applicant has proposed a technique for increasing the effective photographing sensitivity by taking invisible light such as infrared light as incident light. FIG. 17 shows the arrangement of color filters used in this technique. In the illustrated color filter arrangement, each color filter is arranged in an oblique lattice form in a form in which square lattice color filters are inclined by 45 °. In addition to the R, G, and B color filters described above, the A color filter is used as the type of color filter. The A color filter is a color filter having a wider wavelength range for transmitting light than the R, G, and B color filters. Here, a pixel that detects light incident through the A color filter is referred to as an “A pixel”.

  When describing the regularity of a specific pixel array or filter array, first, it has a so-called alternate pixel array in which the pixel center of the next row is shifted by 1/2 pixel from the pixel center of one row. In the following, a two-dimensional pixel array is formed by repeating this alternate pixel arrangement. Second, any one color filter of R, G, B, and A is arranged for each pixel. Third, the color filters in one row are arranged alternately in G and R, the color filters in the next row are all arranged in A, and the color filters in the next row are arranged alternately in B and G. In addition, G in a row composed of G and R and G in a row composed of B and G are arranged in a diagonal checkered pattern, and the colors of R, G, B, and A are repeated by repeating this color filter array. The filter is arranged. By adopting such an array of color filters (hereinafter referred to as “diagonal A checkered array”), image processing is performed to increase resolution using an image captured by a solid-state imaging device, and as a result, a high-quality captured image is obtained. Obtainable.

  By the way, with the recent increase in the number of pixels of solid-state imaging devices, high-resolution solid-state imaging devices exceeding, for example, megapixels (1 million pixels) are easily used. In this case, in normal imaging, it is required to obtain a high-resolution captured image using the output signals of all or most of the pixels of the solid-state imaging device, but on the other hand, low-resolution imaging may be required. Specifically, for example, when high resolution such as monitoring mode is not used, or when it is desired to extend the life of a battery or the like by reducing power consumption by not reading out signals of all pixels, the captured image is captured by low resolution imaging. For example, when it is desired to save the storage capacity, it is necessary to capture a moving image at a high frame rate by reducing the resolution at the same reading speed. Therefore, it is necessary to perform low-resolution imaging in addition to normal resolution (high resolution).

  In an imaging apparatus using a single-plate color type solid-state imaging apparatus, a technique of thinning and adding signals of pixels provided in a pixel array is known as a technique for imaging at a low resolution. When low-resolution imaging is performed by such decimation and addition, the color arrangement in the case of processing the pixel signal obtained by reading all pixels without performing decimation and the pixel signal obtained by performing decimation and addition. It is desirable that the color arrangement when processing is the same arrangement. The reason is that when a signal read out from a pixel in the pixel array is processed by a signal processing circuit (DSP) in the subsequent stage, a color image is generated by performing an arithmetic process corresponding to a certain color coding rule. This is because if the pixel color arrangement changes between when the thinning addition is performed and when it is not performed, the same color coding rule cannot be applied in the color signal processing, and the signal processing circuit cannot be shared.

  Therefore, the present invention provides a common signal processing for pixel signals extracted by performing decimation and addition of signals and pixel signals extracted by performing all pixel readout in a solid-state imaging device employing a diagonal A checkered color filter array. The object is to enable processing using a circuit.

  In the solid-state imaging device according to the present invention, a plurality of pixels are two-dimensionally arranged in a matrix, and the pixel center of the next row is shifted by 1/2 pixel in the row direction and the column direction with respect to the pixel center of one row. A pixel array having an oblique grid-like pixel arrangement, and a color filter arranged for each pixel of the pixel array, and transmitting a predetermined band of light in the visible light region R (red), G (green), B (Blue) color filters and A, R, G, B, A color filters including at least the light in the entire visible light region, and G, R colors for pixels in a certain row Filters are alternately arranged, color filters of A are arranged in the pixels of the next row, and color filters of G and B are alternately arranged in the pixels of the next row to form a diagonal A checkered structure The row direction of the array and the pixels on which the R, G, B color filters are arranged Adjacent m (m is an odd number of 3 or more) pixels are set as a unit pixel block, and every other pixel in the row direction from the pixels arranged at the end of the pixel block in the unit pixel block is a signal addition target. Drive means for performing pixel signal thinning-out for each unit pixel block adjacent in the row direction, with other pixels as signals to be thinned out.

  In the driving method of the solid-state imaging device according to the present invention, a plurality of pixels are two-dimensionally arranged in a matrix, and the pixel center of the next row is 1/2 in the row direction and the column direction with respect to the pixel center of one row. A pixel array having an oblique lattice-like pixel arrangement shifted by two pixels, and a color filter for each pixel of the pixel array, and R (red), G (transmitting light in a predetermined band within the visible light region Green), B (blue) color filters and R color filters including A color filters that transmit at least light in the entire visible light region. , R color filters are alternately arranged, A color filter is arranged for the pixels in the next row, and G, B color filters are alternately arranged for the pixels in the next row. When driving a solid-state imaging device comprising a color filter array, the R, G, With respect to the pixels in which the color filters are arranged, m (m is an odd number of 3 or more) pixels adjacent in the row direction are defined as unit pixel blocks, and the pixels from the pixels arranged at the ends of the pixel blocks in the unit pixel block Pixel signals are thinned and added for each unit pixel block adjacent in the row direction, with every other pixel in the direction as a signal addition target and other pixels as signal thinning targets.

  In the solid-state imaging device and the driving method of the solid-state imaging device, m (m is an odd number of 3 or more) pixels adjacent in the row direction are unit pixels with respect to pixels in which R, G, and B color filters are arranged. Units that are adjacent to each other in the row direction, with every other pixel in the row direction from the pixels arranged at the end of the pixel block in this unit pixel block as a signal addition target, and other pixels as signal thinning targets By performing decimation and addition of pixel signals for each pixel block, pixel rows in which G and R color filters are alternately arranged, and G and B color filters are alternately arranged in a diagonal color checkered color filter array. In the pixel row arranged in the pixel row, the color arrangement of the pixels after the thinning-out addition is the same as the color arrangement of the original color filter.

  In addition, with respect to pixels in which R, G, and B color filters are arranged, pixel signals are thinned and added by using pixels arranged in the same column in the row direction as signal addition targets and thinning targets. , B over the entire pixel in which the color filters are arranged, the color arrangement of the pixels after the decimation is the same as the color arrangement of the original color filter. Further, regarding the pixels in which the color filter A is arranged, m pixels (m is an odd number of 3 or more) adjacent in the row direction are set as unit pixel blocks, and are arranged at the ends of the pixel blocks in the unit pixel block. The pixel signal is thinned and added for each unit pixel block adjacent in the row direction, with every other pixel in the row direction from the pixel being the signal addition target and the other pixels being the signal thinning target. The center between the plurality of pixels to be added in the unit pixel block including the arranged pixels is located at the boundary between the unit pixel blocks including the pixels in which the R, G, and B color filters are arranged in the row direction. If this is done, the color arrangement of the pixels after the decimation addition is the same as the original color filter arrangement over the entire pixels where the R, G, B, and A color filters are arranged.

  Further, the solid-state imaging device according to the present invention has a diagonal lattice shape in which a plurality of pixels are two-dimensionally arranged in a matrix and the pixel center of the next row is shifted by ½ pixel from the pixel center of one row. And an R (red), G (green), and B (blue) filter that arranges a color filter for each pixel of the pixel array and transmits light in a predetermined band within the visible light region. R, G, B, and A color filters including a color filter and an A color filter that transmits at least light in the entire visible light region, and G and R color filters are alternately arranged on pixels in a row. A color filter array in which a color filter of A is arranged in the pixels of the next row, and a color filter of G and B is alternately arranged in the pixels of the next row to form an oblique A checkered structure; Adjacent to the pixel in which R, G, B color filters are arranged in the row direction An m × n pixel block including (m is an odd number of 3 or more) pixels and n (n is an odd number of 3 or more) pixels adjacent in the column direction is defined as a unit pixel block, and the pixels within the unit pixel block For every unit pixel block adjacent in the row and column directions, every other pixel in the row and column directions from the pixels arranged in the corners of the block is subject to signal addition, and the other pixels are subject to signal thinning. Drive means for performing decimation and addition of pixel signals.

  In the solid-state imaging device driving method according to the present invention, a plurality of pixels are two-dimensionally arranged in a matrix, and the pixel center of the next row is shifted by ½ pixel from the pixel center of one row. A pixel array having a pixel array and a color filter arranged for each pixel of the pixel array and transmitting light in a predetermined band within the visible light region R (red), G (green), B (blue) And R, G, B, and A color filters including at least the A color filter that transmits light in the entire visible light region, and G and R color filters are alternately arranged in a row of pixels. A color filter array in which a color filter of A is arranged in the pixels of the next row, and a color filter of G and B is alternately arranged in the pixels of the next row to form a diagonal A checkered structure. When driving the solid-state imaging device provided, the R, G, B color filters are arranged. The pixel unit is an m × n pixel block including m (m is an odd number of 3 or more) pixels adjacent in the row direction and n (n is an odd number of 3 or more) pixels adjacent in the column direction. A pixel block, every other pixel in the row direction and the column direction from the pixels arranged in the corner of the pixel block in the unit pixel block is a signal addition target, and the other pixels are signal thinning targets in the row direction. The pixel signals are thinned and added for each unit pixel block adjacent in the column direction.

  In the solid-state imaging device and the driving method of the solid-state imaging device, m (m is an odd number of 3 or more) pixels adjacent in the row direction and the column direction with respect to the pixels in which R, G, and B color filters are arranged. An m × n pixel block including n pixels (n is an odd number of 3 or more) adjacent to the pixel block is defined as a unit pixel block, and the pixels arranged at the corners of the pixel block in the unit pixel block are arranged in the row direction and the column direction. In this case, every other pixel is subject to signal addition, and other pixels are subject to signal thinning, and pixel signals are thinned and added for each unit pixel block adjacent in the row and column directions. The color arrangement of the R, G, and B pixels is the same as the color arrangement of the R, G, and B pixels in the diagonal A checkered arrangement.

  In addition, the pixel in which the color filter A is arranged includes m (m is an odd number of 3 or more) pixels adjacent in the row direction and n (n is an odd number of 3 or more) pixels adjacent in the column direction. An m × n pixel block is defined as a unit pixel block, and every other pixel in the row direction and column direction from the pixels arranged in the corner of the pixel block in the unit pixel block is a signal addition target, and the other pixels are As a signal thinning target, pixel signals are thinned and added for each unit pixel block adjacent in the row direction and the column direction, and a plurality of pixels to be added in a unit pixel block including a pixel in which a color filter of A is arranged Is located at the boundary between unit pixel blocks including pixels in which R, G, and B color filters are arranged in the row direction and the column direction, the colors of R, G, B, and A Pixels with an array of filters Over the body, the color arrangement of the pixels after the decimation addition is the same as the color arrangement of the R, G, B, and A pixels in the diagonal A checkered arrangement. It becomes an array.

  According to the present invention, even when a diagonal A checkered color filter array is employed in the solid-state imaging device, the pixel signal extracted by performing decimation addition of the signal and the pixel signal extracted by performing all pixel readout are shared. The signal processing circuit can be used for processing. In addition, it is possible to meet a request for imaging at a low resolution by thinning and adding pixel signals.

  Hereinafter, specific embodiments of the present invention will be described in detail with reference to the drawings. In this embodiment, a charge transfer type solid-state imaging device (hereinafter referred to as “CCD solid-state imaging device”) composed of a CCD image sensor will be described as an example. However, the present invention is representative of a CMOS image sensor. The present invention is also applicable to an XY address type solid-state imaging device.

  FIG. 1 is a schematic diagram showing a configuration example of a CCD solid-state imaging device to which the present invention is applied. As shown in the figure, a plurality (large number) of pixels 2 are two-dimensionally arranged in a matrix in the pixel array 1. Each pixel 2 includes a photoelectric conversion element (such as a photodiode) that converts light incident on the light receiving portion into an electrical signal (charge amount) corresponding to the amount of light and accumulates it. The pixels 2 provided in the pixel array 1 photoelectrically convert light incident through the corresponding color filters.

  The pixel array of the pixel array 1 is an oblique grid pixel array in which the pixel center of the next row is shifted by 1/2 pixel in the row direction (horizontal direction) and the column direction (vertical direction) with respect to the pixel center of a certain row. It has become. When this diagonal grid pixel arrangement is adopted, each pixel 2 is arranged every other row in the row direction in any pixel row, and each pixel 2 is arranged in the column direction in any pixel column. Arranged every other column.

  The CCD solid-state imaging device includes the color filter array having the diagonal A checkered structure shown in FIG. In the color filter array having the diagonal A checkered structure, different color filters are formed for each pixel 2 of the pixel array 1 with a 1: 1 correspondence, so that the spatial color arrangement of the color filter is the pixel in the pixel array 1. Similar to the arrangement of 2, it has an oblique lattice shape.

  In addition, the diagonal A checkered color filter employed in the color filter array adds the A color filter to the R (red), G (green), and B (blue) color filters that are the three primary colors of light. In addition, the four types of color filters are combined. Among these, R, G, and B color filters are primary color filters that transmit light in a predetermined band within the visible light region mainly for color reproduction. That is, the R color filter is a primary color filter that transmits red component light in the visible length region, and the G color filter is a primary color filter that transmits green component light in the visible light region, The color filter B is a primary color filter that transmits blue component light in the visible light region.

  On the other hand, the color filter A is a full-area transmission filter that transmits at least light in the entire visible light region mainly for high sensitivity under low illumination conditions. The color filters A having such transmission characteristics are arranged in a diagonal checkered pattern in the color filter array. The color filter A is a filter having a wider wavelength range for transmitting light (in other words, less loss of light amount) than the primary color filter for color reproduction described above. Specifically, for example, a filter that transmits the entire light from the visible light region to the infrared light region, a filter that transmits the entire light from the ultraviolet light region to the visible light region, or the ultraviolet light region to visible light. It is a filter that transmits light in the entire region from the region to the infrared light region.

  For this reason, the R, G, and B color filters are formed (film formation) with a material mixed with a dye suitable for the wavelength range that transmits light, but the A color filter does not mix such a dye. Formed with transparent materials, materials with less pigment than R, G, B color filters, grayish materials, materials that are slightly whiter than transparent materials, interlayer insulation films such as silicon oxide films, etc. Is done. The A color filter transmits light in a wavelength range that is biased to a specific color range among the R, G, and B light wavelength ranges (for example, an emerald color that is thinner than the G color filter). ), But has a characteristic of transmitting light in a wide wavelength region in the visible light region. For example, as shown in FIG. 2, the spectral sensitivity characteristic of the A pixel that detects incident light through the A color filter having such characteristics has higher sensitivity than the R, G, and B pixels in the visible light region. It has sensitivity to light in a wide wavelength region other than the visible light region.

  In the diagonal A checkered color filter, G and R color filters are alternately arranged for pixels in one row, A color filters are arranged for pixels in the next row, and pixels in the next row. The G and B color filters are alternately arranged, and the filter array is configured by repeating this color filter arrangement. Further, in the color filter of the diagonal A checkered arrangement, the G and R color filters are alternately arranged in the pixels of a certain column, the A color filter is arranged in the pixels of the next column, and the pixels of the next column are further arranged. The G and B color filters are alternately arranged, and the filter array is configured by repeating this color filter arrangement. The G color filter belonging to the pixel row in which the G and R color filters are alternately arranged and the G color filter belonging to the pixel row in which the G and B color filters are alternately arranged are included in the color filter array. Thus, every other pixel is arranged in a diagonal checkered pattern.

  In the pixel array 1, a plurality of vertical transfer registers 3 are provided along the vertical direction for each pixel 2. The vertical transfer register 3 is provided adjacent to the pixel 2 for each pixel column. The vertical transfer register 3 transfers signal charges read from the pixels 2 in each row in the vertical direction, and is constituted by a vertical CCD. Incidentally, in the pixel array 1, the vertical direction is the column direction and the horizontal direction is the row direction.

  At the end of each vertical transfer register 3, a horizontal transfer register 4 is provided along the horizontal direction. The horizontal transfer register 4 transfers the signal charges transferred in the vertical direction by the respective vertical transfer registers 3 in the horizontal direction, and is constituted by a horizontal CCD. An output amplifier 5 is provided at the transfer destination of the signal charge by the horizontal transfer register 4.

  The output amplifier 5 converts the signal charge transferred in the horizontal direction by the horizontal transfer register 4 into a voltage and outputs the voltage. The signal output from the output amplifier 5 is input to the signal processing circuit 6. The signal processing circuit 6 takes in the signal output from the output amplifier 5 and performs color signal processing (calculation processing) corresponding to a certain color coding rule to generate a color image signal. The drive circuit 7 generates a drive pulse (hereinafter referred to as “transfer pulse”) for transferring a signal charge, and drives the vertical transfer register 3 and the horizontal transfer register 4 in accordance with the transfer pulse.

  The CCD solid-state imaging device having the above-described configuration has a mode in which the signals of the respective pixels 2 two-dimensionally arranged in the pixel array 1 are thinned out and added (hereinafter referred to as “decimated addition mode”), and all pixels without being thinned out. And a mode for reading and processing signals (hereinafter, “all-pixel reading mode”). The drive circuit 7 that drives the CCD solid-state imaging device based on the thinning addition mode or the all-pixel readout mode supplies a vertical transfer pulse to the vertical transfer register 3 and a horizontal transfer pulse to the horizontal transfer register 4. In any mode, the pixel signal read out using the pixel having the A color filter is used as a luminance signal in signal processing.

  When the CCD solid-state imaging device is driven in the thinning and adding mode, pixel signals are thinned and pixel signals are added. Any method may be used as a pixel signal thinning-out method or addition method. For example, pixel signal thinning can be realized by not reading a signal from a pixel to be thinned, or by not using the signal for color signal processing even if the signal is read. More specifically, for a pixel having any one of R, G, and B color filters, the signal processing circuit does not read out the signal, or the signal is read out for color reproduction by the signal processing circuit. By not using the signal processing, it is possible to perform pixel signal thinning. In addition, regarding the pixel having the A color filter, the pixel signal is not read out, or even if the signal is read out, the signal is not used for signal processing for high sensitivity in the signal processing circuit. It is possible to perform decimation.

  On the other hand, with respect to pixel signal addition, in the case of a CCD solid-state imaging device, when a signal charge read from a plurality of pixels to which signals are to be added is transferred between the vertical transfer register 3 and the horizontal transfer register 4, a drive circuit is provided. 7, signal charges of a plurality of pixels in the vertical direction or signal charges of a plurality of pixels in the horizontal direction are mixed in the potential wells, respectively, by controlling the potential distribution using the transfer pulses supplied to the transfer registers 3 and 4 from 7. Can be realized.

  Further, in the case of a CMOS solid-state imaging device, a plurality of columns can be simultaneously connected to a horizontal signal line by controlling a capacitor (a capacitor holding a signal read from a pixel) provided for each pixel column by switching control. It is possible to add and output pixel signals. In addition, by simultaneously selecting and driving pixels in a plurality of rows to be added with a vertical register, it is possible to add and output the signals of the pixels in the plurality of rows to a common column signal line. is there. In addition to the addition method based on the analog calculation, it can be realized by a method of performing analog-digital conversion on the signal read from the pixel to which the signal is added and adding the converted signal by digital calculation. is there.

  When the CCD solid-state imaging device is driven in the thinning and adding mode, signals of a plurality of pixels having the same color filter are added as will be described later. For this reason, the color component of the pixel signal (addition signal) obtained by the addition is handled as the same color component as the color filter of the pixel to be added. When the CCD solid-state imaging device is driven in the all-pixel reading mode, basically, the signals of all the pixels 2 provided in the pixel array 1 are simultaneously read out to the vertical transfer register 3. For this reason, the color arrangement of pixels when driven in the all-pixel readout mode is the same as the diagonal A checkered arrangement adopted in the color filter array.

[First Embodiment]
FIG. 3 is a diagram for explaining the first embodiment applied when the CCD solid-state imaging device is driven in the thinning and adding mode. The driving method based on the thinning-out addition mode shown in the figure is a pixel row in which G and R color filters are alternately arranged or a pixel row in which G and B color filters are alternately arranged in a diagonal A checkered color filter array. For example, two different color filters are applied to pixel rows arranged alternately. A thick line in the figure is a line connecting pixels to which signals are to be added, and means addition of signals.

  In this thinning-out mode, signals of two consecutive pixels using the same color filter X as one color filter X out of two color filters in the row direction (indicated by X and Y in the example) are used. The signals of two consecutive pixels of the same color filter Y and the other color filter Y adjacent to each other in the row direction of the pixel to which the signal has been added are added, and the signal between the pixels to which the signal has been added is added. The signal of the pixel of the color filter different from the added pixel is thinned, and the thinning addition operation in the row direction is performed by repeating this thinning addition.

  Specifically, assuming that color filters are arranged in the order of X, Y, X, Y, X, Y, X, Y, X,... In the row direction, the color filter Y is sandwiched in the row direction. Signals of pixels of two successive color filters X are added, and signals of pixels of the color filter Y sandwiched between the two pixels are thinned out. Similarly, the pixels of another color filter Y adjacent to the pixel of the color filter X that has undergone signal addition in the row direction are also the pixels of the two color filters Y that are continuous in the row direction across the color filter X. The signals are added, and the signals of the pixels of the color filter X sandwiched between the two pixels are thinned out. In other words, regarding pixels in which X and Y color filters are arranged, m (m is an odd number of 3 or more, m = 3 in this embodiment) adjacent (continuous) in the row direction is defined as a unit pixel block. In this unit pixel block, every other pixel in the row direction from the pixel arranged at the end of the pixel block, that is, a pixel having the same color filter as a signal addition target, and other pixels as signal thinning targets, The pixel signal is thinned out and added for each unit pixel block.

  In this case, the unit pixel blocks are divided so as to be adjacent to each other without overlapping each other in the row direction. Therefore, when m = 3 as in this embodiment, in the row direction, a unit pixel block composed of three pixels in which the color filters are arranged in the order of X, Y, and X, and the color filters are Y, X , Y unit pixel blocks composed of three pixels arranged in the order of Y are alternately arranged. In addition, among the three pixels constituting each unit pixel block, the pixel signals are thinned and added for each unit pixel block, with the two pixels on both sides being the signal addition target and the central pixel being the signal thinning target. Become.

  Further, by adding the signals of a plurality of (two in the present embodiment) pixels to be added from one unit pixel block that performs decimation addition, the addition signal is pseudo-pixel signal for one pixel. Take out as. For this reason, the pixel position of the pixel signal extracted by addition is specified by the barycentric position of the pixel after the thinning addition. When adding signals of a plurality of pixels to be added in a unit pixel block, the pixel centroid after thinning-out is always at the center between the plurality of pixels to which signals are added. For this reason, in the present embodiment, the center (center of gravity) between the two pixels that are signal addition targets is specified as the pixel position of the pixel signal (addition signal) extracted by thinning out addition in the unit pixel block.

  Thereby, for example, in a unit pixel block including three pixels in which color filters are arranged in the order of X, Y, and X, signals of two pixels on both sides (pixels of color filter X) are added and sandwiched between them. When the signals of the pixels (color filter Y pixels) are thinned out, the pixel centroid after the thinning addition is at the center between the two pixels on both sides. Therefore, as described above, when the color filters are arranged in the order of X, Y, X, Y, X, Y, X, Y, X,... The arrangement is X, Y, X,... In the row direction. This arrangement is the same as the original color filter arrangement, that is, the color arrangement when pixel signals are read out in the all-pixel reading mode. In a pixel row in which color filters are arranged in the order of X, Y, X, Y, X, Y, X, Y, X,..., A unit pixel block composed of three pixels adjacent in the row direction. The addition signal obtained by adding the signals of the two pixels of the same color filter is handled as a pixel signal for one pixel in a pseudo manner. For this reason, the number of pixel signals after decimation is 1/3 times that of the all-pixel reading mode, and the number of pixels for reading signals is 2/3 times that of the all-pixel reading mode.

[Second Embodiment]
FIG. 4 is a diagram for explaining a second embodiment applied when the CCD solid-state imaging device is driven in the thinning and adding mode. The driving method based on the thinning-out addition mode shown in the figure is a pixel row in which G and R color filters are alternately arranged and a pixel row in which G and B color filters are alternately arranged in a diagonal A checkered color filter array. In addition, pixel signals are thinned and added by applying the same rules as in the first embodiment, and pixel rows in which G and R color filters are alternately arranged and G and B color filters are alternately arranged. The pixel signals are thinned and added by using the pixels arranged in the same column in the arranged pixel rows as the addition target and the thinning target.

  That is, regarding pixels in which R, G, and B color filters are arranged, m (m is an odd number of 3 or more, m = 3 in the present embodiment) adjacent in the row direction is defined as a unit pixel block. In the unit pixel block, every other pixel in the row direction from the pixel arranged at the end of the pixel block, that is, a pixel having the same color filter is a signal addition target, and the other pixels are signal thinning targets The pixel signal is thinned and added for each pixel block. At that time, the pixels arranged at the end of the pixel block are also included in the signal addition target. “Pixels arranged at the end of the pixel block” refers to pixels arranged at the end in the row direction among m pixels constituting the unit pixel block.

  Specifically, for each pixel column of the pixel array unit 1, for example, from the left end to the right end of the figure, the first column, the second column, the third column, the fourth column, the fifth column, the sixth column, When virtual column numbers (serial numbers) are assigned in order, G and B color filters are alternately arranged between the first to fifth columns constituting the first unit pixel block in the row direction. Regarding the pixel row, the signal of the G pixel arranged in the first column and the signal of the G pixel arranged in the fifth column are added, and the signal of the B pixel arranged in the third column therebetween is thinned out. For pixel rows in which G and R color filters are alternately arranged, the signal of the R pixel arranged in the first column and the signal of the R pixel arranged in the fifth column are added, and 3 between them is added. The signals of G pixels arranged in the columns are thinned out.

  Further, between the seventh column to the eleventh column constituting the next unit pixel block in the row direction, the B pixels arranged in the seventh column are related to the pixel rows in which the G and B color filters are alternately arranged. The signal and the signal of the B pixel arranged in the eleventh column are added, and the signal of the G pixel arranged in the ninth column therebetween is thinned out. For the pixel row in which the G and R color filters are alternately arranged, the G pixel signal arranged in the seventh column and the G pixel signal arranged in the eleventh column are added, and 9 in between. The signals of R pixels arranged in the column are thinned out. This thinning-out addition is similarly repeated for the R pixel, G pixel, and B pixel in the 13th column and thereafter.

  Thereby, thinning-out addition in the row direction can be realized for the entire pixel array 1. Further, as described above, the pixel position after the decimation addition is specified by the center (center of gravity) between a plurality of (two in the present embodiment) pixels that are signals to be added in the unit pixel block, and then the decimation addition is performed. In the pixel row in which G and B color filters are alternately arranged, G, B, G, B,... Are repeated in the row direction, and G and R color filters are alternately arranged. In the pixel row, R, G, R, G,... Are repeated in the row direction. Therefore, the color arrangement of the R, G, and B pixels after the thinning-out addition is the same as the color arrangement of the R, G, and B pixels in the diagonal A checkered arrangement. Therefore, when driving in the thinning-out addition mode, color signal processing can be performed by applying the same color coding as in the all-pixel readout mode.

  In addition, in the pixel row in which the G and B color filters are alternately arranged and the pixel row in which the G and R color filters are alternately arranged, from the unit pixel block composed of three pixels adjacent in the row direction, An addition signal obtained by adding the signals of two pixels of the same color filter is handled as a pixel signal for one pixel in a pseudo manner. For this reason, the number of pixel signals after the decimation addition is 1/3 times that of the all-pixel reading mode, whereas the number of pixels from which signals are read is 2 / times that of the all-pixel reading mode. The effective pixel signal output is increased by adding a plurality of (two in this embodiment) pixel signals detected by using the same color filter, so that the anti-noise performance is improved.

[Third Embodiment]
FIG. 5 is a diagram for explaining a third embodiment applied when the CCD solid-state imaging device is driven in the thinning and adding mode. The driving method based on the thinning-out addition mode shown in the drawing is the same as that of the second embodiment in the pixel row in which G and B color filters are alternately arranged and the pixel row in which G and R color filters are alternately arranged. The same rule is applied to perform decimation and addition of pixel signals, and pixel signals are also decimation and addition for pixel rows in which the color filters of A are arranged.

  That is, regarding pixels in which the A color filter is arranged, m (m is an odd number of 3 or more, m = 3 in this embodiment) adjacent in the row direction is defined as a unit pixel block, and the unit pixel block includes Then, every other pixel from the pixels arranged at the end of the pixel block is subject to signal addition, and other pixels are subject to signal thinning, and pixel signal thinning is performed for each unit pixel block. At that time, the pixels arranged at the end of the pixel block are also included in the signal addition target. Further, the unit pixel blocks including the pixels in which the A color filter is arranged are divided so as to be adjacent to each other without overlapping each other in the row direction. In the present embodiment, since one unit pixel block is configured by three pixels (A pixels) adjacent in the row direction, two pixels on both sides of the three pixels are signal addition targets, The pixel signal is thinned and added for each unit pixel block with the pixel as a signal thinning target.

  Further, the center between a plurality of (two in the present embodiment) pixels to be added in the unit pixel block including the pixels in which the A color filter is arranged is the center of the R, G, B color filters in the row direction. It is located at a boundary between unit pixel blocks including the arranged pixels. That is, a virtual center line obtained by extending a straight line passing through the center (center of gravity) between two pixels to which signals are added in a unit pixel block including pixels in which the color filter of A is arranged is G and B The pixel rows in which the color filters are alternately arranged and the pixel rows in which the G and R color filters are alternately arranged are located at the boundary between the unit pixel blocks adjacent in the row direction.

  Specifically, with respect to each pixel column of the pixel array 1, for example, the first column, the second column, the third column, the fourth column, the fifth column, the sixth column,... When virtual column numbers (serial numbers) are assigned in order, the second and second pixel rows in which the G and B color filters are alternately arranged and the pixel rows in which the G and R color filters are alternately arranged are respectively provided. When performing decimation and addition in the same manner as in the above embodiment, in the pixel row in which the color filter of A is arranged, the fourth column to the fourth column constituting the first unit pixel block in the row direction are arranged in the fourth column. The signal of the arranged A pixel and the signal of the A pixel arranged in the eighth column are added, and the signal of the A pixel arranged in the sixth column therebetween is thinned out. Further, between the 10th to 14th columns constituting the next unit pixel block in the row direction, the signal of the A pixel arranged in the 10th column and the signal of the A pixel arranged in the 14th column are added. At the same time, the signals of the A pixels arranged in the 12th column are thinned out. This thinning-out addition is repeated in the same manner for the A pixels in the 16th and subsequent columns.

  As a result, in addition to the pixel row in which the G and B color filters are alternately arranged and the pixel row in which the G and R color filters are alternately arranged, the A color filter is added to the entire pixel array 1. Thinning addition in the row direction can also be realized for the arranged pixel rows. Further, as described above, the pixel position after the decimation addition is specified by the center (center of gravity) between the plurality of pixels to be added to the signal in the unit pixel block, so that R, G, B, The color arrangement of the A pixel is the same as the color arrangement of the R, G, B, and A pixels in the diagonal A checkered arrangement. Therefore, when driving in the thinning-out addition mode, color signal processing can be performed by applying the same color coding as in the all-pixel readout mode.

  In addition to the pixel row in which the G and B color filters are alternately arranged and the pixel row in which the G and R color filters are alternately arranged, the pixel row in which the A color filter is arranged also in the row direction. In addition, an addition signal obtained by adding two pixel signals from a unit pixel block composed of three adjacent pixels is treated as a pixel signal for one pixel in a pseudo manner. For this reason, the number of pixel signals after the decimation addition is 1/3 times that of the all-pixel reading mode, whereas the number of pixels from which signals are read is 2 / times that of the all-pixel reading mode. Tripled.

[Fourth Embodiment]
FIG. 6 is a diagram for explaining a fourth embodiment applied when the CCD solid-state imaging device is driven in the thinning and adding mode. In FIG. 6, for convenience of explanation, the display of the A pixel in which the A color filter is formed is omitted. The driving method based on the illustrated decimation / addition mode is symmetrical in the row direction and the column direction by developing the decimation / addition method described with reference to FIG. 3 in both the row direction and the column direction of the pixel array 1. A thinning and adding operation is performed.

  That is, for pixels in which R, G, and B color filters are arranged, n adjacent in the column direction to m (m is an odd number of 3 or more, m = 3 in this embodiment) adjacent in the row direction. (N is an odd number of 3 or more, n = 3 in this embodiment) An m × n pixel block including pixels is defined as a unit pixel block, and pixels arranged in the corners of the pixel block in the unit pixel block Pixel signals are thinned out and added for each unit pixel block, with every other pixel in the row direction and column direction, that is, pixels having the same color filter as signal addition targets and other pixels as signal thinning targets. At that time, pixels arranged in the corners of the pixel block are also included in the signal addition target. The “pixels arranged at the corners of the pixel block” means that among m × n pixels constituting the unit pixel block, the pixels are arranged at the end in the row direction and at the end in the column direction in the unit pixel block. Refers to a pixel.

  In this case, unit pixel blocks including pixels in which R, G, and B color filters are arranged are divided so as not to overlap each other in the row direction and the column direction. In the fourth embodiment, one unit pixel block is constituted by 3 × 3 pixel blocks, and there are a total of four pixels every other pixel from the pixels arranged in the corner of the pixel block. Out of a total of nine pixels constituting one unit pixel block, four pixels are subject to signal addition, and the other five pixels are subject to signal thinning, and pixel signal thinning is performed for each unit pixel block. become.

  When the above-described thinning addition mode is applied, the center (centroid) between a plurality of (four in this embodiment) pixels, which are the pixel addition targets within the unit pixel block, are the pixel positions after the thinning addition as described above. Thus, the color arrangement of the R, G, and B pixels (pixel centroid) after the decimation addition is the same as the color arrangement of the R, G, and B pixels in the diagonal A checkered arrangement. Therefore, when driving in the thinning-out addition mode, color signal processing can be performed by applying the same color coding as in the all-pixel readout mode.

  Further, thinning addition can be realized in the row direction and the column direction for the R, G, and B pixels over the entire pixel array 1. For this reason, with respect to the R, G, and B pixels, signals of four pixels of the same color filter are respectively obtained from a unit pixel block composed of 3 × 3 pixel blocks (total of nine pixels) adjacent in the row direction and the column direction. The addition signal obtained by adding is treated as a pixel signal for one pixel in a pseudo manner. For this reason, the number of pixel signals after decimation is 1/9 times that in the all-pixel readout mode, whereas the number of pixels for signal readout is 4 / in comparison with the all-pixel readout mode. The effective pixel signal output is increased by the addition of a plurality of (four in this embodiment) pixel signals detected by using the same color filter, so that the anti-noise performance is improved. Also, the readout frame rate is 9/4 times faster than the all-pixel readout mode.

[Fifth Embodiment]
FIG. 7 is a diagram for explaining a fifth embodiment applied when the CCD solid-state imaging device is driven in the thinning and adding mode. The driving method based on the decimation / addition mode shown in the figure applies decimation / addition in the row direction and the column direction by applying the same rule as in the fourth embodiment to the pixels in which the R, G, and B color filters are arranged. In addition, thinning addition is also performed in the row direction and the column direction for the pixels on which the color filter A is arranged.

  That is, with respect to the pixels in which the A color filter is arranged, n (n is 3) adjacent to the m pixels (m is an odd number of 3 or more, m = 3 in the present embodiment) adjacent to the row direction. An m × n pixel block including the above odd number, n = 3 in this embodiment example, is defined as a unit pixel block, and the pixels arranged in the corner of the pixel block in the unit pixel block are arranged in the row direction and the column. Pixel signals are thinned and added for each unit pixel block, with every other pixel in the direction being a signal addition target and other pixels being a signal thinning target. At that time, the pixels arranged at the end of the pixel block are also included in the signal addition target.

  Further, the unit pixel blocks including the pixels in which the A color filter is arranged are divided so as to be adjacent to each other without overlapping each other in the row direction and the column direction. In the present embodiment, one unit pixel block is constituted by 3 × 3 pixel blocks, and there are four pixels every other pixel from the pixels arranged at the corners of the pixel block. Of the nine pixels constituting the block, four pixels are subject to signal addition, and the other five pixels are subject to signal decimation, and pixel signal decimation is performed for each unit pixel block.

  Further, the center between the plurality of pixels to be added in the unit pixel block including the pixel in which the A color filter is arranged is the center of the pixel in which the R, G, and B color filters are arranged in the row direction and the column direction. It is located at the boundary between the included unit pixel blocks. That is, in a unit pixel block including pixels in which the color filter of A is arranged, a virtual center line obtained by extending a straight line passing through the center (center of gravity) between four pixels to be added as signals in the row direction and the column direction is In the row direction and the column direction, it is located at a boundary portion of a unit pixel block including pixels in which R, G, and B color filters are arranged.

  Thereby, the thinning addition in the row direction and the column direction can be realized not only for the R, G, and B pixels but also for the A pixel over the entire pixel array 1. For this reason, with respect to the R, G, B, and A pixels, four pixels of the same color filter are respectively obtained from the unit pixel block composed of 3 × 3 pixel blocks (total of nine pixels) adjacent in the row direction and the column direction. The addition signal obtained by adding the above signals is handled as a pixel signal for one pixel in a pseudo manner. For this reason, the number of pixel signals after decimation is 1/9 times that in the all-pixel readout mode, whereas the number of pixels for signal readout is 4 / in comparison with the all-pixel readout mode. The effective pixel signal output is increased by the addition of a plurality (four in this embodiment) of pixel signals, so that the anti-noise performance is improved. Also, the readout frame rate is 9/4 times faster than the all-pixel readout mode.

[Sixth Embodiment]
FIG. 8 is a diagram for explaining a sixth embodiment applied when the CCD solid-state imaging device is driven in the thinning-out addition mode. The driving method based on the thinning-out addition mode shown in the figure is similar to the first embodiment, in which the G and B color filters in the diagonal A checkered structure are alternately arranged, or the G and R color filters are alternately arranged. The color filters of two different colors such as arranged rows are applied to rows arranged alternately. In the first embodiment, one unit pixel block is configured with m = 3, whereas in the sixth embodiment, one unit pixel block is configured with m = 5. To do.

  In such a thinning-out mode, signals of three consecutive pixels using the same color filter X as one color filter X out of two color filters in the row direction (indicated by X and Y in the figure) are obtained. Add the signals of the three consecutive pixels of the same color filter Y and the other color filter Y adjacent in the row direction of the pixel to which the signal is added, and add the signal between the pixels to which the signals are added. The signal of the pixel of the color filter different from the added pixel is thinned, and the thinning addition operation in the row direction is performed by repeating this thinning addition.

  Specifically, assuming that color filters are arranged in the order of X, Y, X, Y, X, Y, X, Y, X,... In the row direction, the color filter Y is sandwiched in the row direction. Signals of pixels of three consecutive color filters X are added, and signals of pixels of the color filter Y sandwiched between the three pixels are thinned out. Similarly, the pixels of another color filter Y adjacent to the pixel of the color filter X to which the signal is added in the row direction are also the pixels of three color filters Y that are continuous in the row direction with the color filter X interposed therebetween. The signals are added, and the signals of the pixels of the color filter X sandwiched between the three pixels are thinned out. That is, with respect to a pixel in which X and Y color filters are arranged, five pixels adjacent (continuous) in the row direction are set as a unit pixel block, and one pixel from the pixels arranged at the end of the pixel block in this unit pixel block. Pixel signal thinning and addition are performed for each unit pixel block, with every other pixel, that is, a pixel having the same color filter as a signal addition target and other pixels as signal thinning targets.

  Also in this case, the unit pixel blocks are divided so as to be adjacent to each other without overlapping each other in the row direction. Therefore, when m = 5 as in the present embodiment, a unit pixel block including five pixels in which the color filters are arranged in the order of X, Y, X, Y, and X in the row direction, and the color filter Are unit pixel blocks composed of five pixels arranged in the order of Y, X, Y, X, and Y. Further, out of the five pixels constituting each unit pixel block, two pixels at both ends and the center (middle) pixel are subject to signal addition, and the other pixels are subject to signal thinning out. The signal is thinned and added.

  When the above-described thinning addition mode is employed, the center (centroid) between a plurality of (three in this embodiment) pixels, to which the pixel position after the thinning addition is added as a signal addition target in the unit pixel block as described above. As a result, the pixel color array after decimation and addition becomes an X, Y, X,... Array in the row direction. This array is the original color filter array, that is, the pixel signal in the all-pixel read mode. Is the same as the color arrangement in the case of reading out. In a pixel row in which color filters are arranged in the order of X, Y, X, Y, X, Y, X, Y, X,..., From a unit pixel block consisting of five pixels adjacent in the row direction, An addition signal obtained by adding the signals of the three pixels of the same color filter is handled as a pixel signal for one pixel in a pseudo manner. For this reason, the number of pixel signals after decimation is 1/5 times that of the all-pixel readout mode, and the number of pixels from which signals are read is 3/5 times that of the all-pixel readout mode.

[Seventh Embodiment]
FIG. 9 is a diagram for explaining a seventh embodiment applied when the CCD solid-state imaging device is driven in the thinning-out addition mode. The driving method based on the thinning-out addition mode shown in the figure is a pixel row in which G and R color filters are alternately arranged and a pixel row in which G and B color filters are alternately arranged in a diagonal A checkered color filter array. Further, the same rule as in the sixth embodiment is applied to perform decimation and addition of pixel signals, and pixel rows in which G and R color filters are alternately arranged and G and B color filters are alternately arranged. The pixel signals are thinned and added by using the pixels arranged in the same column in the arranged pixel rows as the addition target and the thinning target.

  That is, regarding pixels in which R, G, and B color filters are arranged, m pixels (m is an odd number of 3 or more, m = 5 in this embodiment) adjacent in the row direction are defined as unit pixel blocks. In the unit pixel block, every other pixel in the row direction from the pixel arranged at the end of the pixel block, that is, a pixel having the same color filter is a signal addition target, and the other pixels are signal thinning targets The pixel signal is thinned and added for each pixel block. At that time, the pixels arranged at the end of the pixel block are also included in the signal addition target.

  Specifically, with respect to each pixel column of the pixel array 1, the first column, the second column, the third column, the fourth column, the fifth column, the sixth column,... When virtual column numbers (serial numbers) are assigned to, pixel rows in which G and B color filters are alternately arranged between the first to ninth columns constituting the first unit pixel block in the row direction. The signal of the G pixel arranged in the first column, the signal of the G pixel arranged in the fifth column, and the signal of the G pixel arranged in the ninth column are added, and the B pixel arranged in the third column And the signals of the B pixels arranged in the seventh column are thinned out. In addition, regarding the pixel row in which the G and R color filters are alternately arranged, the R pixel signal arranged in the first column, the R pixel signal arranged in the fifth column, and the ninth column are arranged. The R pixel signal is added, and the G pixel signal arranged in the third column and the G pixel signal arranged in the seventh column are thinned out.

  Also, between the 11th to 19th columns constituting the next unit pixel block in the row direction, the B pixels arranged in the 11th column are related to the pixel rows in which the G and B color filters are alternately arranged. The signal, the signal of the B pixel arranged in the 15th column, and the signal of the B pixel arranged in the 19th column are added, and the signal of the G pixel arranged in the 13th column and the G pixel arranged in the 17th column The pixel signal is thinned out. For the pixel rows in which the G and R color filters are alternately arranged, the G pixel signal arranged in the 11th column, the G pixel signal arranged in the 15th column, and the 19th column are arranged. The G pixel signal is added, and the R pixel signal arranged in the 13th column and the R pixel signal arranged in the 17th column are thinned out. This thinning-out addition is similarly repeated for the R pixel, G pixel, and B pixel in the 21st column and thereafter.

  Thereby, thinning-out addition in the row direction can be realized for the entire pixel array 1. Further, as described above, the pixel position after the thinning addition is specified by specifying the barycentric positions of a plurality (three in this embodiment) of pixels to be added to the signal in the unit pixel block. In a pixel row in which G and B color filters are alternately arranged, the color arrangement is a repetition of G, B, G, B,... In the row direction, and a pixel row in which G and R color filters are alternately arranged. Then, R, G, R, G,... Are repeated in the row direction. Therefore, the color arrangement of the R, G, and B pixels (pixel centroid) after the thinning-out addition is the same as the color arrangement of the R, G, and B pixels in the diagonal A checkered arrangement. Therefore, when driving in the thinning-out addition mode, color signal processing can be performed by applying the same color coding as in the all-pixel readout mode.

  Also, in a pixel row in which G and B color filters are alternately arranged and a pixel row in which G and R color filters are alternately arranged, a unit pixel block consisting of five pixels adjacent in the row direction is used. The addition signal obtained by adding the signals of the three pixels of the same color filter is handled as a pixel signal for one pixel in a pseudo manner. For this reason, the number of pixel signals after decimation is 1/5 times that of the all-pixel reading mode, whereas the number of pixels for reading signals is 3 / times that of the all-pixel reading mode. The effective pixel signal output is increased by the addition of three pixel signals detected by using the same color filter, so that the noise performance is further improved as compared with the second embodiment. It will be.

[Eighth Embodiment]
FIG. 10 is a diagram for explaining an eighth embodiment applied when the CCD solid-state imaging device is driven in the thinning and adding mode. The driving method based on the thinning-out addition mode shown in the figure is the same as that of the seventh embodiment in the pixel row in which G and B color filters are alternately arranged and the pixel row in which G and R color filters are alternately arranged. The same rule is applied to perform decimation and addition of pixel signals, and pixel signals are also decimation and addition for pixel rows in which the color filters of A are arranged.

  That is, regarding pixels in which the A color filter is arranged, m (m is an odd number of 3 or more, m = 5 in the present embodiment) adjacent in the row direction is defined as a unit pixel block, and the unit pixel block includes Then, every other pixel from the pixels arranged at the end of the pixel block is subject to signal addition, and other pixels are subject to signal thinning, and pixel signal thinning is performed for each unit pixel block. At that time, the pixels arranged at the end of the pixel block are also included in the signal addition target. Further, the unit pixel blocks including the pixels in which the A color filter is arranged are divided so as to be adjacent to each other without overlapping each other in the row direction. In the present embodiment, one unit pixel block is configured by five pixels (A pixels) adjacent in the row direction, and therefore, two pixels at both ends and a center (middle) pixel among the five pixels. Pixel signals are thinned and added for each unit pixel block, with the signal addition target and other pixels as signal thinning targets.

  Further, the center between a plurality of (three in the present embodiment) pixels to be added in the unit pixel block including the pixels in which the A color filter is arranged is the center of the R, G, B color filters in the row direction. It is located at a boundary between unit pixel blocks including the arranged pixels. That is, a virtual center line obtained by extending a straight line passing through the center (center of gravity) between two pixels to which signals are added in a unit pixel block including pixels in which the color filter of A is arranged is G and B The pixel rows in which the color filters are alternately arranged and the pixel rows in which the G and R color filters are alternately arranged are located at the boundary between the unit pixel blocks adjacent in the row direction.

  Specifically, with respect to each pixel column of the pixel array 1, for example, the first column, the second column, the third column, the fourth column, the fifth column, the sixth column,... When virtual column numbers (serial numbers) are assigned in order, in the pixel row in which the color filter of A is arranged, there are 6 columns between the 6th column and the 14th column constituting the first unit pixel block in the row direction. The signal of the A pixel arranged in the 10th column, the signal of the A pixel arranged in the 10th column, and the signal of the A pixel arranged in the 14th column are added, and the signal of the A pixel arranged in the 8th column The signals of the A pixels arranged in the 12th column are thinned out. This thinning-out addition is repeated in the same manner for the A pixels in the 16th and subsequent columns.

  As a result, in addition to the pixel row in which the G and B color filters are alternately arranged and the pixel row in which the G and R color filters are alternately arranged, the A color filter is added to the entire pixel array 1. Thinning addition in the row direction can also be realized for the arranged pixel rows. Further, as described above, the pixel position after the decimation addition is specified by the center (center of gravity) between the plurality of pixels to be added to the signal in the unit pixel block, so that R, G, B, The color arrangement of the A pixel is the same as the color arrangement of the R, G, B, and A pixels in the diagonal A checkered arrangement. Therefore, when driving in the thinning-out addition mode, color signal processing can be performed by applying the same color coding as in the all-pixel readout mode.

  In addition to the pixel row in which the G and B color filters are alternately arranged and the pixel row in which the G and R color filters are alternately arranged, the pixel row in which the A color filter is arranged also in the row direction. Then, an addition signal obtained by adding three pixel signals from a unit pixel block composed of five adjacent pixels is processed as a pixel signal for one pixel in a pseudo manner. For this reason, the number of pixel signals after decimation and addition is 1/5 times that of the all-pixel reading mode, whereas the number of pixels from which signals are read out is 3 / 5 times.

[Ninth Embodiment]
FIG. 11 is a diagram for explaining a ninth embodiment applied when the CCD solid-state imaging device is driven in the thinning-out addition mode. In FIG. 11, for convenience of explanation, the display of the A pixel on which the A color filter is formed is omitted. The driving method based on the thinning-out addition mode shown in the figure is a 5 × 3 pixel that is larger than the 3 × 3 pixel block employed in the fourth embodiment with respect to the pixels in which R, G, and B color filters are arranged. The pixel block is thinned and added using the pixel block as a unit pixel block.

  That is, for pixels in which R, G, and B color filters are arranged, n adjacent in the column direction to m (m is an odd number of 3 or more, m = 5 in this embodiment) adjacent in the row direction. (N is an odd number of 3 or more, n = 3 in this embodiment) An m × n pixel block including pixels is defined as a unit pixel block, and pixels arranged in the corners of the pixel block in the unit pixel block Pixel signals are thinned out and added for each unit pixel block, with every other pixel in the row direction and column direction, that is, pixels having the same color filter as signal addition targets and other pixels as signal thinning targets. At that time, pixels arranged in the corners of the pixel block are also included in the signal addition target.

  Also in this case, as in the fourth embodiment, the unit pixel blocks including the pixels in which the R, G, and B color filters are arranged are divided so as not to overlap each other in the row direction and the column direction. Is done. In the ninth embodiment, one unit pixel block is constituted by 5 × 3 pixel blocks, and a total of 6 pixels are arranged every other pixel from the pixels arranged in the corner of the pixel block in the unit pixel block. Therefore, out of a total of 15 pixels constituting one unit pixel block, six pixels are subject to signal addition, and the other nine pixels are subject to signal thinning, and the pixel signal for each unit pixel block. Thinning out addition is performed.

  When the thinning addition mode described above is applied, the pixel position after the thinning addition is performed at the center (center of gravity) between a plurality of (six in this embodiment) pixels as signal addition targets in the unit pixel block as described above. By specifying, the color arrangement of the R, G, and B pixels (pixel centroid) after the decimation addition is the same as the color arrangement of the R, G, and B pixels in the diagonal A checkered arrangement. Therefore, when driving in the thinning-out addition mode, color signal processing can be performed by applying the same color coding as in the all-pixel readout mode.

  Further, thinning addition can be realized in the row direction and the column direction for the R, G, and B pixels over the entire pixel array 1. For this reason, with respect to R, G, and B pixels, signals of six pixels of the same color filter are respectively obtained from a unit pixel block composed of 5 × 3 pixel blocks (total of 15 pixels) adjacent in the row direction and the column direction. The addition signal obtained by adding is treated as a pixel signal for one pixel in a pseudo manner. For this reason, the number of pixel signals after the decimation and addition is 1/15 times that of the all-pixel reading mode, whereas the number of pixels for reading signals is 6/6 compared to the all-pixel reading mode. The effective pixel signal output is increased by the addition of six pixel signals detected using the same color filter, so that the anti-noise performance is further improved as compared to the fourth embodiment. It will be. Also, the readout frame rate is 15/6 times faster than the all-pixel readout mode.

[Tenth embodiment]
FIG. 12 is a diagram for explaining a tenth embodiment applied when the CCD solid-state imaging device is driven in the thinning-out addition mode. The driving method based on the illustrated decimation addition mode performs decimation addition in the row direction and the column direction by applying the same rule as in the ninth embodiment to the R, G, and B pixels. Also for pixels in which color filters are arranged, thinning-out addition is performed in the row direction and the column direction.

  That is, with respect to the pixels in which the A color filter is arranged, n (n is 3) adjacent to m (m is an odd number of 3 or more, m = 5 in the present embodiment) adjacent in the row direction. An m × n pixel block including the above odd number, n = 3 in this embodiment example, is defined as a unit pixel block, and the pixels arranged in the corner of the pixel block in the unit pixel block are arranged in the row direction and the column. Pixel signals are thinned and added for each unit pixel block, with every other pixel in the direction being a signal addition target and other pixels being a signal thinning target. At that time, the pixels arranged at the end of the pixel block are also included in the signal addition target.

  Further, the unit pixel blocks including the pixels in which the A color filter is arranged are divided so as to be adjacent to each other without overlapping each other in the row direction and the column direction. In the present embodiment, one unit pixel block is constituted by 5 × 3 pixel blocks, and there are a total of six pixels every other pixel from the pixels arranged at the corners of the pixel block. Of the total 15 pixels constituting the block, 6 pixels are subject to signal addition, and the other 9 pixels are subject to signal thinning, and pixel signal thinning is performed for each unit pixel block.

  Further, the center between the plurality of pixels to be added in the unit pixel block including the pixel in which the A color filter is arranged is the center of the pixel in which the R, G, and B color filters are arranged in the row direction and the column direction. It is located at the boundary between the included unit pixel blocks. That is, in a unit pixel block including pixels in which the color filter of A is arranged, a virtual center line obtained by extending a straight line passing through the center (center of gravity) between six pixels to be added as signals in the row direction and the column direction is In the row direction and the column direction, it is located at a boundary portion of a unit pixel block including pixels in which R, G, and B color filters are arranged.

  Thereby, the thinning addition in the row direction and the column direction can be realized not only for the R, G, and B pixels but also for the A pixel over the entire pixel array 1. For this reason, with respect to the R, G, B, and A pixels, six pixels of the same color filter are respectively obtained from the unit pixel block composed of 5 × 3 pixel blocks (total of 15 pixels) adjacent in the row direction and the column direction. The addition signal obtained by adding the above signals is handled as a pixel signal for one pixel in a pseudo manner. For this reason, the number of pixel signals after the decimation and addition is 1/15 times that of the all-pixel reading mode, whereas the number of pixels for reading signals is 6/6 compared to the all-pixel reading mode. The effective pixel signal output is increased by the addition of six pixel signals detected using the same color filter, so that the anti-noise performance is improved. Also, the readout frame rate is 15/6 times faster than the all-pixel readout mode.

[Eleventh embodiment]
FIG. 13 is a diagram for explaining an eleventh embodiment applied when the CCD solid-state imaging device is driven in the thinning-out addition mode. The driving method based on the decimation / addition mode shown in the figure is a unit pixel block configuration applied when decimation / addition of signals of pixels in which R, G, and B color filters are arranged, as compared with the ninth embodiment. Is different. Specifically, in the ninth embodiment, a 5 × 3 pixel block adjacent in the row direction and the column direction is used as one unit pixel block. In the eleventh embodiment, the row direction A 5 × 5 pixel block adjacent in the column direction is defined as one unit pixel block.

  That is, for pixels in which R, G, and B color filters are arranged, n (m is an odd number of 3 or more, m = 5 in this embodiment) adjacent in the row direction and n ( n is an odd number of 3 or more, and in this embodiment, n = 5). An m × n pixel block including pixels is defined as a unit pixel block, and the pixels arranged in the corners of the pixel block in the unit pixel block are arranged in the row direction. Pixel signal decimation is performed for each unit pixel block with every other pixel in the column direction, that is, a pixel having the same color filter as a signal addition target and other pixels as signal decimation targets. At that time, pixels arranged in the corners of the pixel block are also included in the signal addition target.

  Also in this case, as in the ninth embodiment, the unit pixel blocks including the pixels in which the R, G, and B color filters are arranged are divided so as not to overlap each other in the row direction and the column direction. Is done. In the eleventh embodiment, one unit pixel block is constituted by a 5 × 5 pixel block, and a total of 8 pixels are arranged every other pixel from the pixels arranged in the corner of the pixel block in the unit pixel block. Therefore, of the total 25 pixels constituting one unit pixel block, 8 pixels are subject to signal addition, and the other 17 pixels are subject to signal decimation, and each pixel is divided into unit pixel blocks. The signal is thinned and added.

  By the way, when a unit pixel block is composed of 5 × 5 pixel blocks, a pixel having the same color filter as the eight pixels is arranged at the center (center of gravity) between the eight pixels to be added to the signal. Therefore, this pixel may be included in the signal addition target. In that case, the number of pixels to which signals are added in one unit pixel block is increased by one. This point is not only a 5 × 5 pixel block, but also a pixel block in which the values of m and n are all 5, 9, 13, 17, 21,..., For example, a 9 × 5 pixel block, The same applies when the unit pixel block is composed of pixel blocks that satisfy the conditions of m = 5 + 4j (j is an integer of 0 or more) and n = 5 + 4k (k is an integer of 0 or more), such as a 9 × 9 pixel block. .

  When the above decimation addition mode is applied, decimation addition is performed by specifying the pixel position after decimation addition in the unit pixel block by the center (center of gravity) between the plurality of pixels to be added to the signal in the unit pixel block. The color arrangement of the subsequent R, G, B pixels (pixel centroid) is the same as the color arrangement of the R, G, B pixels in the diagonal A checkered arrangement. Therefore, when driving in the thinning-out addition mode, color signal processing can be performed by applying the same color coding as in the all-pixel readout mode.

  Further, thinning addition can be realized in the row direction and the column direction for the R, G, and B pixels over the entire pixel array 1. For this reason, with respect to the R, G, and B pixels, eight (or 9) of the same color filters are respectively obtained from the unit pixel block including 5 × 5 pixel blocks (25 pixels in total) adjacent in the row direction and the column direction. The added signal obtained by adding the signals of the two pixels is handled as a pixel signal for one pixel in a pseudo manner. For this reason, the number of pixel signals after decimation is 1/25 times that in the all-pixel readout mode, whereas the number of pixels from which signals are read out is 8 / The effective pixel signal output is increased by 25 times (or 9/25 times), and is increased by the addition of eight (or nine) pixel signals detected using the same color filter. Compared to the form, the noise performance is further improved. Further, the readout frame rate is equivalent to 25/8 times (or 25/9 times) faster than the all-pixel readout mode.

[Twelfth embodiment]
FIG. 14 is a diagram for explaining a twelfth embodiment applied when the CCD solid-state imaging device is driven in the thinning-out addition mode. The driving method based on the decimation / addition mode shown in the figure is a unit pixel block configuration applied when decimation / addition of signals of pixels in which R, G, and B color filters are arranged, as compared with the tenth embodiment. The configuration of the unit pixel block applied when the signals of the pixels in which the A color filter is arranged is thinned out and added is different. Specifically, in the tenth embodiment, a pixel in which R, G, and B color filters are arranged with a 5 × 3 pixel block adjacent in the row direction and the column direction as one unit pixel block; In the twelfth embodiment, a 5 × 5 pixel block adjacent in the row direction and the column direction is set as one pixel. As a unit pixel block, pixel signals are thinned and added with respect to a pixel in which R, G, and B color filters are arranged and a pixel in which an A color filter is arranged.

  That is, for pixels in which R, G, and B color filters are arranged, as in the eleventh embodiment, m adjacent in the row direction (m is an odd number of 3 or more, m = 5 in this embodiment). An m × n pixel block including n pixels (n is an odd number of 3 or more, n = 5 in this embodiment) adjacent to the pixel in the column direction is defined as a unit pixel block, and the pixels within the unit pixel block For each unit pixel block, every other pixel in the row and column directions from the pixels arranged in the corner of the block, that is, pixels having the same color filter are subject to signal addition, and other pixels are subject to signal thinning. The pixel signal is thinned and added. At that time, pixels arranged in the corners of the pixel block are also included in the signal addition target.

  On the other hand, with respect to the pixels in which the A color filter is arranged, n (m is an odd number of 3 or more, m = 5 in this embodiment) adjacent in the row direction and n (n is adjacent to the column direction). An m × n pixel block including an odd number of 3 or more and n = 5 in the present embodiment example is defined as a unit pixel block, and pixels arranged in the corner of the pixel block in the unit pixel block are arranged in the row direction. Pixel signals are thinned and added for each unit pixel block with every other pixel in the column direction as a signal addition target and other pixels as signal thinning targets. At that time, the pixels arranged at the end of the pixel block are also included in the signal addition target.

  Further, the center (centroid) between a plurality of pixels to be added in a unit pixel block including a pixel in which the A color filter is arranged is arranged with R, G, and B color filters in the row direction and the column direction. It is located at the boundary between unit pixel blocks including the other pixels. That is, in a unit pixel block including pixels in which a color filter of A is arranged, a straight line passing through the center (center of gravity) between eight (or nine) pixels to be added to a signal is extended in the row direction and the column direction. The virtual center line is located at the boundary of the unit pixel block including pixels in which R, G, and B color filters are arranged in the row direction and the column direction.

  Thereby, the thinning addition in the row direction and the column direction can be realized not only for the R, G, and B pixels but also for the A pixel over the entire pixel array 1. For this reason, with respect to the R, G, B, and A pixels, eight (5) pixel blocks (total of 25 pixels) adjacent to each other in the row direction and the column direction are used. Alternatively, an addition signal obtained by adding the signals of nine pixels is handled as a pixel signal for one pixel in a pseudo manner. For this reason, the number of pixel signals after decimation is 1/25 times that in the all-pixel readout mode, whereas the number of pixels from which signals are read out is 8 / 25 times (or 9/25 times), and the effective pixel signal output is increased by the addition of 8 (or 9) pixel signals detected using the same color filter, improving noise performance. Will do. Further, the readout frame rate is equivalent to 25/8 times (or 25/9 times) faster than the all-pixel readout mode.

[Application example]
The solid-state imaging device according to each of the embodiments described above is suitable for use as an imaging device (image input device) in an imaging device such as a digital still camera or a video camera.

  Here, the imaging device includes a solid-state imaging device as an imaging device and an optical system such as a lens group that forms image light of a subject on an imaging surface (light-receiving surface) of the solid-state imaging device, such as a mobile phone. This refers to a camera module mounted on an electronic device and a camera system such as a digital still camera or a video camera equipped with the camera module.

  FIG. 15 is a block diagram showing an example of the configuration of the imaging apparatus according to the present invention. An imaging apparatus 10 according to this example includes a solid-state imaging apparatus 11 serving as an imaging device, an optical system (such as a lens group) 12 that guides light from a subject to the solid-state imaging apparatus 11, and pixels output from the solid-state imaging apparatus 11. And a signal processing unit 13 for processing signals. In this imaging device 10, the solid-state imaging device 11 may be formed as a single chip, or the solid-state imaging device 11 and the signal processing unit 13 or the optical system 12 are packaged together. It may be a modular form having a function.

  In the imaging device 10 having the above configuration, the solid-state imaging device 11 is driven according to the above-described thinning addition mode, so that even when a color filter array having an oblique A checkered structure is used, low resolution is achieved by thinning and adding pixel signals. Imaging can be performed. Furthermore, when the solid-state imaging device 11 is driven in the decimation addition mode (when pixel signal decimation addition is performed) and when it is driven in the all-pixel readout mode (when pixel signal decimation addition is not performed), Color arrangement does not change spatially. For this reason, the pixel signal extracted in the thinning-out addition mode and the pixel signal extracted in the all-pixel readout mode can be similarly processed by applying common color coding. As a result, the signal processing circuit (DSP) applied to the signal processing unit 13 can be shared.

It is the schematic which shows the structural example of the CCD solid-state imaging device to which this invention is applied. It is a figure which shows the spectral sensitivity characteristic for every pixel from which a color filter differs. It is a figure explaining 1st Embodiment applied when driving a CCD solid-state imaging device in thinning-out addition mode. It is a figure explaining 2nd Embodiment applied when driving a CCD solid-state imaging device by thinning-out addition mode. It is a figure explaining 3rd Embodiment applied when driving a CCD solid-state imaging device in thinning-out addition mode. It is a figure explaining 4th Embodiment applied when driving a CCD solid-state imaging device in thinning-out addition mode. It is a figure explaining 5th Embodiment applied when driving a CCD solid-state imaging device by thinning-out addition mode. It is a figure explaining 6th Embodiment applied when driving a CCD solid-state imaging device by thinning-out addition mode. It is a figure explaining 7th Embodiment applied when driving a CCD solid-state imaging device by thinning-out addition mode. It is a figure explaining 8th Embodiment applied when driving a CCD solid-state imaging device by a thinning addition mode. It is a figure explaining 9th Embodiment applied when driving a CCD solid-state imaging device by thinning-out addition mode. It is a figure explaining 10th Embodiment applied when driving a CCD solid-state imaging device by thinning-out addition mode. It is a figure explaining 11th Embodiment applied when driving a CCD solid-state imaging device by a thinning addition mode. It is a figure explaining 12th Embodiment applied when driving a CCD solid-state imaging device by thinning-out addition mode. It is a block diagram which shows an example of a structure of the imaging device which concerns on this invention. It is a figure which shows a primary color Bayer arrangement | sequence. It is a figure which shows the diagonal A checkered arrangement | sequence.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Pixel array, 2 ... Pixel, 3 ... Vertical transfer register, 4 ... Horizontal transfer register, 5 ... Output amplifier, 6 ... Signal processing circuit, 7 ... Drive circuit (drive means)

Claims (9)

A plurality of pixels are two-dimensionally arranged in a matrix, and the pixel center of the next row has a pixel array in an oblique lattice shape in which the pixel center of the next row is shifted by 1/2 pixel in the row direction and the column direction. A pixel array;
A color filter is arranged for each pixel of the pixel array, and R (red), G (green), and B (blue) color filters that transmit light in a predetermined band within the visible light region and at least the entire visible light region. R, G, B, and A color filters including A color filter that transmits light of G, R, G and R color filters are alternately arranged in pixels in one row, and pixels in the next row are arranged. Is a color filter array in which a color filter of A is arranged, and G and B color filters are alternately arranged in the pixels of the next row to form a diagonal A checkered structure,
With respect to the pixels in which the R, G, and B color filters are arranged, m (m is an odd number of 3 or more) pixels adjacent in the row direction are defined as unit pixel blocks, and at the end of the pixel block in the unit pixel block. Drive means for performing pixel signal decimation for each unit pixel block adjacent in the row direction, with every other pixel in the row direction from the arranged pixels as a signal addition target and other pixels as signal decimation targets; A solid-state imaging device comprising: The drive means performs pixel signal thinning-out with respect to the pixels in which the R, G, B color filters are arranged, using the pixels arranged in the same column in the row direction as signal addition targets and thinning targets. The solid-state imaging device according to claim 1, characterized in that: The driving means uses m (m is an odd number of 3 or more) pixels adjacent in the row direction as a unit pixel block for the pixel in which the color filter of A is arranged, and ends the pixel block in the unit pixel block. The pixel signals are subjected to thinning and addition for each unit pixel block adjacent in the row direction, with every other pixel in the row direction from the pixels arranged in a row being subjected to signal addition, and the other pixels being subjected to signal thinning.
The center between a plurality of pixels to be added in a unit pixel block including a pixel in which the A color filter is arranged is a unit pixel including a pixel in which the R, G, and B color filters are arranged in the row direction. It is located in the boundary part between blocks. The solid-state imaging device of Claim 2 characterized by the above-mentioned. A plurality of pixels arranged two-dimensionally in a matrix, and a pixel array having an oblique grid-like pixel array in which the pixel center of the next row is shifted by 1/2 pixel with respect to the pixel center of one row;
A color filter is arranged for each pixel of the pixel array, and R (red), G (green), and B (blue) color filters that transmit light in a predetermined band within the visible light region and at least the entire visible light region. R, G, B, and A color filters including A color filter that transmits light of G, R, G and R color filters are alternately arranged in pixels in one row, and pixels in the next row are arranged. Is a color filter array in which a color filter of A is arranged, and G and B color filters are alternately arranged in the pixels of the next row to form a diagonal A checkered structure,
Regarding the pixels in which the R, G, B color filters are arranged, m (m is an odd number of 3 or more) pixels adjacent in the row direction and n (n is an odd number of 3 or more) adjacent in the column direction. An m × n pixel block including pixels is defined as a unit pixel block, and every other pixel in the row direction and the column direction from the pixels arranged in the corner of the pixel block in the unit pixel block is a signal addition target. A solid-state imaging device comprising: driving means for performing pixel signal thinning-out for each unit pixel block adjacent in the row direction and the column direction, with the pixel of the target being a signal thinning target. The driving means includes m pixels (m is an odd number of 3 or more) adjacent in the row direction and n (n is an odd number of 3 or more) adjacent in the column direction with respect to the pixels in which the color filters of A are arranged. An m × n pixel block including a plurality of pixels is defined as a unit pixel block, and every other pixel in the row direction and the column direction from the pixels arranged in the corner of the pixel block in the unit pixel block is a signal addition target, Pixels other than are subject to signal decimation, and pixel signal decimation is added for each unit pixel block adjacent in the row and column directions,
The center between the plurality of pixels to be added in the unit pixel block including the pixel in which the A color filter is arranged is the center of the pixel in which the R, G, and B color filters are arranged in the row direction and the column direction. The solid-state imaging device according to claim 4, wherein the solid-state imaging device is located at a boundary between the unit pixel blocks including the unit pixel block. A plurality of pixels are two-dimensionally arranged in a matrix, and the pixel center of the next row has a pixel array in an oblique lattice shape in which the pixel center of the next row is shifted by 1/2 pixel in the row direction and the column direction. A pixel array;
A color filter is arranged for each pixel of the pixel array, and R (red), G (green), and B (blue) color filters that transmit light in a predetermined band within the visible light region and at least the entire visible light region. R, G, B, and A color filters including A color filter that transmits light of G, R, G and R color filters are alternately arranged in pixels in one row, and pixels in the next row are arranged. When driving a solid-state imaging device having a color filter array in which an A color filter is arranged, and G and B color filters are alternately arranged in pixels in the next row to form a diagonal A checkered structure,
With respect to the pixels in which the R, G, and B color filters are arranged, m (m is an odd number of 3 or more) pixels adjacent in the row direction are defined as unit pixel blocks, and at the end of the pixel block in the unit pixel block. From the arranged pixels, every other pixel in the row direction is subject to signal addition, and other pixels are subject to signal decimation, and pixel signal decimation is performed for each unit pixel block adjacent in the row direction. A driving method of the solid-state imaging device. A plurality of pixels arranged two-dimensionally in a matrix, and a pixel array having an oblique grid-like pixel array in which the pixel center of the next row is shifted by 1/2 pixel with respect to the pixel center of one row;
A color filter is arranged for each pixel of the pixel array, and R (red), G (green), and B (blue) color filters that transmit light in a predetermined band within the visible light region and at least the entire visible light region. R, G, B, and A color filters including A color filter that transmits light of G, R, G and R color filters are alternately arranged in pixels in one row, and pixels in the next row are arranged. When driving a solid-state imaging device having a color filter array in which an A color filter is arranged, and G and B color filters are alternately arranged in pixels in the next row to form a diagonal A checkered structure,
Regarding the pixels in which the R, G, B color filters are arranged, m (m is an odd number of 3 or more) pixels adjacent in the row direction and n (n is an odd number of 3 or more) adjacent in the column direction. An m × n pixel block including pixels is defined as a unit pixel block, and every other pixel in the row direction and the column direction from the pixels arranged in the corner of the pixel block in the unit pixel block is a signal addition target. A method for driving a solid-state imaging device, wherein pixel signals are subjected to thinning-out, and pixel signal thinning-out is performed for each unit pixel block adjacent in the row direction and the column direction. A solid-state imaging device;
An optical system for guiding light from a subject to the solid-state imaging device,
The solid-state imaging device
A plurality of pixels are two-dimensionally arranged in a matrix, and the pixel center of the next row has a pixel array in an oblique lattice shape in which the pixel center of the next row is shifted by 1/2 pixel in the row direction and the column direction. A pixel array;
A color filter is arranged for each pixel of the pixel array, and R (red), G (green), and B (blue) color filters that transmit light in a predetermined band within the visible light region and at least the entire visible light region. R, G, B, and A color filters including A color filter that transmits light of G, R, G and R color filters are alternately arranged in pixels in one row, and pixels in the next row are arranged. Is a color filter array in which a color filter of A is arranged, and G and B color filters are alternately arranged in the pixels of the next row to form a diagonal A checkered structure,
With respect to the pixels in which the R, G, and B color filters are arranged, m (m is an odd number of 3 or more) pixels adjacent in the row direction are defined as unit pixel blocks, and at the end of the pixel block in the unit pixel block. Drive means for performing pixel signal decimation for each unit pixel block adjacent in the row direction, with every other pixel in the row direction from the arranged pixels as a signal addition target and other pixels as signal decimation targets; An imaging apparatus comprising: A solid-state imaging device;
An optical system for guiding light from a subject to the solid-state imaging device,
The solid-state imaging device
A plurality of pixels arranged two-dimensionally in a matrix, and a pixel array having an oblique grid-like pixel array in which the pixel center of the next row is shifted by 1/2 pixel with respect to the pixel center of one row;
A color filter is arranged for each pixel of the pixel array, and R (red), G (green), and B (blue) color filters that transmit light in a predetermined band within the visible light region and at least the entire visible light region. R, G, B, and A color filters including A color filter that transmits light of G, R, G and R color filters are alternately arranged in pixels in one row, and pixels in the next row are arranged. Is a color filter array in which a color filter of A is arranged, and G and B color filters are alternately arranged in the pixels of the next row to form a diagonal A checkered structure,
Regarding the pixels in which the R, G, B color filters are arranged, m (m is an odd number of 3 or more) pixels adjacent in the row direction and n (n is an odd number of 3 or more) adjacent in the column direction. An m × n pixel block including pixels is defined as a unit pixel block, and every other pixel in the row direction and the column direction from the pixels arranged in the corner of the pixel block in the unit pixel block is a signal addition target. An image pickup apparatus comprising: a driving unit that performs pixel signal thinning-out for each unit pixel block adjacent in the row direction and the column direction, with the pixel of the target being a signal thinning target.

Images