JP2007235888A - Single-ccd color solid-state imaging element and imaging apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a single-CCD color solid-state imaging element for obtaining improved sensitivity and a wide dynamic range by suppressing the degradation of a resolution. <P>SOLUTION: In the single-CCD color solid-state imaging element wherein a plurality of pixels 101 for detecting different colors R, G and B are two-dimensionally arranged and formed on the surface of a semiconductor substrate in an array form and a prescribed number of pixels for detecting the same color among the different colors are arranged adjacently to each other, a set 107 of the prescribed number of the pixels detecting the same color and arranged adjacently to each other is arranged on the surface of the semiconductor substrate in a checkered form. Thus, image data at each position whose upper/lower/left/right sides are surrounded by the four sets arranged in a checkered form can be interpolated by image data obtained from the four sets around each position so as to suppress the degradation of the resolution. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a single-plate color solid-state image pickup device in which a plurality of pixels that detect light of the same color are arranged adjacently to widen a dynamic range, and an image pickup apparatus equipped with the same.

  In recent years, it has become common for solid-state imaging devices to be equipped with millions of pixels or more due to advances in semiconductor microfabrication technology. For this reason, the maximum amount of signal charge that can be accumulated by each pixel according to the amount of received light is small, and the dynamic range of the captured image is narrowing.

  Therefore, for example, in the conventional technique described in Patent Document 1 below, a plurality of pixels that detect the same color light are arranged adjacent to each other to expand the dynamic range. This will be described with reference to FIG.

  In the solid-state imaging device 1 shown in the figure, the unit pixels 2 are arranged in a square lattice pattern. “R”, “G”, and “B” shown on each pixel 2 indicate colors (R = red, G = green, B = blue) of color filters stacked on the pixel, and adjacent vertical and horizontal 2 A color filter of the same color is laminated on a total of four pixels for each pixel, and the color filter array when the four pixels of the same color are regarded as one pixel is a Bayer array.

  When an image with a wide dynamic range is picked up using such a solid-state image pickup device 1, the accumulated charges of four pixels of the same color are added. Although the maximum accumulated charge amount of each pixel 2 is small, four pixels are added, so the maximum accumulated charge amount is four times.

JP 2000-69491 A

  In the prior art shown in FIG. 8, the dynamic range is expanded by adding four adjacent pixels of the same color. However, the sample point of the color signal detected by 4 × 4 = 16 pixels 2 (4 pixels of the same color) The center of gravity position) is four locations 3, 4, 5, and 6, and in principle, the resolution of the captured image is reduced to ¼.

  An object of the present invention is to add a plurality of adjacent pixels of the same color to widen the dynamic range, and does not significantly reduce the resolution of a captured image, and an image pickup using the same To provide an apparatus.

  In the single-plate color solid-state imaging device of the present invention, a plurality of pixels for detecting different colors are arranged in a two-dimensional array on the surface of a semiconductor substrate, and a predetermined number of pixels for detecting the same color among the different colors are arranged adjacent to each other. In the single-plate color solid-state imaging device thus formed, a set of a predetermined number of adjacent pixels for detecting the same color is checkered on the surface of the semiconductor substrate.

  The single-plate color solid-state imaging device of the present invention is characterized in that the two-dimensional array arrangement is a checkered arrangement.

  The single-plate color solid-state imaging device of the present invention is characterized in that the two-dimensional array arrangement is a square lattice arrangement.

  The single-plate color solid-state imaging device of the present invention is characterized in that signals detected by each pixel of a predetermined number of adjacent pixels constituting the set are added.

  The single-plate color solid-state imaging device of the present invention is characterized in that the addition is performed in the solid-state imaging device.

  The single-plate color solid-state imaging device of the present invention is characterized in that the addition is performed after the signal is read from the solid-state imaging device.

  An image pickup apparatus according to the present invention includes a single-plate color solid-state image pickup device according to any one of the above and an image data at each position surrounded by four sets of the adjacent pixels in each of the positions around each position. And calculating means for performing interpolation calculation from the image data obtained by the above.

  According to the present invention, since the set of adjacent pixels to be added is arranged in a checkered pattern, the image data of the imaginary pixels at the remaining checkered array positions in the checkered pattern can be obtained by arithmetic processing, and a reduction in resolution is suppressed.

  Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

(First embodiment)
FIG. 1 is a functional block diagram of a digital camera equipped with a single-plate color solid-state imaging device according to the first embodiment of the present invention. The digital camera shown in the figure includes a photographic lens 10, a CCD type single-plate color solid-state imaging device 100, a diaphragm 12 provided between them, an infrared cut filter 13, and an optical low-pass filter 14.

  The CPU 15 that performs overall control of the entire digital camera controls the flash light emitting unit 16 and the light receiving unit 17, controls the lens driving unit 18 to adjust the position of the photographing lens 10 to the focus position, and controls the aperture via the aperture driving unit 19. The exposure amount is adjusted by controlling the opening amount of 12.

  Further, the CPU 15 drives the single-plate color solid-state image sensor 100 via the image sensor drive unit 20 and outputs the subject image captured through the photographing lens 10 as a color signal. An instruction signal from the user is input to the CPU 15 through the operation unit 21, and the CPU 15 performs various controls according to the instruction.

  The electric control system of the digital camera includes an analog signal processing unit 22 connected to the output of the single-plate color solid-state imaging device 100, and an A / B that converts RGB color signals output from the analog signal processing unit 22 into digital signals. D conversion circuit 23 and these are controlled by CPU15.

  Furthermore, the electric control system of the digital camera includes a memory control unit 25 connected to a main memory (frame memory) 24, and a digital signal processing unit 26 that performs interpolation calculation processing, gamma correction calculation processing, RGB / YC conversion processing, and the like. A compression / expansion processing unit 27 that compresses the captured image into a JPEG image or expands the compressed image, an integration unit 28 that integrates photometric data and obtains the gain of white balance correction performed by the digital signal processing unit 26, and a detachable An external memory control unit 30 to which a free recording medium 29 is connected, and a display control unit 32 to which a liquid crystal display unit 31 mounted on the back of the camera or the like is connected, are controlled by a control bus 33 and a data bus 34. They are connected to each other and controlled by commands from the CPU 15.

  FIG. 2 is a schematic plan view of the single-plate color solid-state imaging device 100 shown in FIG. In the illustrated single-plate color solid-state imaging device 100, a large number of photodiodes (photoelectric conversion elements: unit pixels) 101 are formed in a two-dimensional array on a semiconductor substrate. The photodiodes 101 are arranged so as to be shifted by 1/2 pitch (so-called honeycomb arrangement, checkered arrangement).

  “R”, “G”, and “B” illustrated on each photodiode 101 represent the color of the color filter (red = R, green = G, blue = B) stacked on each photodiode. The diode 101 accumulates signal charges corresponding to the amount of received light of one of the three primary colors. Although an example in which a primary color filter is mounted will be described, a complementary color filter may be mounted.

  In the horizontal direction on the surface of the semiconductor substrate, vertical transfer electrodes V1, V2,..., V8 are laid to meander to avoid each photodiode 101. In the semiconductor substrate, a buried channel (not shown) is formed to meander in the vertical direction so as to avoid the photodiode 101 at the side of the photodiode row arranged in the vertical direction. A vertical transfer path (VCCD) 102 is formed by the embedded channel and a vertical transfer electrode provided on the embedded channel and meandering in the vertical direction, and a vertical transfer pulse φV output from the image sensor driving unit 20. Transfer driven.

  A horizontal transfer path (HCCD) 103 is provided on the lower side of the semiconductor substrate. The horizontal transfer path 103 is also composed of a buried channel and a horizontal transfer electrode provided thereon, and this horizontal transfer path 103 is driven to transfer by a transfer pulse φH output from the image sensor driving unit 20. An output amplifier 104 that outputs a voltage value signal corresponding to the amount of signal charges transferred to the output end is provided at the output end of the horizontal transfer path 103.

  The single-plate color solid-state imaging device 100 according to this embodiment includes a line memory 105 along the horizontal transfer path 103 at the boundary between the end of each vertical transfer path 102 and the horizontal transfer path 103.

  The line memory 105 is driven by a line memory driving pulse φLM output from the image sensor driving unit 20, and the signal charge received from each vertical transfer path 102 as described in, for example, Japanese Patent Application Laid-Open No. 2002-112119. Is temporarily stored and used for performing horizontal pixel addition of signal charges by controlling the timing of output to the horizontal transfer path 103.

  Although the terms “vertical” and “horizontal” have been used, this means “one direction” along the surface of the semiconductor substrate and “a direction substantially perpendicular to the one direction”.

  FIG. 3 is a diagram for explaining the arrangement of color filters provided in each photodiode 101 shown in FIG. In the single-plate color solid-state imaging device 100 of the present embodiment, an even-numbered row of pixels (photodiodes) 101 and an odd-numbered row of pixels 101 have a honeycomb pixel array that is shifted by ½ pitch.

  The arrangement of the addition pixels (a set of adjacent pixels) 107 in which four pixels of the same color adjacent in the vertical and horizontal directions are combined into a honeycomb arrangement (checkered arrangement), and the colors of the addition pixels 107 are R, B in the horizontal direction. , R, B, R,..., G, G, G, G,..., B, R, B, R, B,..., And G, G, G, G ,... Are repeated so that the rows of the photodiodes 101 are repeated.

  4, the image sensor driving unit 20 shown in FIG. 1 drives the single-plate color solid-state image sensor 100 described above, and adds the signal charges of the four pixels of the addition pixel 107 (FIG. 3) on the horizontal transfer path 103. It is a timing chart which shows a mode. H1, H2, H3, and H4 indicate horizontal transfer pulses, LM indicates a line memory drive pulse, and V8 indicates a vertical transfer pulse applied to the vertical transfer path final stage electrode V8. The signal charge is transferred from the vertical transfer path 102 to the line memory 105 at the timing when the vertical transfer pulse V8 is turned on (from low L to high H).

  In FIG. 2, two photodiode rows (G, B, G, R, G, B, G, R,..., And B, B, R, R, B, B, R,. When the color of each signal charge in the row of R,... Is read zigzag from the left side to the right side, it is arranged as G, B, B, B, G, R, R, R, G, B, B,. . This arrangement of signal charges is stored on the line memory 105 shown at the top of FIG.

  Each time the signal charges B and R at the right end of B and R lined up three by three on the line memory 105 are transferred to the horizontal transfer path 103 and the signal charges are transferred by one stage in the horizontal direction (left direction), the line memory By adding the signal charges of the same color on 105, the signal charges 3B and 3R for three pixels are added and transferred on the horizontal transfer path.

  In this state, the G signal charge remains on the line memory 105. The signal charges in the next two rows 109 shown in FIG. 2 are G, G, R, G, G, G, B, G, G, G,... The signal charges remaining on the line memory 105 are added to give 2G, G, R, G, 2G, G, B, G, 2G,.

  When the signal charge on the line memory 105 is read out to the horizontal transfer path 103 and the signal charge on the line memory 105 is added every time one stage is transferred, the G signal charge is added for four pixels. Become. Then, the R signal charge and the B signal charge remain on the line memory 105.

  In the above description, the arrangement of signal charges in the two rows 108 in FIG. 2 is G, B, B, B, G, R, R, R, G,..., And this is stored in the line memory 105. 4 is shown at the top of FIG. 4 for convenience of explanation. Actually, the remaining B and R of the two rows 110 signal charges read and transferred before the two rows 108 in FIG. It remains in the memory 105.

  For this reason, when the signal charges of the two rows 108 are stored in the line memory 105, it is correct that the arrangement of the signal charges is G, B, 2B, B, G, R, 2R, R, G,. Accordingly, in the above description, it has been described that the signal charges of 3B and 3R are added and transferred on the horizontal transfer path 105, but in reality, the signal charges of 4 pixels of 4B and 4R (addition pixels in FIG. 3). 107 pixels) is added on the horizontal transfer path 103.

  As described above, when the four signal charges for each addition pixel 107 shown in FIG. 3 are added on the horizontal transfer path 103 and transferred to the output end, the output amplifier 104 responds to the added signal charge amount. The voltage value signal is read out as image data (color signal). The color signal passes through the analog signal processing unit 20 and the A / D conversion unit 23 in FIG. 1 and is stored in the frame memory 24. The color signal read from the frame memory 24 is read into the digital signal processing unit 26. And various image processing is performed.

At this time, the digital image signal processing unit 26 also performs an interpolation calculation process. Interpolation calculation processing is the following processing. As shown in FIG. 3, the addition pixels 107 are also arranged in a honeycomb arrangement. The center of gravity position of the addition pixel 107 is illustrated as shown in FIG. 5, and the image data at the position of the addition pixel (real pixel) 107 is read from the solid-state imaging device 100.

  However, if the image data remains in a honeycomb arrangement (checkered arrangement), a captured image cannot be configured. To construct a captured image, the image data of the imaginary pixel 101 indicated by the dotted circle in FIG. 4 is required. Therefore, the image data of each imaginary pixel 101 is obtained by performing interpolation calculation processing on the image data of the surrounding real pixel 107. Thereby, the arrangement of the image data of the real pixel 107 and the imaginary pixel 111 becomes a square lattice arrangement, and a captured image can be configured.

  That is, according to the present embodiment, since the signals of the four photodiodes 101 are added, the sensitivity is increased and the dynamic range is widened, but the resolution is decreased. However, as described with reference to FIG. 8, the resolution does not become 1/4. This is because, in addition to the real pixels 107, image data of the same number of imaginary pixels 111 as the real pixels can be obtained. Even if the signal charges of the four photodiodes 101 are added, the resolution is 1/2 due to the honeycomb arrangement. It only becomes.

(Second Embodiment)
FIG. 6 is a schematic view of the surface of a single-plate color solid-state image sensor 200 according to the second embodiment of the present invention. In the single-plate color solid-state imaging device 200 of the present embodiment, each unit pixel 201 has a square lattice arrangement. However, the color of the color filter provided in each pixel 201 is determined so that the arrangement of the addition pixels 202 obtained by adding the four adjacent pixels becomes a honeycomb arrangement.

  In this way, even if the unit pixels 201 are arranged in a square lattice, the addition pixels 202 are arranged in a honeycomb arrangement, so that, as in the first embodiment, it is possible to increase the sensitivity and increase the dynamic range while suppressing a decrease in resolution. It becomes possible.

(Third embodiment)
FIG. 7 is a schematic surface view of a single-plate color solid-state imaging device 300 according to the third embodiment of the present invention. Also in the single-plate color solid-state imaging device 300 of this embodiment, each unit pixel 301 is in a square lattice arrangement. In addition, the color of the color filter provided in each pixel 301 is determined so that the arrangement of the addition pixels 302 obtained by adding the four adjacent pixels also has a honeycomb arrangement.

  The difference from the second embodiment is the arrangement of the color filters. In the second embodiment, the G color filter is provided in a horizontal stripe shape, and a color filter in which R and B are alternately arranged in the horizontal direction is provided between the G stripes. In this embodiment, the G color filter is provided. Are provided in the form of vertical stripes. Further, a color filter in which R and B are alternately arranged in the vertical direction is provided between the G stripes. In the present embodiment, the same effect as in the second embodiment can be obtained.

  In the above-described embodiment, the CCD type solid-state imaging device has been described. However, the same applies to the MOS type solid-state imaging device. In the case of the MOS type, signal charges cannot be added in the solid-state imaging device, but image data read from each photodiode may be added by signal processing.

  Further, even with a CCD solid-state imaging device, it is not necessary to add signal charges in the solid-state imaging device, and image data read from the solid-state imaging device may be added by signal processing.

  The single-plate color solid-state imaging device according to the present invention is useful as a solid-state imaging device mounted on a digital camera because of its high sensitivity, wide dynamic range, and high resolution.

It is a functional block block diagram of the digital camera which concerns on 1st Embodiment of this invention. It is a surface schematic diagram of the single plate type color solid-state imaging device shown in FIG. It is a figure which shows the color filter arrangement | sequence mounted in each pixel of the single-plate-type color solid-state image sensor shown in FIG. 3 is a timing chart of signal addition using a line memory and a horizontal transfer path provided in the single-plate color solid-state imaging device shown in FIG. It is explanatory drawing of the interpolation calculation process which the digital signal processing part shown in FIG. 1 performs. It is a surface schematic diagram of the single plate type color solid-state image sensor concerning a 2nd embodiment of the present invention. It is a surface schematic diagram of the single plate type color solid-state imaging device concerning a 3rd embodiment of the present invention. It is the surface schematic diagram of the conventional single plate type color solid-state image sensor.

Explanation of symbols

15 CPU
20 Image sensor driving unit 26 Digital signal processing unit 100, 200, 300 Single-plate color solid-state image sensor 101, 201, 301 Photodiode (unit pixel)
102 Vertical transfer path (VCCD)
103 Horizontal transfer path (HCCD)
104 Output amplifier 105 Line memory 107, 202, 302 Addition pixel (set of adjacent pixels by actual pixels)
111 imaginary pixels

Claims (7)

  In the single-plate color solid-state imaging device in which a plurality of pixels for detecting different colors are arranged in a two-dimensional array on the surface of a semiconductor substrate, and a predetermined number of pixels for detecting the same color among the different colors are adjacently arranged. A single-plate color solid-state imaging device, wherein a set of a predetermined number of adjacent pixels for detecting the same color is arranged in a checkered pattern on the surface of the semiconductor substrate.   2. The single-plate color solid-state imaging device according to claim 1, wherein the two-dimensional array is a checkered array.   2. The single-plate color solid-state image pickup device according to claim 1, wherein the two-dimensional array is a square lattice array.   4. The single-plate color solid-state imaging device according to claim 1, wherein signals detected by pixels of a predetermined number of adjacent pixels constituting the set are added. 5.   The single-plate color solid-state image pickup device according to claim 4, wherein the addition is performed in a solid-state image pickup device.   The single-plate color solid-state image pickup device according to claim 4, wherein the addition is performed after the signal is read out from the solid-state image pickup device.   The single-plate color solid-state image pickup device according to any one of claims 1 to 6 and image data at each position surrounded by four sets of the adjacent pixels are provided by the set around each position. An image pickup apparatus comprising: an operation unit that performs an interpolation operation from the obtained image data.

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