JP4931558B2 - Switching power supply - Google Patents
Switching power supply Download PDFInfo
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- JP4931558B2 JP4931558B2 JP2006308753A JP2006308753A JP4931558B2 JP 4931558 B2 JP4931558 B2 JP 4931558B2 JP 2006308753 A JP2006308753 A JP 2006308753A JP 2006308753 A JP2006308753 A JP 2006308753A JP 4931558 B2 JP4931558 B2 JP 4931558B2
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- 238000001514 detection method Methods 0.000 claims description 14
- 239000003990 capacitor Substances 0.000 claims description 13
- 230000000903 blocking effect Effects 0.000 claims description 10
- 238000000034 method Methods 0.000 description 14
- 238000010586 diagram Methods 0.000 description 8
- 238000009499 grossing Methods 0.000 description 6
- 230000010363 phase shift Effects 0.000 description 4
- 101100165533 Arabidopsis thaliana BLH2 gene Proteins 0.000 description 3
- 101100476710 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) SAW1 gene Proteins 0.000 description 3
- 101100165535 Arabidopsis thaliana BLH4 gene Proteins 0.000 description 2
- 230000007935 neutral effect Effects 0.000 description 1
- 239000004576 sand Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0083—Converters characterised by their input or output configuration
- H02M1/0085—Partially controlled bridges
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0095—Hybrid converter topologies, e.g. NPC mixed with flying capacitor, thyristor converter mixed with MMC or charge pump mixed with buck
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/487—Neutral point clamped inverters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/539—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
- H02M7/5395—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation
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Description
本発明は交流電源を入力とする高力率形スイッチング電源装置(以下「PFC」という。)の改善に関するものである。 The present invention relates to an improvement in a high power factor type switching power supply (hereinafter referred to as “PFC”) using an AC power supply as an input.
従来のPFCとして図8に示すような回路方式がある。 As a conventional PFC, there is a circuit system as shown in FIG.
図8はスイッチ素子を縦に2つ直列に接続したアームによるもので、入力電圧が正の時にローサンドのスイッチ素子Q2がスイッチング動作を行ない、入力電圧が負の時にハイサイドのスイッチ素子Q1がスイッチング動作を行なう。 Fig. 8 shows an arm in which two switch elements are connected in series. When the input voltage is positive, the low-sand switch element Q2 performs the switching operation. When the input voltage is negative, the high-side switch element Q1 switches. Perform the action.
また、直流電源を入力とし、交流電圧を出力するインバータには、従来からマルチレベルインバータという回路方式が多数報告されている。(マルチレベルインバータについては特許文献1、2参照)。
A number of circuit systems called multi-level inverters have been reported for inverters that receive a DC power supply and output an AC voltage. (See
交流電源を入力とし、直流電圧を出力とするPFCコンバータは一般にインバータとは正反対の動作を行なうため、主回路構成は同じとなり、電力の流れの向きが反対になるものである。そのため、マルチレベルインバータの主回路構成は、そのままマルチレベルコンバータの主回路構成として使用できるものである。 A PFC converter that receives an AC power supply and outputs a DC voltage generally operates in the opposite direction to the inverter, and therefore has the same main circuit configuration and the opposite direction of power flow. Therefore, the main circuit configuration of the multilevel inverter can be used as it is as the main circuit configuration of the multilevel converter.
マルチレベルコンバータの制御方法として非特許文献1において発表されている。これはDSPを用いて、入力電圧の大きさによりヒステリシス制御の方法を切り替えるものである。
図8の従来のコンバータの回路方式では、高域阻止フィルタを小型化するため、入力電流の高周波分を低減するには、スイッチング周波数を上げるか、昇圧チョークの大型化をする必要があった。スイッチング周波数を上げる場合はスイッチング損による効率の低下という問題があり、昇圧チョークの大型化は装置の大型化とコストの増大という問題があった。 In the circuit system of the conventional converter of FIG. 8, in order to reduce the high-frequency blocking filter, it is necessary to increase the switching frequency or increase the size of the boost choke in order to reduce the high frequency component of the input current. When the switching frequency is increased, there is a problem that efficiency is lowered due to switching loss, and an increase in the size of the boosting choke has a problem that the apparatus is increased in size and cost.
また、コンバータをマルチレベル化するため、マルチレベルコンバータの主回路構成を採用しても、コンバータの制御方式にインバータの制御方式をそのまま適用することはできないという問題もある。インバータの制御方式には交流出力電圧か、もしくは交流出力電流の制御ループが1つだけであるのに対し、コンバータの制御方式は直流出力電圧の制御ループと交流入力電流の制御ループの2つが必要となるためである。また、インバータでは出力を上げる時にはPWM変調によりパルス幅を広くするのに対し、コンバータでは入力電圧が交流のため、交流入力電圧のゼロクロス付近ではパルス幅を広げ、最大ピーク付近ではパルス幅を狭めるという逆の制御になる。しかも、交流入力電流波形を歪み率(THD)の低い正弦波波形とするためには、電流を制御する誤差増幅器出力をゼロクロス付近で連続になるような制御ループを構築しなければならない。また、出力の2つ直列に接続された平滑用コンデンサ電圧が等しくならずアンバランスを起こすと、スイッチ素子や平滑用コンデンサに過大電圧が加わる問題が発生するため、2つ直列に接続された平滑用コンデンサ電圧を等しい大きさにバランス制御しなければならないという課題もある。
また、非特許文献1のようにDSPを使用した制御方法は複雑でコストが増大してしまう他、ヒステリシス制御のためキャリア周波数が一定ではなく、高域阻止フィルタの設計が難しいという問題がある。
Further, since the converter is multilevel, there is a problem that even if the main circuit configuration of the multilevel converter is adopted, the inverter control method cannot be applied as it is to the converter control method. The inverter control system has only one AC output voltage or AC output current control loop, whereas the converter control system requires two DC output voltage control loops and AC input current control loops. It is because it becomes. Also, in the inverter, when the output is increased, the pulse width is widened by PWM modulation, whereas in the converter, the input voltage is AC, so the pulse width is widened near the zero cross of the AC input voltage, and the pulse width is narrowed near the maximum peak. It becomes the reverse control. Moreover, in order to make the AC input current waveform a sine wave waveform with a low distortion rate (THD), a control loop must be constructed so that the error amplifier output for controlling the current is continuous near the zero cross. In addition, if the two smoothing capacitor voltages connected in series are not equal and an imbalance occurs, there is a problem that an excessive voltage is applied to the switch element and the smoothing capacitor. There is also a problem that the capacitor voltage must be balanced and controlled to the same magnitude.
In addition, the control method using the DSP as in
本発明は、上記問題に鑑みてなされたものであり、小型化並びに低コスト化を実現したスイッチング電源装置を提供することを目的とするものである。 The present invention has been made in view of the above problems, and an object of the present invention is to provide a switching power supply device that achieves miniaturization and cost reduction.
上記課題を解決するため、本発明に係るスイッチング電源装置は、マルチレベルコンバータにおいて、直流出力電圧の検出信号と基準信号Vrefの誤差分を電圧ループの誤差増幅器により増幅・積分し、乗算器により交流電源の検出信号と乗算することで交流入力電流の基準信号Irefを作り、上記Irefに2つ直列に接続されたコンデンサの2つの電圧検出信号の差分を加算演算回路によって重畳し、上記加算演算回路の出力信号と交流入力電流の検出信号との誤差分を電流ループの誤差増幅器により増幅・積分し、正弦波状の信号を出力し、4つのオフセットレベルの異なった3角波キャリアとのPWM変調を行なうことによって、高域阻止フィルタを介した交流電源の電流波形が歪み率(THD)の低い正弦波状になるように計6つのスイッチ素子を制御することを特徴とする。 In order to solve the above-described problems, a switching power supply according to the present invention is a multilevel converter, which amplifies and integrates an error between a detection signal of a DC output voltage and a reference signal Vref by an error amplifier of a voltage loop, and AC by a multiplier. By multiplying the detection signal of the power supply, a reference signal Iref of AC input current is created, and the difference between two voltage detection signals of two capacitors connected in series to the Iref is superimposed by an addition operation circuit, and the addition operation circuit Amplifies and integrates the error between the output signal and the AC input current detection signal using an error amplifier in the current loop, outputs a sinusoidal signal, and performs PWM modulation with a triangular wave carrier with four different offset levels. By doing this, a total of six switch elements are controlled so that the current waveform of the AC power supply through the high-frequency blocking filter becomes a sine wave with a low distortion rate (THD). And wherein the Rukoto.
本発明によれば、図5に示すように、高域阻止フィルタの出力側の交流電流の高周波分を低減し、高域阻止フィルタを小型化・低コスト化することができる。 According to the present invention, as shown in FIG. 5, the high frequency component of the alternating current on the output side of the high-frequency blocking filter can be reduced, and the high-frequency blocking filter can be reduced in size and cost.
また、昇圧チョークに加わる電圧変化分とスイッチ素子に加わる電圧を半分にすることによって装置全体の損失を低減できる。昇圧チョークは加わる電圧変化分が半分になると、コアのΔBが半分になる。チョークのコア損失はΔBの2乗〜2.5乗に比例するため、昇圧チョークに加わる電圧変化分が半分にできることはコア損失を4分の1以下にできることになる。スイッチ素子は従来の半分の耐圧の素子が使用できるが、従来1個の所に直列に2個必要になる。MOSFET等の半導体素子は、耐圧が半分の素子はQg−Ronのトレードオフが倍以上改善されるため、スイッチ素子が2個直列になっても損失が低減できることになる。 Further, the loss of the entire device can be reduced by halving the voltage change applied to the boost choke and the voltage applied to the switch element. When the voltage change applied to the boost choke is halved, the core ΔB is halved. Since the core loss of the choke is proportional to the square to 2.5 of ΔB, the fact that the voltage change applied to the boost choke can be halved means that the core loss can be reduced to a quarter or less. As the switch element, an element having a withstand voltage half that of the prior art can be used, but two conventional switch elements are required in series at one place. A semiconductor element such as a MOSFET can reduce the loss even if two switch elements are connected in series because the Qg-Ron trade-off is improved more than twice in the case of an element having a withstand voltage of half.
また、2つ直列のコンデンサ電圧を等しい大きさにバランス制御できるため、半分の耐圧の平滑用コンデンサが使用できる。 In addition, since the two series capacitor voltages can be balanced and controlled to be equal in magnitude, a smoothing capacitor having a half withstand voltage can be used.
また、キャリア周波数を一定にすることができるため、高域阻止フィルタやEMIフィルタの設計が容易になる。 In addition, since the carrier frequency can be made constant, the design of a high-frequency blocking filter and an EMI filter becomes easy.
図1に本発明を実施するための回路図を示す。 FIG. 1 shows a circuit diagram for carrying out the present invention.
交流電源1を入力とし、電気的負荷8に直流電圧を出力するコンバータである。
上記直流電圧出力の正負極間に2つ直列に接続された平滑用コンデンサ7と電気的負荷8と4つのスイッチ素子のマルチレベルのアームと2つのスイッチ素子のアームが並列接続される。
The converter receives an
Two
交流電源1は高域阻止フィルタ2を介し、一端は、電流検出素子3と昇圧チョーク4に接続される。昇圧チョーク4は、マルチレベルのアームの間に接続さる。高域阻止フィルタ2のもう一端は、上記2つのスイッチ素子のアームの間に接続される。
The
上記直流出力電圧の検出信号と基準信号Vref18の誤差分を電圧ループの誤差増幅器9により増幅・積分し、乗算回路10により交流電源1の検出信号を乗算することで交流入力電流の基準信号Irefを作り、上記Irefに平滑用コンデンサ7の2つの電圧信号を差動増幅器17で差分をとり、加算演算回路11で上記Irefに重畳し、上記加算演算回路11の出力信号と交流入力電流の検出信号との誤差分を電流ループの誤差増幅器9により増幅・積分し、正弦波状の信号を出力する。4つのオフセットレベルの異なった3角波発振器14,15,20,21とのPWM変調を行ない、PWM1,2,3,4の信号を作る。Q4は、Vacが正の期間はPWM2、Vacが負の期間はPWM4の信号を出力する。Q2は、Vacが正の期間はPWM1、Vacが負の期間はPWM3を出力する。Q1はQ2の反転した波形で、Q3はQ4の反転した波形を使用するため、Q1とQ2、Q3とQ4はそれぞれ交互にON・OFFする。Q6はVacが正の期間にONし、Q5はVacが負の期間にONする。また、3角波発振器の波形形状は、のこぎり波でも問題無く動作する。
The error between the detection signal of the DC output voltage and the
マルチレベルコンバータにおいて、本発明の制御方法にインターリーブ方式を適用した場合の回路図を図6に示す。図7に各部の波形を示す。 FIG. 6 shows a circuit diagram when the interleaving method is applied to the control method of the present invention in the multilevel converter. FIG. 7 shows the waveform of each part.
3角波発振器SAW5,6,7,8はそれぞれSAW1,2,3,4の波形から180°位相がずれたものである。ヒステリシス制御では周波数が変化してしまうためインターリーブ方式を適用することが難しいが、本発明の制御方法では搬送波キャリアの位相をずらすことで簡単にインターリーブ方式を適用することができる。 Triangular wave oscillators SAW5, 6, 7, and 8 are 180 ° out of phase with the waveforms of SAW1, 2, 3, and 4, respectively. In the hysteresis control, it is difficult to apply the interleave method because the frequency changes, but in the control method of the present invention, the interleave method can be easily applied by shifting the phase of the carrier wave.
複数のアームによるインターリーブ方式を適用することで、さらなる高域阻止フィルタの小型化・低コスト化を図ることができ、昇圧チョークとスイッチ素子の電流は小さくできる。 By applying the interleaving method using a plurality of arms, it is possible to further reduce the size and cost of the high-frequency blocking filter and reduce the currents of the boost choke and the switch element.
1 交流電源
2 高域阻止フィルタ
3 電流検出素子
4 昇圧チョーク
5 スイッチ素子
6 整流ダイオード
7 平滑用コンデンサ
8 電気的負荷
9 誤差増幅器
10 乗算回路
11 加算演算回路
12 コンパレータ
13 NOT論理回路
14 三角波発振器SAW1
15 三角波発振器SAW2
16 AND論理回路
17 差動増幅器
18 基準電圧Vref
19 OR論理回路
20 三角波発振器SAW3
21 三角波発振器SAW4
22 三角波発振器SAW5(SAW1から180°位相がずれた波形)
23 三角波発振器SAW6(SAW2から180°位相がずれた波形)
24 三角波発振器SAW7(SAW3から180°位相がずれた波形)
25 三角波発振器SAW8(SAW4から180°位相がずれた波形)
26 のこぎり波発振器
DESCRIPTION OF
15 Triangular wave oscillator SAW2
16 AND
19 OR
21 Triangular wave oscillator SAW4
22 Triangular wave oscillator SAW5 (waveform with 180 ° phase shift from SAW1)
23 Triangular wave oscillator SAW6 (waveform with 180 ° phase shift from SAW2)
24 Triangular wave oscillator SAW7 (waveform with 180 ° phase shift from SAW3)
25 Triangular wave oscillator SAW8 (waveform with 180 ° phase shift from SAW4)
26 sawtooth oscillator
Claims (1)
上記直流出力電圧の検出信号と基準信号Vrefとの誤差分を電圧ループの誤差増幅器により増幅・積分し、乗算器により交流電源の検出信号と乗算することで交流入力電流の基準信号Irefを作り、上記Irefに上記2つ直列に接続されたコンデンサの2つの電圧検出信号の差分を加算演算回路によって重畳し、上記加算演算回路の出力信号と交流入力電流の検出信号との誤差分を電流ループの誤差増幅器により増幅・積分し、正弦波状の信号を出力し、4つのオフセットレベルの異なった搬送波キャリアとのPWM変調を行ない、上記高域阻止フィルタを介した交流電源の電流波形が歪み率(THD)の低い正弦波状になるように計6つのスイッチ素子を制御することを特徴とするスイッチング電源装置。 A converter that receives an AC power supply and outputs a DC voltage. Two capacitors connected in series and four switch elements connected in series between the positive and negative electrodes of the DC voltage output are connected in parallel. A rectifier diode is connected from between the capacitors connected in series to the negative terminal of the switch element on the most positive side of the four switch elements connected in series, and the first switch element connected in series is connected to the first switch element. A multi-level arm is constructed by connecting a rectifier diode between the two positively connected capacitors from the positive terminal of the negative-side switch element, and the two are connected in series between the positive and negative electrodes of the DC voltage output. The multi-level arm is formed by connecting the arm of the switch element connected in parallel and connecting the current detection element and the boosting choke in series to the AC power source via the high-frequency blocking filter. In the switching power supply apparatus having a multi-level converter which is connected between the between the arms of the two serially connected switching elements,
The difference between the detection signal of the DC output voltage and the reference signal Vref is amplified and integrated by the error amplifier of the voltage loop, and the reference signal Iref of the AC input current is created by multiplying the detection signal of the AC power source by the multiplier. The difference between the two voltage detection signals of the two capacitors connected in series is superimposed on Iref by an addition operation circuit, and the error between the output signal of the addition operation circuit and the detection signal of the AC input current is superimposed on the current loop. Amplifies and integrates by error amplifier, outputs sinusoidal signal, performs PWM modulation with carrier wave carrier with four different offset levels, and the current waveform of AC power supply through the high-frequency blocking filter is distortion rate (THD A switching power supply characterized by controlling a total of six switch elements so as to have a low sine wave shape.
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JPH05328728A (en) * | 1992-05-18 | 1993-12-10 | Sanken Electric Co Ltd | Ac/dc converter |
JP2500140B2 (en) * | 1993-02-01 | 1996-05-29 | 株式会社東芝 | Control device for neutral point clamp converter |
JPH08182342A (en) * | 1994-12-21 | 1996-07-12 | Hitachi Ltd | Power converter |
JP4096502B2 (en) * | 2000-08-08 | 2008-06-04 | 富士電機ホールディングス株式会社 | Multiple power converter control device |
JP3676220B2 (en) * | 2000-11-08 | 2005-07-27 | オリジン電気株式会社 | High power factor converter and control method thereof |
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2006
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