JP4931231B2 - Imaging apparatus and control method thereof - Google Patents

Description

The present invention relates to an imaging apparatus using an imaging element such as a CMOS image sensor and a control method thereof .

  In an imaging apparatus such as a digital camera or a video camera, a CCD or a CMOS image sensor is generally used as an imaging element. In recent years, while the number of pixels of an image sensor has been increased, the pixel size has been extremely reduced in order to form tens of thousands of pixels within a certain area. For this reason, the amount of light that can be collected per pixel is reduced, and the amount of saturated light per pixel is also extremely reduced. That is, when a high-contrast subject is photographed with such an imaging apparatus, a whiteout phenomenon occurs immediately in a bright part.

  In view of this point, various proposals have been made on the technology for preventing saturation of the image sensor, that is, a technique for detecting the saturated pixels and stopping the charge accumulation operation of all the pixels (see, for example, Patent Document 1).

In Patent Document 1, it is detected that a peak output pixel reaches a predetermined level from pixels constituting one line in a distance measuring line sensor, and the charge accumulation operation is stopped. In addition, when there are a plurality of line sensors, the peak output pixels for each line are detected in time series to be applied to the plurality of lines.
Japanese Patent Laid-Open No. 10-318835

  However, when the technique of Patent Document 1 is applied to an image pickup apparatus having a two-dimensional image pickup device, peak output pixels are detected in time series for each row or column, so that the charge accumulation operation is stopped in real time. There was a problem that it was not possible to perform such control.

  In view of the above-described conventional problems, the present invention provides an imaging apparatus and a pixel saturation state detection method for the following purpose. In other words, in order to obtain a good image without a whiteout phenomenon, it is an object of the present invention to detect in real time the saturation state of the pixels in the image sensor and to perform control such as stopping the charge accumulation operation in real time.

In order to achieve the above object, an imaging apparatus according to the present invention includes an imaging device having an imaging element in which a plurality of pixels are arranged, and a common power source for supplying a reset voltage to the plurality of pixels and the common power source. any of the plurality of pixels based on current and having a saturated detecting means for detecting that saturation.

The control method of the image pickup apparatus of the present invention, pixels in multiple are arranged, there is provided a control method for an image pickup apparatus having an image pickup element having a common power supply for supplying a reset voltage to the plurality of pixels, It is detected that any of the plurality of pixels is in a saturated state based on a current flowing through the common power source .

  According to the present invention, it is possible to detect in real time the saturation state of the pixels in the image sensor and perform control such as stopping the charge accumulation operation in real time. As a result, it is possible to reliably prevent the whiteout phenomenon of the photographed image and improve the image quality.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

<Configuration of Pixel Circuit According to Embodiment>
FIG. 1 is a circuit diagram showing a main configuration of an image pickup apparatus according to an embodiment of the present invention, and shows a pixel portion circuit using a CMOS area sensor as an image pickup element for photoelectric conversion.

  The image sensor accumulates light quantity charges in a plurality of pixels and outputs them as electric signals. In the pixel unit circuit, drive pulse input lines 12 to which drive pulses are input and vertical output lines 13 to which signals are output are arranged in a matrix.

  The drive pulse input line 12 includes three signal lines to which a Psel pulse, a Pres pulse, and a Ptx pulse are respectively supplied as drive pulses. A pixel 50 for photoelectric conversion is connected to each intersection of the drive pulse input line 12 and the vertical output line 13, and each drive pulse input line 12 is connected to the vertical scanning circuit 14.

  Hereinafter, the driving pulse in the (m + 1) th row is referred to as a Pres (m + 1) pulse, a Ptx (m + 1) pulse, and a Psel (m + 1) pulse, and the driving pulse in the (m) row is a Pres (m) pulse, Ptx ( m) Pulse and Psel (m) pulse. The pixel in the (m + 1) th row is denoted as a pixel 50 (m + 1), and the pixel in the (m) th row is denoted as a pixel 50 (m). Further, the drive pulse input line in the (m + 1) th row is denoted as drive pulse input line 12 (m + 1), and the drive pulse input line in the (m) th row is denoted as drive pulse input line 12 (m). The vertical output line in the (n + 1) th column is denoted as a vertical output line 13 (n + 1), and the vertical output line in the (n) th column is denoted as a vertical output line 13 (n).

  The vertical scanning circuit 14 selects the pixels 50 in a predetermined row. The outputs of the pixels 50 in the selected row are read down to the vertical output lines 13 (m + 1), (m),... And stored in the signal storage unit 15 via the transfer gates 15a and 15b. The output accumulated in the signal accumulation unit 15 is sequentially read out to the output amplifier unit by the horizontal scanning circuit 16.

  FIG. 2 is a circuit diagram showing a circuit configuration of the pixel 50 in FIG.

  Each of the pixels 50 (m), (m + 1),... Has the same circuit configuration. That is, each pixel 50 has a reset switch 3 composed of an N-channel MOS transistor (hereinafter simply referred to as a MOS transistor). Further, a MOS transistor 21 for monitoring a current flowing into the power supply SVDD is connected between the reset switch 3 and the power supply SVDD (common power supply). A MOS transistor 22 having the gate of the MOS transistor 21 as a common gate is provided to constitute a current mirror circuit.

  The drain of the MOS transistor 22 is connected to the power supply SVDD, and the source is grounded via the load resistor 23. Further, the source of the MOS transistor 22 as an output of the current mirror circuit is connected to the input side of the comparator 24 using the variable power supply Vcomp as a threshold, and the Vsvddmon signal is output from the output side of the comparator 24. In other words, when the output voltage of the current mirror circuit exceeds a predetermined voltage (Vcomp) due to a change in the current flowing through the power supply SVDD, the signal is output as a Vsvddmon signal (saturation detection means).

  A charge storage unit 9 called a floating diffusion (FD) (hereinafter referred to as FD unit 9) is connected between the source of the reset switch 3 and the ground via a connection point N. Further, a MOS transfer switch 2 made of a MOS transistor and a photoelectric conversion photodiode (PD) 1 are connected in series between the connection point N and the ground. The gate of the transfer switch 2 is connected to the output side of the variable voltage buffer 18. The variable voltage buffer 18 is a buffer for inputting the transfer pulse Ptx and making the low level voltage (Vtxl) applied to the gate of the transfer switch 2 variable.

  A row selection switch 6 made of a MOS transistor and a pixel amplifier 10 made of a MOS transistor are connected in series between the drain of the reset switch 3 and the vertical output line 13 that is the output terminal of the pixel 50. Yes. The pixel amplifier 10 and the load current source 7 constitute a source follower circuit. A row selection drive pulse Psel is applied to the gate of the row selection switch 6, and the connection point N is connected to the gate of the pixel amplifier 10.

  According to the circuit of FIG. 2, photoelectric conversion is performed by PD 1, and the transfer switch 2 is in an off state during the light amount charge accumulation period, and the PD of the pixel amplifier 10, that is, the FD unit 9 is photoelectrically converted by PD 1. The charged charge is not transferred. The gate of the pixel amplifier 10 is initialized to an appropriate voltage by turning on the reset switch 3 before starting the accumulation. That is, this is a dark level.

  Next or simultaneously, when the row selection switch 6 is turned on, the source follower circuit composed of the load current source 7 and the pixel amplifier 10 is in an operating state. At this time, the transfer switch 2 is turned on to store in the PD 1. The charged electric charge is transferred to the gate of the pixel amplifier 10.

  Here, the output of the pixel in the selected row is generated on the vertical output line 13 in FIG. This output is stored in the signal storage unit 15 via the transfer gates 15a and 15b. The output temporarily stored in the signal storage unit 15 is sequentially read out to the output amplifier unit by the horizontal scanning circuit 16.

  The configuration including the current mirror circuit and the comparator 24 can be arranged for each pixel as shown in FIG. 2, but the circuit becomes complicated and the circuit configuration area becomes enormous. It is also possible to make one configuration common to all pixels. In the following description of the present embodiment, for the sake of simplicity, description will be made on the assumption that the configuration including the current mirror circuit and the comparator 24 is one configuration common to all pixels.

<Operation of Imaging Device According to this Embodiment>
Next, with reference to FIG. 3 etc., operation | movement of the imaging device which concerns on this Embodiment is demonstrated in detail.

  FIG. 3 is a timing chart showing the operation of the imaging apparatus according to the present embodiment.

  The PVSR pulse in the figure is a vertical transfer pulse, and the PHSR pulse is a horizontal transfer pulse. A mechanical shutter (hereinafter referred to as a mechanical shutter) controls the exposure time of the image sensor by opening and closing. VPD (m + 1, n) is the output voltage of the photodiode 1 in the (m + 1) row and (n) column, and VFD (m + 1, n) is the gate of the pixel amplifier 10 in the (m + 1) row and (n) column. Voltage. ITres (m + 1, n) is a current flowing through the reset switch 3 in the (m + 1) row and the (n) column.

  At time A in FIG. 3, by setting the Pres pulse to “1”, the reset switch 3 is turned on and the FD section 9 is reset with the SVDD voltage (T1 in FIG. 3). In this state, the Ptx pulse is further set to “1” to turn on the transfer switch 2 to reset PD1 (T2), and further, the Ptx pulse is set to “0” to turn off the transfer switch 2 to turn PD1 on. Start accumulating. The operation up to this point is performed for all rows at once.

  Thereafter, the mechanical shutter is opened and closed to expose the pixel portion (T3). After the exposure is completed, the reset switch 3 is turned off by setting the Pres (m + 1) pulse to “0”, and the reset of the FD unit 9 in the (m + 1) th row is performed. Further, by setting the Psel (m + 1) pulse to “1” (T4), the row selection switch 6 in the (m + 1) th row is turned on, and the output of the pixel amplifier 10 in the (m + 1) th row is applied to the vertical output line 13. Connected (this state is assumed to be state K1).

  Then, by setting the Ptx (m + 1) pulse to “1” (T5), the transfer switch 2 in the (m + 1) th row is turned on, and the light amount charge accumulated in the PD1 is transferred to the FD unit 9. Then, this light quantity charge is read out to the vertical output line 13 via the pixel amplifier 10 (this state is assumed to be a state K2). At this time, the output of the state K1 and the output of the state K2 are temporarily stored for each pixel, and the output of each pixel can be obtained by taking the difference.

  After that, the transfer switch 2 is turned off by setting the Ptx (m + 1) pulse to “0” (T6). Further, the Pres (m + 1) pulse is set to “1”, the Ptx (m + 1) pulse is set to “1”, and the Psel (m + 1) pulse is set to “0” (T7), to the vertical output line 13 in the (m + 1) th row. Is turned off, and the FD section 9 and PD1 are reset.

  Thereafter, the signals stored for each pixel are sequentially read by driving the horizontal transfer pulse PHSR (T8), and after the reading is completed, the vertical transfer pulse PVSR is driven (T9), and the next (m) row. Move on to reading. The operation of reading out the (m) row is equivalent to the operation of the (m + 1) th row, and the description thereof will be omitted.

  Here, the voltage VPD (m + 1, n) of PD1 gradually decreases because the light amount charge is accumulated in PD1 from the moment (T3) when the mechanical shutter is opened after reset, but PD1 is saturated. By the way (T10), the voltage drop stops.

  On the other hand, after PD1 is saturated, the light charge overflows around PD1 and is absorbed toward the semiconductor substrate. Further, a part thereof flows into the power supply SVDD through the reset switch 3 beyond the transfer switch 2 in the off state. At this time, since the FD section 9 is reset by the low impedance power supply SVDD, the voltage does not change, but the current flowing to the power supply SVDD via the reset switch 3 increases.

  In consideration of such points, in the present embodiment, as a method of detecting the saturation state of PD1, a method of monitoring the current flowing through the power supply SVDD during storage is employed. That is, the current flowing into the power supply SVDD common to all the pixels is monitored through, for example, one current mirror circuit common to all the pixels, and the saturated state is detected when any pixel in all the pixels is saturated. When the saturation state of the pixel is detected, the mechanical shutter is closed, and thereby the exposure to the pixel portion is stopped.

  Further, in order to prevent the accumulated charge of PD1 from leaking to the FD section 9, a low voltage of about −1.2 V (second voltage) is applied to the gate of the transfer switch 2 to make the transfer switch powerful. It is common to turn it off. However, in this embodiment, in order to accurately detect the saturation state of PD1, the variable voltage buffer 18 causes the gate voltage when the transfer switch 2 is turned off to be about −0.8 V (first time) during the accumulation operation of PD1. Voltage). Thereby, it is devised so that the charge after PD1 is saturated overflows in the direction of the transfer switch 2 as much as possible.

  However, lowering the low-level voltage applied to the transfer switch 2 has the effect of strongly turning off the transfer switch 2 and also has the effect of suppressing dark current under the gate of the transfer switch 2. Therefore, if this low level voltage is raised during the accumulation operation of the pixel portion, more dark current is generated.

  As a countermeasure, the following may be performed under photographing conditions in which the dark current cannot be ignored, for example, when the exposure time or charge accumulation time is long, or when the environmental temperature is high. That is, the low level voltage is controlled to be slightly lower than −0.8 V (first voltage) (for example, −0.9 V: third voltage).

  Also, when a time lag occurs between the end of exposure and the signal readout, the dark current generated after the end of exposure cannot be ignored. For this reason, after the exposure is completed, the low level voltage applied to the transfer switch 2 is set to a lower voltage (for example, −1.2 V: second voltage). As a result, almost all areas of the photographed image can be obtained as an image having no gradation and no gradation.

  Next, in order to clarify the characteristics of the pixel portion circuit according to this embodiment, a description will be given in comparison with a general conventional circuit.

  FIG. 4 is a circuit diagram of a conventional general pixel corresponding to FIG. 2. Elements common to FIG. 2 are denoted by the same reference numerals, and description thereof is omitted. FIG. 5 is a flowchart showing the operation of the circuit of the conventional pixel in FIG. 4. Elements common to those in FIG.

  As shown in FIG. 4, the conventional general pixel circuit has a configuration in which the current mirror circuit and the variable voltage buffer 18 are excluded from the pixel circuit according to the present embodiment shown in FIG. As is clear from this point, the pixel circuit in the present embodiment is characterized in that a current mirror circuit is provided and the comparator 24 outputs the Vsvddmon signal. Further, the variable voltage buffer 18 is provided so that the low level voltage Vtxl is applied to the gate of the transfer switch 2.

  In the present embodiment, the low level voltage (Vtxl) applied to the gate of the transfer switch 2 is set to −0.8 V (first voltage) in synchronization with the mechanical shutter opening time (T11 in FIG. 3). For this reason, the current flowing through the reset switch 3 after PD1 is saturated is larger than that in the conventional circuit shown in FIG. 5 (see T12 in FIG. 3 and T22 in FIG. 5). The output of the comparator 24 set to an appropriate threshold voltage (Vcomp) by this current is output as the Vsvddmon signal (T13 in FIG. 3).

<Advantages of this embodiment>
(1) According to the present embodiment, any pixel in all the pixels is saturated by monitoring the Vsvddmon signal during the accumulation of the light amount charge and detecting that the output value becomes 1. As a thing, the mechanical shutter is closed to stop the exposure. Such exposure stop (accumulation of storage operation) control due to pixel saturation can be controlled in real time. That is, it is possible to detect in real time whether any of the pixels is saturated, and the exposure or accumulation is stopped according to the result. Therefore, an image with very few saturated pixels can be obtained, and an image with no whiteout phenomenon and no deterioration in gradation can be obtained.

  (2) The low level voltage (Vtxl) applied to the gate of the transfer switch 2 is set to a slightly higher voltage (for example, −0.8 V) than usual during exposure or accumulation of light amount charge, and other than that The voltage was set to a slightly lower voltage (for example, -1.2V). Thereby, the bad influence by dark current can be decreased.

  (3) Further, by changing the low level voltage (Vtxl) applied to the gate of the transfer switch 2 during exposure or during light amount charge accumulation according to the exposure time or accumulation time, or the ambient environment temperature, The adverse effect of dark current can be eliminated.

  In the above description, the exposure time is controlled using a mechanical shutter. However, if the exposure time can be controlled by an electronic shutter that is generally referred to, exposure control is performed using that method. Also good.

It is a circuit diagram which shows the principal part structure of the imaging device which concerns on embodiment. It is a circuit diagram which shows the circuit structure of the pixel in FIG. 6 is a timing chart illustrating an operation of the imaging apparatus according to the embodiment. FIG. 3 is a circuit diagram of a conventional general pixel corresponding to FIG. 2. 5 is a flowchart showing the operation of the conventional pixel circuit of FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Photodiode 2 Transfer switch 3 Reset switch 6 Row selection switch 9 Floating diffusion 10 Pixel amplifier 13 Vertical output line 14 Vertical scanning circuit 16 Horizontal scanning circuit 18 Variable voltage buffer 21, 22 MOS transistor 23 Load resistance 24 Comparator

Claims (7)

In an imaging device having an imaging element in which a plurality of pixels are arranged ,
A common power supply for supplying a reset voltage to the plurality of pixels ;
A saturation detection means for said one of the plurality of pixels based on the current flowing through the common power supply is detected to be in a saturated state,
An imaging device comprising:   When the saturation detection unit detects that the plurality of pixels are in a saturated state, the exposure to the plurality of pixels is stopped, or the charge accumulation operation in the plurality of pixels is stopped. The imaging apparatus according to claim 1, wherein the imaging apparatus is characterized.   A MOS type transfer switch provided for each pixel in order to output a signal from the plurality of pixels, and a low level voltage among the voltages applied to the gate of the MOS type transfer switch is made variable. The imaging apparatus according to claim 1, wherein the imaging apparatus is configured.   The low level voltage applied to the gate of the MOS type transfer switch is set to the first voltage during the exposure to the plurality of pixels or during the charge accumulation in the plurality of pixels, and otherwise the first voltage is set. The imaging apparatus according to claim 3, wherein the imaging apparatus is configured to be set to a second voltage lower than the voltage of 1.   The low level voltage applied to the gate of the MOS type transfer switch during the exposure to the plurality of pixels or during the charge accumulation in the plurality of pixels is lower than the first voltage when the ambient environment temperature is high. The imaging apparatus according to claim 4, wherein the imaging apparatus is configured to be set to a third voltage that is higher than the second voltage.   The low level voltage applied to the gate of the MOS type transfer switch during the exposure to the plurality of pixels or during the accumulation of charges in the plurality of pixels is the first level when the exposure time or the charge accumulation time is long. The imaging apparatus according to claim 4, wherein a third voltage lower than a voltage and higher than the second voltage is set. Pixels multiple are arranged, a control method of an image pickup apparatus having an image pickup element having a common power supply for supplying a reset voltage to said plurality of pixels,
A method for controlling an imaging apparatus, comprising: detecting that any of the plurality of pixels is in a saturated state based on a current flowing through the common power source .

Images