JP4871694B2 - Light emitting diode package - Google Patents

Light emitting diode package Download PDF

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JP4871694B2
JP4871694B2 JP2006275506A JP2006275506A JP4871694B2 JP 4871694 B2 JP4871694 B2 JP 4871694B2 JP 2006275506 A JP2006275506 A JP 2006275506A JP 2006275506 A JP2006275506 A JP 2006275506A JP 4871694 B2 JP4871694 B2 JP 4871694B2
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emitting diode
light emitting
insulating layer
opening
hole
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JP2008098247A (en
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公彦 須藤
典生 中里
大輔 仲原
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Hitachi Appliances Inc
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Hitachi Appliances Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/49105—Connecting at different heights
    • H01L2224/49107—Connecting at different heights on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

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Description

本発明は、発光ダイオード素子を搭載した発光ダイオードパッケージに関する。   The present invention relates to a light emitting diode package on which a light emitting diode element is mounted.

発光ダイオードパッケージは、基本的には、発光ダイオード素子を搭載し発光ダイオード素子に給電するための配線基板とその上に設けられた反射板を有する。反射板に用いられる材料として、アルミやシリコンが知られている。特許文献１及び２には、反射板としてシリコンを用いる例が記載されている。   The light emitting diode package basically includes a wiring board for mounting a light emitting diode element and supplying power to the light emitting diode element, and a reflector provided thereon. Aluminum and silicon are known as materials used for the reflector. Patent Documents 1 and 2 describe examples in which silicon is used as a reflecting plate.

反射板としてシリコンを用いる発光ダイオードパッケージには、配線基板と反射板が一体的に構成された一体型と、配線基板と反射板を別個に形成し両者を接合して構成された分離型の２つの形式が知られている。   There are two types of light emitting diode packages using silicon as the reflection plate: an integrated type in which the wiring substrate and the reflection plate are integrally formed, and a separate type in which the wiring substrate and the reflection plate are separately formed and bonded together. Two forms are known.

一体型の発光ダイオードパッケージでは、反射板の凹凸面に配線層を形成する必要がある。そのため、加工プロセスが複雑化し、コストが高くなる問題がある。更に、反射板としてシリコン基板を用いるため、基板の厚さに制限がある。そのため、反射板の高さを十分に確保できず、高輝度化が困難となる問題がある。   In the integrated light emitting diode package, it is necessary to form a wiring layer on the uneven surface of the reflector. Therefore, there is a problem that the machining process becomes complicated and the cost becomes high. Furthermore, since a silicon substrate is used as the reflecting plate, the thickness of the substrate is limited. Therefore, there is a problem that the height of the reflector cannot be sufficiently secured and it is difficult to increase the brightness.

特開２００４−７９７５０JP 2004-79750 A 特開２００５−２７７３８０JP-A-2005-277380

分離型の発光ダイオードパッケージでは、第１に、配線基板上に形成した配線層と反射板の間の電気絶縁性の確保が問題となっていた。第２に、配線基板上に反射板を搭載する際の位置合わせが問題となっていた。   In the separate type light emitting diode package, firstly, there is a problem of ensuring electrical insulation between the wiring layer formed on the wiring board and the reflector. Secondly, there is a problem of alignment when mounting the reflector on the wiring board.

本発明の目的は、分離型の発光ダイオードパッケージにおいて、反射板と配線基板の間の電気絶縁性を確保し、反射板と配線基板の位置合わせを容易にすることができるようにすることにある。   An object of the present invention is to ensure electrical insulation between a reflector and a wiring board in a separate type light emitting diode package, and to facilitate alignment of the reflector and the wiring board. .

本発明の発光ダイオードパッケージは、配線層と反射板と発光ダイオード素子とを有し、配線基板と反射板の間に絶縁層が設けられている。反射板には、発光ダイオード素子が配置されるための貫通孔が設けられ、絶縁層は発光ダイオード素子が配置されるための開口部が設けられている。絶縁層の開口部は、反射板の貫通孔より小さく、絶縁層は反射板の貫通孔より露出しており、反射板の貫通孔は正方形であり、絶縁層の開口部の一方の１対の対向する辺は、横方向の段差を有する形状に形成されている。 The light emitting diode package of the present invention has a wiring layer, a reflector, and a light emitting diode element, and an insulating layer is provided between the wiring substrate and the reflector. The reflector is provided with a through hole for arranging the light emitting diode element, and the insulating layer is provided with an opening for arranging the light emitting diode element. The opening of the insulating layer is smaller than the through hole of the reflecting plate, the insulating layer is exposed from the through hole of the reflecting plate, the through hole of the reflecting plate is square, and one pair of openings of the insulating layer Opposing sides are formed in a shape having a step in the horizontal direction .

本発明によると、分離型の発光ダイオードパッケージにおいて、反射板と配線基板の間の電気絶縁性を確保し、反射板と配線基板の位置合わせを容易にすることができる。   According to the present invention, in a separate type light emitting diode package, it is possible to ensure electrical insulation between the reflector and the wiring board, and to easily align the reflector and the wiring board.

図１は本発明による発光ダイオードパッケージの例を示す分解斜視図である。図示のように、本例の発光ダイオードパッケージは、配線基板１０とその上の反射板２０を有する。配線基板１０は、配線基板用基材１１とその上の配線層１２とその上の絶縁層１３を有し、絶縁層１３には開口部１３１が設けられている。開口部１３１に、発光ダイオード素子３０が設けられている。反射板２０は、基板２１と反射膜２２を有し、貫通孔２３が設けられている。貫通孔２３の内面２３１はテーパを有する。反射膜２２は基板２１の上面を覆い更に貫通孔２３のテーパ状の内面２３１を覆うように形成されている。   FIG. 1 is an exploded perspective view showing an example of a light emitting diode package according to the present invention. As shown in the figure, the light emitting diode package of this example includes a wiring board 10 and a reflection plate 20 thereon. The wiring board 10 includes a wiring board substrate 11, a wiring layer 12 thereon, and an insulating layer 13 thereon, and an opening 131 is provided in the insulating layer 13. The light emitting diode element 30 is provided in the opening 131. The reflection plate 20 includes a substrate 21 and a reflection film 22, and a through hole 23 is provided. The inner surface 231 of the through hole 23 has a taper. The reflective film 22 is formed so as to cover the upper surface of the substrate 21 and further cover the tapered inner surface 231 of the through hole 23.

本例の発光ダイオードパッケージは、４つの発光ダイオード素子３０を有する。従って、反射板２０には４つの貫通孔２３が設けられ、配線基板１０の絶縁層１３には４つの開口部１３１が設けられている。貫通孔２３と開口部１３１は同一位置に形成されている。   The light emitting diode package of this example has four light emitting diode elements 30. Accordingly, the reflection plate 20 is provided with four through holes 23, and the insulating layer 13 of the wiring substrate 10 is provided with four openings 131. The through hole 23 and the opening 131 are formed at the same position.

本例によると、発光ダイオード素子３０の外形は正方形である。従って、反射板２０の貫通孔２３は正方形であり、絶縁層１３の開口部１３１は正方形である。発光ダイオード素子３０の外形が矩形である場合には、反射板２０の貫通孔２３及び絶縁層１３の開口部１３１は、発光ダイオード素子３０の外形に相似な矩形であってよい。   According to this example, the outer shape of the light emitting diode element 30 is square. Therefore, the through hole 23 of the reflecting plate 20 is square, and the opening 131 of the insulating layer 13 is square. When the outer shape of the light emitting diode element 30 is rectangular, the through hole 23 of the reflector 20 and the opening 131 of the insulating layer 13 may be a rectangle similar to the outer shape of the light emitting diode element 30.

図２を参照して説明する。図２は、図１の発光ダイオードパッケージに含まれる１個の発光ダイオード素子の拡大平面図である。上述のように、貫通孔２３の内面２３１はテーパを有し、貫通孔２３の下側の開口部２３２より上側の開口部２３３の方が大きい。絶縁層１３の開口部１３１の寸法は、貫通孔２３の下側の開口部２３２の寸法より小さい。従って、貫通孔２３において、絶縁層１３の開口部１３１が露出している。即ち、貫通孔２３の内縁に沿って、絶縁層１３の帯状の領域１３ａ、１３ｂ、１３ｃ、１３ｄが露出している。   This will be described with reference to FIG. FIG. 2 is an enlarged plan view of one light-emitting diode element included in the light-emitting diode package of FIG. As described above, the inner surface 231 of the through hole 23 has a taper, and the upper opening 233 is larger than the lower opening 232 of the through hole 23. The size of the opening 131 of the insulating layer 13 is smaller than the size of the opening 232 below the through hole 23. Therefore, the opening 131 of the insulating layer 13 is exposed in the through hole 23. That is, the strip-like regions 13a, 13b, 13c, and 13d of the insulating layer 13 are exposed along the inner edge of the through hole 23.

絶縁層１３の開口部１３１には、配線基板用基材１１とその上の配線層１２の一部が露出している。絶縁層１３の開口部１３１には、更に発光ダイオード素子３０が設けられている。発光ダイオード素子３０の寸法は、絶縁層１３の開口部１３１の寸法より小さい。   In the opening 131 of the insulating layer 13, the wiring board substrate 11 and a part of the wiring layer 12 thereon are exposed. A light emitting diode element 30 is further provided in the opening 131 of the insulating layer 13. The dimension of the light emitting diode element 30 is smaller than the dimension of the opening 131 of the insulating layer 13.

図３を参照して説明する。図３は、図２の矢印A−A’に沿って見た断面図である配線基板用基材１１の上に配線層１２が設けられ、配線層１２の上には絶縁層１３が設けられている。絶縁層１３の上に反射板２０が配置されている。反射板２０は基板２１と反射膜２２を有し、反射膜２２は、基板２１の上面ばかりでなく、貫通孔１１のテーパ状の内面を覆うように形成されている。尚、図示のように、配線基板１０の絶縁層１３と反射板２０の間に接着剤１５が設けられてよい。   This will be described with reference to FIG. 3 is a cross-sectional view taken along the arrow AA ′ in FIG. 2, the wiring layer 12 is provided on the wiring board substrate 11, and the insulating layer 13 is provided on the wiring layer 12. ing. A reflective plate 20 is disposed on the insulating layer 13. The reflection plate 20 includes a substrate 21 and a reflection film 22, and the reflection film 22 is formed so as to cover not only the upper surface of the substrate 21 but also the tapered inner surface of the through hole 11. As shown in the figure, an adhesive 15 may be provided between the insulating layer 13 of the wiring board 10 and the reflection plate 20.

次に、発光ダイオード素子３０の配線について説明する。配線基板用基材１１の上に配線層１２が形成されているが、配線層１２は所定の配線パターンを有する。従って、配線層１２は配線基板用基材１１の上を全面的に覆っているわけではない。本例では、発光ダイオード素子３０の下面にアノード電極が形成され、上面にカソード電極が形成されている。発光ダイオード素子３０の下面のアノード電極は、配線層１２の所定の配線パターン１２１と電気的に接続されている。例えば、発光ダイオード素子３０のアノード電極と配線パターン１２１を、ハンダ又は導電性ペーストを用いて電気的に接続してよい。発光ダイオード素子３０の上面のカソード電極とそれに隣接する配線パターン１２２は、ボンディングワイヤ３１によって電気的に接続されている。   Next, the wiring of the light emitting diode element 30 will be described. A wiring layer 12 is formed on the wiring board substrate 11, and the wiring layer 12 has a predetermined wiring pattern. Therefore, the wiring layer 12 does not entirely cover the wiring substrate base material 11. In this example, an anode electrode is formed on the lower surface of the light emitting diode element 30, and a cathode electrode is formed on the upper surface. The anode electrode on the lower surface of the light emitting diode element 30 is electrically connected to a predetermined wiring pattern 121 of the wiring layer 12. For example, the anode electrode of the light emitting diode element 30 and the wiring pattern 121 may be electrically connected using solder or conductive paste. The cathode electrode on the upper surface of the light emitting diode element 30 and the wiring pattern 122 adjacent thereto are electrically connected by a bonding wire 31.

ここでは、発光ダイオード素子３０の上面にカソード電極が配置され下面にアノード電極が配置されている例を示した。しかしながら、発光ダイオード素子の上面に両電極が配置されている場合であってもよい。また、発光ダイオード素子３０をフリップチップ接続により配線パターンと接続してよい。   Here, an example in which the cathode electrode is disposed on the upper surface of the light emitting diode element 30 and the anode electrode is disposed on the lower surface is shown. However, it may be a case where both electrodes are arranged on the upper surface of the light emitting diode element. Further, the light emitting diode element 30 may be connected to the wiring pattern by flip chip connection.

次に、本例の発光ダイオードパッケージの特徴について説明する。図２に示すように、反射板２０の貫通孔２３にて、絶縁層１３の開口部１３１の内縁に沿った帯状の領域１３ａ、１３ｂ、１３ｃ、１３ｄが露出している。貫通孔２３の開口部２３２及び絶縁層１３の開口部１３１は正方形である。従って、帯状の領域１３ａ、１３ｂ、１３ｃ、１３ｄは正方形である。通常、反射板２０の貫通孔２３と絶縁層１３の開口部１３１は正確に形成されている。従って、帯状の領域１３ａ、１３ｂ、１３ｃ、１３ｄの幅は、４つの辺において同一であるはずである。もし、帯状の領域１３ａ、１３ｂ、１３ｃ、１３ｄの幅が、４つの辺において同一でない場合には、配線基板１０と反射板２０の位置合わせが正確でないことになる。従って、本例の発光ダイオードパッケージでは、反射板２０の貫通孔２３にて露出した絶縁層１３の帯状の領域１３ａ、１３ｂ、１３ｃ、１３ｄを位置決め用のマーカとして使用することができる。   Next, features of the light emitting diode package of this example will be described. As shown in FIG. 2, strip-shaped regions 13 a, 13 b, 13 c, and 13 d along the inner edge of the opening 131 of the insulating layer 13 are exposed in the through hole 23 of the reflecting plate 20. The opening 232 of the through hole 23 and the opening 131 of the insulating layer 13 are square. Accordingly, the band-like regions 13a, 13b, 13c, and 13d are square. Usually, the through hole 23 of the reflecting plate 20 and the opening 131 of the insulating layer 13 are accurately formed. Therefore, the widths of the band-like regions 13a, 13b, 13c, and 13d should be the same on the four sides. If the widths of the band-like regions 13a, 13b, 13c, and 13d are not the same on the four sides, the alignment between the wiring board 10 and the reflecting plate 20 is not accurate. Therefore, in the light emitting diode package of this example, the strip-like regions 13a, 13b, 13c, and 13d of the insulating layer 13 exposed through the through holes 23 of the reflecting plate 20 can be used as positioning markers.

次に、本例の発光ダイオードパッケージの材料について説明する。配線基板１０の配線基板用基材１１は、発光ダイオード素子３０を駆動させたときに発生する熱を効果的に放熱するために、熱伝導率が高い電気絶縁材料によって形成される。本例では、配線基板用基材１１の材料として窒化アルミを用いた。窒化アルミの代わりに、シリコンや銅等の熱伝導率の高い材料を用いることもできる。配線基板用基材１１として、導電性を有する材料を用いてもよい。この場合は、配線基板用基材１１と配線層１２との間に絶縁層を設ける必要がある。配線基板１０の配線層１２は銅、金等の導電性の金属薄膜によって形成される。配線基板１０の絶縁層１３は感光性ポリイミド等によって形成される。   Next, the material of the light emitting diode package of this example will be described. The wiring board base 11 of the wiring board 10 is formed of an electrically insulating material having high thermal conductivity in order to effectively dissipate heat generated when the light emitting diode element 30 is driven. In this example, aluminum nitride was used as the material for the wiring board substrate 11. Instead of aluminum nitride, a material having high thermal conductivity such as silicon or copper can be used. As the wiring board substrate 11, a conductive material may be used. In this case, it is necessary to provide an insulating layer between the wiring board substrate 11 and the wiring layer 12. The wiring layer 12 of the wiring substrate 10 is formed of a conductive metal thin film such as copper or gold. The insulating layer 13 of the wiring board 10 is formed of photosensitive polyimide or the like.

反射板２０の基板２１はシリコンによって形成される。反射板２０の反射膜２２は、金属膜によって形成される。   The substrate 21 of the reflecting plate 20 is made of silicon. The reflection film 22 of the reflection plate 20 is formed of a metal film.

次に、図４を参照して、本例の発光ダイオードパッケージの配線基板１０の製造方法を説明する。ステップＳ１０１にて、窒化アルミ製の配線基板用基材１１の一方の面上に、フォトリソグラフィ技術によって金属製の配線層１２をパターニングする。ステップＳ１０２にて、配線基板用基材１１の配線層１２の上に、感光性ポリイミド等の絶縁層１３を形成する。このとき絶縁層１３には、発光ダイオード素子３０を配置するための開口部１３１を設ける。ステップＳ１０３にて、開口部１３１によって露出された配線層１２上に、発光ダイオード素子３０を搭載する。ステップＳ１０４にて、発光ダイオード素子３０と配線層１２の所定の配線パターンを電気的に接続する。   Next, with reference to FIG. 4, the manufacturing method of the wiring board 10 of the light emitting diode package of this example is demonstrated. In step S101, a metal wiring layer 12 is patterned on one surface of the wiring substrate base material 11 made of aluminum nitride by photolithography. In step S <b> 102, an insulating layer 13 such as photosensitive polyimide is formed on the wiring layer 12 of the wiring board substrate 11. At this time, the insulating layer 13 is provided with an opening 131 for arranging the light emitting diode element 30. In step S <b> 103, the light emitting diode element 30 is mounted on the wiring layer 12 exposed by the opening 131. In step S104, the light emitting diode element 30 and a predetermined wiring pattern of the wiring layer 12 are electrically connected.

図５を参照して、本例の発光ダイオードパッケージの反射板２０の製造方法を説明する。ステップＳ２０１にて、基板２１として、（１００）単結晶シリコン基板を用意する。尚、単結晶シリコン基板の代わりに、化学気相成長法で作製した窒化シリコン基板を用いてもよい。ステップＳ２０２にて、シリコン基板２１の表面に、熱酸化法等によって酸化シリコン膜を形成する。ステップＳ２０３にて、フォトリソグラフィ技術を用いて、シリコン基板２１上にレジストを塗布し、露光し、パターンを形成する。ステップＳ２０４にて、エッチングにより酸化シリコン膜のパターニングを行う。ステップＳ２０５にて、不要なレジストを除去し、酸化シリコン膜をマスクとし、ＫＯＨ等のアルカリ溶液を用いて、シリコン基板の結晶異方性エッチングを行う。このとき、シリコン基板のエッチングは、結晶方位面とマスクパターンの方位を（１１０）面に合わせて行う。それにより、エッチングが、（１００）面で速く進み、（１１１）面で遅く進む。こうして、結晶異方性エッチングは、凹部の内壁に斜面を形成しながら進行する。   With reference to FIG. 5, the manufacturing method of the reflecting plate 20 of the light emitting diode package of this example is demonstrated. In step S201, a (100) single crystal silicon substrate is prepared as the substrate 21. Note that a silicon nitride substrate manufactured by a chemical vapor deposition method may be used instead of the single crystal silicon substrate. In step S202, a silicon oxide film is formed on the surface of the silicon substrate 21 by a thermal oxidation method or the like. In step S203, a resist is applied on the silicon substrate 21 using a photolithography technique, and exposed to form a pattern. In step S204, the silicon oxide film is patterned by etching. In step S205, unnecessary resist is removed, and the silicon substrate is subjected to crystal anisotropic etching using an alkaline solution such as KOH using the silicon oxide film as a mask. At this time, the etching of the silicon substrate is performed with the crystal orientation plane and the mask pattern orientation aligned with the (110) plane. Thereby, the etching proceeds fast on the (100) plane and proceeds slowly on the (111) plane. Thus, the crystal anisotropic etching proceeds while forming a slope on the inner wall of the recess.

結晶異方性エッチングによって、貫通孔が形成されると、ステップＳ２０６にて、酸化シリコン膜のマスクをフッ酸により除去する。こうして、シリコン基板２１に、貫通孔２３が形成されるが、この貫通孔２３の下側の開口部２３２の面積は、配線基板１０に形成した絶縁層１３の開口部１３１の面積よりも大きい。   When the through hole is formed by the crystal anisotropic etching, the silicon oxide film mask is removed with hydrofluoric acid in step S206. Thus, the through hole 23 is formed in the silicon substrate 21, and the area of the opening 232 below the through hole 23 is larger than the area of the opening 131 of the insulating layer 13 formed in the wiring substrate 10.

最後に、ステップＳ２０７にて、シリコン基板２１の表面に、蒸着やメッキ等により、反射率の高い金属膜からなる反射膜２２を形成する。反射膜２２は、シリコン基板２１の表面ばかりでなく、貫通孔２３のテーパ状の内面２３１にも形成される。本例では、アルミ膜をスパッタ法により形成することにより反射膜２２を形成した。   Finally, in step S207, the reflective film 22 made of a highly reflective metal film is formed on the surface of the silicon substrate 21 by vapor deposition or plating. The reflective film 22 is formed not only on the surface of the silicon substrate 21 but also on the tapered inner surface 231 of the through hole 23. In this example, the reflective film 22 is formed by forming an aluminum film by sputtering.

本例では、シリコン基板を用いて反射板２０を形成したが、アルミ板に打ち抜き等により貫通孔を形成して反射板２０を形成してもよい。   In this example, the reflecting plate 20 is formed using a silicon substrate, but the reflecting plate 20 may be formed by forming a through hole in an aluminum plate by punching or the like.

こうして、配線基板１０と反射板２０が形成されると、両者を接着剤により接合し、発光ダイオードパッケージが形成される。上述のように、シリコン基板２１に形成した貫通孔２３の下側の開口部２３２の面積は、配線基板１０に形成した絶縁層１３の開口部１３１の面積よりも大きい。従って、図２に示すように、反射板２０の貫通孔２３にて、絶縁層１３の帯状の領域１３ａ、１３ｂ、１３ｃ、１３ｄが露出する。帯状の領域１３ａ、１３ｂ、１３ｃ、１３ｄの幅が４辺にて同一であるなら、反射板２０と配線基板１０の位置合わせが正しいと言える。従って、絶縁層１の開口部１３１の内縁は、位置合わせ用のマークとして使用することができる。   Thus, when the wiring substrate 10 and the reflection plate 20 are formed, the two are joined together by an adhesive, and a light emitting diode package is formed. As described above, the area of the opening 232 below the through hole 23 formed in the silicon substrate 21 is larger than the area of the opening 131 of the insulating layer 13 formed in the wiring substrate 10. Therefore, as shown in FIG. 2, the strip-shaped regions 13 a, 13 b, 13 c, and 13 d of the insulating layer 13 are exposed in the through holes 23 of the reflecting plate 20. If the widths of the band-like regions 13a, 13b, 13c, and 13d are the same on the four sides, it can be said that the alignment of the reflector 20 and the wiring board 10 is correct. Therefore, the inner edge of the opening 131 of the insulating layer 1 can be used as an alignment mark.

図６を参照して本発明による発光ダイオードパッケージの他の例を説明する。本例では、絶縁層１３の開口部１３１は正方形ではない。即ち、絶縁層１３の開口部１３１の上下側の内縁は複数の段差のある階段状に形成され、絶縁層１３の開口部１３１の左右側の内縁は１つの段差からなる階段状に形成されている。   Another example of the light emitting diode package according to the present invention will be described with reference to FIG. In this example, the opening 131 of the insulating layer 13 is not square. That is, the upper and lower inner edges of the opening 131 of the insulating layer 13 are formed in a stepped shape having a plurality of steps, and the inner edges on the left and right sides of the opening 131 of the insulating layer 13 are formed in a stepped shape including one step. Yes.

反射板２０の貫通孔２３にて、絶縁層１３の開口部１３１の内縁に沿った領域１３ａ、１３ｂ、１３ｃ、１３ｄが露出している。これらの領域１３ａ、１３ｂ、１３ｃ、１３ｄは帯状ではない。即ち、上下側の領域１３ｃ、１３ｄでは、複数の段差からなる階段状に形成されている。左右側の領域１３ａ、１３ｂでは、１つの段差からなる階段状に形成されている。   Regions 13 a, 13 b, 13 c and 13 d along the inner edge of the opening 131 of the insulating layer 13 are exposed in the through hole 23 of the reflection plate 20. These regions 13a, 13b, 13c, 13d are not strip-shaped. That is, the upper and lower regions 13c and 13d are formed in a staircase shape having a plurality of steps. The left and right regions 13a and 13b are formed in a staircase shape having one step.

絶縁層１３の開口部１３１の内縁の形状をこのように設定することにより、絶縁層１３の開口部１３１の内縁を位置合わせ用のマークとして使用することができる。本例では、絶縁層１３の開口部１３１の上下側の内縁と左右側の内縁を異なる形状に設定したから、反射板２０と配線基板１０を貼り合わせるとき、上下左右方向の位置決めばかりでなく、回転方向の位置決めを正しく行うことができる。   By setting the shape of the inner edge of the opening 131 of the insulating layer 13 in this manner, the inner edge of the opening 131 of the insulating layer 13 can be used as an alignment mark. In this example, since the upper and lower inner edges and the left and right inner edges of the opening 131 of the insulating layer 13 are set in different shapes, not only the positioning in the vertical and horizontal directions when the reflecting plate 20 and the wiring board 10 are bonded, Positioning in the rotational direction can be performed correctly.

こうして本例によると、発光ダイオード素子３０と反射板２０の相対的な位置精度を高めることが可能となり、発光ダイオードパッケージの高輝度化が可能となる。   Thus, according to this example, the relative positional accuracy of the light emitting diode element 30 and the reflecting plate 20 can be increased, and the brightness of the light emitting diode package can be increased.

図６に示した絶縁層１３の開口部１３１の内縁の形状は、一例であり、他の形状であってもよい。   The shape of the inner edge of the opening 131 of the insulating layer 13 shown in FIG. 6 is an example, and may be another shape.

以上、本発明を用いることにより、高輝度な発光ダイオードパッケージを低コストに実現できる。なお、上述の例では、４個の発光ダイオード素子を用いたが、１個又は５個以上の発光ダイオード素子を用いてもよい。   As described above, by using the present invention, a light-emitting diode package with high luminance can be realized at low cost. In the above example, four light emitting diode elements are used, but one or five or more light emitting diode elements may be used.

以上本発明の例を説明したが本発明は上述の例に限定されるものではなく、特許請求の範囲に記載された発明の範囲にて様々な変更が可能であることは当業者により容易に理解されよう。   The example of the present invention has been described above, but the present invention is not limited to the above-described example, and various modifications can be easily made by those skilled in the art within the scope of the invention described in the claims. It will be understood.

本発明の発光ダイオードパッケージの第１の例を示す分解斜視図である。It is a disassembled perspective view which shows the 1st example of the light emitting diode package of this invention. 本発明の発光ダイオードパッケージの第１の例の平面図である。It is a top view of the 1st example of the light emitting diode package of this invention. 本発明の発光ダイオードパッケージの第１の例の断面図である。It is sectional drawing of the 1st example of the light emitting diode package of this invention. 本発明の発光ダイオードパッケージの配線基板の製造方法を示す図である。It is a figure which shows the manufacturing method of the wiring board of the light emitting diode package of this invention. 本発明の発光ダイオードパッケージの反射板の製造方法を示す図である。It is a figure which shows the manufacturing method of the reflecting plate of the light emitting diode package of this invention. 本発明の発光ダイオードパッケージの第２の例の平面図である。It is a top view of the 2nd example of the light emitting diode package of this invention.

符号の説明Explanation of symbols

１０…配線基板、１１…配線基板用基材、１２…配線層、１３…絶縁層、１４…接着剤、２０…反射板、２１…基板、２２…反射膜、２３…貫通孔、３０…発光ダイオード素子、３１…ボンディングワイヤ、１３１…絶縁層の開口部 DESCRIPTION OF SYMBOLS 10 ... Wiring board, 11 ... Base material for wiring boards, 12 ... Wiring layer, 13 ... Insulating layer, 14 ... Adhesive, 20 ... Reflecting plate, 21 ... Substrate, 22 ... Reflecting film, 23 ... Through-hole, 30 ... Light emission Diode element, 31 ... bonding wire, 131 ... opening of insulating layer

Claims (4)

基材と該基材の上に配置された配線層とを有する配線基板と、該配線基板の上に配置され貫通孔を有する導電性の母材からなる反射板と、前記貫通孔内に且つ前記配線基板の上に配置された発光ダイオード素子と、とを有し、
前記配線基板の配線層と前記反射板の間に絶縁層が設けられ、該絶縁層は前記発光ダイオード素子が配置される微細加工された開口部を有し、該開口部は、前記反射板の貫通孔より小さく、前記絶縁層は前記反射板の貫通孔より露出しており、
前記反射板の貫通孔は正方形であり、
前記絶縁層の開口部の一方の１対の対向する辺は、横方向の段差を有する形状に形成されていることを特徴とする発光ダイオードパッケージ。 A wiring board having a substrate and arranged wiring layer on the substrate, a reflecting plate made of a conductive base material which is disposed on the wiring substrate having through holes, and in the through-hole a light emitting diode elements disposed on the wiring board, has a capital,
Wherein the reflective plates and the wiring layers of the wiring board is provided an insulating layer, the insulating layer has an opening that the light emitting diode elements are microfabricated is arranged, opening the through hole of the reflector smaller, the insulating layer is exposed from the through hole of the reflector,
The through hole of the reflector is square,
A pair of opposing sides of one of the openings of the insulating layer is formed in a shape having a step in the horizontal direction . 請求項１記載の発光ダイオードパッケージにおいて、前記絶縁層の開口部の他方の１対の対向する辺は、前記一方の１対の対向する辺に形成された前記横方向の段差とは異なる形状の横方向の段差を有する形状に形成されていることを特徴とする発光ダイオードパッケージ。 2. The light emitting diode package according to claim 1, wherein the other pair of opposing sides of the opening of the insulating layer has a shape different from the lateral step formed on the one pair of opposing sides. A light emitting diode package, wherein the light emitting diode package is formed in a shape having a step in a horizontal direction . 窒化アルミ製の基材の一方の面上に金属製の配線パターンを有する配線層を形成するステップと、
前記基材の配線層の上に、発光ダイオード素子を配置するための開口部を有する感光性ポリイミドの絶縁層を形成するステップと、
前記開口部によって露出された前記配線層上に、発光ダイオード素子を搭載するステップと、
前記発光ダイオード素子と前記配線層の所定の配線パターンを電気的に接続するステップと、
発光ダイオード素子を配置するための貫通孔を有する反射板を用意するステップと、
前記反射板を前記基材に接合するステップと、
を有し、
前記絶縁層の開口部は、前記反射板の貫通孔より小さく、前記反射板を前記基材の上に配置するとき、前記絶縁層は前記反射板の貫通孔より露出しており、
前記絶縁層の開口部は正方形であり、前記反射板の貫通孔より露出している前記絶縁層の領域は、前記反射板の貫通孔に沿って同一幅の環状に形成されており、
前記絶縁層の開口部の一方の１対の対向する辺は、横方向の段差を有する形状に形成されていることを特徴とする発光ダイオードパッケージの製造方法。 Forming a wiring layer having a metal wiring pattern on one surface of an aluminum nitride base material;
On the wiring layer of the base material, forming a photosensitive polyimide insulating layer having an opening for arranging a light emitting diode element;
Mounting a light emitting diode element on the wiring layer exposed by the opening;
Electrically connecting the light emitting diode element and a predetermined wiring pattern of the wiring layer;
Preparing a reflector having a through-hole for disposing a light-emitting diode element;
Bonding the reflector to the substrate;
Have
The opening of the insulating layer is smaller than the through hole of the reflecting plate, and when the reflecting plate is disposed on the substrate, the insulating layer is exposed from the through hole of the reflecting plate,
The opening of the insulating layer is square, and the region of the insulating layer exposed from the through hole of the reflector is formed in an annular shape having the same width along the through hole of the reflector.
A method of manufacturing a light emitting diode package, wherein one pair of opposing sides of the opening of the insulating layer is formed in a shape having a step in a horizontal direction . 請求項３記載の発光ダイオードパッケージの製造方法において、前記絶縁層の開口部の他方の１対の対向する辺は、前記一方の１対の対向する辺に形成された前記横方向の段差とは異なる形状の横方向の段差を有する形状に形成されていることを特徴とする発光ダイオードパッケージの製造方法。 4. The method of manufacturing a light emitting diode package according to claim 3, wherein the other pair of opposing sides of the opening of the insulating layer is the lateral step formed on the one pair of opposing sides. A method for manufacturing a light-emitting diode package, wherein the light-emitting diode package is formed into a shape having a step in a lateral direction of a different shape .
JP2006275506A 2006-10-06 2006-10-06 Light emitting diode package Expired - Fee Related JP4871694B2 (en)

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