JP4853276B2 - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

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JP4853276B2
JP4853276B2 JP2006347288A JP2006347288A JP4853276B2 JP 4853276 B2 JP4853276 B2 JP 4853276B2 JP 2006347288 A JP2006347288 A JP 2006347288A JP 2006347288 A JP2006347288 A JP 2006347288A JP 4853276 B2 JP4853276 B2 JP 4853276B2
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base plate
insulating substrate
semiconductor chip
semiconductor device
manufacturing
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JP2008159857A (en
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伸 征矢野
両角　　朗
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Fuji Electric Co Ltd
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Fuji Electric Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires

Description

本発明は、半導体チップを搭載した半導体装置の製造方法に関し、特に、半導体チップを実装する絶縁基板及びプリント基板を放熱用のベース板に取り付ける半導体装置の製造方法に関する。   The present invention relates to a method for manufacturing a semiconductor device on which a semiconductor chip is mounted, and more particularly to a method for manufacturing a semiconductor device in which an insulating substrate on which a semiconductor chip is mounted and a printed circuit board are attached to a base plate for heat dissipation.

パワーモジュールなど、駆動時に熱を発生する半導体チップを有する半導体装置は、製造時に、半導体チップを実装した絶縁基板やプリント基板を放熱用の金属ベース板に接合させている。このような半導体装置においては、絶縁基板を金属ベース板に半田付けしている半田が流れ出す恐れがある。このため、金属ベース板の絶縁基板の外周に相当する領域に溝を形成することが提案されている（例えば、特許文献１，２参照）。さらに、絶縁基板の回路パターン上に半導体チップを半田で接合するにあたり、半導体チップの外周に相当する領域に溝を形成することが提案されている（例えば、特許文献３参照）。また、接着剤を用いる場合に、余剰接着剤を溝で吸収することも提案されている（例えば、特許文献４，５参照）。   In a semiconductor device having a semiconductor chip that generates heat when driven, such as a power module, an insulating substrate or a printed board on which the semiconductor chip is mounted is bonded to a heat-dissipating metal base plate at the time of manufacture. In such a semiconductor device, there is a risk that the solder that solders the insulating substrate to the metal base plate will flow out. For this reason, it has been proposed to form a groove in a region corresponding to the outer periphery of the insulating substrate of the metal base plate (see, for example, Patent Documents 1 and 2). Furthermore, it has been proposed to form a groove in a region corresponding to the outer periphery of the semiconductor chip when the semiconductor chip is joined to the circuit pattern of the insulating substrate with solder (for example, see Patent Document 3). In addition, when an adhesive is used, it has also been proposed to absorb excess adhesive with a groove (see, for example, Patent Documents 4 and 5).

また、上記の半導体チップを実装した絶縁基板及びその半導体チップと電気的に接続されるプリント基板を同一の金属ベースに取り付けるようにした半導体装置も提案されている（例えば、特許文献６，７参照）。   There has also been proposed a semiconductor device in which an insulating substrate on which the semiconductor chip is mounted and a printed board electrically connected to the semiconductor chip are attached to the same metal base (see, for example, Patent Documents 6 and 7). ).

図４はこのような一般的な半導体装置の外観を示す斜視図である。同図の（ａ）は完成後の状態、（ｂ）はその内部構造を外観的に示している。ベース板２０１に回路部品の取り付け台２０２及び、カバー２０３の下の回路部品と接続されたコネクタ２０４が設けられ、回路部品の上側は遮蔽板２０５で覆われている。   FIG. 4 is a perspective view showing the appearance of such a general semiconductor device. (A) of the figure shows the state after completion, and (b) shows its internal structure in appearance. A base plate 201 is provided with a circuit component mounting base 202 and a connector 204 connected to the circuit component under the cover 203, and the upper side of the circuit component is covered with a shielding plate 205.

また、図５は上記の従来の半導体装置の内部構造を示す図であり、（ａ）は平面図、（ｂ）は側面図である。半導体チップを実装した絶縁基板１０１と、この絶縁基板１０１と電気的に接続されたプリント基板１０２が、銅（Ｃｕ）板からなる放熱用のベース板１０３に取り付けられている。   5A and 5B are views showing the internal structure of the conventional semiconductor device, wherein FIG. 5A is a plan view and FIG. 5B is a side view. An insulating substrate 101 on which a semiconductor chip is mounted, and a printed circuit board 102 electrically connected to the insulating substrate 101 are attached to a heat radiating base plate 103 made of a copper (Cu) plate.

図６は図５に示す従来の半導体装置の詳細構造を示す断面図であり、図５のａ部の断面構造を示している。同図の（ａ）に示すように、絶縁基板１０１はその上側（外側）と下側（内側）に回路パターン部１１１，１１２が形成されており、上側の回路パターン部１１１に半導体チップ１１３が半田１１４により実装されている。また、絶縁基板１０１は半田１１５によりベース板１０３に接合されている。１１６は半田ボールを示している。   FIG. 6 is a cross-sectional view showing a detailed structure of the conventional semiconductor device shown in FIG. 5, and shows a cross-sectional structure of part a in FIG. As shown in FIG. 2A, the insulating substrate 101 has circuit pattern portions 111 and 112 formed on its upper side (outer side) and lower side (inner side), and a semiconductor chip 113 is formed on the upper circuit pattern portion 111. It is mounted with solder 114. The insulating substrate 101 is bonded to the base plate 103 with solder 115. Reference numeral 116 denotes a solder ball.

また、同図の（ｂ）は接着剤１２０でプリント基板１０２をベース板１０３に固定した状態を示している。そして、このような半導体装置は、位置決め冶具１３０により位置決めが行われて組み立てられる。
特開平１０−５０９２８号公報 特開平１０−１８９８０３号公報 特開２００４−１１９５６８号公報 特開２００２−１３４７６３号公報 特開２００４−３６１２０８号公報 特開平９−２７５２１１号公報 特開平９−２３２５１０号公報 FIG. 5B shows a state in which the printed circuit board 102 is fixed to the base plate 103 with the adhesive 120. Such a semiconductor device is assembled by positioning with the positioning jig 130.
Japanese Patent Laid-Open No. 10-50928 JP-A-10-189803 JP 2004-119568 A JP 2002-134763 A JP 2004-361208 A JP-A-9-275211 JP-A-9-232510

ところで、上記のような従来の半導体装置においては、例えば絶縁基板をベース板に接合している半田が流れ出すと、絶縁基板の表面の回路パターン部との沿面距離Ｌ１０１が小さくなり、その分絶縁基板の外形を大きくしなければならず、また接着剤が流れ出すと絶縁基板の下側に入り込んで絶縁基板を破壊する恐れがあり、さらには半導体チップを回路パターン部に接合している半田が飛び散って半田ボールが半導体チップ上に付着するという問題点があるとともに、半導体装置の製造の際に位置決め冶具が必要になるという問題点がある。   By the way, in the conventional semiconductor device as described above, for example, when the solder that joins the insulating substrate to the base plate flows out, the creeping distance L101 between the surface of the insulating substrate and the circuit pattern portion becomes small, and accordingly the insulating substrate. In addition, if the adhesive flows out, it may enter the lower side of the insulating substrate and destroy the insulating substrate. Furthermore, the solder that joins the semiconductor chip to the circuit pattern part may be scattered. In addition to the problem that the solder balls adhere to the semiconductor chip, there is a problem that a positioning jig is required when manufacturing the semiconductor device.

本発明は、このような点に鑑みてなされたものであり、半田の流れ出しや接着剤のはみ出しなどによる影響を防ぐことができるとともに、製造の際に位置決め冶具が不要になる半導体装置の製造方法を提供することを目的とする。   The present invention has been made in view of the above-described points, and can prevent the influence of a solder flow-out or an adhesive stick-out and the like, and a method for manufacturing a semiconductor device that does not require a positioning jig in the manufacturing process. The purpose is to provide.

本発明では上記課題を解決するために、放熱用のベース板に凹形状の溝部を形成する工程と、半導体チップを実装した絶縁基板の外周部外側を前記ベース板の前記溝部に合わせて取り付ける工程と、前記半導体チップと電気的に接続されるプリント基板を前記ベース板に取り付ける工程と、を有し、組み立て冶具の位置決めに前記凹形状の溝部を用いることを特徴とする半導体装置の製造方法が提供される。   In the present invention, in order to solve the above-mentioned problem, a step of forming a concave groove in the base plate for heat dissipation, and a step of attaching the outer periphery of the insulating substrate on which the semiconductor chip is mounted to the groove of the base plate And a step of attaching a printed circuit board electrically connected to the semiconductor chip to the base plate, and using the concave groove for positioning an assembly jig. Provided.

このような半導体装置の製造方法によれば、ベース板の絶縁基板の外周部外側に形成した凹形状の溝部を組み立て冶具の位置決めに用いるので、絶縁基板をベース板に接合する半田の流れ出しによる影響を防ぐことができるとともに、製造の際に絶縁基板の位置決め冶具が不要になる。   According to such a method of manufacturing a semiconductor device, the concave groove formed outside the outer peripheral portion of the insulating substrate of the base plate is used for positioning of the assembly jig. Therefore, the influence of the flow of solder that joins the insulating substrate to the base plate Can be prevented, and a positioning jig for the insulating substrate is not required during the production.

また、本発明では上記課題を解決するために、放熱用のベース板に凹形状の溝部を形成する工程と、半導体チップを実装した絶縁基板を前記ベース板に取り付ける工程と、前記半導体チップと電気的に接続されるプリント基板の外周部外側を前記ベース板の前記溝部に合わせて取り付ける工程と、を有し、組み立て冶具の位置決めに前記凹形状の溝部を用いることを特徴とする半導体装置の製造方法が提供される。   In the present invention, in order to solve the above problems, a step of forming a concave groove in a base plate for heat dissipation, a step of attaching an insulating substrate mounted with a semiconductor chip to the base plate, Mounting the outer periphery of the printed circuit board to be connected to the groove of the base plate, and using the concave groove for positioning an assembly jig. A method is provided.

このような半導体装置の製造方法によれば、ベース板のプリント基板の外周部外側に形成した凹形状の溝部を組み立て冶具の位置決めに用いるので、プリント基板をベース板に接着する接着剤のはみ出しによる影響を防ぐことができるとともに、製造の際にプリント基板の位置決め冶具が不要になる。   According to such a method for manufacturing a semiconductor device, the concave groove formed outside the outer peripheral portion of the printed circuit board of the base plate is used for positioning the assembly jig, so that the adhesive that sticks the printed circuit board to the base plate protrudes. The influence can be prevented, and a printed circuit board positioning jig is not required during the production.

また、本発明では上記課題を解決するために、半導体チップを実装した絶縁基板を放熱用のベース板に取り付ける工程と、前記半導体チップと電気的に接続されるプリント基板を前記ベース板に取り付ける工程と、前記絶縁基板の回路パターンの前記半導体チップを搭載する外周部外側に凹形状の溝部を形成する工程と、を有し、組み立て冶具の位置決めに前記凹形状の溝部を用いることを特徴とする半導体装置の製造方法が提供される。   Further, in the present invention, in order to solve the above problems, a step of attaching an insulating substrate on which a semiconductor chip is mounted to a base plate for heat dissipation, and a step of attaching a printed board electrically connected to the semiconductor chip to the base plate And a step of forming a concave groove on the outer periphery of the circuit pattern of the insulating substrate on which the semiconductor chip is mounted, and the concave groove is used for positioning an assembly jig. A method for manufacturing a semiconductor device is provided.

このような半導体装置の製造方法によれば、絶縁基板の半導体チップの外周部外側に形成した凹形状の溝部を組み立て冶具の位置決めに用いるので、半導体チップを絶縁基板に接合する半田の流れ出しによる影響を防ぐことができるとともに、製造の際に半導体チップの位置決め冶具が不要になる。   According to such a method of manufacturing a semiconductor device, the concave groove formed outside the outer peripheral portion of the semiconductor chip of the insulating substrate is used for positioning of the assembly jig, and therefore, the influence of the flow of solder that joins the semiconductor chip to the insulating substrate. In addition, a semiconductor chip positioning jig is not required during manufacturing.

本発明の半導体装置の製造方法は、絶縁基板、プリント基板、半導体チップなどの外周部外側に形成した凹形状の溝部を組み立て冶具の位置決めに用いるので、半田の流れ出しや接着剤のはみ出しなどによる影響を防ぐことができるとともに、製造の際に位置決め冶具が不要になるという利点がある。   The method of manufacturing a semiconductor device of the present invention uses a concave groove formed outside the outer peripheral portion of an insulating substrate, a printed circuit board, a semiconductor chip, or the like for positioning of an assembly jig, and is therefore affected by the flow of solder or the protrusion of adhesive. In addition, there is an advantage that a positioning jig is not required during manufacture.

以下、本発明の実施の形態を図面を参照して説明する。
図１は本発明の実施の形態の半導体装置の内部構造を示す図であり、（ａ）は平面図、（ｂ）は側面図である。半導体チップを実装した絶縁基板１と、この絶縁基板１と電気的に接続されたプリント基板２が、銅板からなる同一の放熱用のベース板３に取り付けられている。 Hereinafter, embodiments of the present invention will be described with reference to the drawings.
1A and 1B are diagrams showing an internal structure of a semiconductor device according to an embodiment of the present invention, where FIG. 1A is a plan view and FIG. 1B is a side view. An insulating substrate 1 on which a semiconductor chip is mounted and a printed board 2 electrically connected to the insulating substrate 1 are attached to the same heat radiation base plate 3 made of a copper plate.

図２は図１に示す実施の形態の半導体装置の詳細構造を示す断面図であり、図１のＡ部の断面構造を示している。同図の（ａ）に示すように、絶縁基板１はその上側と下側に回路パターン部１１，１２が形成されており、上側の回路パターン部１１に半導体チップ１３が半田１４により実装されている。また、絶縁基板１は半田１５によりベース板３に接合されている。１６は半田ボールを示している。   FIG. 2 is a cross-sectional view showing a detailed structure of the semiconductor device according to the embodiment shown in FIG. 1, and shows a cross-sectional structure of portion A in FIG. As shown in FIG. 2A, the insulating substrate 1 has circuit pattern portions 11 and 12 formed on the upper and lower sides thereof, and a semiconductor chip 13 is mounted on the upper circuit pattern portion 11 with solder 14. Yes. Further, the insulating substrate 1 is joined to the base plate 3 by solder 15. Reference numeral 16 denotes a solder ball.

また、同図の（ｂ）は接着剤２０でプリント基板２をベース板３に固定した状態を示している。そして、このような半導体装置は、組み立て冶具３０が用いられて組み立てられる。   Further, (b) of the figure shows a state in which the printed board 2 is fixed to the base plate 3 with the adhesive 20. Such a semiconductor device is assembled using the assembly jig 30.

次に、上記の半導体装置の製造方法について説明する。実施の形態の半導体装置の製造方法は、半導体チップ１３を実装した絶縁基板１をベース板３に取り付ける工程と、半導体チップ１３と電気的に接続されるプリント基板２をベース板３に取り付ける工程と、ベース板３の絶縁基板１の外周部外側に凹形状の溝部４を形成する工程と、ベース板３のプリント基板２の外周部外側に凹形状の溝部５を形成する工程と、絶縁基板１の半導体チップ１３の外周部外側に凹形状の溝部６を形成する工程とを有しており、組み立て冶具３０の位置決めに上記凹形状の溝部４〜６が用いられる。具体的には、溝部４により絶縁基板１の位置決めが行われ、溝部５によりプリント基板２の位置決めが行われ、溝部６により半導体チップ１３の位置決めが行われる。   Next, a method for manufacturing the semiconductor device will be described. The method of manufacturing a semiconductor device according to the embodiment includes a step of attaching the insulating substrate 1 on which the semiconductor chip 13 is mounted to the base plate 3, and a step of attaching the printed board 2 electrically connected to the semiconductor chip 13 to the base plate 3. A step of forming a concave groove portion 4 on the outer periphery of the insulating substrate 1 of the base plate 3, a step of forming a concave groove portion 5 on the outer peripheral portion of the printed circuit board 2 of the base plate 3, and the insulating substrate 1. A step of forming the concave groove 6 on the outer periphery of the semiconductor chip 13, and the concave grooves 4 to 6 are used for positioning the assembly jig 30. Specifically, the insulating substrate 1 is positioned by the groove portion 4, the printed circuit board 2 is positioned by the groove portion 5, and the semiconductor chip 13 is positioned by the groove portion 6.

このように、実施の形態では、絶縁基板１、プリント基板２及び半導体チップ１３の外周部外側に形成した凹形状の溝部４〜６を組み立て冶具３０の位置決めに用いるので、半田１４，１５の流れ出しや接着剤２０のはみ出しなどによる影響を防ぐことができるとともに、製造の際に位置決め冶具が不要になる。   As described above, in the embodiment, the concave grooves 4 to 6 formed outside the outer peripheral portions of the insulating substrate 1, the printed circuit board 2, and the semiconductor chip 13 are used for positioning the assembly jig 30, so that the solder 14 and 15 flow out. In addition, it is possible to prevent the influence of the protrusion of the adhesive 20 and the like, and a positioning jig is not necessary during the production.

すなわち、半田１４，１５の飛び散りや流れ出しをコントロールできるので、半田ボール１６が半導体チップ１３に付着するのを防止でき、また絶縁基板１上の沿面距離Ｌ１，Ｌ２，Ｌ３を確保することもできる。さらに、接着剤２０の流れ出しもコントロールでき、組み立てにおける不具合を回避することができる。   That is, since the scattering and the flow-out of the solders 14 and 15 can be controlled, the solder balls 16 can be prevented from adhering to the semiconductor chip 13 and the creepage distances L1, L2 and L3 on the insulating substrate 1 can be secured. Furthermore, the flow-out of the adhesive 20 can be controlled, and problems in assembly can be avoided.

また、溝部４〜６を組み立て冶具３０の位置決めに用いているので、専用の位置決め冶具が不要になる。さらに、組み立て冶具３０を溝部４〜６に嵌合するようにすれば、半田付けによりベース板３に変形があっても、図３に示すように、組み立て冶具３０の先端は、溝部４〜６内にあるため、半田１５の流れ出しを防止できる。   Moreover, since the groove parts 4-6 are used for positioning of the assembly jig 30, a dedicated positioning jig becomes unnecessary. Furthermore, if the assembly jig 30 is fitted into the groove portions 4 to 6, even if the base plate 3 is deformed by soldering, the tip of the assembly jig 30 is positioned at the groove portions 4 to 6 as shown in FIG. Therefore, the solder 15 can be prevented from flowing out.

図３は実施の形態の半導体装置のベース板が反ったときの状態を示す図であり、同図の（ａ）に示す組み立て冶具３０を溝部４〜６に嵌合した状態に対し、同図の（ｂ）は側面方向に９０度回転させた状態をイメージとして示している。   FIG. 3 is a view showing a state when the base plate of the semiconductor device of the embodiment is warped. In contrast to the state in which the assembly jig 30 shown in FIG. (B) shows the image rotated 90 degrees in the lateral direction as an image.

本発明の実施の形態の半導体装置の内部構造を示す図である。It is a figure which shows the internal structure of the semiconductor device of embodiment of this invention. 実施の形態の半導体装置の詳細構造を示す断面図である。It is sectional drawing which shows the detailed structure of the semiconductor device of embodiment. 実施の形態の半導体装置のベース板が反ったときの状態を示す図である。It is a figure which shows a state when the base board of the semiconductor device of embodiment warps. 一般的な半導体装置の外観を示す斜視図である。It is a perspective view which shows the external appearance of a common semiconductor device. 従来の半導体装置の内部構造を示す図である。It is a figure which shows the internal structure of the conventional semiconductor device. 従来の半導体装置の詳細構造を示す断面図である。It is sectional drawing which shows the detailed structure of the conventional semiconductor device.

符号の説明Explanation of symbols

１ 絶縁基板
２ プリント基板
３ ベース板
４，５，６ 凹形状の溝部
１１，１２ 回路パターン部
１３ 半導体チップ
１４，１５ 半田
１６ 半田ボール
２０ 接着剤
３０ 組み立て冶具 DESCRIPTION OF SYMBOLS 1 Insulation board | substrate 2 Printed circuit board 3 Base board 4,5,6 Concave groove part 11,12 Circuit pattern part 13 Semiconductor chip 14,15 Solder 16 Solder ball 20 Adhesive 30 Assembly jig

Claims (5)

放熱用のベース板に凹形状の溝部を形成する工程と、
半導体チップを実装した絶縁基板の外周部外側を前記ベース板の前記溝部に合わせて取り付ける工程と、
前記半導体チップと電気的に接続されるプリント基板を前記ベース板に取り付ける工程と、を有し、
組み立て冶具の位置決めに前記凹形状の溝部を用いることを特徴とする半導体装置の製造方法。 Forming a concave groove on the base plate for heat dissipation;
Attaching the outer periphery of the insulating substrate on which the semiconductor chip is mounted to the groove of the base plate,
Attaching a printed circuit board electrically connected to the semiconductor chip to the base plate,
A method of manufacturing a semiconductor device, wherein the concave groove is used for positioning an assembly jig. 放熱用のベース板に凹形状の溝部を形成する工程と、
半導体チップを実装した絶縁基板を前記ベース板に取り付ける工程と、
前記半導体チップと電気的に接続されるプリント基板の外周部外側を前記ベース板の前記溝部に合わせて取り付ける工程と、を有し、
組み立て冶具の位置決めに前記凹形状の溝部を用いることを特徴とする半導体装置の製造方法。 Forming a concave groove on the base plate for heat dissipation;
Attaching an insulating substrate mounting a semiconductor chip to the base plate;
Attaching the outer periphery of the printed circuit board electrically connected to the semiconductor chip to match the groove of the base plate, and
A method of manufacturing a semiconductor device, wherein the concave groove is used for positioning an assembly jig. 半導体チップを実装した絶縁基板を放熱用のベース板に取り付ける工程と、
前記半導体チップと電気的に接続されるプリント基板を前記ベース板に取り付ける工程と、
前記絶縁基板の回路パターンの前記半導体チップを搭載する外周部外側に凹形状の溝部を形成する工程と、を有し、
組み立て冶具の位置決めに前記凹形状の溝部を用いることを特徴とする半導体装置の製造方法。 Attaching an insulating substrate mounted with a semiconductor chip to a base plate for heat dissipation;
Attaching a printed circuit board electrically connected to the semiconductor chip to the base plate;
Forming a concave groove on the outer periphery of the circuit pattern of the insulating substrate on the outer periphery of the semiconductor chip.
A method of manufacturing a semiconductor device, wherein the concave groove is used for positioning an assembly jig. 前記絶縁基板と前記プリント基板とを、前記溝部を挟んで対向して配置することを特徴とする請求項１または２記載の半導体装置の製造方法。   3. The method of manufacturing a semiconductor device according to claim 1, wherein the insulating substrate and the printed circuit board are arranged to face each other with the groove portion interposed therebetween. 前記絶縁基板と前記プリント基板とを前記ベース板に取り付ける際に、前記組み立て冶具を前記溝部に嵌合させるとともに、前記ベース板を押圧することを特徴とする請求項１ないし４のいずれかに記載の半導体装置の製造方法。   The said assembly board is fitted to the said groove part, and the said base board is pressed when attaching the said insulated substrate and the said printed circuit board to the said base board, The said base board is characterized by the above-mentioned. Semiconductor device manufacturing method.
JP2006347288A 2006-12-25 2006-12-25 Manufacturing method of semiconductor device Expired - Fee Related JP4853276B2 (en)

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