JP4841898B2 - Cleaning semiconductor chip tray - Google Patents

Cleaning semiconductor chip tray Download PDF

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JP4841898B2
JP4841898B2 JP2005249535A JP2005249535A JP4841898B2 JP 4841898 B2 JP4841898 B2 JP 4841898B2 JP 2005249535 A JP2005249535 A JP 2005249535A JP 2005249535 A JP2005249535 A JP 2005249535A JP 4841898 B2 JP4841898 B2 JP 4841898B2
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semiconductor chip
grooves
groove
tray
lateral
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JP2007067078A (en
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哲司 仲川
栄 斉藤
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Seiko NPC Corp
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Seiko NPC Corp
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Description

本発明は、表面にレジストを塗布した半導体チップを収容し、溶剤中に浸積して前記レジストを除去するための洗浄半導体チップトレーに関する。   The present invention relates to a cleaning semiconductor chip tray for storing a semiconductor chip coated with a resist on the surface and removing the resist by immersion in a solvent.

半導体装置の製造では、通常、製造工程中でシリコンウェハ上に塗布されたレジストは、シリコンウェハの状態で除去された後、個々の半導体チップに分割されるが、特殊構造、例えばダイアフラム構造などの微細構造物が複数形成された構造を有する場合には、前記微細構造物を保護するために表面にレジストを設けた状態でチップ化し、その後溶剤を使用してレジストを除去する必要がある。   In the manufacture of semiconductor devices, the resist applied on the silicon wafer during the manufacturing process is usually removed in the state of the silicon wafer and then divided into individual semiconductor chips. However, a special structure such as a diaphragm structure is used. In the case of a structure in which a plurality of fine structures are formed, in order to protect the fine structures, it is necessary to form chips with a resist provided on the surface, and then to remove the resist using a solvent.

一方、チップ化された半導体チップは、一時保管や運搬などのために、半導体チップトレーに収容されるので、この半導体チップトレーに収容された状態で半導体チップのレジストを除去できれば好ましいものである。ところが、従来の半導体チップトレーは、単に半導体チップを収容して、損傷することなく安全に取り扱うことのみを目的として作られている。
特開平7−254637号公報
On the other hand, since the semiconductor chip formed into a chip is accommodated in a semiconductor chip tray for temporary storage or transportation, it is preferable if the resist of the semiconductor chip can be removed while being accommodated in the semiconductor chip tray. However, the conventional semiconductor chip tray is made only for the purpose of containing the semiconductor chip and handling it safely without being damaged.
Japanese Patent Laid-Open No. 7-254637

このため、従来の半導体チップトレーは、材質及び構造において、半導体チップの表面に設けたレジストを除去するために溶剤中に浸積するには適しておらず、トレー自体が溶解したり、レジストを完全に除去できなかったり、半導体チップがトレーから離脱してしまうなどの問題を有している。本発明は、これらの問題を解決すべくなされたもので、半導体チップを収容した状態で溶剤中に浸積し、半導体チップ表面に設けたレジストを除去可能な洗浄半導体チップトレーを提供することを目的とする。   For this reason, the conventional semiconductor chip tray is not suitable for immersion in a solvent in order to remove the resist provided on the surface of the semiconductor chip in terms of material and structure. There are problems such as incomplete removal and removal of the semiconductor chip from the tray. The present invention has been made to solve these problems, and provides a cleaning semiconductor chip tray that can be immersed in a solvent in a state in which a semiconductor chip is accommodated to remove a resist provided on the surface of the semiconductor chip. Objective.

上記の目的を達成するために、本発明に係る洗浄半導体チップトレー1は、溶剤、例えばシンナーに対して不溶な材質、例えばアルミニウムやステンレス鋼からなるもので、半導体チップ100をレジスト101塗布面とは反対面において載置する表面側には、前記半導体チップ100の横方向の移動を規制する横方向規制部2と、前記半導体チップ100の縦方向の移動を規制する縦方向規制部3とを、互いに平行に伸びる上横溝4を挟んで交互に連設するとともに、各横方向規制部2同士及び各縦方向規制部3同士は、互いに平行にかつ前記上横溝4とは直交して伸びる上縦溝5を挟んで連設し、前記上縦溝5は前記上横溝4よりも深く形成するとともに、前記横方向規制部2に対応する部分では幅を拡張した拡張部6を設けて、前記半導体チップ100の四隅部分を前記上横溝4の底面で支持すべくなし、前記各上縦溝5の底面には前記各拡張部6に対応する部分にそれぞれ縦溝貫通孔7を設け、前記各上横溝4の底面には各規制部2,3の中央部に対応して横溝貫通孔8をそれぞれ設け、四周縁には平坦部14を設ける一方、裏面側には、各縦溝貫通孔7に対応してテーパー状凹部9を設け、これらテーパー状凹部9を列状につなげるように、横方向規制部2に対応して前記上横溝4と平行に伸びる下横溝10を設け、前記横溝貫通孔8と連通しかつ前記下横溝10と直交するように伸びる下縦溝13を設けるとともに、四周縁に前記平坦部14に対応して突縁部11を設けたものである。この洗浄半導体チップトレー1は、他の洗浄半導体チップトレー1の表面側の平坦部14に前記突縁部11を載置して、半導体チップ100の厚み方向の移動を規制する蓋体として使用する。   In order to achieve the above object, the cleaning semiconductor chip tray 1 according to the present invention is made of a material insoluble in a solvent, for example, thinner, for example, aluminum or stainless steel. Are provided on the opposite side of the front surface side with a horizontal direction restricting portion 2 for restricting the movement of the semiconductor chip 100 in the horizontal direction and a vertical direction restricting portion 3 for restricting the movement of the semiconductor chip 100 in the vertical direction. The upper horizontal grooves 4 that extend in parallel with each other are alternately arranged, and the horizontal restriction portions 2 and the vertical restriction portions 3 extend in parallel with each other and perpendicular to the upper horizontal grooves 4. The upper vertical groove 5 is formed deeper than the upper horizontal groove 4, and an extended portion 6 having an expanded width is provided at a portion corresponding to the horizontal direction restricting portion 2, Half The four corners of the body chip 100 should be supported by the bottom surface of the upper horizontal groove 4, and the bottom surface of each upper vertical groove 5 is provided with vertical groove through-holes 7 in portions corresponding to the respective extension portions 6, respectively. The bottom surface of the upper horizontal groove 4 is provided with a horizontal groove through hole 8 corresponding to the central portion of each regulating portion 2, 3, and a flat portion 14 is provided on the four peripheral edges, while each vertical groove through hole 7 is provided on the back side. Corresponding to the horizontal direction restricting portion 2, a lower lateral groove 10 extending in parallel with the upper lateral groove 4 is provided so as to connect the tapered concave portions 9 in a row, and the lateral groove penetrating A lower vertical groove 13 communicating with the hole 8 and extending so as to be orthogonal to the lower horizontal groove 10 is provided, and a projecting edge portion 11 is provided on the four peripheral edges corresponding to the flat portion 14. The cleaning semiconductor chip tray 1 is used as a lid body that places the protruding edge portion 11 on a flat portion 14 on the surface side of another cleaning semiconductor chip tray 1 and restricts movement of the semiconductor chip 100 in the thickness direction. .

本発明によれば、半導体チップをトレーの横方向規制部と縦方向規制部で規制される部分に収容し、本発明に係る他の洗浄半導体チップトレーを重ね合わせた状態で、溶剤槽内に浸積することにより、洗浄半導体チップトレーの各貫通孔から溶剤を洗浄半導体チップトレー内に導入し、溶剤を洗浄半導体チップトレーの各溝を通じて隅々まで、万遍なく行き渡らせることができるので、半導体チップの表面に設けたレジストを確実かつ容易に除去することができる。   According to the present invention, the semiconductor chip is accommodated in the portion regulated by the horizontal direction regulating portion and the vertical direction regulating portion of the tray, and the other cleaning semiconductor chip tray according to the present invention is overlaid in the solvent tank. By soaking, the solvent can be introduced into the cleaning semiconductor chip tray from each through hole of the cleaning semiconductor chip tray, and the solvent can be uniformly distributed through the grooves of the cleaning semiconductor chip tray. The resist provided on the surface of the semiconductor chip can be removed reliably and easily.

以下、本発明の好適な実施形態を添付図面に基づいて説明する。洗浄半導体チップトレー1(以下単にトレー1という。)は、それぞれが一部を省略して示す図1が表面側、図2が裏面側を示しており、公知の溶剤、例えばシンナーに対して不溶な材質、例えばアルミニウムやステンレス鋼からなる。トレー1は、表面側に半導体チップ100(図5、図7参照)をレジスト101塗布面とは反対面において載置するものである。   DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, preferred embodiments of the invention will be described with reference to the accompanying drawings. The cleaning semiconductor chip tray 1 (hereinafter, simply referred to as the tray 1) is shown in FIG. 1 with the portion omitted, and FIG. 2 shows the back side, and is insoluble in a known solvent such as thinner. Made of various materials such as aluminum and stainless steel. The tray 1 mounts the semiconductor chip 100 (see FIGS. 5 and 7) on the surface side on the surface opposite to the resist 101 application surface.

図1及びその部分拡大図である図5に示すように、トレー1の表面側には、半導体チップ100の横方向(幅方向)の移動を規制する横方向規制部2と、前記半導体チップ100の縦方向(長さ方向)の移動を規制する縦方向規制部3とを、互いに平行に伸びる上横溝4を挟んで交互に連設している。そして、各横方向規制部2同士及び各縦方向規制部3同士は、互いに平行にかつ前記上横溝4とは直交して伸びる上縦溝5を挟んで連設している。   As shown in FIG. 1 and FIG. 5 which is a partially enlarged view thereof, on the surface side of the tray 1, a lateral regulating portion 2 that regulates the lateral movement (width direction) of the semiconductor chip 100 and the semiconductor chip 100. The vertical direction restricting portions 3 for restricting the movement in the vertical direction (length direction) are alternately arranged with the upper horizontal grooves 4 extending in parallel with each other. And each horizontal direction control part 2 and each vertical direction control part 3 are arranged in series by sandwiching the upper vertical groove 5 extending parallel to each other and orthogonal to the upper horizontal groove 4.

また、上縦溝5は上横溝4よりも深く形成し(図6、図7参照)、この上縦溝5の横方向規制部2に対応する部分には幅を拡張した拡張部6を設けて、半導体チップ100の四隅部分を前記上横溝4の底面で支持するよう構成している(図5、図7参照)。前記各上縦溝5の底面には、前記各拡張部6に対応する部分に、それぞれ上縦溝5の幅よりも径が大きい縦溝貫通孔7を設ける一方、前記各上横溝4の底面には各規制部2,3の中央部に対応して、上横溝4の幅と径がほぼ等しい横溝貫通孔8をそれぞれ設けている。さらに、四周縁には平坦部14を形成している。この平坦部14は上縦溝5の底面よりも若干低い位置にある。   Further, the upper vertical groove 5 is formed deeper than the upper horizontal groove 4 (see FIGS. 6 and 7), and an extended portion 6 having an expanded width is provided at a portion corresponding to the lateral restriction portion 2 of the upper vertical groove 5. Thus, the four corner portions of the semiconductor chip 100 are supported by the bottom surface of the upper lateral groove 4 (see FIGS. 5 and 7). On the bottom surface of each upper vertical groove 5, a vertical groove through hole 7 having a diameter larger than the width of the upper vertical groove 5 is provided in a portion corresponding to each expansion portion 6, while the bottom surface of each upper horizontal groove 4 is provided. Corresponding to the central part of each regulating part 2, 3 is provided with a lateral groove through-hole 8 having an approximately equal width and diameter of the upper lateral groove 4. Further, flat portions 14 are formed on the four peripheral edges. The flat portion 14 is located slightly lower than the bottom surface of the upper vertical groove 5.

図2に示すように、トレー1の裏面側には、各縦溝貫通孔7に対応してテーパー状凹部9を同心円状に設け、これらテーパー状凹部9を列状につなげるように、横方向規制部2と上下に対応して上横溝4と平行に伸びる下横溝10を設けている。この下横溝10の両端は、四周縁に設けた突縁部11の一対の対向側部に形成した側部貫通孔12と連通している(図4、図6参照)。また、トレー1の裏面側には、前記下横溝10と直交するように伸びる下縦溝13を設けている。この下縦溝13は、横溝貫通孔8と連通するように上縦溝5と平行に伸びている。   As shown in FIG. 2, on the back side of the tray 1, tapered concave portions 9 are provided concentrically corresponding to the respective longitudinal groove through holes 7, and the tapered concave portions 9 are connected in a row in the horizontal direction. A lower lateral groove 10 extending in parallel with the upper lateral groove 4 is provided corresponding to the restriction portion 2 and the upper and lower sides. Both ends of the lower lateral groove 10 communicate with side through-holes 12 formed on a pair of opposing side portions of the projecting edge portion 11 provided at the four peripheral edges (see FIGS. 4 and 6). Further, on the back side of the tray 1, a lower vertical groove 13 extending so as to be orthogonal to the lower horizontal groove 10 is provided. The lower vertical groove 13 extends in parallel with the upper vertical groove 5 so as to communicate with the horizontal groove through hole 8.

図2に示すように、突縁部11は、四隅部の内側面をアール状に形成する一方、一隅部の外側面には面取部11aを形成している。この突縁部11は、他のトレー1の表面側の四周縁に設けた平坦部14上に位置する。図1に示すように、前記平坦部14の一隅部の外側面には面取部14aを形成し、両面取部11a,14aを対応させることによって、トレー1同士を重ね合わせる際の位置合わせをする。また、前記突縁部11の四隅部のアール状内側面に対応する4つの縦方向規制部3aの角部は、前記平坦部14に比べ約0.2mm突出している。これは、一つのトレー1を他のトレー1に重ね合わせたときに、載置したチップ100の厚み方向への移動を規制するものとして作用する。この突出により、一方のトレー1の平坦部14と重ね合わされた他方のトレー1の突縁部11との間に空間ができ、流出入する溶剤の量が増えて、レジストの洗浄性を向上させる。   As shown in FIG. 2, the projecting edge portion 11 has a rounded inner surface at the four corners, and a chamfered portion 11 a on the outer surface of the one corner portion. The protruding edge portion 11 is located on a flat portion 14 provided on the four peripheral edges on the surface side of the other tray 1. As shown in FIG. 1, a chamfered portion 14a is formed on the outer surface of one corner of the flat portion 14, and the double-sided chamfered portions 11a and 14a are made to correspond to each other when aligning the trays 1 with each other. To do. Further, the corners of the four vertical direction restricting portions 3 a corresponding to the rounded inner surfaces at the four corners of the projecting edge portion 11 protrude about 0.2 mm from the flat portion 14. This acts to restrict movement of the mounted chip 100 in the thickness direction when one tray 1 is overlaid on another tray 1. This protrusion creates a space between the flat portion 14 of one tray 1 and the protruding edge portion 11 of the other tray 1, and the amount of solvent flowing in and out increases, improving the resist cleaning performance. .

続いて、上述したトレー1の使用方法を説明する。表面にレジスト101を設けたチップ100を、トレー1表面側の拡張部6に対応させてその四隅部の裏面側が上横溝4の底面上に位置するよう載置する。この載置状態のチップ100は、横方向から挟むように位置する2つの横方向規制部2と、縦方向から挟むように四隅部に位置する4つの縦方向規制部3とによって、縦横方向(チップ100の幅方向と長さ方向)の移動を規制された位置決め状態となり、裏面側に上縦溝5と縦溝貫通孔7が位置する状態となる。   Then, the usage method of the tray 1 mentioned above is demonstrated. The chip 100 provided with the resist 101 on the surface is placed so as to correspond to the extended portion 6 on the surface side of the tray 1 so that the back side of the four corners is located on the bottom surface of the upper horizontal groove 4. The chip 100 in the mounted state is formed by two horizontal direction restricting portions 2 positioned so as to be sandwiched from the horizontal direction and four vertical direction restricting portions 3 positioned at four corners so as to be sandwiched from the vertical direction. The positioning is such that the movement of the chip 100 in the width direction and the length direction) is restricted, and the upper vertical groove 5 and the vertical groove through hole 7 are positioned on the back surface side.

このようにして、洗浄処理対象となるチップ100を所定位置に載置した後、この載置したトレー1に他のトレー1を、突縁部11と平坦部14の各面取部11a,14aを対応位置させて重ね合わせる(図7参照)。この状態で、各チップ100の表面側は、レジスト101部分が他の部材と接触することなく、テーパー状凹部9が形成する空間部に対応位置して縦溝貫通孔7と対向する。そして、チップ100が厚み方向に移動すると、その4つの頂点の少なくとも一つでテーパー状凹部9と点接触することにより、上下方向(チップ100の厚み方向)の移動も規制されることになる。   In this way, after the chip 100 to be cleaned is placed at a predetermined position, another tray 1 is placed on the placed tray 1 and the chamfered portions 11a and 14a of the projecting edge portion 11 and the flat portion 14 are placed. Are overlaid at corresponding positions (see FIG. 7). In this state, the surface side of each chip 100 faces the vertical groove through hole 7 in a position corresponding to the space formed by the tapered recess 9 without the resist 101 portion coming into contact with other members. Then, when the chip 100 moves in the thickness direction, point movement with the tapered recess 9 is made at at least one of the four apexes, thereby restricting movement in the vertical direction (thickness direction of the chip 100).

図7に示すように、洗浄処理するチップ100の数に応じてトレー1の数が決定し、この数にさらに一段加えた数のトレー1を重ね合わせて使用する。すなわち、最上位のトレー1は蓋としてのみ使用されるもので、チップ100を載置することはない。そして、このように重ね合わせたトレー1を、従来と同様にして、公知の把持具(図示せず)で把持して同じく公知の溶剤槽(図示せず)に浸積すると、溶剤は、表裏両面に開口した各縦溝貫通孔7及び各横溝貫通孔8、並びに側面に開口した側部貫通孔12からトレー1内に流入し、これら各貫通孔7,8,12に連通した各溝4,5,10,13を通って、各チップ100収容空間に万遍なく行き渡る。   As shown in FIG. 7, the number of trays 1 is determined according to the number of chips 100 to be cleaned, and the number of trays 1 added to this number is used by being superposed. That is, the uppermost tray 1 is used only as a lid, and the chip 100 is not placed thereon. Then, when the tray 1 thus superposed is gripped by a known gripping tool (not shown) and immersed in a known solvent tank (not shown) in the same manner as in the prior art, the solvent is Each vertical groove through-hole 7 and each horizontal groove through-hole 8 opened on both sides and the side through-hole 12 opened on the side face flow into the tray 1 and each groove 4 communicated with each through-hole 7, 8, 12. , 5, 10, 13, and evenly spread to the accommodation space of each chip 100.

また、これらの各溝4,5,10,13及び各貫通孔7,8,12により、トレー1内部と外部とを溶剤が循環しやすくなる。各チップ100へ万遍なく溶剤が行き渡るだけでなく、トレー1内部(重ね合わせたトレー1とトレー1の間)の溶けたレジストが混ざった溶剤のトレー1外部への流出、トレー1外部から溶剤のトレー1内部への流入が容易な構造である。   In addition, the grooves 4, 5, 10, 13 and the through holes 7, 8, 12 facilitate circulation of the solvent between the inside and the outside of the tray 1. Not only does the solvent spread uniformly to each chip 100, but also the solvent mixed in the tray 1 (between the stacked tray 1 and the tray 1) flows out of the tray 1 and the solvent from the outside of the tray 1. This structure is easy to flow into the tray 1.

このようにして、トレー1に収容した各チップ100表面のレジスト101に溶剤が余すところなく接触することにより、レジスト101をムラなく除去することができる。   In this way, the resist 101 can be removed without unevenness by contacting the resist 101 on the surface of each chip 100 accommodated in the tray 1 without any excess solvent.

なお、本発明は上述した実施形態に限定されるものではなく、例えば、トレー1の大きさ、すなわちトレー1におけるチップ100の収容数は変更可能であり、これに応じて各規制部2,3、各溝4,5,10,13、各貫通孔7,8,12及びテーパー状凹部9の数も変更される。   In addition, this invention is not limited to embodiment mentioned above, For example, the magnitude | size of the tray 1, ie, the accommodation number of the chip | tip 100 in the tray 1, can be changed, and each control part 2, 3 is changed according to this. The numbers of the grooves 4, 5, 10, 13, the through holes 7, 8, 12 and the tapered recesses 9 are also changed.

洗浄半導体チップトレーの表面側の一部を省略して示す概略的な平面図。FIG. 3 is a schematic plan view showing a cleaning semiconductor chip tray with a part of the surface side omitted. 同じく裏面側の一部を省略して示す概略的な平面図。The schematic top view which abbreviate | omits a part of back side similarly. 同じく概略的な正面図。Similarly a schematic front view. 図1のA−A線断面図。AA sectional view taken on the line AA of FIG. 半導体チップ収容状態を示す部分拡大平面図。The partial enlarged plan view which shows a semiconductor chip accommodation state. 図1のB−B線断面図。FIG. 3 is a sectional view taken along line BB in FIG. 1. 洗浄半導体チップトレーの重ね合わせ状態を示す概略的な部分拡大断面図。FIG. 4 is a schematic partial enlarged cross-sectional view showing a superposed state of cleaning semiconductor chip trays.

符号の説明Explanation of symbols

1 洗浄半導体チップトレー
2 横方向規制部
3 縦方向規制部
4 上横溝
5 上縦溝
6 拡張部
7 縦溝貫通孔
8 横溝貫通孔
9 テーパー状凹部
10 下横溝
11 突縁部
12 側部貫通孔
13 下縦溝
14 平坦部
DESCRIPTION OF SYMBOLS 1 Cleaning semiconductor chip tray 2 Horizontal direction control part 3 Vertical direction control part 4 Upper horizontal groove 5 Upper vertical groove 6 Expansion part 7 Vertical groove through hole 8 Horizontal groove through hole 9 Tapered recessed part 10 Lower horizontal groove 11 Projection edge part 12 Side part through hole 13 Lower vertical groove 14 Flat part

Claims (1)

表面にレジストを塗布した半導体チップを収容し、溶剤中に浸積して前記レジストを除去するための溶剤に対して不溶な材質からなる洗浄半導体チップトレーであって、
半導体チップをレジスト塗布面とは反対面において載置する表面側には、前記半導体チップの横方向の移動を規制する横方向規制部と、前記半導体チップの縦方向の移動を規制する縦方向規制部とを、互いに平行に伸びる上横溝を挟んで交互に連設するとともに、各横方向規制部同士及び各縦方向規制部同士は、互いに平行にかつ前記上横溝とは直交して伸びる上縦溝を挟んで連設し、前記上縦溝は前記上横溝よりも深く形成するとともに、前記横方向規制部に挟まれた部分では幅を拡張した拡張部を設けて、前記半導体チップの四隅部分を前記上横溝の底面で支持すべくなし、前記各上縦溝の前記各拡張部の中央部に対応位置する部分にはそれぞれ縦溝貫通孔を設け、前記各上横溝には前記各規制部の中央部に対応位置して横溝貫通孔をそれぞれ設け、洗浄半導体チップトレーの四周縁には平坦部を設ける一方、裏面側には、各縦溝貫通孔に対応してテーパー状凹部を設け、これらテーパー状凹部を列状につなげるように、前記横方向規制部の下方に対応位置して前記上横溝と平行に伸びる下横溝を設け、前記横溝貫通孔と連通しかつ前記下横溝と直交するように伸びる下縦溝を設けるとともに、洗浄半導体チップトレーの四周縁に前記平坦部の下方に対応位置して突縁部を設けた
ことを特徴とする洗浄半導体チップトレー。
A semiconductor chip tray containing a semiconductor chip coated with a resist on the surface and made of a material insoluble in a solvent for immersing in a solvent to remove the resist,
On the surface side where the semiconductor chip is placed on the surface opposite to the resist coating surface, a lateral direction restricting portion for restricting the lateral movement of the semiconductor chip and a longitudinal direction restriction for restricting the vertical movement of the semiconductor chip. Are arranged alternately with the upper horizontal grooves extending in parallel to each other, and the horizontal restriction portions and the vertical restriction portions are parallel to each other and extend vertically to the upper horizontal grooves. The upper vertical groove is formed deeper than the upper horizontal groove, and an extended portion having an expanded width is provided at a portion sandwiched between the horizontal restriction portions, so that the four corner portions of the semiconductor chip are provided. No order to support the bottom surface of the upper transverse grooves, said each provided longitudinal grooves through hole in the portion corresponding position to the center of each extension portion of each upper longitudinal groove, said each upper lateral grooves each restricting portion its transverse grooves through hole in a position corresponding to the central portion Each provided, while a four periphery of cleaning a semiconductor chip tray is provided a flat portion, as on the back side, a tapered recess provided corresponding to the longitudinal grooves through holes connecting these tapered recess in a row , together with the lateral regulation portion of the corresponding positioned below provided beneath lateral grooves extending parallel to the transverse grooves on the provided under longitudinal groove extending the to be orthogonal to the lateral groove through-hole and communicating and the lower lateral grooves, washed cleaning the semiconductor chip trays, characterized in that a projecting edge corresponding position below the flat portion to the four peripheral edges of the semiconductor chip tray.
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JP5220461B2 (en) * 2008-03-31 2013-06-26 京セラクリスタルデバイス株式会社 Cleaning jig
JP6005435B2 (en) * 2012-08-07 2016-10-12 三甲株式会社 Washing tray
US10163675B2 (en) 2016-06-24 2018-12-25 Invensas Corporation Method and apparatus for stacking devices in an integrated circuit assembly
US10796936B2 (en) 2016-12-22 2020-10-06 Invensas Bonding Technologies, Inc. Die tray with channels

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JPH0481686A (en) * 1990-07-24 1992-03-16 Seiko Epson Corp Electronic apparatus
JPH06302575A (en) * 1993-04-15 1994-10-28 Fujitsu Ltd Semiconductor chip cleaning method
JPH07176511A (en) * 1993-12-17 1995-07-14 Fujitsu Ltd Manufacture of semiconductor device
JPH07254637A (en) * 1994-03-15 1995-10-03 Fujitsu Ltd Semiconductor chip tray
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