JP4830189B2 - Thin film transistor manufacturing method, liquid crystal display device manufacturing method, and electroluminescence display device manufacturing method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a thin film transistor, in particular, a polycrystalline silicon thin film transistor used for an active matrix type liquid crystal display device, an organic electroluminescence display device and the like.
[0002]
[Prior art]
Among thin film transistors (TFTs) that have been developed as driving elements for liquid crystal displays and organic electroluminescence displays, TFTs using polycrystalline silicon can form a pixel array and peripheral drive circuits integrally on the same substrate. In addition, it has attracted attention for the reason that a so-called system-on-panel can be realized by incorporating a high-functional circuit in a panel. By the way, in order to reduce the cost of the polycrystalline silicon thin film transistor, it is essential to use a low-melting glass substrate having a low cost in the manufacturing process, and so-called low temperature processes having a process temperature of 700 ° C. or less have been developed. .
[0003]
[Problems to be solved by the invention]
To increase the performance of a polycrystalline silicon thin film transistor, it is effective to increase the silicon crystal grains. A solid phase growth method is known as one method for obtaining polycrystalline silicon having a large grain size. In the solid phase growth method, amorphous silicon is crystallized by thermal annealing in an inert gas atmosphere at a temperature of 600 to 700 ° C. to obtain polycrystalline silicon having a large grain size. However, the polycrystalline silicon obtained in this way has minute defects remaining in the crystal grains, which hinders high performance of the thin film transistor. Here, if a high-temperature process of 1000 ° C. or higher can be used, a semiconductor thin film made of polycrystalline silicon grown by solid phase is thermally oxidized to form a high-quality gate oxide film, and at the same time, annealing at a high temperature exceeding 1000 ° C. Due to the effect, micro defects in the crystal grains can be reduced. However, in a low-temperature process of 700 ° C. or lower using a low-melting glass substrate, a thermal oxide film cannot be formed by the above-described high-temperature process of 1000 ° C. or higher, and it is difficult to reduce residual minute defects.
[0004]
On the other hand, a method of forming a thermal oxide film using high-pressure steam under an atmosphere of about 600 ° C. at a temperature lower than the heat resistant temperature of the glass substrate has been developed, for example, disclosed in Japanese Patent Application Laid-Open No. 11-126750. According to the thermal oxidation method using high-pressure steam, a thermal oxide film can be formed even on a low-cost glass substrate. However, with respect to minute defects remaining in the crystal grains of polycrystalline silicon obtained by solid phase growth, the thermal oxidation method using high-pressure steam at about 600 ° C. cannot sufficiently reduce the defects.
[0005]
Japanese Patent Application Laid-Open No. 11-307451 discloses a method in which a polycrystalline silicon film is formed from the beginning, and defects are reduced by laser light irradiation after steam oxidation. However, in the method of preparing polycrystalline silicon from the beginning, it is difficult to form large-grain polycrystalline silicon, and the crystal grain size varies and the throughput is small unless the energy during laser light irradiation is strictly controlled. There is a drawback.
[0006]
Conventionally, when a glass substrate having a low melting point passes through a process exceeding 600 ° C., the substrate shrinks greatly, and if a pattern is formed on the substrate in advance, the pattern formed later is due to substrate shrinkage. There is a problem that a gap occurs between them.
[0007]
[Means for Solving the Problems]
SUMMARY OF THE INVENTION The present invention solves the above problems or problems, and an object of the present invention is to provide a thin film transistor manufacturing method capable of drastically reducing defects in crystal grains while forming a thermal oxide film on a substrate made of low melting point glass or the like. Therefore, it is to realize a significant improvement in performance of the thin film transistor. In order to achieve this purpose, the following measures were taken. That is, the present invention relates to a method for manufacturing a thin film transistor having a stacked structure including a semiconductor thin film made of polycrystalline silicon, an oxide film made of silicon oxide, and a gate electrode film. A thin film forming process for forming a semiconductor thin film comprising: a solid phase growth process for heating the semiconductor thin film to perform solid phase growth treatment to convert amorphous silicon to polycrystalline silicon; and a semiconductor converted to polycrystalline silicon A light irradiation process for irradiating a thin film with light energy to reduce crystal defects contained in polycrystalline silicon, and a pressure of 0.1 Mpa to 5 Mpa, a temperature of 100 ° C. to 700 ° C., and a gas having an oxidizing ability. The semiconductor thin film is exposed to an atmosphere, and a thermal oxidation process is performed in which the surface of the polycrystalline silicon is thermally oxidized to form an oxide film. Preferably, the solid phase growth step performs heating at a temperature not exceeding a thermal strain point of the insulating substrate, and performs the densification treatment of the substrate simultaneously with the solid phase growth treatment of the semiconductor thin film. To do. In the light irradiation step, the semiconductor thin film is irradiated with laser light emitted from a laser light source. The thermal oxidation step is characterized in that the surface of the polycrystalline silicon is thermally oxidized in a temperature range of 550 ° C. to 650 ° C. The method further includes a step of forming a gate electrode film on the oxide film obtained by thermally oxidizing the surface of the semiconductor thin film as a gate insulating film.
[0008]
When a semiconductor thin film made of amorphous silicon formed on an insulating substrate is solid-phase grown in, for example, an inert gas, polycrystalline silicon having a large particle size can be obtained. However, the obtained polycrystalline silicon has a large number of minute defects in the crystal grains. When this polycrystalline silicon is irradiated with light energy such as laser light, minute defects in the crystal grains are easily eliminated, and high-quality large-grain polycrystalline silicon is obtained. The energy of the laser beam necessary for removing only minute defects can be small. For example, the defects can be effectively reduced just by irradiating one shot of laser light having a pulse width of 20 to 200 ns, so that the throughput is improved. Further, it is not necessary to strictly control the energy of the laser pulse, and polycrystalline silicon having a large grain size can be easily obtained as compared with the case where amorphous silicon is polycrystallized by laser light irradiation from the beginning. When the surface of the polycrystalline silicon thus obtained is oxidized in an oxidizing atmosphere such as high-pressure steam, an extremely high quality oxide film can be obtained. In some cases, oxidation using high-pressure steam may be performed before irradiation with light energy after solid-phase growth of polycrystalline silicon. However, in this case, laser light is irradiated through the thermal oxide film obtained by high-pressure steam oxidation to remove defects in the polycrystalline silicon. In addition, when polycrystalline silicon is formed by solid phase growth prior to various patterning performed in subsequent processes, the glass substrate is thermally annealed for a long time by solid phase growth processing, and the substrate is pre-densified. Thus, it is possible to prevent the substrate from contracting in a later process. Therefore, it is possible to eliminate pattern misalignment in various patterning processes to be performed later.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. 1 to 3 are process diagrams showing an example of a first embodiment of a thin film transistor manufacturing method according to the present invention. In this embodiment, a thin film transistor having a top gate structure is formed on an insulating substrate made of glass or the like. This embodiment is used for a drive substrate of an active matrix display device, and a thin film transistor for pixel switching and a thin film transistor constituting a peripheral circuit are formed on an insulating substrate. The thin film transistor for pixel switching is an n-channel thin film transistor, the thin film transistor for the peripheral circuit is a CMOS, and includes n-channel and p-channel thin film transistors. First, as shown in FIG. 1A, a buffer layer 6a made of silicon nitride and a buffer layer 6b made of silicon oxide are sequentially formed on an insulating substrate 0 made of glass or the like. The thickness of each buffer layer is about 100 to 200 nm. Subsequently, the semiconductor thin film 5 made of amorphous silicon is formed on the buffer layer 6b with a thickness of about 60 to 160 nm. The above film formation can be continuously performed using a plasma CVD method, an LPCVD method, or the like. For the insulating substrate 0, for example, AN635 and AN100 manufactured by Asahi Glass Co., Ltd. can be used as a glass material. The strain point of AN635 is 635 ° C. The strain point of AN100 is 680 ° C. Alternatively, Code 1737 manufactured by Corning Corporation can be used. The strain point of this glass material is 667 ° C. SiO constituting the buffer layer 6b ₂ The film is made of inorganic silane gas (SiH _Four , Si ₂ H ₆ Etc.) is preferably decomposed to form a film. Alternatively, SiO or sputtering can be used to make SiO ₂ May be formed. Here, when the plasma CVD method is used for forming the semiconductor thin film 5 made of amorphous silicon, annealing is performed at 400 ° C. to 450 ° C. for about 1 hour in a nitrogen atmosphere in order to desorb hydrogen in the film. To do. Thereafter, the amorphous silicon is crystallized and converted into polycrystalline silicon by solid phase growth. In the solid phase growth, furnace annealing is performed in an atmosphere of an inert gas such as a nitrogen gas at 600 to 660 ° C., particularly preferably 600 to 630 ° C. for 5 to 20 hours. Thereby, polycrystalline silicon having a crystal grain size of about 1 to 1.5 μm is obtained. Moreover, even if the insulating substrate 0 made of glass or the like is densified by this furnace annealing and a pattern is formed on the substrate later, shrinkage of the substrate due to heat treatment can be prevented.
[0010]
Next, as shown in (b), excimer laser light with a wavelength of 200 to 400 nm is irradiated to eliminate the micro defects in the polycrystalline silicon grown in solid phase. Irradiation conditions in this excimer laser annealing (ELA) may be about 1 to 10 shots, and the throughput can be increased as compared with the case of crystallizing directly from amorphous silicon to polycrystalline silicon.
[0011]
Subsequently, as shown in (c), the semiconductor thin film 5 made of polycrystalline silicon is patterned into an island shape by etching. In this example, two regions for forming peripheral circuit thin film transistors are formed in the left half of the figure, and one region for forming pixel switching thin film transistors is formed in the right half.
[0012]
Here, as shown in (d), each region of the patterned polycrystalline silicon is oxidized with high-pressure steam to form a thermal oxide film 3 on the polycrystalline silicon. The oxide film 3 constitutes a gate insulating film and has a thickness of 10 to 200 nm. As the oxidation condition, for example, water vapor of 2 Mpa is used at 600 ° C., and annealing is performed for 130 minutes, for example. When the initial film thickness of the polycrystalline silicon is 75 nm, the film thickness of the gate oxide film 3 formed by thermal oxidation is 54 nm, and the film thickness of the remaining semiconductor thin film 5 is 55 nm. Here, for example, for the purpose of controlling the threshold voltage Vth of a thin film transistor formed in a later process, if necessary, the dose amount of B + ions is 0.1 × 10 × 10. ¹² ~ 4x10 ¹² / Cm ² Ion implantation at a degree. The acceleration voltage at this time is, for example, about 50 keV.
[0013]
As described above, according to the present invention, a thin film transistor having a laminated structure including the semiconductor thin film 5 made of polycrystalline silicon, the oxide film 3 made of silicon oxide, and the gate electrode film (not shown). In the method, a thin film forming step (a), a solid phase growth step (a), a light irradiation step (b), and a thermal oxidation step (d) are performed. In the thin film forming step, the semiconductor thin film 5 made of amorphous silicon is formed on the insulating substrate 0. In the solid phase growth process, the semiconductor thin film 5 is heated and subjected to solid phase growth processing to convert amorphous silicon into polycrystalline silicon. In the light irradiation process, the semiconductor thin film 5 converted into polycrystalline silicon is irradiated with light energy to reduce crystal defects contained in the polycrystalline silicon. In the thermal oxidation process, the pressure is 0.1 MPa to 5 MPa, the temperature is 100 ° C. to 700 ° C., the semiconductor thin film 5 is exposed to an atmosphere containing a gas having an oxidizing ability, and the surface of the polycrystalline silicon is thermally oxidized to form an oxide film. 3 is formed. In the thermal oxidation treatment, the pressure is set to 0.1 Mpa (1 atm) or more to accelerate the film formation rate. A pressure exceeding 5 Mpa (50 atm) is not preferable because the pressure-resistant structure of the film forming apparatus becomes excessive. Moreover, the processing temperature of the thermal oxidation process is set to about 100 ° C to 700 ° C. When water vapor is used as the gas having an oxidizing ability, by setting the temperature to 100 ° C. or higher, the water vapor pressure can be increased and the film formation rate can be accelerated. In addition, since it exceeds the heat-resistant temperature (strain point) of a board | substrate when temperature becomes 700 degreeC or more, it is unpreferable. In some cases, water vapor (H ₂ O) ₂ Or O ₂ And H ₂ A mixture of these can also be used.
[0014]
As described above, in the solid phase growth step, heating is performed at a temperature that does not exceed the thermal strain point of the insulating substrate 0, and the substrate 0 is densified simultaneously with the solid phase growth processing of the semiconductor thin film 5. In the light irradiation process, the semiconductor thin film 5 is irradiated with laser light (for example, excimer laser pulse) emitted from a laser light source. Preferably, the thermal oxidation step thermally oxidizes the surface of the polycrystalline silicon in a temperature range of 550 ° C. to 650 ° C. In this example, an oxide film obtained by thermally oxidizing the surface of the semiconductor thin film 5 is used as a gate insulating film, and a gate electrode film is formed thereon in a subsequent process.
[0015]
Next, as shown in FIG. 2E, Al, Ti, Mo, W, Ta, doped polycrystalline silicon, or an alloy thereof is formed to 200 to 800 nm on the gate oxide film 3 and patterned. Thus, the gate electrode 1 is formed. Next, P + ions are implanted into the semiconductor thin film 5 by mass separation ion implantation, and LDD ion implantation is performed to create an LDD structure. Dose amount is 6 × 10 ¹² ~ 5x10 ¹³ / Cm ² The acceleration voltage is about 60 keV. As a result of the LDD ion implantation, a channel region ch is left below the gate electrode 1, and the other portions are targets for LDD ion implantation.
[0016]
Subsequently, as shown in (f), after LDD ion implantation, resists RST1, RST2, RST3, and RST4 for forming an n-channel thin film transistor are formed, and P + ions are mass-separated or non-mass-separated ions. It injects into the semiconductor thin film 5 with a shower doping apparatus. The dose is 1 × 10 ¹⁵ / Cm ² The acceleration voltage is about 60 keV. Thus, the source region S and the drain region D of the n-channel thin film transistor are formed. Note that LDD regions remain between the source region S and the channel region ch and between the drain region D and the channel region ch.
[0017]
Next, as shown in (g), in order to form a CMOS circuit, a resist RST5 for a p-channel type thin film transistor is formed, and a dose amount of 1 to 3 × 10 6 is formed. ¹⁵ / Cm ² Then, B + ions are implanted at an acceleration voltage of about 30 keV to form a pch-TFT. In the portion covered with RST5, an n-channel thin film transistor nch-TFT for circuits and a double-gate TFT for pixel switching are formed in the previous process.
[0018]
Thereafter, as shown in FIG. ₂ Is formed to a thickness of about 600 nm to form an interlayer insulating film 7. Here, the activation treatment of the dopant implanted into the semiconductor thin film 5 is performed. For activation, any of laser annealing, lamp annealing, and furnace annealing may be used. After activation annealing, SiN _x Is formed to a thickness of 200 to 400 nm to form a passivation film 8. Here, hydrogen annealing is performed in a nitrogen atmosphere at a temperature of 350 to 400 ° C. for 1 hour, and hydrogen is introduced into the semiconductor thin film 5 to improve the characteristics of the pch-TFT, nch-TFT and pixel switch TFT.
[0019]
Finally, as shown in (i), contact holes are opened in the interlayer insulating film 7 and the passivation film 8, and a metal such as Al-Si is sputtered and patterned to be processed into the wiring electrode 9. Next, an acrylic organic resin is applied by about 1 μm to form the planarizing film 10. After opening a contact hole in the planarizing film 10, a transparent conductive film such as ITO or IXO is formed by sputtering, patterned, and processed into the pixel electrode 11. This transparent conductive film is annealed at about 220 ° C. in a nitrogen atmosphere for 30 minutes to complete an active matrix display device substrate.
[0020]
FIG. 4 is a conceptual diagram of a high-pressure steam oxidation processing apparatus used in step (d) of FIG. As shown in the figure, the apparatus includes a pressure vessel 51 hermetically sealed and a reaction vessel 52 accommodated therein. The outer pressure vessel 51 is made of, for example, stainless steel, and the inner reaction vessel 52 is made of, for example, quartz glass. Inside the reaction vessel 52 is a processing chamber 53. The processing chamber 53 is heated by the heater 54. A pressure line 55 and a pressure reduction line 56 are connected to the pressure vessel 51. Further, a processing gas supply line 57 and a processing gas exhaust line 58 are connected to the processing chamber 53. The processing gas means a gas that generates an atmosphere mainly composed of water vapor or an atmosphere of an inert gas such as nitrogen. As described above, the processing chamber 53 is a quartz tube (reaction vessel 52) whose inner wall is made of quartz, and prevents the metal from entering the semiconductor. A heater 54 disposed so as to surround the reaction vessel 52 can maintain the inside of the processing chamber 53 at 300 to 700 ° C. The pressure increasing line 55 has an air source (Air), a pressure reducing valve RV, a flow meter, and a valve V. By supplying the air into the pressure vessel 51 by opening and closing the valve V, the pressure vessel can be increased to 0.1 to 5 Mpa. It is like. The decompression line 56 exhausts the air in the pressure vessel 51 by opening and closing the valve V so that the pressure vessel 51 can be decompressed. The processing gas supply line 57 includes a downstream portion for discharging the processing gas into the processing chamber 53 and an upstream portion branched to the nitrogen supply line and the water supply line. A heater 54 is disposed close to the downstream portion, and heats the processing gas to a temperature equivalent to that in the processing chamber 53 in advance. The upstream nitrogen supply line is connected to the supply source (N ₂ ), A pressure reducing valve RV, a flow meter, and a valve V. When the valve V is opened and closed, the processing gas is supplied into the processing chamber 53 to bring the processing chamber 53 into a predetermined processing gas atmosphere. The voltage can be increased to 1 to 5 Mpa. The water supply line has a pump P and a valve V, draws water from a water source, supplies water to the heater 54 by opening and closing the valve V, evaporates the water by the heater 54, and supplies the water into the processing chamber 53. ing. A substrate stage 59 is disposed in the center of the processing chamber 53, and a glass substrate or a silicon substrate to be processed is mounted thereon.
[0021]
With reference to FIGS. 5-7, an example of 2nd embodiment of the manufacturing method of the thin-film transistor which concerns on this invention is demonstrated. Unlike the first embodiment, a thin film transistor having a bottom gate structure is formed in this embodiment. First, as shown in (a), Tr, Mo, W, Cr, Cu or an alloy thereof is formed on an insulating substrate 0 to a thickness of 10 to 250 nm, particularly preferably 100 to 250 nm, and patterned to form a gate. The electrode 1 is processed.
[0022]
Subsequently, as shown in (b), SiN by plasma CVD, atmospheric pressure CVD, reduced pressure CVD, etc. _x 30-50 nm, then SiO ₂ About 50 to 200 nm are formed as a gate nitride film 2 and a gate oxide film 3, respectively. Further thereon, a semiconductor thin film 5 made of amorphous silicon is continuously formed with a thickness of about 60 to 160 nm. Here, when the plasma CVD method is used, annealing is performed in a nitrogen atmosphere at 400 to 450 ° C. for about 1 to 2 hours in order to desorb hydrogen in the film. Here, amorphous silicon is crystallized by a solid phase growth method and converted to polycrystalline silicon. In the solid phase growth, furnace annealing is performed in an atmosphere of an inert gas such as a nitrogen gas at 600 to 660 ° C. for 5 to 20 hours. Thereby, polycrystalline silicon having a crystal grain size of about 1 to 1.5 μm is obtained. After that, annealing (ELA) using an excimer laser pulse with a wavelength of 200 to 400 nm eliminates the micro defects in the polycrystalline silicon grown by solid phase. The laser irradiation conditions at this time may be about 1 to 10 pulses, and the throughput can be increased as compared with the case of directly crystallizing amorphous silicon to polycrystalline silicon.
[0023]
Thereafter, as shown in (c), the surface of the polycrystalline silicon is oxidized with high-pressure water vapor, and SiO is deposited on the polycrystalline silicon. ₂ An oxide film 6 made of 10 to 200 nm is formed. For example, annealing is performed at 600 ° C. and 2 Mpa water vapor for 130 minutes. When the initial film thickness of the polycrystalline silicon is 75 nm, the film thickness of the thermal oxide film 6 obtained by high-pressure steam oxidation is 54 nm, and the film thickness of the remaining polycrystalline silicon is 55 nm. If necessary, for the purpose of controlling the Vth of the thin film transistor, B + is a dose amount of 1 × 10 ¹¹ ~ 6 × 10 ¹² / Cm ² After the mass separation at an acceleration voltage of about 30 keV, the injection is performed.
[0024]
Next, as shown in FIG. 6D, a resist RST0 is formed on the thermal oxide film 6 formed by steam oxidation using the gate electrode 1 as a mask by a backside exposure technique. Here, P + ions separated by mass are implanted into the entire surface of the substrate 0 to create an LDD region. The dose is 1 × 10 ¹² ~ 5x10 ¹³ / Cm ² , Particularly preferably 4 × 10 ¹² ~ 5x10 ¹³ / Cm ² The acceleration voltage is 60 keV.
[0025]
Next, as shown in (e), after LDD ion implantation, resists RST1 to RST4 for n-channel thin film transistors were prepared, and hydrogen diluted PH _Three Using gas, P + ions are doped by ion shower doping using a non-mass-separated ion beam to form the source region S and the drain region D of the n-channel thin film transistor. The acceleration voltage at this time is about 60 keV.
[0026]
Next, as shown in (f), resists RST5 and RST6 are provided in order to form a p-channel type thin film transistor. Using resist RST5 as a mask, hydrogen diluted B ₂ H ₆ Using gas, B + ions are implanted by non-mass-separated ion doping to form a pch-TFT for a peripheral circuit. In the portion covered with RST5, an nch-TFT for a peripheral circuit and a double gate TFT for pixel switching are formed in the previous process.
[0027]
Thereafter, an activation step is performed as shown in FIG. Activation may be any of laser annealing, lamp annealing, and furnace annealing. After the activation process, the thermal oxide film provided on the semiconductor thin film 5 and the semiconductor thin film 5 are patterned at the same time and processed into an island shape corresponding to the element region of each thin film transistor. On top of this, plasma CVD is used to form SiO. ₂ Is formed to a thickness of 100 to 400 nm to form an interlayer insulating film 7. Further on this, SiN _x Is formed continuously for 100 to 400 nm to form a passivation film 8. Here, hydrogenation annealing is performed at 350 ° C. to 400 ° C. for 1 hour in a nitrogen atmosphere.
[0028]
Finally, as shown in (h), after opening a contact hole in the interlayer insulating film 7 and the passivation film 8, a metal such as Al—Si is sputtered and patterned to be processed into the wiring electrode 9. Next, an acrylic organic resin is applied by about 1 μm to form the planarizing film 10. After opening a contact hole in the planarizing film 10, a transparent conductive film such as ITO or IXO is formed by sputtering and patterned into a predetermined shape to form the pixel electrode 11. The transparent conductive film is annealed at about 220 ° C. in a nitrogen atmosphere for 30 minutes to complete a drive substrate for an active matrix display device.
[0029]
In the above-described embodiment, water vapor is used as the gas having an oxidizing ability used in the thermal oxidation step. However, the present invention is not limited to this, and oxygen gas or a mixture of oxygen gas and hydrogen gas is used. Can do. The thermal oxide film thus obtained is of high quality, and the interface with the channel region can be favorably maintained on the back gate side (upper side) of the bottom gate type TFT.
[0030]
FIG. 8 is a schematic perspective view showing an example of an active matrix type liquid crystal display device assembled using a drive substrate made according to the present invention. As shown in the figure, the display device has a panel structure including a pair of insulating substrates 0 and 102 and an electro-optical material 103 held between the substrates. As the electro-optical material 103, a liquid crystal material is used. A pixel array unit 104 and a drive circuit unit are integrated on the lower insulating substrate 0. The drive circuit section is divided into a vertical drive circuit 105 and a horizontal drive circuit 106. A terminal portion 107 for external connection is formed at the upper end of the peripheral portion of the insulating substrate 0. The terminal portion 107 is connected to the vertical drive circuit 105 and the horizontal drive circuit 106 through a wiring 108. In the pixel array portion 104, row-shaped gate wirings 109 and column-shaped signal wirings 110 are formed. A pixel electrode 11 and a thin film transistor TFT for driving the pixel electrode 11 are formed at the intersection of both wirings. The gate electrode of the thin film transistor TFT is connected to the corresponding gate wiring 109, the drain region is connected to the corresponding pixel electrode 11, and the source region is connected to the corresponding signal wiring 110. The gate wiring 109 is connected to the vertical driving circuit 105, while the signal wiring 110 is connected to the horizontal driving circuit 106. The thin film transistor TFT for switching the pixel electrode 11 and the thin film transistor included in the vertical drive circuit 105 and the horizontal drive circuit 106 are prepared according to the present invention.
[0031]
FIG. 9 is a schematic cross-sectional view showing an example of an electroluminescence display device in which thin film transistors fabricated according to the present invention are integrated. In this embodiment, an organic electroluminescence element OLED is used as a pixel. In the OLED, an anode A, an organic layer 210, and a cathode K are sequentially stacked. The anode A is separated for each pixel, and is made of, for example, chromium and is basically light-reflective. The cathode K is commonly connected between the pixels, and has, for example, a stacked structure of an ultrathin metal layer 211 and a transparent conductive layer 212, and is basically light transmissive. When a forward voltage (about 10 V) is applied between the anode A / cathode K of the OLED having such a configuration, carriers such as electrons and holes are injected, and light emission is observed. The operation of the OLED is considered to be light emission by excitons formed by holes injected from the anode A and electrons injected from the cathode K.
[0032]
On the other hand, the thin film transistor TFT for driving the OLED includes a gate electrode 1 formed on a substrate 0 made of glass or the like, a gate insulating film 23 superimposed on the upper surface thereof, and the gate electrode 1 through the gate insulating film 23. The semiconductor thin film 5 is stacked on the upper side. The thin film transistor TFT includes a source region S, a channel region Ch, and a drain region D that serve as a path for a current supplied to the OLED. The channel region Ch is located just above the gate electrode 1. The thin film transistor TFT having the bottom gate structure is covered with an interlayer insulating film 7, on which a wiring electrode 9 and a drain electrode 200 are formed. On top of these, the aforementioned OLED is formed through another interlayer insulating film 91. The anode A of the OLED is electrically connected to the thin film transistor TFT via the drain electrode 200.
[0033]
【The invention's effect】
As described above, according to the thin film transistor manufacturing method of the present invention, a high-quality thermal oxide film can be formed on polycrystalline silicon having a large grain size and few defects while using a low-melting glass substrate. For this reason, while forming a high-quality oxide film that could only be obtained by a high-temperature process of 1000 ° C. or higher in the prior art, it is possible to erase defects by irradiating with laser light, resulting in higher performance than that obtained by a high-temperature process. A thin film transistor can be realized. Furthermore, since the glass substrate is pre-annealed by a substrate annealing means such as solid phase growth, there is an effect that the substrate shrinkage during high-pressure steam thermal oxidation can be prevented. In addition, since the laser beam irradiation process used in the present invention is used only to eliminate the minute defects in the crystal grains, the tolerance for the laser beam energy variation is large and the number of shots of the laser pulse can be small. , It has an excellent effect of not reducing the throughput.
[Brief description of the drawings]
FIG. 1 is a process chart showing a first embodiment of a method for producing a thin film transistor according to the present invention.
FIG. 2 is a process chart showing a first embodiment of a method for producing a thin film transistor according to the present invention.
FIG. 3 is a process chart showing a first embodiment of a method for producing a thin film transistor according to the present invention.
FIG. 4 is a schematic view showing an example of a high-pressure steam thermal oxidation apparatus used for carrying out the first embodiment of the method for manufacturing a thin film transistor according to the present invention.
FIG. 5 is a process chart showing a second embodiment of a method for producing a thin film transistor according to the present invention.
FIG. 6 is a process chart showing a second embodiment of a method for producing a thin film transistor according to the present invention.
FIG. 7 is a process chart showing a second embodiment of a method for manufacturing a thin film transistor according to the present invention.
FIG. 8 is a schematic perspective view showing an example of a liquid crystal display device using a thin film transistor manufactured according to the present invention.
FIG. 9 is a partial sectional view showing an example of an electroluminescence display device incorporating a thin film transistor manufactured according to the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 0 ... Insulating substrate, 1 ... Gate electrode, 2 ... Gate nitride film, 3 ... Gate oxide film, 5 ... Semiconductor thin film, 6 ... Thermal oxide film, 11 ... Pixel electrode

Claims (6)

A thin film forming step of forming a semiconductor thin film made of amorphous silicon having a thickness of 60 to 160 nm on an insulating substrate made of glass;
The semiconductor thin film is annealed in an inert gas atmosphere at 600 to 630 ° C. for 5 to 20 hours and subjected to solid phase growth treatment, so that amorphous silicon has a crystal grain size of 1 to 1.5 μm. A solid phase growth step of converting the crystalline silicon to a densification treatment of the substrate at the same time;
Irradiating a semiconductor thin film converted into polycrystalline silicon with an excimer laser beam having a wavelength of 200 to 400 nm to reduce crystal defects contained in the polycrystalline silicon;
By oxidizing the semiconductor thin film in a temperature range of 550 to 650 ° C. using high-pressure steam having a pressure of 0.1 to 5 Mpa, the surface of the polycrystalline silicon is thermally oxidized to form an oxide film having a thickness of 10 to 200 nm. A thermal oxidation process,
A method of manufacturing a thin film transistor, comprising: forming an oxide film obtained by thermally oxidizing the surface of the semiconductor thin film as a gate insulating film, and forming a gate electrode film thereon. 2. The method for producing a thin film transistor according to claim 1, wherein the semiconductor thin film is oxidized at 600 [deg.] C. using high-pressure steam having a pressure of 2 Mpa. A pair of substrates facing each other with a predetermined gap and a liquid crystal held in the gap. A pixel electrode and a thin film transistor for driving the pixel electrode are disposed on one substrate, and the pixel electrode is disposed on the other substrate. In the case of manufacturing a liquid crystal display device having a laminated structure including a semiconductor thin film made of polycrystalline silicon, an oxide film made of silicon oxide, and a gate electrode film,
A thin film forming step of forming a semiconductor thin film made of amorphous silicon having a film thickness of 60 to 160 nm on the one substrate made of glass;
The semiconductor thin film is annealed in an inert gas atmosphere at 600 to 630 ° C. for 5 to 20 hours and subjected to solid phase growth treatment, so that amorphous silicon has a crystal grain size of 1 to 1.5 μm. A solid phase growth step of converting the crystalline silicon to a densification treatment of the substrate at the same time;
Irradiating a semiconductor thin film converted into polycrystalline silicon with an excimer laser beam having a wavelength of 200 to 400 nm to reduce crystal defects contained in the polycrystalline silicon;
By oxidizing the semiconductor thin film in a temperature range of 550 to 650 ° C. using high-pressure steam having a pressure of 0.1 to 5 Mpa, the surface of the polycrystalline silicon is thermally oxidized to form an oxide film having a thickness of 10 to 200 nm. A thermal oxidation process,
And a step of forming a gate electrode film on the oxide film obtained by thermally oxidizing the surface of the semiconductor thin film as a gate insulating film. 4. The method of manufacturing a liquid crystal display device according to claim 3, wherein the semiconductor thin film is oxidized at 600 [deg.] C. using high-pressure steam having a pressure of 2 Mpa. An electroluminescent element and a thin film transistor for driving the electroluminescent element are arranged on an insulating substrate, and the thin film transistor includes a semiconductor thin film made of polycrystalline silicon, an oxide film made of silicon oxide, and a gate electrode film. When manufacturing an electroluminescent display device having
A thin film forming step of forming a semiconductor thin film made of amorphous silicon having a thickness of 60 to 160 nm on the insulating substrate made of glass;
The semiconductor thin film is annealed in an inert gas atmosphere at 600 to 630 ° C. for 5 to 20 hours and subjected to solid phase growth treatment, so that amorphous silicon has a crystal grain size of 1 to 1.5 μm. A solid phase growth step of converting the crystalline silicon to a densification treatment of the substrate at the same time;
Irradiating a semiconductor thin film converted into polycrystalline silicon with an excimer laser beam having a wavelength of 200 to 400 nm to reduce crystal defects contained in the polycrystalline silicon;
By oxidizing the semiconductor thin film in a temperature range of 550 to 650 ° C. using high-pressure steam having a pressure of 0.1 to 5 Mpa, the surface of the polycrystalline silicon is thermally oxidized to form an oxide film having a thickness of 10 to 200 nm. A thermal oxidation process,
And a step of forming a gate electrode film on the oxide film obtained by thermally oxidizing the surface of the semiconductor thin film as a gate insulating film. 6. The method of manufacturing an electroluminescence display device according to claim 5, wherein the semiconductor thin film is oxidized at 600 [deg.] C. using high-pressure steam having a pressure of 2 Mpa.

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