JP2003188387A - Thin film transistor and its fabricating method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a high performance thin film transistor, and its fabricating method, in which scaling-down, enhancement of the image quality of a display device, high speed driving, and low power consumption are satisfied simultaneously. <P>SOLUTION: The method for fabricating a thin film transistor having a multilayer structure of a semiconductor thin film, an oxide film and a gate electrode comprises a step for forming a semiconductor thin film of polysilicon on an insulating substrate, a step for forming an oxide film on the semiconductor thin film by heat treating the semiconductor thin film under pressure atmosphere of a gas containing oxygen atoms, and a step for locally oxidizing the semiconductor thin film by heat treating the semiconductor thin film on which the oxide film is formed under pressure atmosphere of a gas containing oxygen atoms. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor and its manufacturing method. Further, the present invention relates to an active matrix type liquid crystal display device, an electroluminescence display device and a manufacturing method thereof using these.

[0002]

2. Description of the Related Art Among thin film transistors (TFTs) that have been developed as driving elements for liquid crystal displays and organic electroluminescence displays, TFTs using polycrystalline silicon have a pixel array and a peripheral driving circuit integrated on the same substrate. It is attracting attention for the reasons that it can be formed in a desired manner and that a so-called system-on-panel can be realized by incorporating a highly functional circuit in the panel.

In such a polycrystalline silicon thin film transistor, use of an inexpensive low-melting glass substrate instead of an expensive quartz substrate has been studied as a substrate for cost reduction. However, in a polycrystalline silicon thin film transistor using a low melting point glass substrate, it is essential that the process temperature is 700 ° C. or lower due to the characteristics of the low melting point glass substrate, and so-called low temperature polysilicon process has been developed.

On the other hand, MO using a single crystal silicon wafer
In the S LSI semiconductor process, LOCOS (Local Oxidation on) is performed by thermally oxidizing silicon at a temperature of 900 ° C. or higher.
A general method is to form a field oxide film called a silicon structure for element isolation. Element isolation is MO
It is essential in the SLSI process, and the LOCOS structure is the basis of the silicon LSI process. However, polycrystalline silicon T using a low cost glass substrate
In the FT process, a process temperature of 900 ° C. or higher cannot be used because it is much higher than the softening point of glass. Since a thin film transistor is formed on a glass substrate, the element isolation using the LOCOS structure is originally used. Is not necessary, for reasons such as LOCOS
The structure is not used in conventional thin film transistors.

[0005]

By the way, with the increase in resolution of liquid crystal displays and organic electroluminescence displays, and the increase in functions of peripheral functional circuits, the pattern rule of polycrystalline silicon TFTs is required to be miniaturized. There is. With the progress of miniaturization of TFTs, especially when the pattern rule of wirings, the distance between lines, etc., becomes 1.5 μm or less, the distance between wiring electrodes such as gate lines and signal lines becomes short. The parasitic capacitance generated between the source / drain and the wiring increases. Due to this increase in parasitic capacitance, noise jumping through the parasitic capacitance, which can be ignored in the past, increases, which appears as noise on the image, which causes a problem in image quality. Further, due to the increase of the parasitic capacitance, the load at the time of driving the circuit at a high frequency increases, which hinders the speeding up and the low power consumption of the circuit. Further, thinning of the gate insulating film is required along with miniaturization and high performance of the element, but thinning of the gate insulating film has a problem of lowering of withstand voltage.

Therefore, at present, a TFT, which is miniaturized and whose parasitic capacitance is suppressed to a low level and which is excellent in image quality improvement, high speed driving, and low power consumption of a display device, has not yet been established.

Therefore, the present invention was devised in view of the above-mentioned conventional circumstances, and is a high-performance thin film transistor that achieves both miniaturization and improvement in image quality of a display device, high speed driving, and low power consumption. And its manufacturing method.

Another object of the present invention is to realize high performance of a liquid crystal display device and an electroluminescence display device by using this thin film transistor.

[0009]

A method of manufacturing a thin film transistor according to the present invention, which achieves the above object, is a method of manufacturing a thin film transistor having a laminated structure including a semiconductor thin film, an oxide film, and a gate electrode. A semiconductor thin film forming step of forming a semiconductor thin film made of polycrystalline silicon on a substrate, and an oxide film is formed on the semiconductor thin film by performing heat treatment on the semiconductor thin film in a pressurized atmosphere of a gas containing oxygen atoms. And a local oxidation step of locally oxidizing the semiconductor thin film by performing a heat treatment on the semiconductor thin film on which the oxide film is formed in a pressurized atmosphere of a gas containing oxygen atoms. It is what

In the method of manufacturing a thin film transistor according to the present invention as described above, since the semiconductor thin film is heat-treated in a pressurized atmosphere of a gas containing oxygen atoms, the oxide film is surely densified even in a low temperature process. To be done. In addition, since the semiconductor thin film on which the oxide film is formed is locally oxidized in a pressurized atmosphere of a gas containing oxygen atoms, a field oxide film called a LOCOS structure is formed on the insulating substrate. The oxide film separates the elements to form an element region. Since the field oxide film is formed thicker than the oxide film formed on the semiconductor thin film, the source / drain regions and the upper wiring are separated by an appropriate distance.

Further, in the method for manufacturing a liquid crystal display device according to the present invention, which achieves the above object, a first substrate on which a pixel electrode and a thin film transistor for driving the pixel electrode are arranged, and an electrode facing the pixel electrode are arranged. And a second substrate, which has a display panel in which a liquid crystal is held in the second substrate and a second substrate opposed to each other with a predetermined gap, and the thin film transistor has a laminated structure including a semiconductor thin film, an oxide film, and a gate electrode. A method of manufacturing a liquid crystal display device, comprising: a semiconductor thin film forming step of forming a semiconductor thin film made of polycrystalline silicon on a first substrate; and a heat treatment in a pressurized atmosphere of a gas containing oxygen atoms to the semiconductor thin film. The oxide film forming step of forming an oxide film on the semiconductor thin film is performed, and the heat treatment is performed on the semiconductor thin film on which the oxide film is formed in a pressurized atmosphere of a gas containing oxygen atoms. It is characterized in further comprising a local oxidation step of locally oxidizing the semiconductor thin film by.

In the method of manufacturing a liquid crystal display device according to the present invention as described above, when a thin film transistor is manufactured, a heat treatment is performed on a semiconductor thin film in a pressurized atmosphere of a gas containing oxygen atoms. In this case, the oxide film is surely densified. In addition, since the semiconductor thin film on which the oxide film is formed is locally oxidized in a pressurized atmosphere of a gas containing oxygen atoms, a field oxide film called a LOCOS structure is formed on the insulating substrate. The oxide film separates the elements to form an element region. Since the field oxide film is formed thicker than the oxide film formed on the semiconductor thin film, the source / drain regions and the upper wiring are separated by an appropriate distance.

Further, in the method for manufacturing an electroluminescence display device according to the present invention, which achieves the above object, an electroluminescence element and a thin film transistor for driving the electroluminescence element are arranged on an insulating substrate, and the thin film transistor is a semiconductor thin film and an oxide film. A method of manufacturing an electroluminescent display device having a laminated structure including a gate electrode and a semiconductor thin film forming step of forming a semiconductor thin film made of polycrystalline silicon on an insulating substrate, and oxygen atoms to the semiconductor thin film. An oxide film forming step of forming an oxide film on the semiconductor thin film by performing heat treatment in a pressurized atmosphere of a gas containing the gas, and a pressurized atmosphere of a gas containing oxygen atoms to the semiconductor thin film on which the oxide film is formed. A local oxidation step of locally oxidizing the semiconductor thin film by performing a heat treatment under It is an butterfly.

In the method of manufacturing an electroluminescent display device according to the present invention as described above, since a semiconductor thin film is heat-treated in a pressurized atmosphere of a gas containing oxygen atoms when manufacturing a thin film transistor, a low temperature process is performed. In this case, the oxide film is surely densified. In addition, since the semiconductor thin film on which the oxide film is formed is locally oxidized in a pressurized atmosphere of a gas containing oxygen atoms, a field oxide film called a LOCOS structure is formed on the insulating substrate. Element isolation is made by the oxide film,
An element region is formed. Since the field oxide film is formed thicker than the oxide film formed on the semiconductor thin film, the source / drain regions and the upper wiring are separated by an appropriate distance.

A thin film transistor according to the present invention that achieves the above object is a thin film transistor having a laminated structure including a semiconductor thin film, an oxide film, and a gate electrode,
The semiconductor thin film is made of polycrystalline silicon formed on an insulating substrate, and the oxide film is formed on the semiconductor thin film by performing heat treatment on the semiconductor thin film in a pressurized atmosphere of a gas containing oxygen atoms, and insulating the thin film. The element region is formed by a field oxide film formed by locally oxidizing a semiconductor thin film having an oxide film formed on a flexible substrate.

In the thin film transistor according to the present invention as described above, the oxide film is surely densified. In addition, a LOCOS formed by locally oxidizing a semiconductor thin film having an oxide film formed thereon under a pressurized atmosphere of a gas containing oxygen atoms.
The source / drain is formed because the element isolation is performed by the field oxide film called a structure, the element region is formed, and the film thickness of the field oxide film is thicker than that of the oxide film formed on the semiconductor thin film. The region and the upper wiring are separated by an appropriate distance.

Further, in the liquid crystal display device according to the present invention which achieves the above object, a first substrate on which a pixel electrode and a thin film transistor for driving the pixel electrode are arranged, and an electrode facing the pixel electrode is arranged. A liquid crystal display having a laminated structure in which a thin film transistor includes a semiconductor thin film, an oxide film, and a gate electrode, and a display panel in which a liquid crystal is held in the space and a second substrate facing each other with a predetermined gap. In the apparatus, the semiconductor thin film is made of polycrystalline silicon formed on the first substrate, and the oxide film is formed on the semiconductor thin film by performing heat treatment on the semiconductor thin film in a pressurized atmosphere of a gas containing oxygen atoms. And the element region is formed on the first substrate by a field oxide film formed by locally oxidizing the semiconductor thin film on which the oxide film is formed. Than it is.

In the liquid crystal display device according to the present invention as described above, the oxide film is surely densified in the thin film transistor provided in the display panel. Further, element isolation is performed by a field oxide film called a LOCOS structure formed by locally oxidizing a semiconductor thin film having an oxide film formed therein under a pressurized atmosphere of a gas containing oxygen atoms, and an element region is formed. Since the oxide film is formed thicker than the oxide film formed on the semiconductor thin film, the source / drain regions and the upper wiring are separated by an appropriate distance.

Further, in the electroluminescence display device according to the present invention which achieves the above objects, an electroluminescence element and a thin film transistor for driving the electroluminescence element are arranged on an insulating substrate, and the thin film transistor is a semiconductor thin film, an oxide film and a gate electrode. And a semiconductor thin film made of polycrystalline silicon formed on an insulating substrate, and the oxide film is a pressurized atmosphere of a gas containing oxygen atoms with respect to the semiconductor thin film. The element region is formed by the field oxide film formed by locally oxidizing the semiconductor thin film on which the oxide film is formed on the insulating substrate by performing the heat treatment below. It is a feature.

In the electroluminescent display device according to the present invention as described above, the oxide film is reliably densified in the thin film transistor provided on the insulating substrate. Further, L formed by locally oxidizing a semiconductor thin film on which an oxide film is formed in a pressurized atmosphere of a gas containing oxygen atoms
The element isolation is performed by the field oxide film called OCOS structure, the element region is formed, and the field oxide film is formed thicker than the oxide film formed on the semiconductor thin film. / The drain region and the upper wiring are separated by an appropriate distance.

[0021]

BEST MODE FOR CARRYING OUT THE INVENTION A thin film transistor and a manufacturing method thereof, a liquid crystal display device and a manufacturing method thereof, an electroluminescence display device and a manufacturing method thereof according to the present invention will be described below with reference to the drawings. The details will be described. First, a thin film transistor and its manufacturing method will be described.

A thin film transistor according to the present invention is a thin film transistor having a laminated structure including a semiconductor thin film, an oxide film, and a gate electrode. The semiconductor thin film is made of polycrystalline silicon formed on an insulating substrate, and the oxide film is Formed on the semiconductor thin film by heat-treating the semiconductor thin film under a pressure atmosphere of a gas containing oxygen atoms,
The element region is formed by a field oxide film formed by locally oxidizing a semiconductor thin film having an oxide film formed on an insulating substrate.

A method of manufacturing a thin film transistor according to the present invention is a method of manufacturing a thin film transistor having a laminated structure including a semiconductor thin film, an oxide film, and a gate electrode, and a semiconductor made of polycrystalline silicon on an insulating substrate. A semiconductor thin film forming step of forming a thin film; an oxide film forming step of forming an oxide film on the semiconductor thin film by performing heat treatment on the semiconductor thin film in a pressurized atmosphere of a gas containing oxygen atoms; And a local oxidation step of locally oxidizing the semiconductor thin film by performing heat treatment on the formed semiconductor thin film in a pressurized atmosphere of a gas containing oxygen atoms.

The present invention is not limited to the following description, but can be modified as appropriate without departing from the spirit of the present invention.

FIG. 1 is a first embodiment of the present invention, which is a thin film transistor manufactured by applying the present invention and has a laminated structure including a semiconductor thin film 3, a gate oxide film 4, and a gate electrode 5. FIG. 3 is a cross-sectional view of an active matrix type display device substrate including a thin film transistor. Figure 1
In the above, a buffer layer 2a made of silicon nitride and a buffer layer 2b made of silicon oxide are laminated on an insulating substrate 1 made of low-melting glass, and a p-channel thin film transistor (hereinafter referred to as pch-T) is formed on the buffer layer 2b.
Sometimes referred to as FT. ) 6 and an n-channel thin film transistor (hereinafter sometimes referred to as nch-TFT) 7 are formed. Further, in the pch-TFT 6 and the nch-TFT 7, a gate oxide film 4 made of silicon oxide and serving as a gate insulating film is formed on a semiconductor thin film 3 made of polycrystalline silicon.
The gate electrode 5 is formed on the upper side.

The pch-TFT 6 and nch-TFT
In FIG. 7, the gate oxide film 4 made of silicon oxide is densified and formed. As a result, this pch-TF
In T6 and nch-TFT7, the fixed charges in the film and the defect level of the gate oxide film 4 are reduced, and the defect level at the interface of the semiconductor thin film 3 / gate oxide film 4 is reduced, and as a result, Reduction of variations in threshold voltage and improvement of hot carrier breakdown voltage are realized, and a high-quality gate oxide film 4 is formed on the insulating substrate 1 made of low-melting glass.

The pch-TFT 6 and nch-
In the TFT 7, element isolation is performed by a field oxide film 8 called a LOCOS structure, and an element region is formed. Since the field oxide film 8 is formed thicker than the gate insulating film 4 formed on the semiconductor thin film 3, the source / drain regions and the upper wiring are separated by an appropriate distance. There is.

In a thin film transistor having a conventional structure, as shown in FIG. 2, the film thickness of the oxide film between the elements is equal to the film thickness of the interlayer insulating film. If the distance is 1.5 μm or less, the distance between wiring electrodes such as gate lines and signal lines becomes short,
A parasitic capacitance generated between a plurality of wirings or between a source / drain of a thin film transistor and a wiring is increased. here,
In FIG. 2, the parts corresponding to those in FIG. 1 are designated by the same reference numerals to facilitate understanding.

When used, for example, in a liquid crystal display device or an organic electroluminescence display device, due to this increase in parasitic capacitance, noise jumping through the parasitic capacitance, which can be ignored in the past, increases, which causes Since it appears as noise on the image, it causes a problem in image quality. Further, due to the increase of the parasitic capacitance, the load at the time of driving the circuit at a high frequency increases, which hinders the speeding up and the low power consumption of the circuit.

However, in the pch-TFT 6 and the nch-TFT 7, the element isolation is performed by the field oxide film 8 called LOCOS structure, and the field oxide film 8 is formed thicker than the film thickness of the gate oxide film 4. , The source / drain regions and upper wirings such as gate lines and signal lines are separated by an appropriate distance. As a result, in the pch-TFT 6 and the nch-TFT 7, the distance between the source / drain region and the upper wiring is shortened even when the thin film transistor is miniaturized, so that the parasitic capacitance between the gate and the source and the gate and the drain is reduced. , The parasitic capacitance between the source / drain and the wiring, between the signal line and the gate line, etc. is prevented from increasing due to the short distance between the source / drain region and the upper wiring. As a result, even when it is used in a liquid crystal display device or an organic electroluminescence display device, for example, noise jumps through the parasitic capacitance due to an increase in the parasitic capacitance and becomes noise on an image, and It is possible to prevent an increase in load at the time of driving the circuit at a high frequency due to the increase in the capacity, which prevents the circuit from being speeded up and consuming less power. Further, since the field oxide film 8 is formed thick while the gate oxide film 4 is formed thin, it is possible to reduce the parasitic capacitance without reducing the On current of the thin film transistor. That is, this pch-TFT 6 and nc
With the h-TFT 7, it is possible to achieve high-speed circuits and low power consumption while providing good image quality.

Due to the above-mentioned effects, this pch-TFT
In 6 and nch-TFT 7, a high-performance thin film transistor which realizes both miniaturization, improvement in image quality of a display device, high speed driving, and low power consumption has been realized.

The thin film transistor according to the present invention having the above excellent characteristics can be manufactured as follows.

First, as shown in FIG. 3, a buffer layer 2a made of silicon nitride SiN _x and a buffer layer 2b made of silicon oxide SiO ₂ are sequentially formed on an insulating substrate 1 made of low melting point glass. Regarding the film thickness of each buffer layer, the film thickness of the buffer layer 2a is, for example, about 50 nm to 200 nm, and the film thickness of the buffer layer 2b is, for example, 100 nm to 400 nm.
It is about nm. Then, the semiconductor thin film 3 made of amorphous silicon is formed on the buffer layer 2b. The film thickness of the semiconductor thin film 3 is about 60 nm to 160 nm, and can be set to 75 nm, for example. The above film formation can be continuously performed using a plasma CVD method, an LPCVD method, or the like. As the insulating substrate 1, for example, AN635 or AN100 manufactured by Asahi Glass Co., Ltd. can be used. Here, the strain point of AN635 is 635 ° C., and AN100
Has a strain point of 670 ° C. Alternatively, Code 1737 manufactured by Corning can be used. Code17
The strain point of 37 is 667 ° C. The SiO ₂ film forming the buffer layer 2b is preferably formed by decomposing an inorganic silane gas such as SiH ₄ or Si ₂ H ₆ and O ₂ or N ₂ O gas. Alternatively, it may be generated by decomposing an organic silane gas such as TEOS and O ₂ , N ₂ O gas or the like. Alternatively, Si may be formed by sputtering or vapor deposition.
An O ₂ film may be formed. Further, when the plasma CVD method is used for forming the semiconductor thin film 3 made of amorphous silicon, in order to desorb hydrogen in the film, it is about 40 in a nitrogen atmosphere.
Annealing is performed at a temperature of 0 ° C. to 450 ° C. for about 1 hour.

Next, as shown in FIG. 4, excimer laser annealing (ELA) is performed by irradiating the semiconductor thin film 3 with excimer laser light having a wavelength of about 200 nm to 400 nm, and the amorphous silicon of the semiconductor thin film 3 is increased. Convert to crystalline silicon. In the excimer laser annealing, the semiconductor thin film 3 is irradiated with a pulsed laser beam to be heated and melted, and is recrystallized in the cooling process. The excimer laser annealing crystallizes the semiconductor thin film 3 with good throughput compared to the conventional solid phase growth. it can. Further, the conversion of the amorphous silicon of the semiconductor thin film 3 into the polycrystalline silicon is not limited to the excimer laser annealing, but the amorphous silicon is converted into a large amount of amorphous silicon by annealing using a solid laser, a flash lamp or the like. It may be converted to crystalline silicon.

Next, as the oxide film forming step, the entire surface of the insulating substrate 1 is heat-treated in a pressurized atmosphere of a gas containing oxygen atoms to oxidize the surface of the semiconductor thin film 3 and gate oxidation as shown in FIG. A silicon oxide thin film is formed as the film 4. Usually, since the process temperature cannot be increased in the low temperature process, it is impossible to form the gate oxide film 4 from which the internal defects are sufficiently removed. It is possible to form a high quality gate oxide film 4 from which defects are sufficiently removed. As a result, it is possible to reduce variations in threshold voltage, improve hot carrier breakdown voltage, etc., and form a high-quality gate oxide film 4 on the insulating substrate 1 made of low-melting glass. Further, although the low temperature process is used, since the gate oxide film 4 having a film quality equal to or higher than that of the conventional thermal oxide film can be formed, a sufficient withstand voltage can be secured even when the TFT is miniaturized. it can.

In addition to the ability to form a dense and high-quality gate oxide film 4, the above-described entire surface heat treatment also brings about the annealing effect of the low-melting-point glass that is the insulating substrate 1 and the thermal oxidation. By heat-shrinking the glass, even if thermal stress is applied to the insulating substrate 1 in the subsequent processes, the substrate does not shrink any more, so that a mask alignment error at the time of patterning can be prevented. .

As such a heat treatment, for example, annealing with high-pressure steam (hereinafter sometimes referred to as high-pressure steam annealing) is suitable. Here, as the annealing conditions, the annealing temperature is, for example, about 200 ° C. to 650 ° C., the pressure is, for example, 1 Mpa to 2 Mpa, and the processing time is, for example, about 1 hour. The annealing atmosphere is a mixed atmosphere of water vapor and oxygen.

For the above-mentioned high-pressure steam anneal, for example, a high-pressure steam oxidation treatment device can be used. Figure 6
FIG. 1 is a schematic configuration diagram showing a configuration example of a high-pressure steam oxidation treatment apparatus suitable for high-pressure steam annealing. The high-pressure steam oxidation treatment apparatus 101 shown in FIG. 6 includes a pressure vessel 102 that is hermetically sealed, and a reaction vessel 103 that is hermetically sealed and housed in the pressure vessel 102.
The pressure vessel 102 arranged on the outside is made of, for example, stainless steel, and the reaction vessel 103 arranged on the inside is made of, for example, quartz glass. The inside of the reaction vessel 103 is a processing chamber 104, and the processing chamber 10
In No. 4, the reaction container 103 prevents impurities such as metal powder from being mixed into the sample. A heater 105 is arranged between the pressure vessel 102 and the reaction vessel 103 so as to surround the reaction vessel 103.
Thus, the temperature in the processing chamber 104 can be heated and maintained at 300 ° C to 700 ° C. And the pressure vessel 1
A boost line 106 and a decompression line 107 are connected to 02. A processing gas supply line 108 and a processing gas exhaust line 109 are connected to the processing chamber 104. Here, the processing gas means a gas that produces an atmosphere containing steam as a main component or an atmosphere of an inert gas such as nitrogen.

The pressure rising line 106 includes an air source 110, a pressure reducing valve (RV) 111, a flow meter 112, and a valve (V) 1.
13, the valve (V) 113 is opened and closed to supply air into the pressure vessel 102 to increase the internal pressure of the pressure vessel 102 to 0.1 MPa to 5 MPa. The decompression line 107 includes a valve (V) 114,
By opening / closing the valve (V) 114, the air in the pressure vessel 102 can be exhausted to reduce the pressure in the pressure vessel 102.

The processing gas supply line 108 is a first supply line 115 for supplying nitrogen, dry oxygen, inert gas and the like.
And a second supply line 116 for supplying water, and an upstream part branching from the second supply line 116 and a downstream part for discharging the processing gas into the processing chamber 104. A heater 117 that preheats the processing gas to a temperature equivalent to that in the processing chamber 104 is arranged in the downstream portion. Upstream first supply line 1
Reference numeral 15 has a supply source 118, a pressure reducing valve (RV) 119, a flow meter 120, and a valve (V) 121. By opening and closing the valve (V) 121, the processing gas is supplied into the processing chamber 104, and the processing chamber 104 is closed. In addition to setting a predetermined processing gas atmosphere, the processing chamber 104 can be pressurized to 0.1 MPa to 5 MPa. The second supply line 116 for supplying water includes a pump (P) 123 and a valve (V) 12.
4, the pump (P) 123 pumps water from the water source 122, and the valve (V) 124 is opened and closed to heat the heater 1.
17 is supplied with water, the heater 117 evaporates the water, and steam is supplied into the processing chamber 104.

The processing gas exhaust line 109 is provided with a valve (V) 125, and the processing gas in the processing chamber 104 can be exhausted by opening and closing the valve (V) 125.

A substrate stage 126 is arranged in the center of the processing chamber 104, and a glass substrate, a silicon substrate or the like to be processed is arranged on the substrate stage 126. The above-described high-pressure steam oxidation treatment apparatus can perform the high-pressure steam anneal described above.

Further, this high-pressure steam oxidation treatment apparatus 101
Stops the supply of water vapor to the processing chamber 104,
By making the atmosphere in 4 only dry oxygen, for example,
It is possible to perform the heat treatment described later. The high-pressure steam oxidation treatment device 101 configured as described above can perform the high-pressure steam annealing and heat treatment in the present invention.

Subsequently, a low oxidation rate layer forming step is performed.
That is, for example, a silicon nitride film is formed as a low oxidation rate material having a lower oxidation rate than the gate oxide film 4 on the gate oxide film 4, and is etched and patterned into a predetermined pattern as shown in FIG. The low oxidation rate layer 9 is formed.

Then, a thermal oxidation step of locally oxidizing the gate oxide film 4 is performed. That is, as shown in FIG. 7, in the state where the low oxidation rate layer 9 is formed on the gate oxide film 4, a pressurized atmosphere of a gas containing oxygen atoms is applied to the semiconductor thin film 3 using the low oxidation rate layer 9 as an oxidation mask. The gate oxide film 4 is locally oxidized by performing heat treatment below. By performing such local oxidation, the semiconductor thin film 3 in the portion where the gate oxide film 4 is exposed, that is, only polycrystalline silicon can be fully oxidized. As a result, as shown in FIG. 8, a field oxide film 8 called a LOCOS structure in the single crystal MOS LSI can be formed between the low oxidation rate layer 9 and the low oxidation rate layer 9, and the field oxide film concerned can be formed. With 8, the semiconductor thin film 3 can be separated into islands, for example. That is, by forming the field oxide film 8 in this manner, element isolation can be performed.

As such local oxidation, for example, annealing with high-pressure steam is suitable as in the oxide film forming step described above. Here, the oxidation rate when the polycrystalline silicon thin film, which is the semiconductor thin film 3, is oxidized by high-pressure steam depends on the temperature and the pressure. For example, when the polycrystalline silicon thin film is oxidized in steam at 600 ° C. and 2 MPa, heat The oxide film is formed at a growth rate of 20 nm / h to 40 nm / h. In the LOCOS structure formed by annealing with such high-pressure steam, the film thickness of the field oxide film 8 can be made larger than that of the gate oxide film 4, so that the source / drain regions, the gate lines, and the like can be formed. It is possible to separate the upper wirings such as the signal lines from each other at an appropriate distance. As a result, the distance between the source / drain region and the upper wiring is shortened even when the thin film transistor is miniaturized, so that the parasitic capacitance between the gate and the source and the gate and the drain, the distance between the source and the drain and the wiring, and the signal line. It is possible to prevent an increase in parasitic capacitance, such as a parasitic capacitance between gate lines, which is associated with a reduction in the distance between the source / drain regions and the upper wiring.

Further, since the field oxide film 8 can be formed thick while the gate oxide film 4 is formed thin, a thin film transistor having a reduced parasitic capacitance can be manufactured without reducing the On current of the thin film transistor. it can.

Further, the high-pressure steam anneal can be performed by using the high-pressure steam oxidation treatment apparatus 101 shown in FIG. As the annealing conditions, the annealing temperature is, for example, about 200 ° C. to 650 ° C., and the pressure is, for example, 1M.
Pa to 2 Mpa, and the processing time is, for example, about 1 hour.
The annealing atmosphere is a mixed atmosphere of water vapor and oxygen. Here, since the insulating substrate 1 has already been thermally contracted by the heat treatment in the above-mentioned oxide film forming step, there is no thermal contraction in this step, and the pattern shift thereafter does not occur.

Subsequently, in the chamber where the local oxidation is performed, the atmosphere in the chamber is changed from the mixed atmosphere of water vapor and oxygen to only dry oxygen and heat treatment is performed, so that the semiconductor thin film 3, the gate oxide film 4 and the field oxide film are formed. Heat treatment for annealing 8 is performed. By performing the heat treatment, the semiconductor thin film 3, the gate oxide film 4, and the field oxide film 8 are modified, and excess residual water molecules that become scattering centers of carriers,
Hydrogen ions and the like can be desorbed. As a result, it is possible to prevent a decrease in carrier mobility due to excess residual water molecules, hydrogen ions, and the like.

As the heat treatment condition, the heat treatment temperature is 20
The range is 0 ° C. to 650 ° C., the pressure is 1 Mpa to 2 Mpa, and the treatment time is, for example, 1 hour. The atmosphere in the heat treatment is not limited to dry oxygen, but may be a dry atmosphere, and may be an air atmosphere or an inert gas atmosphere, and nitrogen is suitable as the inert gas. In the present invention, the above-mentioned atmosphere includes a vacuum state.

After the heat treatment, the low oxidation rate layer 9 is removed by, for example, plasma etching as shown in FIG. The removal of the low oxidation rate layer 9 is not limited to plasma etching, and a conventionally known method can be used.

Next, if necessary, for the purpose of controlling the threshold voltage Vth of the thin film transistor, for example, B + ions are ion-implanted at a dose of about 0.1 × 10 ¹² / cm ² to 4 × 10 ¹² / cm ^2. . The acceleration voltage at this time is, for example, about 20 keV to 200 keV.

Next, as shown in FIG. 10, on the gate oxide film 4, A1, Ti, Mo, W, Ta, Cu, Ag,
The gate electrode 5 is formed by forming a film of doped polycrystalline silicon or the like or an alloy thereof with a film thickness of 200 nm to 800 nm, and patterning. Then, as shown in FIG. 11, P + ions are implanted into the semiconductor thin film 3 by, for example, a mass separation ion implantation method, and LDD ion implantation for forming an LDD structure is performed on the entire surface of the insulating substrate 1. The dose amount at this time is, for example, 6 × 10 ¹² / cm ^{2 to} 5 × 1.
0 ¹³ / cm ² and the acceleration voltage is, for example, 20 ke
It is about V to 200 keV. As a result of the LDD ion implantation, the channel region ch is left below the gate electrode 1, and the other portions are the targets of the LDD ion implantation.

Subsequently, as shown in FIG. 12, after LDD ion implantation, resists 10 and 11 for forming an n-channel type thin film transistor are formed, and as shown in FIG. 13, mass separation type or non-mass separation type. P + ions are implanted into the semiconductor thin film 3 by the ion shower doping apparatus of. The dose amount at this time is, for example, 1 × 10 ¹⁴ / cm ² to 1 ×.
It is about 10 ¹⁵ / cm ² , and the acceleration voltage is, for example, 20 k.
It is about eV to 200 keV. As a result, the source region S and the drain region D of the n-channel type thin film transistor are formed. The source region S and the channel region c
LDD regions are left between h and h, and between the drain region D and the channel region ch. Through the above steps, an n-channel thin film transistor is formed.

Next, the resists 10 and 11 are peeled off, and the structure shown in FIG.
4, a resist 12 for forming a p-channel thin film transistor is formed, and B + ions are injected into the semiconductor thin film 3 by a mass separation type or non-mass separation type ion shower doping apparatus as shown in FIG. To do. The dose amount at this time is, for example, 1 / cm ^{2 to} 3 × 10 ¹⁵ /
cm ² and the acceleration voltage is, for example, 10 ke
It is about V to 100 keV. Thus, the source region S and the drain region D of the p-channel thin film transistor are formed, and the p-channel thin film transistor is formed.

Next, the resist 12 is peeled off, and as shown in FIG. 16, SiO _X is deposited to a thickness of, for example, 600 nm to form an interlayer insulating film 13. Here, the activation process of the dopant injected into the semiconductor thin film 3 is performed. The activation process is
Laser annealing, lamp annealing (RTA: Rapid Ther
mal annealing) or furnace annealing may be used.
For the laser annealing, for example, an excimer laser can be used.

Next, as shown in FIG. 17, as the passivation film 14, SiN is formed by, for example, the plasma CVD method.
_{The X} film is formed with a thickness of, for example, about 200 nm to 400 nm. Then, in a nitrogen atmosphere, for example, 350 ° C.
Hydrogenation annealing is performed at a temperature of 400 ° C. for, eg, about 1 hour.

Finally, contact holes are opened in the interlayer insulating film 13 and the passivation film 14, and a metal such as A1-Si is sputtered and then patterned to form the wiring electrode 15.
To process. Next, add acrylic organic resin to approximately 1 μm
It is applied to form the flattening film 16. Then, after forming a contact hole in the flattening film 16 for making contact with the pixel electrode, a transparent conductive film such as ITO or IZO is formed by sputtering and patterned to form the pixel electrode 17. The transparent conductive film is annealed in a nitrogen atmosphere at a temperature of about 220 ° C. for 30 minutes to complete an active matrix type display device substrate as shown in FIG.

As described above, it is possible to manufacture a high-performance thin film transistor which achieves both miniaturization, improvement in image quality of a display device, high speed driving, and low power consumption.

In the above description, the top gate type thin film transistor has been described as an example, but the present invention is not limited to this, and can be applied to, for example, a bottom gate type thin film transistor.

Next, a second embodiment of the thin film transistor according to the present invention will be described. In the second embodiment, a case of manufacturing a bottom-gate thin film transistor will be described. The parts corresponding to those in the first embodiment are given the same reference numerals to facilitate understanding.

First, as shown in FIG. 18, Ta, Mo, W, Cr, Cu is formed on an insulating substrate 1 made of low melting point glass.
Alternatively, these alloys are formed to have a thickness of 20 nm to 250 nm, for example, and patterned to process the gate electrode 5.

Subsequently, as shown in FIG. 19, plasma C
VD method, atmospheric pressure CVD method, low pressure CVD method, etc.
iN _x is formed to have a thickness of, for example, 30 nm to 50 nm, and then SiO _x is continuously formed to have a thickness of, for example, 50 nm to 200 nm to form a gate nitride film 2a and a gate insulating film 2b, respectively. Further thereon, a semiconductor thin film 13 made of amorphous silicon is continuously formed.
Is formed with a thickness of, for example, 60 nm to 160 nm. Here, when the plasma CVD method is used, in order to desorb hydrogen in the film, 400 ° C. to 450 ° C. in a nitrogen atmosphere, 1
Anneal for about 2 hours to 2 hours. After this, wavelength 20
Irradiation of excimer laser light of 0 nm to 400 nm converts the amorphous silicon into polycrystalline silicon.

Next, as the oxide film forming step, high-pressure steam annealing is performed as in the first embodiment, and the semiconductor thin film 3 is formed.
The surface of is oxidized to form a silicon oxide thin film as the gate oxide film 4 as shown in FIG. Usually, since the process temperature cannot be increased in the low temperature process, it is impossible to form the gate oxide film 4 from which the internal defects are sufficiently removed. It is possible to form a high quality gate oxide film 4 from which defects are sufficiently removed. As a result, it is possible to reduce variations in threshold voltage, improve hot carrier breakdown voltage, etc., and form a high-quality gate oxide film 4 on the insulating substrate 1 made of low-melting glass. Further, although the low temperature process is used, since the gate oxide film 4 having a film quality equal to or higher than that of the conventional thermal oxide film can be formed, a sufficient withstand voltage can be secured even when the TFT is miniaturized. it can.

As the annealing conditions, the annealing temperature is
For example, the temperature is 600 ° C., the pressure is, for example, 2 MPa, and the processing time is, for example, about 2 hours. The annealing atmosphere is a mixed atmosphere of water vapor and oxygen. Then, the high-pressure steam anneal can be performed using the high-pressure steam oxidation treatment device 101 shown in FIG.

Here, in this embodiment, since the gate electrode 5 is already patterned in the oxide film forming step, when the insulating substrate 1 is thermally contracted, a mask alignment shift occurs, which causes a problem in a later process. There is a risk of hindrance. Therefore, in this embodiment, the insulating substrate 1 having a small heat shrinkage rate is used. For example, the shrinkage ratio after heat treatment is 35
By using a glass substrate having a ppm or less, it is possible to correct the mask alignment deviation. Further, in the case where the thermal contraction of the insulating substrate 1 is allowed, it is possible to avoid this problem by designing the mask in consideration of the pattern contraction rate in the patterning process after the oxide film forming step.

Subsequently, a low oxidation rate layer forming step is performed.
That is, for example, a silicon nitride film is formed on the gate oxide film 4 as a low oxidation rate material having an oxidation rate lower than that of the gate oxide film 4, and is etched and patterned into a predetermined pattern as shown in FIG. The low oxidation rate layer 9 is formed.

Then, a thermal oxidation step of locally oxidizing the gate oxide film 4 is performed. That is, as shown in FIG. 21, in a state where the low oxidation rate layer 9 is formed on the gate oxide film 4, a pressurized atmosphere of a gas containing oxygen atoms is applied to the semiconductor thin film 3 using the low oxidation rate layer 9 as an oxidation mask. The gate oxide film 4 is locally oxidized by performing heat treatment below. By performing such local oxidation, the semiconductor thin film 3 in the portion where the gate oxide film 4 is exposed, that is, only the polycrystalline silicon can be fully oxidized like the first embodiment. As a result, as shown in FIG. 22, a field oxide film 8 called a LOCOS structure can be formed in a portion between the low oxidation rate layer 9 and the low oxidation rate layer 9 in the single crystal MOS LSI, and the field oxide film concerned. With 8, the semiconductor thin film 3 can be separated into islands, for example. That is, by forming the field oxide film 8 in this manner, element isolation can be performed.

As for the local oxidation, for example, annealing with high-pressure steam is suitable as in the first embodiment. LOCOS formed by annealing with such high-pressure steam
In the structure, the film thickness of the field oxide film 8 can be made thicker than the film thickness of the gate oxide film 4, so that the source / drain regions are separated from the upper wirings such as the gate lines and the signal lines at an appropriate distance. It becomes possible. As a result, the distance between the source / drain region and the upper wiring is shortened even when the thin film transistor is miniaturized.
Parasitics associated with shortening the distance between the source / drain region and the upper wiring, such as the parasitic capacitance between the gate / source and the gate / drain, the parasitic capacitance between the source / drain and the wiring, and between the signal line and the gate line. It is possible to prevent the capacity from increasing.

Further, since the field oxide film 8 can be formed thick while the gate oxide film 4 is formed thin, it is possible to manufacture a thin film transistor having a reduced parasitic capacitance without reducing the On current of the thin film transistor. it can.

Further, the high pressure steam anneal is performed by the high pressure steam oxidation treatment apparatus 10 shown in FIG. 6 as in the case of the first embodiment.
1 can be used. Here, as the annealing conditions, the annealing temperature is, for example, about 200 ° C. to 600 ° C., the pressure is, for example, 1 MPa to 2 Mpa, and the processing time is, for example, about 1 hour. The annealing atmosphere is a mixed atmosphere of water vapor and oxygen.

Subsequently, in the chamber where the local oxidation is performed, the atmosphere in the chamber is changed from the mixed atmosphere of water vapor and oxygen to only dry nitrogen, and heat treatment is performed to perform the semiconductor thin film 3, the gate oxide film 4, and the field oxide film. By performing a heat treatment for annealing 8, the field oxide film 8
Can be modified, and excess residual water molecules, hydrogen ions, etc., which serve as carrier scattering centers, can be desorbed from the semiconductor thin film 3. As a result, it is possible to prevent a decrease in carrier mobility due to excess residual water molecules, hydrogen ions, and the like.

As the heat treatment condition, the heat treatment temperature is 20
The range is 0 ° C. to 650 ° C., the pressure is 1 Mpa to 2 Mpa, and the treatment time is, for example, 1 hour. The atmosphere in the heat treatment is not limited to dry oxygen and may be a dry atmosphere, an air atmosphere, an inert gas atmosphere,
Nitrogen, for example, is suitable as the inert gas. And
In the present invention, the above-mentioned atmosphere includes a vacuum state.

After the heat treatment, as shown in FIG. 23, the low oxidation rate layer 9 is removed by, for example, plasma etching.

Then, for the purpose of controlling the threshold voltage Vth of the thin film transistor, for example, B + ions are ion-implanted at a dose of about 0.1 × 10 ¹² / cm ² to 4 × 10 ¹² / cm ² as needed. . The acceleration voltage at this time is, for example, about 10 keV to 100 keV.

Next, as shown in FIG. 24, resists 21 and 22 are formed on the gate oxide film 4 by the back surface exposure technique. Here, P + ions separated by mass are implanted into the entire surface of the insulating substrate 1 to form an LDD region. The dose amount at this time is, for example, 4 × 10 ¹² / cm ^{2 to} 5 × 10 ¹³ / cm.
^{2. The} acceleration voltage is, for example, about 10 keV to 100 keV.

Then, the resists 21 and 22 are peeled off,
As shown in FIG. 25, after the LDD ion implantation,
Form resists 23 and 24 for thin film transistors, and
Diluted PH_ThreeUsing gas, non-mass P + ions
Ion shower doping using release type ion beam
Source of n-channel thin film transistor doped with
A region S and a drain region D are formed. Do at this time
For example, 1 x 10 ¹⁴/ Cm^Two~ 1 x 10¹⁵/ C
m^TwoAnd the acceleration voltage is, for example, 10 keV to 100 ke
It is about V.

Next, the resists 23 and 24 are peeled off, and the structure shown in FIG.
As shown in FIG. 6, a resist 25 and a resist 26 are provided to form a p-channel thin film transistor. Using the resist 25 and the resist 26 as masks, B ₂ H ₆ gas diluted with hydrogen is used, and B + ions are also implanted by non-mass separation type ion doping to obtain a pch-T for a drive circuit.
Form FT6. The dose amount at this time is, for example, 1 / c
m ^{2 to} 3 × 10 ¹⁵ / cm ² , and the acceleration voltage is, for example, about 10 keV to 100 keV. In the portion covered with the resist 26, the nch-TFT 7 for pixel switching is formed in the previous step.

Next, the resist 25 and the resist 26 are peeled off, and the dopant injected into the semiconductor thin film 3 is activated. The activation process is performed using, for example, laser annealing. Then, after the activation processing, as shown in FIG.
By plasma CVD method, SiO ₂ is, for example, 100 nm to
With a thickness of 400 nm, a SiN _x film is further added, for example 100
The film is continuously formed with a thickness of nm to 400 nm to form an interlayer insulating film 13 and a passivation film 14, respectively. Then, hydrogenation annealing is performed in a nitrogen atmosphere at a temperature of, for example, 350 ° C. to 400 ° C. for about 1 hour.

Finally, contact holes are opened in the interlayer insulating film 13 and the passivation film 14 and a metal such as A1-Si is sputtered and then patterned to form the wiring electrode 15.
To process. Next, add acrylic organic resin to approximately 1 μm
It is applied to form the flattening film 16. Then, after forming a contact hole in the flattening film 16 for making contact with the pixel electrode, a transparent conductive film such as ITO or IZO is formed by sputtering and patterned to form the pixel electrode 17. The transparent conductive film is annealed in a nitrogen atmosphere at a temperature of about 220 ° C. for 30 minutes to complete an active matrix type display device substrate as shown in FIG.

FIG. 2 produced by such a process
In the active matrix type display device substrate shown in FIG. 8, the gate oxide film 4 made of silicon oxide of the pch-TFT 6 and the nch-TFT 7 is densified and formed. As a result, the pch-TFT 6 and nc
In the h-TFT 7, the fixed charges in the film and the defect levels in the gate oxide film 4 are reduced, and as a result, it is realized that the variation of the threshold voltage is reduced and the hot carrier breakdown voltage is improved. A high quality gate oxide film 14 is formed on an insulating substrate 1 made of low melting point glass.
In addition, with the miniaturization and high performance of the device, the gate oxide film 4
Even when the thickness is reduced, it is possible to realize a gate oxide film having good withstand voltage characteristics without causing a problem of lowering withstand voltage.

In the active matrix type display device substrate shown in FIG. 28 manufactured by such a process, the pch-TFT 6 and the nch-TFT 7 are provided.
However, since element isolation is performed by the field oxide film 8 called LOCOS structure, and the field oxide film 8 is formed thicker than the film thickness of the gate oxide film 4, the source / drain regions and the gate lines, signal lines, etc. It is separated from the upper wiring by an appropriate distance.

As a result, the pch-TFTs 6 and n
In the ch-TFT 7, the distance between the source / drain region and the upper wiring becomes short even when the thin film transistor is miniaturized, as in the first embodiment,
Parasitics associated with shortening the distance between the source / drain region and the upper wiring, such as the parasitic capacitance between the gate / source and the gate / drain, the parasitic capacitance between the source / drain and the wiring, and between the signal line and the gate line. The capacity is prevented from increasing. As a result, even when it is used in a liquid crystal display device or an organic electroluminescence display device, for example, noise jumps through the parasitic capacitance due to an increase in the parasitic capacitance and becomes noise on an image, and It is possible to prevent an increase in load at the time of driving the circuit at a high frequency due to the increase in the capacity, which prevents the circuit from being speeded up and consuming less power. Further, in the active matrix type display device substrate shown in FIG. 28 manufactured by such a process, the field oxide film 8 is formed thick while the gate oxide film 4 is formed thin. It is possible to reduce the parasitic capacitance without reducing the On current.
That is, it is possible to achieve high-speed circuits and low power consumption while providing good image quality.

Due to the above-mentioned effects, this pch-TFT
In 6 and nch-TFT 7, a high-performance thin film transistor which realizes both miniaturization, improvement in image quality of a display device, high speed driving, and low power consumption has been realized.

In the above-described embodiment, high-pressure steam annealing in which a mixed atmosphere of steam and oxygen is used when forming the gate oxide film 4, but the present invention is not limited to this. Alternatively, oxygen gas or a mixture of oxygen gas and hydrogen gas may be used. The densified gate oxide film 14 thus obtained has a high quality and can maintain a good interface with the channel region on the back gate side (upper side) of the TFT having a bottom gate structure.

Further, in the above, the case where the thin film transistor is formed on the low melting point glass substrate as the insulating substrate 1 has been described, but in the present invention, the insulating substrate is not limited to the glass substrate, and alumina, ceramics Materials such as can be used, and can be appropriately changed depending on various conditions such as intended use.

A resin substrate such as a plastic substrate may be used as the insulating substrate 1. in this case,
By forming a thin film transistor having the above-described configuration on, for example, a glass substrate and transferring the thin film transistor on a plastic substrate, a thin film transistor using, for example, a plastic substrate as an insulating substrate can be configured.

FIG. 29 is a schematic perspective view showing an example of an active matrix type liquid crystal display device assembled by using a driving substrate manufactured by applying the present invention. As shown in the figure, the display device includes a pair of insulating substrates 201 and 201.
02, and an electro-optic material 203 held between the two. A liquid crystal material is used as the electro-optical material 203. A pixel array section 204 and a drive circuit section are integrally formed on the lower insulating substrate 201. The drive circuit unit is divided into a vertical drive circuit 205 and a horizontal drive circuit 206. A terminal portion 207 for external connection is formed on the upper end of the peripheral portion of the insulating substrate 201. The terminal portion 207 is connected to the vertical drive circuit 205 and the horizontal drive circuit 206 via the wiring 208. In the pixel array section 204, row-shaped gate wirings 209 and column-shaped signal wirings 210 are formed. A pixel electrode 211 and a thin film transistor T that drives the pixel electrode 211 are provided at the intersection of both wirings.
FT is formed. The gate electrode of the thin film transistor TFT is connected to the corresponding gate wiring 109, the drain region is connected to the corresponding pixel electrode 211, and the source region is connected to the corresponding signal wiring 210. The gate wiring 109 is connected to the vertical driving circuit 205, while the signal wiring 210 is connected to the horizontal driving circuit 206.

The thin film transistor TFT for switching and driving the pixel electrode 211 and the thin film transistor TFT included in the vertical drive circuit 205 and the horizontal drive circuit 206 are manufactured by applying the present invention. That is, in manufacturing a thin film transistor having a laminated structure including a semiconductor thin film, an oxide film, and a gate electrode, a semiconductor thin film forming step of forming a semiconductor thin film made of polycrystalline silicon on an insulating substrate, and a semiconductor thin film On the other hand, an oxide film forming step of forming an oxide film on the semiconductor thin film by performing a heat treatment in a pressurized atmosphere of a gas containing oxygen atoms, and containing an oxygen atom in the semiconductor thin film on which the oxide film is formed It is manufactured by performing a local oxidation step of locally oxidizing the semiconductor thin film by performing heat treatment in a pressurized atmosphere of gas.

That is, in the thin film transistor TFT for switching-driving the pixel electrode 211 manufactured as described above and the thin film transistor TFT included in the vertical drive circuit 205 and the horizontal drive circuit 206, the gate oxide film made of silicon oxide is densified. ing. As a result, in the thin film transistor TFT that drives the pixel electrode 211 for switching, and in the thin film transistor TFT included in the vertical drive circuit 205 and the horizontal drive circuit 206, the fixed charge in the film and the defect level of the gate oxide film are reduced. Reduction of variations in threshold voltage and improvement of hot carrier breakdown voltage are realized, and a high-quality gate oxide film is formed on an insulating substrate made of glass.

Further, a thin film transistor TFT for switching and driving the pixel electrode 211 and a thin film transistor TFT included in the vertical drive circuit 205 and the horizontal drive circuit 206.
In this case, since element isolation is performed by a field oxide film called LOCOS structure, and this field oxide film is formed thicker than the film thickness of the gate oxide film, the source / drain regions and upper wirings such as gate lines and signal lines are formed. Are separated by an appropriate distance. This prevents the parasitic capacitance from increasing accompanying the shortening of the distance between the source / drain region and the upper wiring. Further, since the field oxide film is formed thick while the gate oxide film is formed thin, it is possible to reduce the parasitic capacitance without reducing the On current of the thin film transistor. As a result, it is possible to achieve high-speed circuits and low power consumption while providing good image quality.

Therefore, the thin film transistor TFT for switching and driving the pixel electrode 211 and the vertical drive circuit 2
05 and the thin film transistor TFT included in the horizontal drive circuit 206 realizes a high-performance thin film transistor that achieves both miniaturization, improvement in image quality of a display device, high speed driving, and low power consumption.

FIG. 30 is a schematic sectional view showing an example of an electroluminescence display device in which thin film transistors manufactured by applying the present invention are formed in an integrated manner. In this electroluminescence display device, an organic electroluminescence element OLED301 is used as a pixel. The OLED 301 is composed of an anode 302, an organic layer 303, and a cathode 306, which are sequentially stacked. The anode 302 is separated for each pixel, and is made of, for example, chrome and is basically light reflective. The cathode 306 is commonly connected between pixels, and has, for example, a laminated structure of an extremely thin metal layer 304 and a transparent conductive layer 305, and is basically light transmissive. When a forward voltage (about 10 V) is applied between the anode 302 and the cathode 306 of the OLED 301 having such a configuration, carriers such as electrons and holes are injected, and light emission is observed. OLED
The holes are injected from the anode 302 and the cathode 306.
It is considered that the light is emitted by excitons formed by the electrons injected from.

On the other hand, the thin film transistor TFT 311 for driving the OLED has the gate electrode 15 formed on the substrate 11 made of glass, the gate insulating film 312 overlying the gate electrode 15, and the gate insulating film 312. The semiconductor thin film 13 is formed above the gate electrode 15. The thin film transistor TFT 311 is the OLED 30.
1 has a source region S, a channel region Ch, and a drain region D, which serve as a passage for a current supplied to the device 1. The channel region ch is located just above the gate electrode 15. A thin film transistor TFT31 having this bottom gate structure
1 is covered with an interlayer insulating film 24, on which a wiring electrode 26 and a drain electrode 313 are formed. The OLED 301 described above is formed on these via another interlayer insulating film 25. This OLED30
The first anode 302 is electrically connected to the thin film transistor TFT 311 via the drain electrode 313.

In the above, the thin film transistor TFT3
Since No. 11 is manufactured by applying the present invention, the gate oxide film made of silicon oxide is densely formed. Accordingly, in the thin film transistor TFT311,
The fixed charges and defect levels in the gate oxide film are reduced. As a result, variations in threshold voltage are reduced, hot carrier breakdown voltage is improved, and high-quality gate oxidation is performed on an insulating substrate made of glass. A film is formed.

In the thin film transistor TFT 311, element isolation is performed by the field oxide film 8 having a LOCOS structure, and the field oxide film 8 is formed thicker than the gate oxide film.
The drain region and the upper wiring such as the gate line and the signal line are separated by an appropriate distance. This prevents the parasitic capacitance from increasing accompanying the shortening of the distance between the source / drain region and the upper wiring. Further, since the field oxide film 8 is formed thick while the gate oxide film 4 is formed thin, it is possible to reduce the parasitic capacitance without reducing the On current of the thin film transistor. As a result, it is possible to achieve high-speed circuits and low power consumption while providing good image quality.

Therefore, the thin film transistor TFT31
In No. 1, a high-performance thin film transistor that realizes both miniaturization, improvement in image quality of a display device, high speed driving, and low power consumption has been realized.

FIG. 31 is a schematic perspective view showing an example of a portable information terminal device incorporating the display device shown in FIG. 29 or 30. Personal digital assistant (PDA) 401
Is divided into an information processing unit 410 and a display unit 420. The information processing unit 410 has basic functions as a PDA such as a communication unit, a voice processing unit, an operation unit, a control unit, and a storage unit. By controlling these functions by the control unit, a telephone function, a mail function, a personal computer function, a personal computer communication function, a personal information management function, etc. are realized. Further, the information processing unit 410 includes an operation unit 411, and by operating the operation unit 411, various functions can be selected. The information processing unit 410 generates image information according to the processing content to be executed. The display unit 420 is the information processing unit 410.
The image information generated by is displayed on the display panel. This display panel is the liquid crystal panel shown in FIG. 29 or the electroluminescence panel shown in FIG. 30 manufactured by applying the present invention. In such portable information terminal devices, miniaturization of products is particularly promoted in order to improve portability. The PDA does not necessarily require a keyboard like a personal computer, so it can be made very small. In the electronic device miniaturized in this way, as a display unit for displaying the processing result of the image information, as shown in FIG.
The high performance and high definition display panel shown in FIG. 9 or FIG. 30 is suitable.

FIG. 32 is a schematic plan view showing an example of a portable telephone device incorporating a display manufactured by applying the present invention. As shown, the mobile phone device 50
1 includes an antenna 502 for wireless transmission / reception, a receiver (speaker) 503, a transmitter (microphone) 504, and operation keys 505 such as dial keys and a display panel 506. The display panel 506 is manufactured by applying the present invention to FIG.
It is the liquid crystal panel shown in or the electroluminescence panel shown in FIG. This mobile phone device 501
Can display phonebook information such as personal name and phone number on display 506. Further, the received e-mail can be displayed on the display 506. Similar to PDAs, mobile phone devices have been particularly promoted to be miniaturized in order to improve portability. And
In the portable telephone device thus downsized, as a display unit for displaying the processing result of the character information and the image information, as shown in FIG.
The high performance and high definition display panel shown in FIG. 9 or FIG. 30 is suitable.

[0100]

The method of manufacturing a thin film transistor according to the present invention is a method of manufacturing a thin film transistor having a laminated structure including a semiconductor thin film, an oxide film, and a gate electrode, and a semiconductor thin film made of polycrystalline silicon on an insulating substrate. A semiconductor thin film forming step of forming an oxide film on the semiconductor thin film by heat-treating the semiconductor thin film in a pressurized atmosphere of a gas containing oxygen atoms, A local oxidation step of locally oxidizing the semiconductor thin film by heat-treating the semiconductor thin film on which the film is formed in a pressurized atmosphere of a gas containing oxygen atoms.

In the method of manufacturing a thin film transistor according to the present invention as described above, it is possible to reliably densify the oxide film even in a low temperature process, and further, the LOCOS.
An element region can be formed by element isolation by a field oxide film called a structure, and the source / drain region and the upper wiring can be separated by an appropriate distance. Thereby, in the method of manufacturing a thin film transistor according to the present invention, miniaturization and image quality improvement of the display device,
It is possible to provide a high-performance thin film transistor that achieves both high-speed driving and low power consumption.

Further, in the method for manufacturing a liquid crystal display device according to the present invention, the first substrate on which the pixel electrode and the thin film transistor for driving the pixel electrode are arranged, and the second substrate on which the electrode facing the pixel electrode is arranged. And a liquid crystal display device in which the thin film transistor has a laminated structure including a semiconductor thin film, an oxide film, and a gate electrode. A manufacturing method, comprising: a semiconductor thin film forming step of forming a semiconductor thin film made of polycrystalline silicon on the first substrate; and heat-treating the semiconductor thin film in a pressurized atmosphere of a gas containing oxygen atoms. An oxide film forming step of forming an oxide film on the semiconductor thin film by the method, and heat-treating the semiconductor thin film having the oxide film formed thereon under a pressurized atmosphere of a gas containing oxygen atoms. In which and a local oxidation step of locally oxidizing the semiconductor thin film by performing.

In the method of manufacturing a liquid crystal display device according to the present invention as described above, when manufacturing a thin film transistor, the oxide film can be surely densified even in a low temperature process, and is called a LOCOS structure. The element region can be formed by element isolation by the field oxide film, and the source / drain region and the upper wiring can be separated by an appropriate distance. As a result, in the method for manufacturing a liquid crystal display device according to the present invention, it is possible to provide a high-performance liquid crystal display device in which the image quality of the display device is improved, the driving speed is increased, and the power consumption is reduced. .

Further, in the method for manufacturing an electroluminescence display device according to the present invention, an electroluminescence element and a thin film transistor for driving the electroluminescence element are arranged on an insulating substrate, and the thin film transistor includes a semiconductor thin film, an oxide film and a gate electrode. A method for manufacturing an electroluminescent display device having a laminated structure, comprising a semiconductor thin film forming step of forming a semiconductor thin film made of polycrystalline silicon on the insulating substrate, and a gas containing oxygen atoms for the semiconductor thin film. An oxide film forming step of forming an oxide film on the semiconductor thin film by performing heat treatment in a pressurized atmosphere, and a pressurized atmosphere of a gas containing oxygen atoms for the semiconductor thin film on which the oxide film is formed. And a local oxidation step of locally oxidizing the semiconductor thin film by performing heat treatment.

In the method for manufacturing an electroluminescent display device according to the present invention as described above, when manufacturing a thin film transistor, the oxide film can be surely densified even in a low temperature process, and further, a LOCOS structure is obtained. A so-called field oxide film can be used for element isolation to form an element region, and the source / drain regions can be separated from the upper wiring at an appropriate distance. As a result, in the method for manufacturing an electroluminescent display device according to the present invention, it is possible to provide a high-performance electroluminescent display device in which image quality improvement, high speed driving, and low power consumption of the display device are realized. To be done.

Further, the thin film transistor according to the present invention is
A thin film transistor having a laminated structure including a semiconductor thin film, an oxide film, and a gate electrode, wherein the semiconductor thin film is made of polycrystalline silicon formed on an insulating substrate, and the oxide film is formed on the semiconductor thin film. On the other hand, the semiconductor thin film is formed on the semiconductor thin film by performing heat treatment in a pressurized atmosphere of a gas containing oxygen atoms, and the semiconductor thin film on which the oxide film is formed is locally oxidized on the insulating substrate. The element region is formed by the formed field oxide film.

In the thin film transistor according to the present invention as described above, the oxide film is surely densified, and further, L
An element region is formed by element isolation by a field oxide film called an OCOS structure, and the source / drain region and the upper wiring are separated by an appropriate distance. Accordingly, in the thin film transistor according to the present invention, miniaturization, improvement in image quality of the display device, high speed driving,
A high-performance thin film transistor that achieves both low power consumption and low power consumption is realized.

Further, in the liquid crystal display device according to the present invention, the first substrate on which the pixel electrode and the thin film transistor for driving the pixel electrode are arranged, and the second substrate on which the electrode facing the pixel electrode is arranged.
A liquid crystal display having a laminated structure in which the thin film transistor includes a semiconductor thin film, an oxide film, and a gate electrode. In the apparatus, the semiconductor thin film is made of polycrystalline silicon formed on the first substrate, and the oxide film is heat-treated in a pressurized atmosphere of a gas containing oxygen atoms. The element region is formed by the field oxide film formed on the semiconductor thin film by performing local oxidation of the semiconductor thin film on which the oxide film is formed on the first substrate. is there.

Since the liquid crystal display device according to the present invention as described above is provided with the thin film transistor in which the oxide film is surely densified and the element region is formed by the element isolation by the field oxide film called LOCOS structure, A high-performance liquid crystal display device in which the image quality of the display device is improved, the driving speed is increased, and the power consumption is reduced is realized.

In the electroluminescence display device according to the present invention, the electroluminescence element and the thin film transistor for driving the electroluminescence element are arranged on the insulating substrate, and the thin film transistor has a laminated structure including a semiconductor thin film, an oxide film and a gate electrode. In the electroluminescence display device having, the semiconductor thin film is made of polycrystalline silicon formed on the insulating substrate, and the oxide film is a pressurized atmosphere of a gas containing oxygen atoms with respect to the semiconductor thin film. An element region is formed by a field oxide film formed on the semiconductor thin film by performing a heat treatment below and locally oxidizing the semiconductor thin film on which the oxide film is formed on the first substrate. It will be.

The electroluminescent display device according to the present invention as described above is provided with the thin film transistor in which the oxide film is surely densified and the element region is formed by element isolation by the field oxide film called LOCOS structure. Therefore, a high-performance electroluminescent display device in which the image quality of the display device is improved, the driving speed is increased, and the power consumption is reduced can be realized.

As described above, according to the present invention, a high-performance thin film transistor can be formed on a large-area glass substrate, so that a high-performance circuit is integrated on a display panel.
It can greatly contribute to the realization of a so-called system display.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a thin film transistor substrate according to a first embodiment.

FIG. 2 is a cross-sectional view showing a conventional thin film transistor substrate.

FIG. 3 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the first embodiment.

FIG. 4 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the first embodiment.

FIG. 5 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the first embodiment.

FIG. 6 is a schematic diagram showing an example of a high-pressure steam oxidation treatment device.

FIG. 7 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the first embodiment.

FIG. 8 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the first embodiment.

FIG. 9 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the first embodiment.

FIG. 10 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the first embodiment.

FIG. 11 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the first embodiment.

FIG. 12 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the first embodiment.

FIG. 13 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the first embodiment.

FIG. 14 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the first embodiment.

FIG. 15 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the first embodiment.

FIG. 16 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the first embodiment.

FIG. 17 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the first embodiment.

FIG. 18 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the second embodiment.

FIG. 19 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the second embodiment.

FIG. 20 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the second embodiment.

FIG. 21 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the second embodiment.

FIG. 22 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the second embodiment.

FIG. 23 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the second embodiment.

FIG. 24 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the second embodiment.

FIG. 25 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the second embodiment.

FIG. 26 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the second embodiment.

FIG. 27 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the second embodiment.

FIG. 28 is a diagram illustrating a manufacturing process of the thin film transistor substrate according to the second embodiment.

FIG. 29 is a schematic perspective view showing an example of a liquid crystal display device using a thin film transistor manufactured by applying the present invention.

FIG. 30 is a partial cross-sectional view showing an example of an electroluminescence display device incorporating a thin film transistor manufactured by applying the present invention.

FIG. 31 is a schematic perspective view showing an example of a portable information terminal device incorporating a display device according to the present invention.

FIG. 32 is a schematic plan view showing an example of a mobile phone device incorporating the display device according to the present invention.

[Explanation of symbols]

1 insulating substrate 2a, 2b buffer layer (gate nitride film, gate oxide film) 3 semiconductor thin film 4 gate oxide film 5 gate electrode 6 pch-TFT 7 nch-TFT 8 field oxide film 9 low oxidation rate layer

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H01L 21/76 H01L 21/94 A 5F110 27/08 331 21/76 MF term (reference) 2H092 JA26 JA34 JA46 JB57 JB58 KA04 MA08 MA17 MA25 MA27 MA30 NA05 NA26 4M108 AA15 AA20 AB04 AB10 AB13 AB14 AC01 AC12 AC13 AC16 AC21 AC54 AD13 AD16 5F032 AA09 AA13 BB01 CA17 DA03 DA04 DA53 DA74 5B02 BC02 BA01 BC01 BA14 BC01 BA01 BC01 BA01 BC16 BA16 BB06 BB06 BB06 BB06 BB06 BB06 BB06 BB06 BB06 BB06 BB06 BB06 BB06 BB06 BB06 BB06 BB06 BB06 BB06 BB06 BB06 BB06 BB BB BB BF BB BB BB BB FB BB BB FB BB BB BB BB BB BB BB BB BB BB FB BB FB B BB FB B BB FB B DB02 DB03 EA15 JA01 5F110 AA01 AA09 AA17 AA28 BB02 BB04 CC02 CC08 DD01 DD02 DD07 DD13 DD14 DD17 EE02 EE03 EE04 EE06 EE09 FF02 FF03 FF09 FF23 NN72NN NN23 NN23 NN23 HL23J04 NN2523J04 NN23 PP02 PP03 PP04 PP35 QQ09 QQ16 QQ23 QQ30

Claims (33)

[Claims] 1. A method of manufacturing a thin film transistor having a laminated structure including a semiconductor thin film, an oxide film, and a gate electrode, which comprises a semiconductor thin film forming step of forming a semiconductor thin film made of polycrystalline silicon on an insulating substrate. An oxide film forming step of forming an oxide film on the semiconductor thin film by performing a heat treatment on the semiconductor thin film under a pressure atmosphere of a gas containing oxygen atoms, and forming the oxide film on the semiconductor thin film. On the other hand, a local oxidation step of locally oxidizing the semiconductor thin film by performing heat treatment in a pressurized atmosphere of a gas containing oxygen atoms is provided. 2. The local oxidation step includes a low oxidation rate layer forming step of forming a low oxidation rate layer having a lower oxidation rate than the oxide film on the oxide film, and the low oxidation rate for the semiconductor thin film. The method of manufacturing a thin film transistor according to claim 1, further comprising a thermal oxidation step of locally oxidizing the semiconductor thin film by performing heat treatment in a pressurized atmosphere of a gas containing oxygen atoms using the layer as an oxidation mask. 3. The low oxidation rate layer forming step includes a film forming step of forming a low oxidation rate film having a lower oxidation rate than the oxide film on the oxide film, and the film forming step. 3. A method of manufacturing a thin film transistor according to claim 2, further comprising a patterning step of patterning the low oxidation rate film into a predetermined pattern. 4. The method of manufacturing a thin film transistor according to claim 1, further comprising an annealing step of performing heat treatment in a dry atmosphere after the thermal oxidation step. 5. The method of manufacturing a thin film transistor according to claim 4, wherein the dry atmosphere is any one of an oxygen atmosphere, an air atmosphere, a nitrogen atmosphere, an inert gas atmosphere, and a vacuum atmosphere. 6. A gate electrode forming step of forming a gate electrode in advance on the insulating substrate before the semiconductor thin film forming step, wherein the semiconductor thin film forming step includes a gate insulating film on the gate electrode. 2. The method of manufacturing a thin film transistor according to claim 1, wherein the semiconductor thin film is formed by forming the oxide film on the semiconductor thin film, and the oxide film forming step forms the oxide film on the semiconductor thin film. 7. The method of manufacturing a thin film transistor according to claim 1, wherein the insulating substrate is a glass substrate. 8. A first substrate on which a pixel electrode and a thin film transistor for driving the pixel electrode are arranged, and a second substrate on which an electrode facing the pixel electrode is arranged are opposed to each other with a predetermined gap. A method of manufacturing a liquid crystal display device having a display panel in which liquid crystal is held at the intervals, and the thin film transistor having a laminated structure including a semiconductor thin film, an oxide film, and a gate electrode, wherein the first substrate is A semiconductor thin film forming step for forming a semiconductor thin film made of polycrystalline silicon, and an oxidation for forming an oxide film on the semiconductor thin film by heat-treating the semiconductor thin film under a pressure atmosphere of a gas containing oxygen atoms. The film formation step and the semiconductor thin film on which the oxide film has been formed are locally oxidized by performing heat treatment in a pressurized atmosphere of a gas containing oxygen atoms. A method of manufacturing a liquid crystal display device, comprising: 9. The low oxidation rate layer forming step of forming a low oxidation rate layer having an oxidation rate lower than that of the oxide film on the oxide film, the local oxidation step, and the low oxidation rate of the semiconductor thin film. 9. The liquid crystal display device according to claim 8, further comprising: a thermal oxidation step of locally oxidizing the semiconductor thin film by performing heat treatment in a pressurized atmosphere of a gas containing oxygen atoms using the layer as an oxidation mask. Method. 10. The low oxidation rate layer forming step comprises a film forming step of forming a low oxidation rate film having an oxidation rate lower than that of the oxide film on the oxide film, and the film forming step. 10. The method for manufacturing a liquid crystal display device according to claim 9, further comprising a patterning step of patterning the low oxidation rate film into a predetermined pattern. 11. The method of manufacturing a liquid crystal display device according to claim 8, further comprising an annealing step of performing heat treatment in a dry atmosphere after the thermal oxidation step. 12. The method for manufacturing a liquid crystal display device according to claim 11, wherein the dry atmosphere is any one of an oxygen atmosphere, an air atmosphere, a nitrogen atmosphere, an inert gas atmosphere, and a vacuum atmosphere. 13. A gate electrode forming step of forming a gate electrode in advance on the first substrate before the semiconductor thin film forming step, the semiconductor thin film forming step including a gate insulating film on the gate electrode. 9. The method for manufacturing a liquid crystal display device according to claim 8, wherein the semiconductor thin film is formed by forming the semiconductor thin film, and the oxide film forming step forms the oxide film on the semiconductor thin film. 14. The method of manufacturing a liquid crystal display device according to claim 8, wherein the first substrate is a glass substrate. 15. An electroluminescent element and a thin film transistor for driving the electroluminescent element are arranged on an insulating substrate,
A method for manufacturing an electroluminescent display device, wherein the thin film transistor has a laminated structure including a semiconductor thin film, an oxide film, and a gate electrode, and a semiconductor thin film forming step of forming a semiconductor thin film made of polycrystalline silicon on the insulating substrate. An oxide film forming step of forming an oxide film on the semiconductor thin film by performing a heat treatment on the semiconductor thin film under a pressure atmosphere of a gas containing oxygen atoms, and forming the oxide film on the semiconductor thin film. On the other hand, a local oxidation step of locally oxidizing the semiconductor thin film by performing heat treatment in a pressurized atmosphere of a gas containing oxygen atoms is provided, and a method for manufacturing an electroluminescence display device. 16. The low oxidation rate layer forming step of forming a low oxidation rate layer having an oxidation rate lower than that of the oxide film on the oxide film, the local oxidation step, and the low oxidation rate of the semiconductor thin film. 16. The electroluminescence display device according to claim 15, further comprising: a thermal oxidation step of locally oxidizing the semiconductor thin film by performing heat treatment in a pressurized atmosphere of a gas containing oxygen atoms using the layer as an oxidation mask. Production method. 17. The low oxidation rate layer forming step includes a film forming step of forming a low oxidation rate film having a lower oxidation rate than the oxide film on the oxide film, and a film forming step of the film forming step. 17. A method of manufacturing an electroluminescent display device according to claim 16, further comprising a patterning step of patterning the low oxidation rate film into a predetermined pattern. 18. The method for manufacturing an electroluminescent display device according to claim 15, further comprising an annealing step of performing heat treatment in a dry atmosphere after the thermal oxidation step. 19. The method for manufacturing an electroluminescent display device according to claim 18, wherein the dry atmosphere is any one of an oxygen atmosphere, an air atmosphere, a nitrogen atmosphere, an inert gas atmosphere, and a vacuum atmosphere. 20. A gate electrode forming step of forming a gate electrode on the insulating substrate in advance before the semiconductor thin film forming step, the semiconductor thin film forming step including a gate insulating film on the gate electrode. 16. The method for manufacturing an electroluminescent display device according to claim 15, wherein the semiconductor thin film is formed by using the above method, and the oxide film forming step forms the oxide film on the semiconductor thin film. 21. The method of manufacturing an electroluminescent display device according to claim 15, wherein the insulating substrate is a glass substrate. 22. A thin film transistor having a laminated structure including a semiconductor thin film, an oxide film, and a gate electrode, wherein the semiconductor thin film is made of polycrystalline silicon formed on an insulating substrate, and the oxide film is The semiconductor thin film is formed on the semiconductor thin film by heat-treating the semiconductor thin film in a pressurized atmosphere of a gas containing oxygen atoms, and the oxide film is formed on the insulating substrate. 1. A thin film transistor, wherein an element region is formed by a field oxide film formed by locally oxidizing a. 23. The thin film transistor according to claim 22, wherein the local oxidation is a heat treatment in a pressurized atmosphere of a gas containing oxygen atoms. 24. The thin film transistor according to claim 22, wherein the insulating substrate is a glass substrate. 25. The semiconductor thin film is formed on the gate electrode previously formed on the insulating substrate via a gate insulating film, and the oxide film is formed on the semiconductor thin film. 23. The thin film transistor according to claim 22, wherein: 26. A first substrate on which a pixel electrode and a thin film transistor for driving the pixel electrode are arranged, and a second substrate on which an electrode facing the pixel electrode is arranged are opposed to each other with a predetermined gap. And a liquid crystal display device having a display panel in which liquid crystal is held at the intervals, and the thin film transistor has a laminated structure including a semiconductor thin film, an oxide film, and a gate electrode, wherein the semiconductor thin film is the first thin film. The oxide film is made of polycrystalline silicon formed on a substrate, and the oxide film is formed on the semiconductor thin film by heat-treating the semiconductor thin film in a pressurized atmosphere of a gas containing oxygen atoms. On the substrate, the element region is formed by a field oxide film formed by locally oxidizing the semiconductor thin film having the oxide film formed thereon. Place 27. The liquid crystal display device according to claim 26, wherein the local oxidation is a heat treatment in a pressurized atmosphere of a gas containing oxygen atoms. 28. The liquid crystal display device according to claim 26, wherein the insulating substrate is a glass substrate. 29. The semiconductor thin film is formed on the gate electrode previously formed on the insulating substrate via a gate insulating film, and the oxide film is formed on the semiconductor thin film. 27. The liquid crystal display device according to claim 26. 30. An electroluminescent element and a thin film transistor for driving the electroluminescent element are arranged on an insulating substrate,
The thin film transistor is an electroluminescent display device having a laminated structure including a semiconductor thin film, an oxide film, and a gate electrode, wherein the semiconductor thin film is made of polycrystalline silicon formed on the insulating substrate, and the oxide film is The semiconductor thin film is formed on the semiconductor thin film by heat-treating the semiconductor thin film in a pressurized atmosphere of a gas containing oxygen atoms, and the oxide film is formed on the first substrate. 2. An electroluminescence display device, wherein an element region is formed by a field oxide film formed by locally oxidizing the. 31. The electroluminescent display device according to claim 30, wherein the local oxidation is a heat treatment under a pressure atmosphere of a gas containing oxygen atoms. 32. The electroluminescent display device according to claim 30, wherein the insulating substrate is a glass substrate. 33. The semiconductor thin film is formed on the gate electrode previously formed on the insulating substrate via a gate insulating film, and the oxide film is formed on the semiconductor thin film. 31. The electroluminescent display device according to claim 30.