JP4824360B2 - Power converter - Google Patents

Description

  The present invention relates to a power converter, and particularly to a technique for obtaining a smooth AC output waveform while suppressing zero-phase noise current.

  In a magnetically levitated railway using a linear synchronous motor (LSM) as a drive source, a variable voltage variable frequency power converter for flowing an alternating current according to the thrust of the LSM is required.

  In that case, since the zero-phase noise current flowing through the stray capacitance of the three-phase cable causes a communication failure, it is necessary to suppress such a zero-phase noise current. In order to suppress such a zero-phase noise current, it is possible to cope with this by providing a zero-phase common mode filter, but providing a filter is not a good idea because it causes an extra cost increase.

  Therefore, in the conventional technique, the AC sides of a plurality of single-phase inverters (Va inverter, Vb inverter, Vc inverter) are connected in series, and the output voltage of each phase is gradation controlled by the combination of each selected single-phase inverter. In the three-phase power converter, when the AC phase voltage enters the ± 30 ° phase range centered on zero, the AC phase voltage is a value obtained by reversing the sign relative to the sum of the other two-phase gradation value commands. There has been proposed a technique in which zero-phase voltage is set to zero to suppress zero-phase noise current flowing from a neutral point and reduce electromagnetic noise (see, for example, Patent Document 1 and Non-Patent Document 1).

JP 2004-120968 A 2004 Institute of Electrical Engineers Industry Application Division Conference, No. 3-33 (2004): "Zero-phase noise cancellation in transformerless gradation control inverter for magnetic levitation railway"

  As described above, the conventional power conversion device performs the zero-phase cancellation control that suppresses the zero-phase noise current by setting the zero-phase voltage to zero. In this control, the voltage of the output circuit is low in the low-output low-frequency region. Becomes small and a sufficient number of gradations cannot be obtained, and as a result, current is distorted. For this reason, in the prior art, PWM control is used in combination with zero-phase cancel control for current distortion correction in a low output low frequency region.

  However, since the zero-phase cacel control and the PWM current control have been performed completely separately in the past, current distortion is still likely to occur due to the zero-phase cacel control, especially in the low-frequency region where PWM is output, and current distortion is suppressed. There is a problem that it is still insufficient to do.

  The present invention has been made in order to solve the above-described problems. The zero-phase noise current is controlled by the zero-phase cancellation control so that the zero-phase cancel control and the PWM current control can be performed more smoothly and coordinated than before. An object of the present invention is to provide a power converter capable of reducing electromagnetic wave noise by suppressing noise and effectively suppressing occurrence of current distortion in a low frequency region.

  A power conversion device according to the present invention (Claim 1) combines a three-phase three-level inverter that outputs a three-phase voltage from a DC power supply and a plurality of single-phase inverters connected in series with each phase to power a three-phase load. Supply. In this case, there is a control device that controls the output voltage of each phase by the sum of the voltage of each phase of the three-phase three-level inverter and each generated voltage by a predetermined combination selected from the plurality of single-phase inverters. The control device selects, for the three-phase AC voltage command vector, four spatial voltage vectors in which the sum of the three-phase voltages in the vicinity is zero, and uses the three-phase AC voltage command vector as the four spatial voltage commands. It is characterized by outputting a voltage that makes the current waveform sinusoidal while making the zero-phase voltage zero by expressing it as a time average according to the distance from the vector.

  The power conversion device according to the present invention (Claim 2) combines a three-phase three-level inverter that outputs a three-phase voltage from a DC power source and a plurality of single-phase inverters connected in series with each phase to power a three-phase load. Supply. In this case, there is a control device that controls the output voltage of each phase by the sum of the voltage of each phase of the three-phase three-level inverter and each generated voltage by a predetermined combination selected from the plurality of single-phase inverters. In this control device, the three-phase AC voltage command vector is coordinate-transformed into a two-phase AC voltage command vector, and the three-phase voltage sum in the vicinity of the two-phase AC voltage command vector is three spaces. By selecting a voltage vector and expressing the two-phase AC voltage command vector in terms of time average according to the distance from the three spatial voltage vectors, the voltage that makes the current waveform sinusoidal while making the zero-phase voltage zero is obtained. It is characterized by output.

  The power converter of the present invention (Claim 3) comprises a single-phase multiplex converter configured by connecting a plurality of AC sides of a single-phase inverter that converts DC power from a DC power source into AC power in series. The converter is three-phased to supply power to the three-phase load. In this case, a control device is provided that controls the output voltage of each phase based on the sum of the generated voltages based on a predetermined combination selected from the plurality of single-phase inverters constituting the single-phase multiple converter for each phase. The control device selects, for the three-phase AC voltage command vector, four spatial voltage vectors in which the sum of the three-phase voltages in the vicinity is zero, and uses the three-phase AC voltage command vector as the four spatial voltage vector. It is characterized by outputting a voltage that makes the current waveform sinusoidal while making the zero-phase voltage zero by expressing it by time averaging according to the distance from.

  The power converter of the present invention (Claim 4) comprises a single-phase multiplex converter in which a plurality of AC sides of a single-phase inverter that converts DC power from a DC power source into AC power are connected in series. The converter is three-phased to supply power to the three-phase load. In this case, it has a control device that controls the output voltage of each phase by the sum of the generated voltages by a predetermined combination selected from the plurality of single-phase inverters in the single-phase multiple converter for each phase, The control device coordinate-transforms the three-phase AC voltage command vector into a two-phase AC voltage command vector, and, for this two-phase AC voltage command vector, three spatial voltage vectors whose total three-phase voltages in the vicinity are zero are obtained. By selecting and expressing the two-phase AC voltage command vector in a time-averaged manner according to the distance from the three spatial voltage vectors, a voltage that outputs a sinusoidal current waveform while making the zero-phase voltage zero is output. It is characterized by being.

  According to the present invention (Claim 1), four three-phase AC spatial voltage vectors are selected such that the total three-phase voltage close to the three-phase AC voltage command vector is zero. Then, by expressing the three-phase AC voltage command vector by time averaging according to the distances from these four spatial voltage vectors, a voltage that makes the current waveform sinusoidal while outputting the zero-phase voltage to zero is output. Thereby, both electromagnetic noise current and current distortion can be suppressed. In addition, by using a three-phase three-level inverter that outputs a three-phase voltage from a DC power supply, the number of units of the single-phase inverter can be reduced as a whole, and the configuration is simplified.

  According to the present invention (claim 2), the three-phase AC voltage command is coordinate-converted into a two-phase AC voltage command vector. Then, three two-phase AC spatial voltage vectors are selected that have a total three-phase voltage close to this two-phase AC voltage command vector. Then, by expressing the two-phase AC voltage command vector as a time average according to the distance from these three spatial voltage vectors, a voltage that makes the current waveform sine wave is output while the zero-phase voltage is zero. Thereby, both electromagnetic noise current and current distortion can be suppressed. In addition, by using a three-phase three-level inverter that outputs a three-phase voltage from a DC power supply, the number of units of the single-phase inverter can be reduced as a whole, and the configuration is simplified.

  Further, according to the present invention (Claim 3), four three-phase AC spatial voltage vectors with zero total three-phase voltage close to the three-phase AC voltage command vector are selected. Then, by expressing the three-phase AC voltage command vector by time averaging according to the distances from these four spatial voltage vectors, a voltage that makes the current waveform sinusoidal while outputting the zero-phase voltage to zero is output. Thereby, both electromagnetic noise current and current distortion can be suppressed.

  According to the present invention (Claim 4), the three-phase AC voltage command is coordinate-converted into a two-phase AC voltage command vector. Then, three two-phase AC spatial voltage vectors are selected that have a total three-phase voltage close to this two-phase AC voltage command vector. Then, by expressing the two-phase AC voltage command vector in a time-averaged manner according to the distance between these three spatial voltage vectors, a voltage that makes the current waveform sine wave while outputting the zero-phase voltage to zero is output. Thereby, both electromagnetic noise current and current distortion can be suppressed.

Embodiment 1 FIG.
1 is a block diagram showing a power converter for driving a three-phase load according to Embodiment 1 of the present invention.

  The power conversion device according to the first embodiment includes a three-phase three-level inverter 26. For each phase of the three-phase three-level inverter 26, Vb inverters 2, 8, and 14 that are single-phase inverters and Vc inverters 3, 9 are used. , 15 are connected in series. Each phase is star-connected and power is supplied to the three-phase loads 19-21. Further, the power conversion device includes a control device 50 that performs on / off control of the semiconductor switching elements constituting each inverter.

  The three-phase three-level inverter 26 and the single-phase inverters 2, 3, 8, 9, 14, and 15 rectify the AC power drawn from the system through the transformer and convert it to DC power, and then convert the DC power with a smoothing capacitor. The DC power from the smoothing capacitor is smoothed and converted into AC power, but here, for convenience, only the inverter unit composed of DC power supplies 4, 5, 6, 11, 12, 17, 18 and a switch group is used. Is illustrated. Reference numerals 22 and 23 denote a neutral point on the load side and a neutral point on the power conversion device side, respectively.

  The three-phase three-level inverter 26 and the single-phase inverters 2, 3, 8, 9, 14, and 15 are each composed of a plurality of self-extinguishing semiconductor switching elements such as IGBTs having diodes connected in antiparallel. It is composed of a full-bridge inverter and DC power supplies 4, 5, 6, 11, 12, 17, 18. As the self-extinguishing type semiconductor switching element, GCT, GTO, transistor, MOSFET, etc. can be applied in addition to the IGBT, and a thyristor without a self-extinguishing function can be used. Good.

  The three-phase three-level inverter 26 enables three-level voltage output using two DC power sources 4 that generate the same voltage Va. The single-phase inverters (Vb inverter, Vc inverter) 2, 3, 8, 9, 14, 15 are 3 with the voltages Vb, Vc of the DC power supplies 5, 11, 17, 6, 12, 18 as voltage sources, respectively. Output level voltage. Therefore, for example, when a relationship of Va, Vb, Vc = 7: 2: 1 is established, an output voltage (absolute value) of 11 gradations is obtained by combining these generated voltages.

  The relationship between the output logic of the three-phase three-level inverter 26 and each of the single-phase inverters 1 to 3, 7 to 9 and 13 to 15 and the output gradation (voltage level) obtained by combining them is shown in the logic table of FIG. . In this case, an output voltage (absolute value) of 11 gradations can be obtained by combining the output waveform of the three-level inverter 26 and each single-phase inverter and the voltage generated thereby, so that a very smooth output can be obtained as shown in FIG. A voltage gradation waveform can be generated.

  Thus, if the values of the voltages Va, Vb, and Vc are made different, it is advantageous because the output voltage gradation control can increase the output voltage multi-level. However, in terms of reducing the number of types of components, , Va, Vb, and Vc can be set to the same voltage.

  Further, in the first embodiment, the above-described control device 50 includes a main control circuit 51 and a high-precision waveform control circuit 52.

  FIG. 4 is a block diagram showing the configuration of the main control circuit 51 along the processing procedure. Here, since three-phase alternating current is handled in a two-phase coordinate system, first, the feedback value of each inverter current supplied to the three-phase loads 19 to 21 is converted into a three-phase two-phase conversion process (in the dq coordinate system) after A / D conversion. After conversion, the process proceeds to a voltage command value generation processing routine 90. In the voltage command value generation processing routine 90, in order to secure a target current value in the dq coordinate system input from the input unit 80 by feedback control from the inverter current of the system, two phases of the same αβ coordinate system as this dq coordinate system are used. AC voltage command vectors Vα * and Vβ * are output.

  Next, in the space vector zero-phase noise active cancel routine 100 in FIG. 4, in order not to generate the zero-phase voltage, three space voltages in which the sum of the three-phase voltages near the end point of the two-phase AC voltage command vector becomes zero. Grayscale voltage command that cancels zero-phase voltage by selecting a vector and assigning the time according to the distance between the end point of these spatial voltage vectors and the end point of two-phase AC voltage command vector to these spatial voltage vectors Is output. In the time limiter routine 110, once the switching state is changed, a time limiter process is performed so as not to change the switch state for a certain period of time. Thereafter, after two-phase three-phase conversion is performed by the two-phase three-phase conversion routine 120, the high-precision waveform control circuit 52 can easily process the three-phase voltage command value for gradation control in the inverter switching state determination routine 130. The state of each inverter is converted into bit information.

  FIG. 5 shows a processing flowchart inside the zero-phase noise active cancel space voltage vector routine 100. This outline will be described next.

  In the first nearest-neighbor zero-phase noise canceling spatial voltage vector selection routine 101, as shown in FIG. 8, the two-phase AC spatial voltage vector in which the sum of the three-phase voltages closest to the two-phase AC voltage command vector 106 is zero, that is, Zero phase noise active cancel space voltage vector 108 is selected. Next, in the area selection routine 102, the area where the two-phase AC voltage command vector 106 is located is searched from the closest zero-phase noise active cancel space voltage vector 108 selected previously. Then, the other two zero-phase noise active cancel space voltage vectors corresponding to the searched area are selected. In the time sharing routine 103, the time shared by the three previously selected zero-phase noise active cancel space voltage vectors is calculated. Subsequently, in the gradation voltage command vector output routine 104, the zero-phase noise active cancel space voltage vector is calculated. A gradation voltage command vector is output from the obtained time sharing. The outline of the zero-phase noise active cancel space voltage vector routine 100 has been described above. Next, the processing contents of the individual routines 101 to 104 will be described in more detail.

  FIG. 6 is a diagram showing the end point (indicated by black circles) of the zero-phase noise active cancel space voltage vector. The zero-phase noise active cancel space voltage vector is an αβ coordinate system vector in which the sum of the three-phase voltages is zero. There are about 131 zero-phase noise active cancel space voltage vectors.

  Here, in the case of a large two-phase AC voltage command vector 106, even if the closest zero-phase noise active cancel space voltage vector is selected and output as it is, it can be converted into a highly accurate gradation command value. On the other hand, in the case of the small two-phase AC voltage command vector 106, the number of selectable zero-phase noise active cancel space voltage vectors decreases, and the closest zero-phase noise active cancel space voltage vector is selected as it is. Even if it is output, the accuracy of the input voltage command value and the converted gradation command value is deteriorated.

  Therefore, as shown in FIG. 7, three biaxial spatial voltage vectors closest to the two-phase AC voltage command vector 106, that is, zero-phase noise active cancel spatial voltage vectors (each end point position is indicated by 105) are selected. The output accuracy is improved by their time average output. That is, an approximate value of the two-phase AC voltage command vector 106 is obtained by so-called weighted averaging of the zero-phase noise active cancel space voltage vector.

  That is, in this area selection routine 102, as shown in FIG. 8A, the voltage command vector 106 is set based on the end point 208 of one of the nearest zero-phase noise active cancel space voltage vectors selected in the previous routine. It is examined in which of the six areas ○ 1 to ○ 6 the end point 207 is centered on the end point 208 described above.

  That is, as shown in the flowchart of FIG. 8B, a position determination vector 109 that is the difference between the two-phase AC voltage command vector 106 and the nearest zero-phase noise active canceling space voltage vector 108, that is, ΔV * = (Var -Vak_1r, Vbr-Vbk_1r) is obtained, and the angle θ of the position determination vector 109 (ΔV *) is obtained. Then, the range of the areas ○ 1 to ○ 6 is determined every 60 °, and the areas ○ 1 to ○ 6 are selected depending on the magnitude of θ. In this case, the end points of the three nearest zero-phase noise active canceling space voltage vectors corresponding to the selected triangular area are the positions of the vertices 208, 205, and 206 of the triangle as shown in FIG. It becomes. In this way, by using the direction of the position determination vector 109 represented by the difference from the spatial voltage vector where the nearest three-phase voltage sum is zero and the nearest zero-phase noise active canceling spatial voltage vector 108, It is possible to appropriately select the space voltage vector to be time shared. Then, it is delivered to the time sharing routine 103.

  In the time sharing routine 103, the time shared by the three zero-phase noise cancellation space voltage vectors in which the sum of the three-phase voltages in the vicinity of the two-phase AC voltage command vector 106 is zero is obtained. That is, as shown in the flowchart of FIG. 9, first, the three previously selected zero-phase noise canceling space voltage vectors are converted into a circular coordinate system. Here, when the two-phase AC voltage command vector 106 is represented by V *, the carrier time T determined in advance by the two-phase AC voltage command vector V * has three zero-phase noise canceling space voltage vectors Vk_1 *, Vk_2 *, It is expressed by time sharing with T1, T2, and T3 according to the distance from Vk_3 *. When the sharing times T1, T2, and T3 are equal to or shorter than the calculation sampling time, voltage output cannot be performed. As a process for preventing this, the calculation sampling time is rounded up. In the flowchart shown in FIG. 9, the calculation sampling time is set to 0.1 msec as an example.

  When the carrier time 201 elapses, the time sharing routine 103 is performed again. Further, when the area where the two-phase AC voltage command vector 106 exists changes, the processing of the area selection routine 102 and the time sharing routine 103 shown in FIG. 8 is performed again. As described above, when one of the zero-phase noise canceling spatial voltage vectors Vk_1 *, Vk_2 *, and Vk_3 * that should be shared by the change of the two-phase AC voltage command vector V changes, the direction of the position determination vector By selecting the zero-phase noise canceling space voltage vector to be shared in time by the nearest zero-phase noise canceling space voltage vector, a highly accurate voltage is continuously output to the two-phase AC voltage command vector 106. be able to.

  Next, as shown in FIG. 10, the gradation voltage command vector output routine 104 first rearranges the zero-phase noise active cancel space voltage vectors Vk_1 *, Vk_2 *, and Vk_3 * in descending order of sharing time. The rearranged three zero-phase noise active cancel space voltage vectors Vk_1 *, Vk_2 *, and Vk_3 * are output for each time sharing T1, T2, and T3 determined by the time sharing routine. These zero-phase noise active cancel space voltage vectors Vk_1 *, Vk_2 *, Vk_3 * (that is, Vka_in, Vkb_in) are delivered to the next time limiter routine 110.

  By the way, as a semiconductor switching element used in an actual power conversion device, a self-extinguishing type switching element such as GCT, GTO, and IGBT is assumed, and in order to suppress those switching losses, a short switching switching is refrained. I want to stay on or off for as long as possible. Therefore, in the next time limiter routine 110, after changing the switching state once, processing is performed so as not to change the switch state for a certain period of time.

  A processing flow of the time limiter routine 110 is shown in FIG. In this routine 110, first, it is determined whether there is a change in the zero-phase noise active cancel space voltage vector (Vka_in, Vkb_in) swept out by the gradation voltage command vector output routine. If there is no change in the space voltage vector (Vka_in, Vkb_in), the time T_temp is counted. If there is a change in the space voltage vector (Vka_in, Vkb_in), the time T_temp is reset. When the counted time T_temp is smaller than the limiter time T_limit which is a predetermined minimum pulse time, the output spatial voltage vector (Vka, Vkb) is not updated. On the other hand, when the counted time T_temp is larger than the predetermined limiter time T_limit, the output spatial voltage vector (Vka, Vkb) is updated to (Vka_in, Vkb_in). Thus, switching loss can be suppressed by preventing frequent switching in a short time by the time limiter routine 110.

  As shown in FIG. 12, the space voltage vector (Vka, Vkb) output by the time limiter process is converted into a three-phase gradation output command voltage in the next two-phase to three-phase conversion routine 120, and subsequently The inverter switching state determination routine 130 shown in FIG.

  FIG. 13 shows a processing flow of the inverter switching state determination routine 130 for one phase. In this routine 130, the U, V, and W phase gradation values delivered from the two-phase to three-phase conversion routine 120 are converted into bit information signals.

  That is, the minimum voltage unit for gradation control is 1A. U. When expressed as (Absolute Unit), in the first embodiment, the relationship between the voltages of the three-phase three-level inverter 26 and the single-phase inverters 2, 8, 14, 3, 9, and 15 is Va, Vb, Vc = 7. : 2: 1, the output of the 3-phase 3-level inverter is + 7A. U. , 0A. U. -7A. U. Therefore, the absolute value 0A. U. Or 7A. U. , And the sign is represented by another bit, the output of the three-phase three-level inverter 26 can be represented by 2 bits. The outputs of the single-phase inverters 2, 8, 14, 3, 9, and 15 are + 3A. U. , + 2A. U. , + 1A. U. , 0A. U. , -1A. U. , -2A. U. -3A. U. Therefore, the absolute value 0A. U. Or 1A. U. , And another bit represents the absolute value 0A. U. Or 2A. U. If the sign is represented by another bit, the outputs of the single-phase inverters 2, 8, 14, 3, 9, and 15 can be represented by 3 bits. The bit information signal representing the gradation value is delivered to the high precision waveform control circuit 52 as the optimized gradation command signal 41.

  FIG. 14 is a configuration diagram showing one phase of the three-phase three-level inverter 26 and the single-phase inverters 8 and 9 in the power converter shown in FIG. 15 shows the main control circuit when the high-precision waveform control circuit 52 outputs the switching gate signal 42 to the semiconductor switching elements S1 to S4 and SS1 to SS8 having the configuration shown in FIG. 5 shows a gate pulse generation logic table in which the optimized gradation command signal 41 from 51 is converted into the gate signal 42 by the high-precision waveform control circuit 52.

  Since each phase is common, the optimized gradation command signal 41 is represented as (A, B, C, D, E), and the three-phase three-level inverter 26 is converted from the 2-bit optimized gradation command signal 41 (A, B). FIG. 15A shows the generation of the gate signal 42 for the four semiconductor switching elements S1 to S4. FIG. 15B shows the generation of the gate signal 42 from the 3-bit optimized gradation command signal 41 (C, D, E) to the eight semiconductor switching elements SS1 to SS8 of the single-phase inverters 8 and 9. Show.

  The voltage waveform output based on the control algorithm of the control apparatus 50 having the above configuration and the numerical calculation results of the α-β axis distribution are shown in FIGS. Here, the carrier period is 5 msec and the limiter time is 0.2 msec.

  16 to 20, the upper part (a) shows the voltage command values U *, V *, W * and the gradation command values Uk *, Vk *, Wk *, and the middle part (b). ) Is the voltage command vector end point and the gradation command value represented by two axes, and the lower part (c) of FIG. 4 shows the U-phase voltage command value, the gradation command value, and the gradation command value of each inverter unit.

  16 to 20, it can be seen that the number of output levels decreases as the voltage commands U *, V *, and W * become smaller. The voltage waveform is an output that is consistent with the current sine wave, and the total of the three-phase voltages is zero. In FIG. 20, when the number of gradation levels is reduced to 3, the voltage peak value is adjusted by the pulse width.

  FIG. 21 shows that the carrier period is 5 msec, the limiter time is 0 msec, and the voltage output is 1 A.V. U. The voltage current waveform obtained by the experiment at the time of is shown. It was confirmed that the waveform of the three-phase voltage was an output that was consistent with the current sine wave compared to the conventional one, and the total of the three-phase voltage was zero. The zero-phase current is almost the same as that in the prior art.

  As described above, when the frequency of the voltage command value V * is relatively high, the power conversion device according to the first embodiment outputs only α as the gradation voltage command value Vk *. A stepwise gradation control waveform is obtained. On the other hand, when the frequency of the voltage command value V * is relatively low, the three zero-phase noise active cancel space voltage vectors Vk_1 * (= α *) and Vk_2 * (= Since β *) and Vk_3 (= γ *) share times T1, T2, and T3 are output, the output voltage waveform is a PWM control waveform. Accordingly, it is possible to always output a voltage that makes the current waveform sine wave while setting the zero-phase voltage to zero, so that both electromagnetic noise current and current distortion can be suppressed.

  Instead of the single-phase inverters connected in series (Vb inverter and Vc inverter) shown in FIG. 1, each phase is composed of one single-phase multilevel inverter 61 as shown in FIG. Is also possible. These multi-level inverters 61 include a full-bridge inverter composed of four semiconductor switching elements, two DC power supplies, and four changeover switches for outputting the voltages of these DC power supplies in combination. ing. A voltage of 7 levels can be output by switching control of the changeover switch. Thus, by configuring each phase with the multi-level inverter 61, the number of units can be further reduced, and the cost can be reduced.

Embodiment 2. FIG.
The power conversion device of the first embodiment includes a three-phase three-level inverter 26 sharing a DC power source, and Vb inverters 2, 8, and 14 that are single-phase inverters for each phase of the three-phase three-level inverter 26. Vc inverters 3, 9, and 15 are connected in series, respectively. As described above, the use of the three-phase three-level inverter 26 is advantageous in that the number of units can be reduced as a whole, but in the second embodiment, a power conversion device having the configuration shown in FIG. 23 is used.

  That is, the power conversion device according to the second embodiment includes a three-phase inverter device 25 in which each phase is star-connected, and supplies power to the three-phase loads 19 to 21. In this three-phase inverter device 25, Va inverters 1, 7, and 13, which are single phase inverters, Vb inverters 2, 8, and 14, and Vc inverters 3, 9, and 15 are connected in series for each phase, and single phase multiple conversion is performed. The vessel is configured.

  Each single-phase inverter 1 to 3, 7 to 9 and 13 to 15 constituting each single-phase multiple converter rectifies AC power drawn from the system through a transformer and converts it into DC power, and then smoothes the DC power. This is smoothed by a capacitor, and the DC power from the smoothing capacitor is converted to AC power, but here, for convenience, only the inverter unit composed of DC power sources 4-6, 10-12, 16-18 and a switch group is used. Is illustrated. Reference numerals 22 and 23 denote a neutral point on the load side and a neutral point on the power conversion device side, respectively.

  The structure of each single-phase inverter 1-3, 7-9, 13-15 is shown in FIG. Each of the single-phase inverters 1 to 3, 7 to 9, and 13 to 15 is a full-bridge inverter and voltage composed of a plurality of self-extinguishing semiconductor switching elements 30 to 33 such as IGBTs having diodes connected in antiparallel. DC power sources 4 to 6, 10 to 12, and 16 to 18 that output E are configured. With these switching controls, the single-phase inverters 1 to 3, 7 to 9, and 13 to 15 output three levels of voltages E, -E, and 0.

  That is, each single-phase inverter (Va inverter, Vb inverter, Vc inverter) 1 to 3, 7 to 9 and 13 to 15 has voltages Va, Vb, and Vc of DC power sources 4 to 6, 10 to 12, and 16 to 18, respectively. Is output as a voltage source, but when Va, Vb, and Vc are different values (Va> Vb> Vc), the generated voltage of each of the three single-phase inverters (Va inverter, Vb inverter, Vc inverter) A smooth output voltage gradation waveform can be obtained by the combination.

  For example, for each of the cases where the ratio of Va, Vb and Vc is 4: 2: 1, 4: 3: 1, 5: 3: 1, 6: 3: 1, 7: 3: 1, each single phase The relationship between the output logic of the inverters 1 to 3 and 7 to 9 and 13 to 15 and the output gradation (voltage level) of the single-phase multiple converter in which they are connected in series is the logic of (A) to (E) in FIG. Shown in the table.

  Here, for example, in the case of the table in FIG. 25A, Va, Vb, and Vc have a relationship of 4: 2: 1 and a relationship of 2n (n = 0, 1, 2) of the minimum voltage value Vc. is there. As can be seen from the table of FIG. 25A, the total of these generated voltages is 0 by combining the three single-phase inverters 1 to 3, 7 to 9, and 13 to 15 of the least significant bit, the intermediate bit, and the most significant bit. An output voltage (absolute value) of 8 gradations of ˜7 is obtained. The relationship between each single-phase inverter output waveform in this case and the sine wave output gradation obtained by the combination of the voltages generated thereby is shown in FIG. As can be seen from the figure, a very smooth output voltage gradation waveform is obtained by the combination of the voltages generated by the three single-phase inverters (Va inverter, Vb inverter, Vc inverter).

  The configuration and control function of the control device 50 (main control circuit 51, high-precision waveform control circuit 52) of the power conversion device according to the second embodiment are the same as those in the first embodiment shown in FIGS. The detailed description is omitted here.

Embodiment 3 FIG.
In the first and second embodiments described above, the case where the three-phase alternating current is converted into the two-phase alternating current has been described, but the three-phase floor in which the three-phase voltage sum is zero without performing the coordinate conversion. The adjustment command value may be selected directly.

  That is, in the third embodiment, as shown in FIG. 27, the end point 301 of the nearest zero-phase noise cancellation space voltage vector closest to the end point of the three-phase AC voltage command vector 300 is selected. Then, as shown in FIG. 28, the selection volume 302 having the end point of the three-phase AC voltage command vector 300 is selected from the end point 301 of the nearest zero-phase noise canceling spatial voltage vector. Then, the three-phase AC voltage command vector 300 is expressed by time-averaging according to the distance with four spatial voltage vectors at which the sum of the three-phase voltages at the apex of the selected volume 302 is zero. Even if it does in this way, the effect similar to the case where it processes by a two-phase alternating current as demonstrated in Embodiment 1, 2 is acquired.

It is a block diagram of the power converter device in Embodiment 1 of this invention. It is a logic table | surface which shows the relationship between the output logic (voltage level) obtained by combining the output logic of each of the three-phase three-level inverter and each single-phase inverter in Embodiment 1 of this invention, and them. It is a wave form diagram which shows the output waveform by the 3 phase 3 level inverter and each single phase inverter in Embodiment 1 of this invention, and the whole phase output voltage gradation waveform. It is a block diagram which shows the main control circuit of the power converter by Embodiment 1 of this invention along a process sequence. It is a processing flow figure of the zero phase noise active cancellation space voltage vector routine in Embodiment 1 of this invention. It is a characteristic view which shows the end point of the zero phase noise active-cascel space voltage vector in the (alpha) (beta) coordinate system in Embodiment 1 of this invention. It is explanatory drawing which showed the relationship between the two-phase alternating current voltage command vector in Embodiment 1 of this invention, and the end point of a zero phase noise active-cascel space voltage vector. It is explanatory drawing of the area selection routine in Embodiment 1 of this invention. It is a processing flowchart of the time allotment routine in Embodiment 1 of this invention. It is a processing flowchart of the gradation voltage command vector output routine in Embodiment 1 of this invention. It is a processing flowchart of the time limiter routine in Embodiment 1 of this invention. It is a block diagram which shows the two-phase three-phase conversion process in Embodiment 1 of this invention along a process sequence. It is a processing flow figure of the inverter switching state determination routine in Embodiment 1 of this invention. It is a block diagram at the time of taking out one phase part in the 3 level inverter and single phase inverter in Embodiment 1 of this invention. It is a truth table of the high precision waveform control circuit in Embodiment 1 of this invention. It is a numerical calculation result of the gradation control space vector control in Embodiment 1 of this invention. It is a numerical calculation result of the gradation control space vector control in Embodiment 1 of this invention. It is a numerical calculation result of the gradation control space vector control in Embodiment 1 of this invention. It is a numerical calculation result of the gradation control space vector control in Embodiment 1 of this invention. It is a numerical calculation result of the gradation control space vector control in Embodiment 1 of this invention. It is a voltage-current waveform obtained by the experiment in Embodiment 1 of this invention. In Embodiment 1 of this invention, it replaces with the two single phase inverters mutually connected in series, and is a block diagram at the time of applying a single phase multilevel inverter. It is a block diagram of the power converter device in Embodiment 2 of this invention. It is a block diagram of the single phase inverter in Embodiment 2 of this invention. It is a logic table | surface which shows the relationship between the output logic and output gradation level of each single phase inverter in Embodiment 2 of this invention. It is a wave form diagram which shows the output waveform of each single phase inverter in Embodiment 2 of this invention, and the output voltage gradation waveform by a single phase multiple converter. It is the characteristic view which showed the relationship between the three-phase alternating current voltage command vector in Embodiment 3 of this invention, and the end point of a zero phase noise active-cascel space voltage vector. It is the characteristic view which showed the selected volume in Embodiment 3 of this invention.

Explanation of symbols

1,7,13 Va inverter (single phase inverter),
2,8,14 Vb inverter (single phase inverter),
3, 9, 15 Vc inverter (single phase inverter), 4, 10, 16 DC power supply Va,
5, 11, 17 DC power supply Vb, 6, 12, 18 DC power supply Vc, 19 U-phase load,
20 V-phase load, 21 W-phase load, 26 three-phase three-level inverter, 50 controller,
51 Main control circuit, 52 High precision waveform control circuit,
101 Nearest zero phase noise cancellation space voltage vector selection routine,
102 area selection routine, 103 time sharing routine,
104 gradation voltage command vector output routine,
105 The end point of the spatial voltage vector for zero-phase noise active cancellation,
106 two-phase AC voltage command vector, 107 voltage command vector position determination vector, 108 nearest neighbor zero-phase noise cancellation space voltage vector, 109 position determination vector, 207 end point of two-phase AC voltage command vector,
208 selected nearest zero-phase noise active cancellation space vector,
205, 206 The end point of the zero-phase noise active cancellation space vector corresponding to the selected area,
201 carrier period (T = T1 + T2 + T3),
202 Time allocated to Vk_1 *, Time allocated to 203 Vk_2 *,
204 Time allocated to Vk_3 *, 300 Three-phase AC voltage command vector,
301 End point of nearest neighbor zero-phase noise cancellation space voltage vector,
302 Selected volume.

Claims (10)

In a power converter for supplying power to a three-phase load by combining a three-phase three-level inverter that outputs a three-phase voltage from a DC power source and a plurality of single-phase inverters connected in series with each phase,
A control device for controlling the output voltage of each phase by the sum of the voltage of each phase of the three-phase three-level inverter and each generated voltage by a predetermined combination selected from the plurality of single-phase inverters; The control device selects, for the three-phase AC voltage command vector, four spatial voltage vectors in which the sum of the three-phase voltages in the vicinity is zero, and the three-phase AC voltage command vector is derived from the four spatial voltage vectors. A power conversion device that outputs a voltage that sine-waves a current waveform while reducing a zero-phase voltage to zero by expressing the time average according to the distance. In a power converter for supplying power to a three-phase load by combining a three-phase three-level inverter that outputs a three-phase voltage from a DC power source and a plurality of single-phase inverters connected in series with each phase,
A control device for controlling the output voltage of each phase by the sum of the voltage of each phase of the three-phase three-level inverter and each generated voltage by a predetermined combination selected from the plurality of single-phase inverters; The control device coordinate-transforms the three-phase AC voltage command vector into a two-phase AC voltage command vector, and, for this two-phase AC voltage command vector, three spatial voltage vectors whose total three-phase voltages in the vicinity are zero are obtained. By selecting and expressing the two-phase AC voltage command vector in a time-averaged manner according to the distance from the three spatial voltage vectors, a voltage that outputs a sinusoidal current waveform while making the zero-phase voltage zero is output. The power converter characterized by being. A single-phase multi-converter is configured by connecting multiple AC sides of a single-phase inverter that converts DC power from a DC power source into AC power in series, and this single-phase multi-converter is connected in three phases to power a three-phase load. In the power converter to be supplied,
A control device for controlling the output voltage of each phase by the sum of the generated voltages by a predetermined combination selected from the plurality of single-phase inverters constituting the single-phase multiple converter for each phase; The apparatus selects, for the three-phase AC voltage command vector, four spatial voltage vectors in which the sum of the three-phase voltages in the vicinity is zero, and the three-phase AC voltage command vector is a distance from the four spatial voltage vectors. A power conversion device that outputs a voltage that makes a current waveform a sine wave while setting a zero-phase voltage to zero by expressing it as a time average according to. A single-phase multi-converter is configured by connecting multiple AC sides of a single-phase inverter that converts DC power from a DC power source into AC power in series, and this single-phase multi-converter is connected in three phases to power a three-phase load. In the power converter to be supplied,
A control device that controls the output voltage of each phase based on the sum of each generated voltage by a predetermined combination selected from the plurality of single-phase inverters in the single-phase multiple converter for each phase. The coordinate conversion of the three-phase AC voltage command vector into the two-phase AC voltage command vector, and for this two-phase AC voltage command vector, select three spatial voltage vectors whose total three-phase voltage is zero, By expressing the two-phase AC voltage command vector in a time-averaged manner according to the distance from the three spatial voltage vectors, it outputs a voltage that makes the current waveform sinusoidal while setting the zero-phase voltage to zero. The power converter characterized by this. The power converter according to claim 1 or 2, wherein a single-phase multilevel inverter is used instead of the single-phase inverter. The control device performs time limiter control to limit time so that a spatial voltage vector in which a total of three output three-phase voltages becomes zero does not change again within a predetermined minimum pulse time. The power converter according to any one of claims 1 to 5. The control device uses the position of the position determination vector represented by the difference between the space voltage command vector and the space voltage vector in which the nearest three-phase voltage sum is zero, and the nearest space voltage vector. The power converter according to any one of claims 1 to 6, wherein a spatial voltage vector to be shared is selected. When any one of the spatial voltage vectors to be time-shared changes due to the change of the spatial voltage command vector, the control device should again share the time according to the direction of the position determination vector and the nearest spatial voltage vector. The power converter according to claim 7 , wherein a space voltage vector is selected. According to claim 1, characterized in that the DC voltage of the DC power supply in the three-phase three-level inverter, and a DC voltage of the DC power source in the single-phase inverter is set to a different value, any one of 5 The power converter device described in 1. 5. The power conversion device according to claim 3, wherein the DC voltage of the DC power source in each single-phase inverter constituting the single-phase multiple converter is set to a different value.

Images