JP4820625B2 - Game machine - Google Patents

Description

The present invention relates to a gaming machine having input circuitry for outputting a winning signal triggered by the input detection voltage outputted from the prize detecting device for detecting the game balls.

  Conventionally, a pachinko machine, which is a type of gaming machine, has a plurality of winning holes such as a start winning opening for starting a symbol combination game and a large winning opening that is opened when a big hit gaming state is given to the gaming area. It has. Each winning opening is provided with a winning sensor (proximity switch) as a winning detecting device for detecting a game ball. When the winning sensor detects a gaming ball, the main control board (main CPU) is connected via an input circuit. ) Is output with a detection voltage (winning signal). When the winning signal is input, the main control board (main CPU) controls the payout control board so as to cause the player to pay out a predetermined number of winning balls (game balls). If the payout of the winning ball is not performed correctly, an unfavorable disadvantage is caused to the player or the game store side, so that the winning signal needs to be accurately input to the main CPU.

  By the way, the winning sensor is connected to an input circuit via a connection connector, and a detection voltage (winning signal) is output to the main CPU via the input circuit. However, this connection connector may be pulled out or disconnected during the game. In this case, since the detection voltage from the winning sensor is not accurately input, extra prize balls may be paid out. In order to prevent this, for example, a pachinko machine described in Patent Document 1 has been proposed (see Patent Document 1).

As shown in Patent Document 1, the input circuit includes a first input path provided between a winning sensor (such as a start port switch) and an input port, and a path input to the input port. A second input path different from the input path is provided. At the same time, the input circuit outputs an output when the winning sensor does not output the detection voltage using the second input path when the first input path is interrupted (when the connection connector is not connected). Voltage supply means (a circuit including a power source, a transistor, and a resistor) that outputs (supplies) a voltage to the input port in an output state similar to the state. Thereby, even when the connection connector is not connected, the input port receives the voltage in the output state similar to the output state when the winning sensor does not output the detection voltage from the voltage supply means. Therefore, a winning signal indicating that the winning sensor has detected a game ball is not output to the main CPU. For this reason, the prize ball is not paid out by mistake, and the disadvantage of the game store can be prevented.
JP 2003-325769 A (paragraph numbers [0071] to [0080], FIG. 11)

  However, the input port of the input circuit of Patent Document 1 determines whether or not a detection voltage has been input by comparing it with a predetermined threshold (reference voltage). Therefore, depending on the settings of the power supply voltage, resistance values of various resistors, input port thresholds, individual differences (variations) in various circuit components, the state of the input circuit when the connector is disconnected, the timing of disconnection, etc. In such a case, a voltage that is higher (or lower) than the reference voltage is supplied to the input port, and the detection voltage (winning signal) may be erroneously input to the main CPU.

The present invention has been made paying attention to such problems existing in the prior art, and its purpose is to ensure that an erroneous input of a winning signal to the control device is ensured when the winning detecting device is not connected. It is to provide a gaming machine having input circuitry to prevent.

In order to achieve the above object, the invention described in claim 1 is a control device for instructing payout of a winning ball, and winning detection for detecting a gaming ball and outputting a detection voltage notifying that the gaming ball has been detected. And an input circuit for outputting to the control device a winning signal for notifying that the game ball has been detected when a detection voltage is input from the winning detecting device, and the control device inputs the winning signal. In the gaming machine that controls the prize ball to be paid out in response to the event, the input circuit is connected to the prize detection device and inputs the detection voltage and the non-detection voltage notifying that the game ball is not detected. A connecting connector, a first power source that outputs a first reference voltage that is a reference for determining whether or not the detection voltage is input, and the detection voltage and the non-detection voltage that are connected to the connection connector. And a second input terminal that is grounded and connected to the first power source to input the first reference voltage, and the voltage input to the first input terminal is a second input. If the determination result is affirmative by comparing whether or not the voltage is lower than the voltage input to the terminal, the first comparison determination element that outputs the winning signal to the control device and the first power supply Switching means for switching whether or not to input the first reference voltage input to the second input terminal, and when the winning detection device does not detect a game ball, the connection connector detects whether or not the winning detection device is The non-detection voltage is input at a voltage higher than the detection voltage input when a game ball is detected, while the detection voltage is input at a voltage higher than 0 V when the winning detection device detects a game ball. has become way, the Between one power source and the second input terminal, a resistor having a predetermined resistance value and a rectifying element that flows current from the second input terminal side to the first power source side and regulates the current in the reverse direction are parallel. The second input terminal is connected to a second power storage element having one end grounded, and the terminal of the rectifying element not connected to the second input terminal is grounded. The switching means inputs the detection voltage and the non-detection voltage from the connection connector, and when the voltage input from the connection connector is lower than the detection voltage , the switching unit is configured to change the first reference voltage to the second voltage. switching so as not to input to the input terminal, the voltage input to the second input terminal and the escape to the ground side, the rectifying element, the switching means does not enter the first reference voltage to said second input terminal When switching to The voltage input to the second input terminal side and gist, to feed to the ground from the second input terminal side.

  According to the present invention, it is possible to reliably prevent erroneous input of a winning signal to the control device when not connected to the winning detection device.

Hereinafter, an embodiment in which the present invention is embodied in a pachinko gaming machine (hereinafter, referred to as a “pachinko machine”) that is a type of the present invention will be described with reference to FIGS.
In FIG. 1, the front side of the pachinko machine 10 is schematically shown, and a vertical rectangular middle frame 12 for setting various game components is opened and closed on the front side of the opening of the outer frame 11 that forms the outline of the machine body. And is detachably assembled. Further, on the front side of the middle frame 12, a front frame 14 and a top ball tray 15 each having a glass frame for protecting the game board 13 disposed inside the machine in a see-through manner are assembled so as to be openable and closable in a laterally open state. ing. In addition, on the front side of the front frame 14 and the game area 13 a of the game board 13, a decoration lamp 16 that is turned on (flashes) or turned off and performs a light emission effect based on the light emission decoration is provided. In addition, a speaker 17 that outputs various sounds (sound effects) and performs sound effects based on the sound output is provided below the outer frame 11. A lower ball tray 18 and a launching device 19 are attached to the lower part of the middle frame 12.

  In the approximate center of the game area 13a of the game board 13, a display device 20 having a liquid crystal display type variable display H is disposed. In the variable display H, a game effect (display effect) based on a varying image (or image display) is performed. In the variable display H, a symbol combination game (symbol variation game) is displayed in which a plurality of types of symbols are varied and displayed in a plurality of columns. In the present embodiment, combinations of three columns of symbols are derived in the symbol combination game, and the types of symbols of each column forming the combination are eight types of 1-8.

  Then, the player can recognize a big hit or loss from the symbol combination finally displayed in the symbol combination game. When the symbols of all the columns displayed on the variable display H are of the same type, the big hit can be recognized from the symbol combination ([222] [777], etc.). The symbol combination that can recognize the jackpot is a jackpot symbol combination. When the jackpot symbol combination is displayed, the player is given a jackpot gaming state. On the other hand, when the symbols of all the columns displayed on the variable display H are of different types, or when the symbols of one column are different from the symbols of the other two columns, the symbol combination ([123] [122] [767] etc.) can be recognized. A symbol combination that can recognize this deviation is a symbol combination that is out of sync.

  Further, below the display device 20, a start winning opening 22 including an opening / closing blade 21 that opens and closes by the operation of an actuator (solenoid, motor, etc.) (not shown) is disposed. Behind the start winning opening 22 is provided a start opening sensor SE1 (shown in FIG. 2) that detects a winning game ball. The start winning opening 22 can give a start condition for the symbol combination game in response to detection of winning of a game ball. In addition, when a winning game ball is detected by the start winning port 22, a predetermined number (for example, four) of winning balls (game balls) are paid out for one winning.

  Also, below the start winning port 22, a large winning port 24 having a large winning port door 23 that opens and closes by the operation of an actuator (solenoid, motor, etc.) (not shown) is disposed. When the big hit gaming state is given, the big winning opening 24 is opened by the opening operation of the big winning opening door 23 and the game ball can be won. In the back of the special winning opening 24, a special winning opening sensor SE2 (shown in FIG. 2) for detecting a winning game ball is provided. When a winning game ball is detected by the special winning opening 24, 1 A predetermined number (for example, 15) of winning balls is paid out for each winning. For this reason, the player can obtain a chance to obtain a large number of prize balls when the big hit gaming state is given.

Next, the control configuration of the pachinko machine 10 will be described with reference to FIG.
A main control board 30 that controls the entire pachinko machine 10 is mounted on the back side of the pachinko machine 10. The main control board 30 executes various processes for controlling the entire pachinko machine 10, performs arithmetic processing on various control signals (control commands) for controlling the game according to the processing results, and outputs the control signals ( Control command). An effect control board 31 is mounted on the back side of the machine. The effect control board 31 is based on the control signal (control command) output from the main control board 30, the display mode of the display device 20 (variable display H) (display images such as symbols, backgrounds, characters, etc.), the decorative lamp 16. The light emission mode (lighting (flashing) / lighting timing, etc.) and the sound output mode (sound output timing, etc.) of the speaker 17 are controlled.

  A start port sensor SE <b> 1 that detects a game ball won in the start winning port 22 is connected to the main control board 30 via an input circuit 51. The main control board 30 is connected to a big prize port sensor SE2 for detecting a game ball won in the big prize port 24 via an input circuit 51. The main control board 30 is connected to a payout control board 35 that controls the payout of game balls (prize balls, etc.). A payout device 36 for paying out game balls is connected to the payout control board 35.

Hereinafter, specific configurations of the main control board 30 and the effect control board 31 will be described.
As shown in FIG. 2, the main control board 30 is provided with a main CPU 30a, a ROM 30b, and a RAM 30c. The main CPU 30a updates various random number values at predetermined intervals. The ROM 30b stores a main control program for controlling the pachinko machine 10 and a plurality of types of variation patterns. The RAM 30c stores (sets) various information (random number values and the like) that are appropriately rewritten during the operation of the pachinko machine 10.

  The variation pattern is a game effect (display effect, light effect, sound effect) from when the symbol starts to change (start of the symbol combination game) to when all the symbols are displayed (the symbol combination game ends). The pattern used as the base of is shown. Further, the plurality of types of variation patterns are classified into variation patterns for a big hit effect and variation patterns for a loss effect. The jackpot effect is an effect that the symbol combination game is developed so as to finally display the symbol combination of the jackpot. The outlier effect is an effect in which the symbol combination game is developed so as to display an outlier symbol combination.

The main CPU 30a executes various processes such as various processes such as a winning process and a variation pattern determining process based on the main control program.
First, the winning process will be described. In the winning process, the main CPU 30a determines whether or not a winning detection of the game ball at the starting winning opening 22 is made at predetermined time intervals (whether or not a winning signal indicating that winning has been inputted) is determined. I do. When the determination result of the start opening winning determination is affirmative (when winning detection is present), the main CPU 30a reads out and acquires the value of the jackpot determining random number from the RAM 30c, and acquires the read value of the jackpot determining random number in the RAM 30c. Set to a predetermined storage area. The big hit determination random number is a random number that is sequentially updated every predetermined cycle by the main CPU 30a, and the main CPU 30a rewrites the value before the update by setting the updated value in the setting area of the RAM 30c. Further, the main CPU 30a acquires a big hit determination random number and outputs a first payout control command for instructing payout of a prize ball to the payout control board 35. When the first payout control command is input, the payout control board 35 controls the payout device 36 so as to pay out a predetermined number (four) of prize balls.

  On the other hand, when the start opening winning determination is negative, the main CPU 30a determines whether or not a winning detection to the large winning opening 24 has been made (whether or not a winning signal indicating that a winning has been input is input). Make a decision. When the determination result of the big winning opening winning determination is affirmative (when winning detection is present), the main CPU 30a outputs a second payout control command for instructing payout of the winning ball to the payout control board 35. When the second payout control command is input, the payout control board 35 controls the payout device 36 so as to pay out a predetermined number (15) of prize balls. On the other hand, when the determination result of the big winning opening winning determination is negative (no winning detection is detected), the winning process is terminated. Accordingly, the main CPU 30a of the present embodiment is a control device that instructs the payout of prize balls.

  Next, the variation pattern determination process will be described. When the symbol combination game is started, the main CPU 30a determines whether or not the jackpot determination random number stored in the RAM 30c matches the jackpot determination value stored in the ROM 30b. When the determination result of the big hit determination is affirmative (in the case of a big hit), the main CPU 30a determines the final stop symbols so that all the columns are of the same type, and also determines the variation pattern from among the variation patterns for the big hit effect. . On the other hand, when the determination result of the big hit determination is negative (in the case of loss), the main CPU 30a determines the final stop symbol so that all the columns are not of the same type. At the same time, the main CPU 30a determines a variation pattern from the variation patterns for the offending effect.

  Then, the main CPU 30a which has determined the variation pattern and the final stop symbol outputs a predetermined control command to the effect control board 31 (sub CPU 31a) at a predetermined timing. Specifically, the main CPU 30a first outputs a variation pattern designation command that designates a variation pattern and instructs the start of symbol variation. Next, the main CPU 30a outputs a symbol designation command for designating a final stop symbol for each column. After that, the main CPU 30a instructs a change stop based on the change time set in the specified change pattern, and outputs an all symbol stop command for ending the symbol combination game.

Next, the effect control board 31 will be described.
As shown in FIG. 2, the effect control board 31 includes a sub CPU 31a, and a ROM 31b and a RAM 31c are connected to the sub CPU 31a. The ROM 31b stores an effect control program for controlling the display mode of the variable display H, the light emission mode of the decorative lamp 16, and the sound output mode of the speaker 17. The RAM 31c stores (sets) various information that can be appropriately rewritten during the operation of the pachinko machine 10.

  And if sub CPU31a inputs a control command from the main control board 30 (main CPU30a), based on an effect control program, it will perform control according to the input control command. Specifically, when the sub CPU 31a inputs a variation pattern designation command, the variable display H is configured so that the symbols are variably displayed based on the variation pattern designated by the variation pattern designation command and the symbol combination game is started. Control the display mode. At the same time, the sub CPU 31 a controls the light emission mode of the decorative lamp 16 and the sound output mode of the speaker 17 in accordance with the display mode of the variable display H. When the sub CPU 31a inputs the all symbol stop command, the sub CPU 31a controls the display content of the variable display H so that the symbol combination designated by the input symbol designation command is displayed on the variable display H. By this control, the symbol combination game is performed on the variable display H.

  In this embodiment, the start port sensor SE1 and the big prize port sensor SE2 are connected to the main CPU 30a via the input circuit 51, respectively. The input circuit 51 notifies the main CPU 30a that a winning signal and a game ball are not detected when the detection voltage and the non-detection voltage are input from the start opening sensor SE1 or the big winning opening sensor SE2. This circuit outputs a signal. Hereinafter, the input circuit 51 will be described in detail with reference to FIG. Since the input circuit 51 connected to the start port sensor SE1 and the input circuit 51 connected to the special prize port sensor SE2 have the same configuration, in this embodiment, the input circuit connected to the start port sensor SE1. 51 will be described as an example, and description of the input circuit 51 connected to the special winning opening sensor SE2 will be omitted. In the present embodiment, the start port sensor SE1 and the input circuit 51 are designed with negative logic (low active), and the main CPU 30a is designed with positive logic (high active).

  The start port sensor SE1 has a pair of connection terminals S1 and S2, and is connected to the first connection connector P1 and the second connection connector P2 of the input circuit 51, respectively. More specifically, one connection terminal S1 (plus side connection terminal) of the start port sensor SE1 is connected to a first connection connector P1 connected to a third power source D3 that outputs a voltage of 12V. . The connection terminal S1 is connected to the first connection connector P1 to input a voltage of 12V from the third power source D3. The other connection terminal S2 (minus side connection terminal) is connected to the other second connection connector P2, and a detection voltage (detection signal) for notifying the input circuit 51 that the start port sensor SE1 has detected a game ball. ) And a non-detection voltage (non-detection signal) for notifying that a game ball is not detected.

  The start port sensor SE1 generates an eddy current in a resistor (not shown) having a predetermined resistance value and a coil (not shown) built in by passing a game ball, and supplies a detection voltage at a level corresponding to the eddy current. A proximity switch that is generated on the output side (minus side) is used. In the present embodiment, since the start port sensor SE1 is designed with a negative logic, when a game ball is not detected, a non-detection voltage whose voltage value is higher than the detection voltage is output. (In this embodiment, the start port sensor SE1 outputs a non-detection voltage of 5 V to the input circuit 51). In other words, the start port sensor SE1 outputs a detection voltage whose voltage value is lower than the non-detection voltage when a game ball is detected (in this embodiment, the start port sensor SE1 is 0.4V). Is output to the input circuit 51). The start sensor SE1 is a voltage whose voltage value is always higher than 0 V regardless of whether or not a game ball is detected when the connection terminals S1 and S2 are connected to the connection connectors P1 and P2, respectively. Is output.

  The second connection connector P2 for inputting the detection voltage and the non-detection voltage is connected to one end of the first resistor R1 having a predetermined resistance value (22 KΩ in this embodiment). The other end of the first resistor R1 is connected to the first comparator H1 and grounded via the first capacitor C1 (first power storage element).

  The first comparator H1 has a first input terminal IN1 connected to the second connection connector P2 via the first resistor R1, and a second input terminal IN2, and is input to the second input terminal IN2. Based on the voltage, a first determination is made to determine whether or not the voltage input to the first input terminal IN1 is low. The first comparator H1 has a first output terminal OUT1, and the first output terminal OUT1 is connected to the fourth power source D4 via the third resistor R3 and to the main CPU 30a.

  When the determination result of the first determination is negative (when the voltage input to the first input terminal IN1 is higher), the first comparator H1 outputs the voltage output from the fourth power supply D4 to the first output terminal OUT1. The voltage input to the ground side connected to the first comparator H1 is output. That is, the first comparator H1 switches the fourth power supply D4 to ground when the determination result of the first determination is negative. As a result, no voltage is input from the fourth power supply D4 to the main CPU 30a, and the voltage value of the voltage output from the input circuit 51 to the main CPU 30a is infinitely close to 0V (or becomes 0V). In this embodiment, since the main CPU 30a is designed with positive logic, the main CPU 30a determines that the winning of the game ball is not detected when the input voltage is low (when low). Therefore, when the determination result of the first determination by the first comparator H1 is negative, the input circuit 51 outputs a non-winning signal notifying that the start port sensor SE1 has not detected a winning game ball.

  On the other hand, when the determination result of the first determination is affirmative (when the voltage input to the first input terminal IN1 is lower), the first comparator H1 outputs the voltage output from the fourth power supply D4 to the first output. It switches so that it may not input from terminal OUT1. That is, the first comparator H1 switches so that the fourth power source D4 is not grounded when the determination result of the first determination is affirmative. Thereby, a predetermined voltage is input from the fourth power supply D4 to the main CPU 30a. In the present embodiment, since the main CPU 30a is designed with a positive logic circuit, the main CPU 30a determines that a game ball has been won when the input voltage is high (high). That is, when the determination result of the first determination by the first comparator H1 is affirmative, the input circuit 51 outputs a winning signal notifying that the start port sensor SE1 has detected a winning game ball. Therefore, in the present embodiment, the first comparator H1 and the fourth power source D4 compare and determine whether or not the voltage input to the first input terminal IN1 is lower than the voltage input to the second input terminal IN2. One comparison determination element is configured.

  The second connection connector P2 is grounded via a second resistor R2 having a predetermined resistance value (680Ω in this embodiment) and is connected to the second comparator H2. The second comparator H2 has a third input terminal IN3 connected to the second connection connector P2, and a fourth input terminal IN4. The second comparator H2 has a second output terminal OUT2. The second output terminal OUT2 is connected to a fifth power source D5 that outputs a voltage of 5V through a sixth resistor R6, and is connected to the PNP. The transistor is connected to the base of the type transistor T1 (switching element).

  The fourth input terminal IN4 of the second comparator H2 is connected to one end of a fourth resistor R4 having a predetermined resistance value (3.3 KΩ in this embodiment), and has a predetermined resistance value (in this embodiment). , 51Ω) is grounded through a fifth resistor R5. The other end of the fourth resistor R4 is connected to a second power source D2 that outputs a voltage of 12V. That is, the second power supply D2 is grounded via the fourth resistor R4 and the fifth resistor R5, and the fourth input terminal IN4 is connected between the fourth resistor R4 and the fifth resistor R5. For this reason, the fourth input terminal IN4 inputs a voltage having a value obtained by dividing the voltage of 12V input from the second power supply D2 by the fourth resistor R4 and the fifth resistor R5.

  In the present embodiment, this voltage is the second reference voltage that is used as a reference when determining whether or not the start port sensor SE1 and the input circuit 51 are connected. For this reason, the second reference voltage has a voltage value higher than the voltage (0 V) input to the third input terminal IN3 in the unconnected state and has the lowest voltage value among the voltages input in the connected state ( The output voltage of the second power supply D2 and the resistance values of the fourth resistor R4 and the fifth resistor R5 are set so as to be lower than the voltage value of 0.4V (detection voltage). In the present embodiment, the second reference voltage is about 0.183V.

  Then, the second comparator H2 performs a second determination for determining whether or not the voltage input to the third input terminal IN3 is low with reference to the voltage input to the fourth input terminal IN4 (second reference voltage). To do. When the determination result of the second determination is affirmative (when the voltage input to the third input terminal IN3 is lower), the second comparator H2 outputs the voltage output from the fifth power supply D5 to the second output terminal OUT2. The voltage input to the ground side connected to the second comparator H2 is output. That is, the second comparator H2 switches the fifth power source D5 to ground when the determination result of the second determination is affirmative. As a result, no voltage is input from the fifth power supply D5 to the base of the transistor T1, and the voltage value of the voltage output from the input circuit 51 to the base of the transistor T1 is as close as possible to 0V (or becomes 0V).

  On the other hand, when the determination result of the second determination is negative (when the voltage input to the third input terminal IN3 is higher), the second comparator H2 outputs the voltage output from the fifth power supply D5 to the second output. It switches so that it may not input from terminal OUT2. That is, when the determination result of the second determination is affirmative, the second comparator H2 switches so that the fifth power supply D5 is not grounded. Thereby, the second comparator H2 causes the fifth power supply D5 to output a voltage (connection voltage) having a predetermined voltage value to the base of the transistor T1.

  The collector of the transistor T1 is connected to a first power supply D1 that outputs a voltage of 12 V via a seventh resistor R7 having a predetermined resistance value (3.3 KΩ in this embodiment). The emitter of the transistor T1 is grounded via an eighth resistor R8 having a predetermined resistance value (680Ω in this embodiment), and a ninth resistor having a predetermined resistance value (22KΩ in this embodiment). It is connected to one end of the resistor R9. The other end of the ninth resistor R9 is connected to the second input terminal IN2 of the first comparator H1, and is grounded via the second capacitor C2 (second power storage element). Furthermore, diodes (rectifier elements) are connected to both ends of the ninth resistor R9. That is, the ninth resistor R9 and the diode are connected in parallel between the first power supply D1 (more specifically, the emitter of the transistor T1) and the second input terminal IN2 of the first comparator H1. The diode flows current from the second input terminal IN2 side to the first power supply D1 side (emitter side of the transistor T1), and regulates the current in the reverse direction.

  As described above, the second input terminal IN2 of the first comparator H1 is connected between the seventh resistor R7 and the eighth resistor R8 via the ninth resistor R9, and is input from the first power supply D1. A voltage having a voltage value obtained by dividing the 12V voltage by the seventh resistor R7 and the eighth resistor R8 is input. In the present embodiment, this voltage is set as a first reference voltage used as a reference when determining whether or not the first comparator has input the detection voltage. Therefore, the output of the first power supply D1 is set so that the voltage value of the first reference voltage is higher than the detection voltage (0.4V) and lower than the non-detection voltage (5V). The voltage value and the resistance values of the seventh resistor R7 and the eighth resistor R8 are set. In the present embodiment, the first reference voltage is about 2.05V.

  The transistor T1 is switched so that the first power supply D1 outputs a voltage to the second input terminal IN2 side when the connection voltage is input to the base, and the first reference voltage is input to the second input terminal IN2. So that On the other hand, the transistor T1 switches so that the first power supply D1 does not output a voltage to the second input terminal IN2 side when the connection voltage is not input to the base (0V or a value close to 0V), and the second input terminal IN2 To prevent the first reference voltage from being input. Thereby, the transistor T1 releases the voltage input to the second input terminal IN2 to the ground side, and sets the voltage input to the second input terminal IN2 to 0V (or a value close to 0V as much as possible).

  Based on the above, the second comparator H2 and the fifth power source D5 of this embodiment compare and determine whether or not the voltage input to the third input terminal IN3 is lower than the voltage input to the fourth input terminal IN4. A second comparison / determination element is configured. Further, the transistor T1 of the present embodiment constitutes a switching element that switches whether to input the first reference voltage to the second input terminal side based on the connection voltage. The second comparator H2, the fifth power source D5, the second power source D2, and the transistor T1 of the present embodiment constitute a switching unit that switches whether or not to input the first reference voltage to the second input terminal IN2. .

  Next, the manner in which the input circuit 51 outputs a winning signal and a non-winning signal to the main CPU 30a when the detected voltage and the non-detecting voltage are input from the start port sensor SE1 will be described with reference to FIG. First, a case where the connection terminals S1 and S2 of the start port sensor SE1 are normally connected to the connection connectors P1 and P2, respectively, and the start port sensor SE1 does not detect a game ball will be described.

  The start port sensor SE1 continues to output a non-detection voltage of 5V to the input circuit 51 via the connection terminal S2 and the second connection connector P2 when the game ball is not detected. For this reason, the first input terminal IN1 of the first comparator H1 and the third input terminal IN3 of the second comparator H2 continue to input a non-detection voltage of 5V. At that time, the first capacitor C1 stores electric charge because a potential difference is generated between the both ends (the ground side and the first input terminal IN1 side). Since the first input terminal IN1 is input via the first resistor R1, the time when the input of the non-detection voltage is started (the time when the voltage rises) is slightly delayed from that of the third input terminal IN3. It has become. Further, since the first capacitor C1 stores electric charge, the voltage input to the first input terminal IN1 is stabilized.

  At this time, whether the second comparator H2 is lower than the non-detection voltage (5V) input to the third input terminal IN3 than the second reference voltage (about 0.182V) input to the fourth input terminal IN4. Determine whether. Since the determination result is negative, the second comparator H2 outputs a predetermined connection voltage from the fifth power supply D5 to the base of the transistor T1 by switching so that the fifth power supply D5 is not grounded.

  Since a predetermined connection voltage is input to the base of the transistor T1, switching is performed so that the first power supply D1 outputs a voltage to the second input terminal IN2. As a result, the second input terminal IN2 inputs the first reference voltage. At this time, the second capacitor C2 stores electric charge because a potential difference is generated between both ends thereof (the ground side and the second input terminal IN2 side). At this time, since the second capacitor C2 stores electric charge, the voltage input to the second input terminal IN2 is stabilized.

  The first comparator H1 determines whether or not the non-detection voltage (5V) input to the first input terminal IN1 is lower than the first reference voltage (about 2.05V) input to the second input terminal IN2. judge. Since this determination result is negative, the first comparator H1 switches so that the fourth power supply D4 is grounded. Thereby, the voltage value of the voltage output from the input circuit 51 to the main CPU 30a becomes 0V. That is, the input circuit 51 outputs a non-winning signal notifying that the start port sensor SE1 has not detected a game ball.

  When the main CPU 30a inputs from the input circuit 51 a non-winning signal for notifying that the starting port sensor SE1 has not detected a game ball, the main CPU 30a negates the determination result in the starting port winning determination of the winning process. That is, the main CPU 30a does not acquire the big hit determination random number and does not output the first payout control command.

Next, the case where the start port sensor SE1 detects a game ball will be described.
When a game ball is detected, the start port sensor SE1 outputs a detection voltage of 0.4 V to the input circuit 51 via the connection terminal S2 and the second connection connector P2. Therefore, the detection voltage of 0.4 V is input to the second input terminal IN2 of the first comparator H1 and the third input terminal IN3 of the second comparator H2 via the connection connector.

  At this time, the second comparator H2 determines whether the detection voltage (0.4V) input to the third input terminal IN3 is lower than the second reference voltage (about 0.182V) input to the fourth input terminal IN4. Determine whether. Since this determination result is the same as that at the time of non-detection and negative, the second comparator H2 does not change from that at the time of non-detection, and the fifth power source D5 is not grounded, and a predetermined connection voltage is applied from the fifth power source D5 to Output to the base of T1. Then, when a predetermined connection voltage is input to the base of the transistor T1, the first power supply D1 switches so as to output a voltage to the second input terminal IN2. As a result, the second input terminal IN2 inputs the first reference voltage.

  The first comparator H1 determines whether the non-detection voltage (0.4V) input to the first input terminal IN1 is lower than the first reference voltage (about 2.05V) input to the second input terminal IN2. Determine whether. Since this determination result is affirmative, the first comparator H1 switches so that the voltage output from the fourth power supply D4 is not input from the first output terminal OUT1. As a result, the fourth power supply D4 outputs a voltage to the main CPU 30a. That is, the input circuit 51 outputs a winning signal notifying that the start port sensor SE1 has detected a game ball.

  For this reason, the main CPU 30a inputs a winning signal indicating that the starting port sensor SE1 has detected a game ball from the input circuit 51, and therefore affirms the determination result in the starting port winning determination of the winning process. That is, the main CPU 30a acquires a jackpot determination random number and outputs a first payout control command.

Next, the case where the connection terminal S2 of the start port sensor SE1 is pulled out from the second connection connector P2 (unconnected state) will be described.
The start port sensor SE1 cannot output a voltage to the input circuit 51 regardless of whether the game ball is detected or not. Therefore, no voltage is input to the first input terminal IN1 of the first comparator H1 and the third input terminal IN3 of the second comparator H2 (that is, the input voltage becomes 0V).

  At this time, the second comparator H2 determines whether or not it is lower than the voltage (0 V) input to the third input terminal IN3 than the second reference voltage (about 0.182 V) input to the fourth input terminal IN4. judge. Since this determination result is affirmative, the second comparator H2 inputs the voltage output from the fifth power supply D5 from the second output terminal OUT2, and inputs the voltage input to the ground side connected to the second comparator H2. Output.

  As a result, the voltage from the fifth power supply D5 is not input to the base of the transistor T1, so that the transistor T1 switches so as not to output the voltage from the first power supply D1 to the second input terminal IN2. For this reason, no voltage is input to the second input terminal IN2 (that is, the input voltage is 0 V).

  Then, the first comparator H1 determines whether or not the voltage (0V) input to the first input terminal IN1 is lower than the voltage (0V) input to the first input terminal IN1. Since this determination result is always negative, the first comparator H1 switches so that the fourth power supply D4 is grounded. Thereby, the voltage value of the voltage output from the input circuit 51 to the main CPU 30a becomes 0V. That is, the input circuit 51 outputs a non-winning signal notifying that the start port sensor SE1 has not detected a game ball.

  For this reason, the main CPU 30a inputs a non-winning signal indicating that the starting port sensor SE1 has not detected a game ball from the input circuit 51, and therefore negates the determination result in the starting port winning determination of the winning process. That is, the main CPU 30a does not acquire the big hit determination random number and does not output the first payout control command.

  As described above, when the unconnected state is established, the input circuit 51 can always output a non-winning signal to the main CPU 30a. That is, even if a circuit that outputs a voltage corresponding to a non-detection voltage to the first input terminal IN1 when a non-connected state is detected without changing the first reference voltage as in the prior art is provided, depending on the situation There is a possibility that the voltage input to the first input terminal IN1 is instantaneously lower than the first reference voltage, and the first comparator H1 makes an affirmative determination and a winning signal is output instantaneously. However, according to the configuration of the present embodiment, when the connection is not established, the reference itself in the first determination can be changed and the reference can be set to 0V (or a value close to 0V as much as possible). . And even if considering the configuration of the input circuit 51, the performance variation of each member, the situation when not connected, etc., a voltage lower than 0 V is not input to the first input terminal IN1, The first comparator H1 always makes a negative determination. For this reason, the input circuit 51 can always output a non-winning signal to the main CPU 30a when not connected, so that no winning signal is erroneously input.

  The first capacitor C1 outputs a voltage to the first input terminal IN1 side for a predetermined time based on the stored charge at the same time that the voltage input to the first input terminal IN1 becomes 0V. Similarly, the second capacitor C2 outputs a voltage to the second input terminal IN2 side for a predetermined time based on the stored charge at the same time that the voltage input to the first input terminal IN1 becomes 0V. However, the voltage output from the second capacitor C2 is quickly output (escapes) to the ground side via a diode connected in parallel with the ninth resistor R9. On the other hand, the first capacitor C1 passes through the first resistor R1 and is slowly output (escapes) to the ground side. For this reason, the voltage input to the second input terminal IN2 becomes 0 V earlier than the voltage input to the first input terminal IN1. That is, the determination result of the determination by the first comparator H1 is definitely negative.

As described above in detail, the present embodiment has the following effects.
(1) The second comparator H2 does not output a voltage to the base of the transistor T1 when the voltage input from the start port sensor SE1 via the second connection connector P2 becomes lower than the detection voltage (0.4V). Switch to. Thereby, the transistor T1 switches so that the first reference voltage is not input to the second input terminal IN2, and the voltage input to the second input terminal IN2 is released to the ground side to be 0V. For this reason, regardless of the value of the voltage input to the first input terminal IN1, the first comparator H1 determines whether or not it is lower than the voltage input to the second input terminal IN2 (in this case, 0V). When a determination is made, the determination result is always negative. That is, depending on the settings of the power supply voltage, resistance values of various resistors, input port thresholds, individual differences (variations) of various circuit components, the state of the input circuit when the connector is disconnected, and the timing of disconnection Even when a voltage is input to the 1 input terminal IN1, the determination result is always negative because the first reference voltage as the reference for the first determination is 0V. Therefore, the input circuit 51 can always output a non-winning signal and input the winning signal to the main CPU 30a when the connection connectors P1 and P2 and the connection terminals S1 and S2 of the start port sensor SE1 are not connected. Thus, the erroneous input of the winning signal to the main CPU 30a can be surely eliminated. Therefore, the main CPU 30a does not instruct the payout control board 35 to pay out the prize ball even though the start opening sensor SE1 does not detect the game ball, and the jackpot determination random number is issued at an incorrect timing. It can be prevented from acquiring. In other words, it is possible to reliably prevent the game shop from being disadvantaged.

  (2) When the connection connectors P1 and P2 and the connection terminals S1 and S2 of the start port sensor SE1 are not connected, the first capacitor C1 inputs a voltage to the first input terminal IN1 by the stored charge. For this reason, the voltage input to the first input terminal IN1 can be set to 0 V more slowly than the voltage input to the second input terminal IN2. Therefore, the first comparator H1 is reliably prevented from making an affirmative determination, and erroneous input of a winning signal to the main CPU 30a can be more reliably eliminated.

  (3) Since the second capacitor C2 is connected to the second input terminal IN2, the first reference voltage input to the second input terminal IN2 can be stabilized. Thereby, the erroneous input of the winning signal to the main CPU 30a can be more reliably eliminated. In addition, when the transistor T1 is switched so as not to input the first reference voltage to the second input terminal IN2, the diode L1 connected to both ends of the ninth resistor passes a current from the second input terminal IN2 to the ground side. The voltage input to the second input terminal IN2 is set to 0V. That is, the second capacitor C2 outputs the voltage stored on the ground side via the diode L1. As a result, even when the second capacitor C2 is connected to the second input terminal IN2, the voltage input to the second input terminal IN2 can be set to 0 V earlier than the voltage input to the first input terminal IN1. Therefore, the first comparator is reliably prevented from making an affirmative determination, and erroneous input of a winning signal to the main CPU 30a can be more reliably eliminated.

In addition, the said embodiment can be embodied in another embodiment (another example) as follows.
In the above embodiment, the proximity switch is used for the start port sensor SE1, but other switches (or sensors) may be used. For example, instead of a proximity switch, a switch that closes a contact in response to game passing and outputs a voltage may be used. At this time, since the voltage when the game ball is detected becomes higher, the detected voltage and the non-detected voltage are input to the input circuit 51 via the negative operation circuit (NOT gate). In this case, the winning detection device is configured by the start port sensor SE1 and a negative operation circuit.

In the above embodiment, the second capacitor C2 and the diode L1 are provided. Further, although the first capacitor C1 is provided, it may not be provided.
In the above embodiment, the input circuit 51 is connected to the start port sensor SE1 and the big prize port sensor SE2, but it may be connected to other sensors such as a gate sensor.

In the above embodiment, the main CPU 30a is designed with a positive logic circuit, but may be designed with a negative logic circuit.
Next, a technical idea that can be grasped from the above embodiment and another example will be added below.

  (A) The switching means is connected to the connection connector and outputs a second reference voltage serving as a reference for determining whether or not a voltage is input from the connection connector. A third input terminal that inputs the non-detection voltage; and a fourth input terminal that is connected to the second power source and inputs the second reference voltage. The voltage input to the third input terminal is the first input terminal. If the determination result is affirmative by comparing whether or not the voltage is lower than the voltage input to the four input terminals, the connection voltage indicating that the connection connector and the winning detection device are connected is not output. When the determination result is negative, the second comparison determination element that outputs the connection voltage, and when the connection voltage is input, the first reference voltage input from the first power supply side is used. One input to the second input terminal side And a switching element for restricting input of the first reference voltage input from the first power supply side to the second input terminal side when the connection voltage is not input. The gaming machine according to any one of claims 1 to 3.

The front view which shows the machine surface side of a pachinko machine. The block diagram which shows the control structure of a pachinko gaming machine. The circuit diagram which shows an input circuit. The time chart which shows the input-output timing of the detection voltage in an input circuit.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... Pachinko machine (game machine), 20 ... Display device, 30 ... Main control board, 30a ... Main CPU (control device), 35 ... Dispensing control board, 36 ... Dispensing device, 51 ... Input circuit, C1 ... 1st Capacitor (first power storage element), C2 ... second capacitor (second power storage element), D1 ... first power source, D2 ... second power source (switching means), D3 ... third power source, D4 ... fourth power source (first power source) Comparison determination element), D5... Fifth power source (second comparison determination element), H1... First comparator (switching means, first comparison determination element), H2... Second comparator (second comparison determination element), IN1. 1 input terminal, IN2 ... 2nd input terminal, IN3 ... 3rd input terminal, IN4 ... 4th input terminal, OUT1 ... 1st output terminal, OUT2 ... 2nd output terminal, P1, P2 ... connection connector, R1 ... 1st Resistance, R2 ... second resistance, R3 ... third resistance R4 ... 4th resistor, R4 ... 4th resistor, R5 ... 5th resistor, R6 ... 6th resistor, R7 ... 7th resistor, R8 ... 8th resistor, R9 ... 9th resistor (resistance), L1 ... Diode (rectification) Element), S1... Connection terminal (plus side connection terminal), S2... Connection terminal (minus side connection terminal), SE1... Start port sensor (winning detection device), SE2 ... large prize opening sensor (winning detection device), T1. Transistor (switching means, switching element).

Claims (1)

Triggered by a control device that instructs payout of a winning ball, a winning detection device that detects a gaming ball and outputs a detection voltage for notifying that a gaming ball has been detected, and a detection voltage input from the winning detection device In a gaming machine comprising an input circuit that outputs a winning signal notifying that a game ball has been detected to the control device, and controlling the control device to pay out a winning ball when the winning signal is input,
The input circuit is
A connector for connecting to the winning detection device and inputting a non-detection voltage for notifying that the detection voltage and the game ball are not detected;
A first power source that outputs a first reference voltage serving as a reference for determining whether or not the detection voltage is input;
A first input terminal connected to the connection connector for inputting the detection voltage and the non-detection voltage; and a second input terminal connected to the first power source and input for the first reference voltage. If the determination result is affirmative by comparing whether or not the voltage input to the first input terminal is lower than the voltage input to the second input terminal, the winning signal is sent to the control device. A first comparison / determination element that outputs
Switching means for switching whether to input the first reference voltage output from the first power supply to the second input terminal;
The connection connector is configured to input the non-detection voltage at a voltage higher than the detection voltage to be input when the winning detection device does not detect a game ball and the winning detection device detects a game ball, When the winning detection device detects a game ball, the detection voltage is input at a voltage higher than 0V.
Between the first power source and the second input terminal, a resistor having a predetermined resistance value, and a rectifying element for passing a current from the second input terminal side to the first power source side and regulating a current in the reverse direction Are connected in parallel,
A second power storage element having one end grounded is connected to the second input terminal,
The terminal on the side where the second input terminal of the rectifying element is not connected is grounded,
The switching means inputs the detection voltage and the non-detection voltage from the connection connector, and when the voltage input from the connection connector becomes lower than the detection voltage, the first reference voltage is input to the second input. switching so as not to input to the terminal, and the escape of the voltage input to the second input terminal to the ground,
In the rectifying element, when the switching unit switches so as not to input the first reference voltage to the second input terminal, the voltage input to the second input terminal side is grounded from the second input terminal side. gaming machine, wherein, to feed into.

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