JP4808097B2 - Semiconductor switch integrated circuit - Google Patents

Description

  The present invention relates to a semiconductor switch integrated circuit used for switching high-frequency signals, and more particularly to a semiconductor switch integrated circuit capable of reducing the chip area.

  Conventionally, in a semiconductor switch integrated circuit used for switching high-frequency signals, as described in Patent Document 1, for example, a high-frequency signal leaks to a decoder circuit that controls a high-frequency signal switch element, and the decoder circuit malfunctions. In order to prevent this, an external or built-in bypass capacitor is connected to each control line.

  FIG. 4 shows an example of a conventional semiconductor switch integrated circuit of this type, which includes a decoder circuit unit 51, a bypass capacitor unit 54, and a high-frequency switch circuit unit 3. For example, the decoder circuit unit 51, the bypass capacitor unit 54, and the high-frequency switch The circuit unit 3 is formed on a GaAs substrate.

  The decoder circuit unit 51 includes decoder output terminals 52 and 53 that output a control signal for switching a high-frequency signal input terminal and an output terminal to the high-frequency switch circuit unit 3.

  The bypass capacitor unit 54 has one end connected to a control line 55 that transmits a control signal output from the decoder output terminal 52 and the other end grounded, and a bypass capacitor 57 that transmits the control signal output from the decoder output terminal 53. A bypass capacitor 58 having one end connected to the control line 56 and the other end grounded.

  The high-frequency switch circuit unit 3 includes a first input / output terminal 31, a second input / output terminal 32, and a third input / output terminal 33 for a high-frequency signal, and the first input / output terminal 31 and the second input / output terminal The first high frequency signal switch element 34 is connected between the first input / output terminal 31 and the third input / output terminal 33, and the second high frequency signal switch element 35 is connected between the first input / output terminal 31 and the third input / output terminal 33.

  Here, the first high-frequency signal switch element 34 includes a field effect transistor (hereinafter referred to as “FET”) 36 and a resistor 38, and the second high-frequency signal switch element 35 includes an FET 37 and a resistor 39. is doing.

  The control signal output from the decoder output terminal 52 is applied to the gate terminal of the FET 36 via the resistor 38, and the drain terminal and the source terminal of the FET 36 are turned on or off, and output from the decoder output terminal 53. The control signal is applied to the gate terminal of the FET 37 via the resistor 39, and the drain terminal and the source terminal terminal of the FET 37 are made non-conductive or conductive.

  The operation of the conventional circuit shown in FIG. 4 will be described. 5 shows a high-frequency signal passing path of the high-frequency switch circuit unit 3, an output voltage (control signal) of the decoder output terminal 52 (indicated as “V52” in FIG. 5), and an output voltage (control signal) of the decoder output terminal 53. It is the truth table shown (shown as “V53” in FIG. 5). For example, in order to bring the first input / output terminal 31 and the second input / output terminal 32 of the high-frequency switch circuit unit 3 into a conductive state (shown as “terminal 31-terminal 32” in FIG. 5), the decoder output A control signal (indicated as “H” in FIG. 5) for turning on the FET 36 of the first high-frequency signal switching element 34 is output from the terminal 52 via the control line 55, while the control line is output from the decoder output terminal 53. A control signal (indicated as “L” in FIG. 5) for turning off the FET 37 of the second high-frequency signal switch element 35 is output via 56.

  Further, in order to bring the first high-frequency input / output terminal 31 and the third high-frequency input / output terminal 33 of the high-frequency switch circuit unit 3 into a conductive state (shown as “terminal 31-terminal 33” in FIG. 5), A control signal for turning off the FET 36 of the first high-frequency signal switch element 34 is output from the decoder output terminal 52 via the control line 55, while the second high-frequency signal switch is output from the decoder output terminal 53 via the control line 56. A control signal for turning on the FET 37 of the element 35 is output.

In the high-frequency switch integrated circuit having such a configuration, when the decoder circuit unit 51 is formed by, for example, a GaAs semiconductor process, an output circuit (not shown) of the decoder circuit unit 51 is configured by an inverter having a resistance load and the FET 36 is turned on. When outputting a control signal to make a state, the decoder circuit 51 side viewed from the high-frequency switch circuit unit 3 side has high impedance. In such a state, when a high-frequency signal passing through the conductive high-frequency signal switch element 34 leaks to the control line 55, the leaked high-frequency signal may be transmitted to the decoder circuit unit 51, causing a malfunction of the decoder circuit unit 51. is there. In order to prevent such a malfunction, a bypass capacitor 57 is provided and grounded in high frequency via the bypass capacitor 57 so that a high frequency signal is not leaked to the decoder circuit unit 51 side. That is, the bypass capacitor 57 has a function of preventing a high-frequency signal from flowing between the high-frequency switch circuit unit 3 and the decoder circuit unit 51. The bypass capacitor 58 also functions in the same manner as the bypass capacitor 57.
JP 07-66705 A (FIGS. 1, 2, and 9)

  In the conventional high-frequency switch integrated circuit, the bypass capacitor 57 is connected to the control line 55 for transmitting a control signal for controlling the conduction state of the first high-frequency signal switch element 34, and the conduction state of the second high-frequency signal switch element 35 is controlled. The bypass capacitor 58 is provided on the control line 56 for transmitting the control signal, and it is necessary to provide the same number of bypass capacitors as the control line.

  However, when the semiconductor switch integrated circuit is formed on the same substrate, the bypass capacitor occupies a larger area than other elements. Therefore, in the case of the above-described high-frequency switch integrated circuit and a large-scale semiconductor switch integrated circuit that switches between a large number of input / output terminals, the number of control lines increases, and accordingly, the number of bypass capacitors also increases. End up. As a result, there arises a problem that the chip area increases and the cost increases. SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor switch integrated circuit that solves the above problems and has a small occupied area of a bypass capacitor.

  In order to achieve the above object, the present invention comprises a plurality of high-frequency signal input / output terminals and a high-frequency signal switch element connected between the input / output terminals. A high-frequency switch circuit unit that conducts between the input and output terminals; a decoder circuit unit that generates a control signal that renders the high-frequency signal switch element conductive or non-conductive, and outputs the control signal to the high-frequency switch circuit unit; In a semiconductor switch integrated circuit comprising a bypass capacitor connected to a control line for transmitting the control signal output from the decoder circuit section to the high-frequency signal switch element, each of the plurality of control lines includes a bypass capacitor switching switch element. One end is connected, and the other ends of the plurality of bypass capacitor changeover switch elements are connected to at least one of the bars. A bypass capacitor switching circuit unit is connected to one end of a pass capacitor and the other end of the bypass capacitor is connected to the ground, and the high frequency signal switch element is turned on from the decoder circuit unit via a control line. The control line for outputting a control signal for turning on the bypass capacitor changeover switch element connected at one end to the control line for transmitting a control signal and for transmitting the control signal for turning off the high-frequency signal switch element A control signal for making the bypass capacitor changeover switch element having one end connected to the non-conductive state is output.

  According to the present invention, it is possible to prevent the high-frequency signal from flowing from the high-frequency switch circuit unit 3 to the decoder circuit unit 51 with a smaller number of bypass capacitors than the control line for transmitting the control signal for controlling the high-frequency signal switch element. As a result, there is an advantage that the chip area is reduced and the cost is reduced.

  Hereinafter, embodiments of the present invention will be described in detail. FIG. 1 is an explanatory diagram of a semiconductor switch integrated circuit according to the present invention. The semiconductor switch integrated circuit of the present invention comprises a decoder circuit unit 1, a bypass capacitor switching circuit unit 2, and a high frequency switch circuit unit 3, and is formed on, for example, a GaAs semiconductor substrate.

  The decoder circuit unit 1 includes a first decoder output terminal 11 and a second decoder output terminal 12 that output a control signal to the high-frequency switch circuit unit 3, and a third decoder that outputs a control signal to the bypass capacitor switching circuit unit 2. An output terminal 13 and a fourth decoder output terminal 14 are provided.

  The bypass capacitor switching circuit unit 2 connects a first bypass capacitor switching element 25 and a second bypass capacitor switching element 26 in series between the first control line 21 and the second control line 22. A bypass capacitor 27 is provided between the connection point of the first bypass capacitor changeover switch element 25 and the second bypass capacitor changeover switch element 26 and the ground.

  The first bypass capacitor changeover switch element 25 is controlled to be in a conductive state or a nonconductive state by a control signal output from the third decoder output terminal 13 via the third control line 23. The second bypass capacitor changeover switch element 26 is controlled to be in a non-conductive state or a conductive state by a control signal output from the fourth decoder output terminal 14 via the fourth control line 24.

  The high-frequency switch circuit unit 3 includes a first input / output terminal 31, a second input / output terminal 32, and a third input / output terminal 33 for a high-frequency signal, and the first input / output terminal 31 and the second input / output terminal The first high-frequency signal switch element 34 is connected between the first input / output terminal 31 and the third input / output terminal 33. The second high-frequency signal switch element 35 is connected between the first input / output terminal 31 and the third input / output terminal 33. .

  The first high-frequency signal switch element 34 is controlled to be in a conductive state or a non-conductive state by a control signal output from the first decoder output terminal 11 via the first control line 21, and the second high-frequency signal switch element 34 The signal switch element 35 is controlled to be in a non-conductive state or a conductive state by a control signal output from the second decoder output terminal 12 via the second control line 22.

  Next, the operation of the embodiment of the present invention shown in FIG. 1 will be described. 2 shows a high-frequency signal passing path of the high-frequency switch circuit unit 3, an output voltage (control signal) of the first decoder output terminal 11 (indicated as “V11” in FIG. 2), and a second decoder output terminal 12 The output voltage (shown as “V12” in FIG. 2), the output voltage of the third decoder output terminal 13 (shown as “V13” in FIG. 2), and the output voltage of the fourth decoder output terminal 14 (shown in FIG. 2). 2 is a truth table showing “V14”.

  For example, in order to bring the first input / output terminal 31 and the second high-frequency input / output terminal 32 of the high-frequency switch circuit unit 3 into a conductive state (shown as “terminal 31-terminal 32” in FIG. 2), A control signal (indicated as “H” in FIG. 2) for turning on the first high-frequency switch element 34 is output from the first decoder output terminal 11 via the control line 21, while the second decoder output terminal 12 outputs a control signal (denoted as “L” in FIG. 2) for making the second high-frequency signal switch element 35 non-conductive through the second control line 22. At the same time, in the present invention, a control signal (indicated as “Hi” in FIG. 2) for turning on the first bypass capacitor changeover switch element 25 from the third decoder output terminal 13 via the third control line 23. And a control signal (indicated as “Lo” in FIG. 2) for turning off the second bypass capacitor changeover switch element 26 from the fourth decoder output terminal 14 via the fourth control line 24. When a high-frequency signal passing through the first high-frequency signal switch element 34 leaks to the first control line 21, the configuration is to ground at high frequency via the first bypass capacitor changeover switch 25 and the bypass capacitor 27. It is said.

  Similarly, in order to bring the first high-frequency input / output terminal 31 and the third high-frequency input / output terminal 33 of the high-frequency switch circuit 3 into a conductive state (shown as “terminal 31-terminal 33” in FIG. 2), A control signal for turning off the first high-frequency signal switch element 34 is output from the first decoder output terminal 11 via the control line 21, while the second decoder output terminal 12 via the second control line 22 is output. Then, a control signal for turning on the second high-frequency signal switch element 35 is output. At the same time, a control signal for making the first bypass capacitor changeover switch element 25 non-conductive is output from the third decoder output terminal 13 via the third control line 23, and the fourth decoder output terminal 14 outputs the fourth signal. A control signal for turning on the second bypass capacitor changeover switch element 26 is output via the control line 24, and a high-frequency signal passing through the second high-frequency signal switch element 35 leaks to the second control line 22. In such a case, the first ground capacitor 26 and the bypass capacitor 27 are grounded at a high frequency.

  Next, examples of the present invention will be described. FIG. 3 is a circuit diagram of an embodiment of the present invention. The first bypass capacitor change-over switch element 25 is an FET 28, the second bypass capacitor change-over switch element 26 is an FET 29, the first high-frequency signal switch element 34 is an FET 36 and a resistor 38, and the second high-frequency signal switch element 35 is an FET 37. A resistor 39 is used.

  In the semiconductor switch integrated circuit having such a configuration, the control signal output from the decoder circuit unit 1 is a voltage signal for setting each FET in an operating state or a non-operating state.

  As described above, according to the present invention, the control for preventing the high-frequency signal from wrapping between the high-frequency switch circuit unit 3 and the decoder circuit unit 1 and controlling the conduction state or non-conduction state of the first high-frequency signal switch element 34. One bypass capacitor 27 is provided for the first control line 21 for transmitting a signal and the second control line 22 for transmitting a control signal for controlling the conduction state or non-conduction state of the second high-frequency signal switch element 35. The number of bypass capacitors can be reduced compared to the conventional circuit. As a result, the area occupied by the bypass capacitor is reduced, and the chip area and cost can be reduced.

  In the above-described embodiment, the case where the high-frequency switch circuit is two high-frequency signal switch elements has been described. However, the present invention is not limited to the case where the high-frequency switch circuit is configured by two high-frequency signal switch elements. The present invention can also be applied to a semiconductor switch integrated circuit composed of high-frequency signal switch elements. In this case, if the present invention is applied, the control signal for transmitting the control signal is bypassed via the bypass capacitor changeover switch element in accordance with the conduction / non-conduction state of the high-frequency signal switch element in the passage path to be in the conduction state. By adopting a configuration in which capacitors are connected, the number of bypass capacitors can be further greatly reduced, and the effect is great.

It is explanatory drawing of the semiconductor switch integrated circuit of this invention. It is a truth table which shows the passage path of the semiconductor switch integrated circuit of this invention, and the output voltage of a decoder circuit. It is a circuit diagram of the semiconductor switch integrated circuit of the Example of this invention. It is explanatory drawing of the conventional semiconductor switch integrated circuit. It is a truth table which shows the passage path of the conventional semiconductor switch integrated circuit, and the output voltage of a decoder circuit.

Explanation of symbols

1: decoder circuit unit, 2: bypass capacitor switching circuit unit, 3: high frequency switch circuit unit, 11: first decoder output terminal, 12: second decoder output terminal, 13: third decoder output terminal, 14: 4th decoder output terminal, 21: 1st control line, 22: 2nd control line, 23: 3rd control line, 24: 4th control line, 25: 1st bypass capacitor changeover switch element, 26: second bypass capacitor changeover switch element, 27: bypass capacitor, 28, 29, 36, 37: field effect transistor (FET), 31: first input / output terminal, 32: second input / output terminal, 33 : Third input / output terminal, 34: first high frequency signal switch element, 35: second high frequency signal switch element, 38, 39: resistor, 51: decoder circuit section, 52, 53: decoder output Terminal, 54: bypass capacitors, 55 and 56: control lines, 57, 58: Bypass capacitor

Claims (1)

A high-frequency signal input / output terminal and a high-frequency signal switch element connected between the input / output terminals, and the high-frequency signal switch element is in a conductive state, whereby the high-frequency signal switch element is in a conductive state. A switch circuit section;
A decoder circuit unit that generates a control signal for making the high-frequency signal switch element conductive or non-conductive, and outputs the control signal to the high-frequency switch circuit unit;
In a semiconductor switch integrated circuit comprising a bypass capacitor connected to a control line for transmitting the control signal output from the decoder circuit section to the high-frequency signal switch element,
One end of a bypass capacitor changeover switch element is connected to each of the plurality of control lines, and the other end of the plurality of bypass capacitor changeover switch elements is connected to one end of at least one bypass capacitor. Provided with a bypass capacitor switching circuit section whose end is connected to the ground,
From the decoder circuit unit, a control signal for turning on the bypass capacitor changeover switch element connected at one end to the control line through which a control signal for turning on the high-frequency signal switch element is transmitted via the control line. And outputting a control signal for turning off the bypass capacitor changeover switch element having one end connected to the control line for transmitting a control signal for turning off the high-frequency signal switch element. Switch integrated circuit.

Images