JP4805191B2 - Limiter circuit - Google Patents

Description

  The present invention relates to a limiter circuit using a PIN diode applied to, for example, a radar.

  As is well known, a radar system typically includes an antenna, a transmitter, and a receiver. Radar system transmitters typically include an oscillator that is turned on and off to generate a series of pulses having a pulse repetition period. This pulse is supplied to the antenna and transmitted as a radio wave toward the space. The reflected wave from the target is received by the antenna, converted into a received signal, and used for target detection and angle measurement processing. In such a radar system, it is generally known that circuit elements used in a low noise amplifier of an RF receiver include those that can be destroyed by a high power RF signal. Examples of high-power RF signals that are threats to RF receivers include leakage from the transmitter side of the radar and reception input from jammers. Therefore, there is a need to protect an RF receiver having a potentially destructive circuit from an input signal having a high power level.

By the way, development of an amplifier element for a transmitter used in a radar system has progressed, and the output power level of the transmitter tends to further increase in the future. On the other hand, low noise amplifiers for receivers used in radar systems have been developed with an emphasis on low noise, and power handling tends to decrease. One approach for protecting the receiver from high power RF signals in response to these conflicting trends is a limiter circuit using a PIN diode.
A generally known limiter circuit is composed of at least one, preferably two or more PIN diodes and their driver circuits, which are mounted in a shunt state between the transmission line and a reference potential. The limiter circuit is inserted between an input signal source such as an antenna and a circuit requiring protection such as an RF receiver. When the limiter circuit operates in a normal non-limiting mode, the limiter circuit is required to make the PIN diode nonconductive and to provide a relatively low insertion loss characteristic to the input signal. On the other hand, when operating in limited mode, the PIN diode must be in a forward biased conduction state to provide very high insertion loss characteristics when a high power RF signal is input to the RF receiver. The

  Further, as a limiter circuit, in order to sufficiently protect the RF receiver when a high-power RF signal is input in the reception state, a coupler is attached in front of the PIN diode, and the RF extracted from the coupler There is a circuit that switches between a non-restriction mode and a restriction mode by detecting a signal with a detection diode and driving the PIN diode with the detected power (see, for example, Patent Document 1).

JP 2004-40173 A

  In the case of the self-bias type limiter circuit using the detection power, it is necessary to increase the coupling amount of the coupler in order to obtain a high insertion loss characteristic in the limit mode. On the other hand, in order to improve the power resistance of the limiter, it is necessary to reduce the coupling amount of the coupling circuit due to restrictions on the withstand voltage of the detection diode. That is, obtaining a high insertion loss characteristic in the limited mode is contrary to increasing the power resistance of the limiter circuit. In addition, the limiter circuit provided with the coupler has a long high impedance line due to the layout, and the impedance of the PIN diode changes due to the RF input power, so that it is difficult to obtain a driver circuit that maintains stable performance. .

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a limiter circuit that can provide a stable and high insertion loss characteristic in the limited mode and can increase the withstand power.

The limiter circuit according to the present invention includes a matching circuit having a capacitor connected in series on the input side and connected to the coupling circuit, and a detection diode and a shunt connected detection diode connected in series on the output side of the rectifier circuit. A shunt between a high impedance line provided in front of a shunt-connected capacitor, and a midpoint between the RF choke coil and the RF short capacitor provided on the output side of the high impedance line and the RF line. As the power of the RF signal of a specific frequency to the matching circuit extracted from the coupling circuit is increased from the low power to the high power, the input reflection coefficient of the matching circuit becomes a small reflection coefficient. By increasing from a large reflection coefficient to a large reflection coefficient, the matching circuit is connected to series connected detector diodes and shunts. The power of the RF signal input to the connected detector diode suppressed below a predetermined value, the R F signal of a specific frequency output from the matching circuit multiplied pressure wave, RF choke coils via a high-impedance line And a driver circuit that outputs a bias voltage from the midpoint of the RF short capacitor.

According to the present invention, a matching circuit having a capacitor connected in series on the input side and connected to the coupling circuit, a detection diode connected in series to the output side of the rectifier circuit, and a detection diode connected in shunt are provided. A shunt connection is made between the high impedance line provided in front of the shunt-connected capacitor and the midpoint of the RF choke coil and the RF short capacitor provided on the output side of the high impedance line and the RF line. As the power of the RF signal of a specific frequency to the matching circuit extracted from the coupling circuit increases from low power to high power, the input reflection coefficient of the matching circuit increases from the low reflection coefficient to the high power. By increasing the reflection coefficient, the matching circuit is connected in series connected detector diodes and shunts The power of the RF signal input to the wave diode suppressed below a predetermined value, the R F signal of a specific frequency output from the matching circuit multiplied pressure wave, RF choke coil and RF short through a high-impedance line Since it has a driver circuit that outputs a bias voltage from the midpoint of the capacitor, the entire limiter circuit can be reduced without reducing the insertion loss characteristics in the limited mode and withstand voltage per diode. It is possible to achieve high power durability.
In addition, the impedance change amount seen from the output side of the RF power detection and rectification diode accompanying the impedance change of the PIN diode can be reduced by the routing of the high impedance line and the RF input power, so that more stable performance is maintained in a wide RF input power range. Drive circuit can be obtained.

Embodiment 1 FIG.
1 is a circuit diagram showing a basic configuration of a PIN diode limiter circuit according to a first embodiment of the present invention.
In the figure, DC cut capacitors 10 and 14 are connected in series to the RF line. The anode of the PIN diode 11 is connected to the line between the DC cut capacitors 10 and 14, and the cathode is connected to the reference potential. Further, between the DC cut capacitors 10 and 14 between the RF line downstream of the PIN diode 11 and the reference potential, a quarter wavelength line (including a substantially quarter wavelength line) 12 and an RF short shunt capacitor 13 are provided. A series circuit is connected. A choke coil may be used instead of the quarter wavelength line 12. A coupler 15 is connected to the input side of the limiter circuit, and a driver circuit 22 is connected between the coupler 15 and a connection point between the quarter wavelength line 12 and the RF short-circuit shunt capacitor 13.

The driver circuit 22 includes a matching circuit 16, a shunt-connected detector diode 17, a series-connected detector diode 18, a shunt-connected capacitor 19, a high-impedance line 20, and a shunt-connected resistor 21. The RF signal taken out from the coupler 15 is converted into a PIN diode drive current.
This limiter circuit is a self-bias type limiter circuit that shifts between the states of the non-restriction mode and the restriction mode in accordance with the level of RF power incident from the input terminal. In the non-restricted mode, since no bias voltage is applied from the driver circuit 22, the PIN diode 11 is in an open state and gives a low insertion loss characteristic. On the other hand, since the bias voltage is applied in the limit mode, the PIN diode 11 is short-circuited and gives high insertion loss characteristics. The bias voltage applied to the PIN diode 11 can be obtained by detecting and rectifying the RF power extracted by the coupling circuit 15 by the driver circuit 22.

  The matching circuit 16 provided on the input side of the driver circuit 22 is for efficiently propagating the RF power having a specific frequency extracted by the coupling circuit 15 to the detection diodes 17 and 18. Including a circuit composed of L and C. FIG. 2 shows the input reflection loss of the driver circuit 22 when the matching point with respect to the RF power of the matching circuit 16 is changed. As shown in FIG. 2, the matching circuit 16 has a function of determining a matching point for RF power. Therefore, the matching point for RF power is optimized to achieve high power durability and a wide dynamic range. To do. In other words, when the design is made with a small RF power as a matching point, the shunt-connected detection diode 17 and the series-connected detection diode 18 start to operate at a small RF power point, so that the drive current of the PIN diode 11 can be easily obtained. . On the other hand, since the input reflection loss becomes large at a large RF power point, the input power ratio of the driver circuit 22 becomes small, and excessive power is suppressed from being applied to the shunt-connected detection diode 17 and the series-connected detection diode 18. Thus, it is possible to prevent the withstand voltage of the diodes 17 and 18 from being exceeded.

  When the RF signal propagated from the coupling circuit 15 and the matching circuit 16 is negative with respect to the reference potential, the shunt-connected detection diode 17 is short-circuited and the series-connected detection diode 18 is open. When the RF signal propagated from the coupling circuit 15 and the matching circuit 16 is positive with respect to the reference potential, the detection diode 17 is in an open state and the detection diode 18 is in a short circuit state. In this case, since the matching circuit 16 includes a capacitor in series with the detection diode 18, the capacitor is charged by the current flowing from the detection diode 17 when the RF signal is negative with respect to the reference potential. When the RF signal is positive with respect to the reference potential, a voltage obtained by adding the charging voltage to the input voltage is applied to the detection diode 18. As a detection characteristic, the output voltage is rectified by a double voltage. That is, the detection diode 17 and the detection diode 18 constitute a detection circuit that performs double voltage detection including the capacitor of the matching circuit 16.

  By the way, when a detection circuit is used in the self-bias type limiter, the PIN diode 11 whose cathode is connected to the reference potential and whose anode is connected to the RF main line is a load of the detection circuit, and the output power of the detection circuit is the PIN diode 11. Clipped with a forward voltage of. Therefore, the output voltage of the detection circuit is constant with the forward voltage of the PIN diode 11, and the advantage of the detection circuit in which the output voltage is doubled cannot be expected. However, as described above, the voltage is applied to the shunt-connected detector diode 17 and the series-connected detector diode 18 regardless of whether the RF power is positive or negative. Since the reverse withstand voltage is reduced, the use of this detector circuit enables the limiter circuit to have high power resistance.

  Next, considering the case where the shunt-connected capacitor 19 is not loaded, the matching circuit 16 is optimized using the shunt-connected detection diode 17 and the series-connected detection diode 18 as described above. However, as shown in FIG. 3A, the input side of the high impedance line 20 is seen due to the impedance change of the PIN diode 11 accompanying the change in the electrical length of the high impedance line 20 and the input power depending on the circuit layout. The impedance spreads and the matching circuit 16 does not function effectively. On the other hand, considering the case where the shunt-connected capacitor 19 is loaded, as shown in FIG. 3B, since the impedance viewed from the input side of the high-impedance line 20 gathers near the short point, a wide input power The matching circuit 16 can function effectively in the range, and the limiter circuit can have a wide dynamic range and high power durability.

  As described above, according to the first embodiment, a shunt-connected detection diode is formed on the input side of the series-connected RF power detection diode 18 so as to form a voltage doubler detection circuit with the detection diode 18. 17 is provided, it is possible to increase the power resistance of the entire limiter circuit without reducing the insertion loss characteristic in the limit mode and reducing the withstand voltage per detection diode. In addition, since the matching circuit 16 has a configuration in which the matching power can be arbitrarily set according to the RF input power range, the RF power input to the detection circuit can be suppressed, so that the power of the entire limiter circuit can be increased. In addition, a limiter circuit that can operate in a wide input power range can be obtained. Further, since the shunt-connected capacitor 19 is provided on the output side of the detection circuit, the output side of the RF power detection rectification diode accompanying the impedance change of the PIN diode 11 due to the routing of the high impedance line by the layout and the RF input power. Since the amount of change in impedance seen from the viewpoint can be reduced, a drive circuit that maintains more stable performance in a wide RF input power range can be obtained.

Embodiment 2. FIG.
4 is a circuit diagram showing a PIN diode limiter circuit according to a second embodiment of the present invention.
In the second embodiment, a series connection of two or more diodes is used as the shunt connection detection diode 17 and the series connection detection diode 18 in the first embodiment. As a result, the withstand voltage per detection diode can be further lowered, and therefore, it is possible to further increase the power withstand capability of the entire limiter circuit.

Embodiment 3 FIG.
FIG. 5 is a circuit diagram showing a PIN diode limiter circuit according to the third embodiment of the present invention.
In the third embodiment, the shunt-connected capacitor 19 in the first and second embodiments is replaced with a distributed constant line (open stub) 23. In this case as well, like the shunt-connected capacitor 19, the impedance change amount seen from the output side of the RF power detection rectification diode accompanying the impedance change of the PIN diode 11 by the routing of the high impedance line by the layout and the RF input power can be reduced. Therefore, it is possible to obtain a drive circuit that maintains more stable performance in a wide RF input power range. Further, since an increase in time constant caused by a lumped constant can be avoided, an effect of improving the spike leakage characteristics of the limiter circuit can be expected.

1 is a circuit diagram showing a basic configuration of a PIN diode limiter circuit according to a first embodiment of the present invention. FIG. It is explanatory drawing which shows the input reflection loss of a driver circuit at the time of changing the matching point with respect to RF electric power of the matching circuit which concerns on Embodiment 1 of this invention. It is explanatory drawing which shows the impedance change at the time of seeing a high impedance line from the output side of the detection diode by the impedance change of the PIN diode which concerns on Embodiment 1 of this invention. It is a circuit diagram which shows the basic composition of the PIN diode limiter circuit by Embodiment 2 of this invention. It is a circuit diagram which shows the basic composition of the PIN diode limiter circuit by Embodiment 3 of this invention.

Explanation of symbols

10 , 14 DC cut capacitor, 11 PIN diode, 12 approximately 1/4 wavelength line (or RF choke coil), 13 RF short capacitor, 15 coupling circuit, 16 matching circuit, 17, 18 detector diode, 19 capacitor, 20
High impedance line, 21 resistor, 22 driver circuit, 23 distributed constant line (open stub).

Claims (1)

A PIN diode shunt-connected between the RF line and the reference potential, a coupling circuit branched from the input side of the RF line, and an RF signal extracted from the coupling circuit are converted into a driving current for the PIN diode. In a limiter circuit with a driver circuit,
The driver circuit is
A matching circuit having a capacitor connected in series on the input side and connected to the coupling circuit, and a shunt connected via a detection diode and a shunt connected detection diode connected in series on the output side of the rectifier circuit A high impedance line provided in front of a capacitor, and a resistor shunt-connected between the high impedance line and the RF choke coil provided on the output side of the RF line and the midpoint of the RF short capacitor Configured,
As the power of the RF signal of a specific frequency to the matching circuit extracted from the coupling circuit increases from low power to high power, the input reflection coefficient of the matching circuit changes from a small reflection coefficient to a large reflection coefficient. By increasing, the matching circuit suppresses the power of the RF signal input to the series-connected detection diode and the shunt-connected detection diode to a predetermined value or less,
And wherein the input RF signal of the specific frequency output from the matching circuit was multiplied pressure wave, and outputs a bias voltage from the midpoint between the RF choke coil and the RF short capacitor through the high-impedance line Limiter circuit to perform.

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