JP4801687B2 - Capacitor-embedded substrate and manufacturing method thereof - Google Patents

Description

  The present invention relates to a capacitor built-in substrate and a method for manufacturing the same, and more particularly to a capacitor built-in substrate that is preferably applied to an interposer interposed between a semiconductor chip and a package substrate and a method for manufacturing the same.

  In a semiconductor integrated circuit element (LSI) such as a microprocessor, the operation speed is increased and the power consumption is reduced. In order to stably operate an LSI in a high frequency region in the GHz band and at a low voltage, it is necessary to suppress fluctuations in the power supply voltage caused by a sudden fluctuation in load impedance. Furthermore, it is extremely important to remove high frequency noise from the power supply.

  Conventionally, a method of mounting a large number of multilayer chip ceramic capacitors on a package substrate on which an LSI is mounted has been employed in order to suppress rapid voltage fluctuations and remove high frequency noise. Also, a method of incorporating a decoupling capacitor in an interposer interposed between an LSI and a package substrate is known (Patent Documents 1 to 3). According to this method, a decoupling capacitor can be disposed immediately below the LSI. Thereby, the routing wiring from the power supply line and the ground line to the decoupling capacitor can be shortened. This configuration is effective in reducing parasitic inductance.

  In order to increase the capacitance of the capacitor, a thin film capacitor having a thin dielectric layer is known (Patent Documents 4 to 6). The thin film capacitor is formed by depositing a metal electrode layer, a dielectric oxide layer or the like on a support substrate such as silicon, and fine processing by dry etching. For this reason, it is possible to form a low-inductance capacitor.

  On the other hand, solid electrolytic capacitors are known as large-capacity capacitors. However, in the solid electrolytic capacitor, the terminal length and the wiring length become long due to the structure, so that the equivalent series resistance (ESR) and the equivalent series inductance (ESL) increase. For this reason, the solid electrolytic capacitor could not be expected to have sufficient performance as a decoupling capacitor in a high frequency region. A structure for reducing ESR and RSL of a solid electrolytic capacitor has been proposed (Patent Documents 7 to 10).

Japanese Patent Laid-Open No. 7-176453 JP 2001-35990 A JP 2004-304159 A JP 2003-197463 A JP 2004-79801 A JP 2004-214589 A Japanese Patent Application Laid-Open No. 2005-108772 JP 2001-307955 A JP-A-2005-12084 JP 2004-172154 A

  In a conventional configuration in which a thin film capacitor is disposed on a support substrate, a conductive plug connected to the electrode of the thin film capacitor and penetrating the support substrate must be disposed. Since the support substrate needs to have a certain thickness in order to obtain a sufficient mechanical support force, it is difficult to dispose a conductive plug passing therethrough.

  In order to stabilize the power supply voltage, the capacity required for the decoupling capacitor tends to increase. If the capacitance per unit area is constant, the decoupling capacitors must be increased or the number of mounted capacitors must be increased. For this reason, it is difficult to secure a mounting space for the capacitor.

  For the electrode of the thin film capacitor, a precious metal that is hardly oxidized such as Pt or Au is generally used. In addition, an expensive vacuum apparatus such as a sputtering apparatus for forming a high dielectric constant material and a plasma etching apparatus for performing fine processing of a thin film must be introduced. Furthermore, it costs money for particle removal measures. For this reason, it is difficult to reduce the manufacturing cost.

  Further, even in a conventional solid electrolytic capacitor capable of reducing ESR and ESL, there is a concern that the capacitor forming process and the solder bump forming process may be complicated.

A substrate with a built-in capacitor that solves the above problems
A support substrate having a first recess and a second recess formed on the surface;
A conductive film formed on the inner surface of the first recess;
A first electrode film, a dielectric film, and a second electrode film are laminated, and the second electrode film is disposed on the surface and the conductive film in a direction toward the support substrate, and a part thereof A capacitor film disposed along at least a part of a side surface of the second concave portion so that the second electrode film is in contact with the conductive film;
An insulating coating film disposed on the surface and the capacitor film;
A first conductive member that reaches from the top surface of the coating film to the back surface of the support substrate at a position where the first concave portion is formed, and contacts the conductive film formed on the inner surface of the concave portion;
A second conductive member that reaches from the top surface of the coating film to the back surface of the support substrate at the position where the second recess is formed, and contacts the first electrode film of the capacitor film along the inner surface of the recess. And have.

A method of manufacturing a capacitor-embedded substrate that solves the above problems
Preparing a capacitor film in which a first electrode film, a dielectric film, and a second electrode film are laminated;
Forming a first opening and a second opening larger than the first opening in the capacitor film;
Forming a first recess and a second recess at positions corresponding to the first opening and the second opening on the surface of the support substrate, respectively;
Forming a conductive film on the inner surface of the first recess and a partial region of the surface continuous with the inner surface;
The second electrode film faces the support substrate, the positions of the first opening and the first recess are aligned, the positions of the second opening and the second recess are aligned, and the first Bonding the capacitor film to the support substrate so that the two electrode films are electrically connected to the conductive film;
A step of adhering an insulating resin film to the capacitor film so that a portion adjacent to the edge of the second opening of the capacitor film is along the inner surface of the second recess;
Forming a plurality of bottomed holes at the positions of the first and second openings so that the first electrode film is exposed;
Filling the bottomed hole with a conductive member;
Polishing the support substrate from a second surface opposite to the first surface to expose a lower end of the conductive member.

  A recess is formed in the support substrate, and the conductive member is disposed at the position of the recess. For this reason, it is not necessary to penetrate a thick support substrate. A solid electrolytic capacitor can be used for the capacitor film. When a solid electrolytic capacitor is used, the capacity density can be increased.

  With reference to FIGS. 1A to 3H, a method of manufacturing a capacitor built-in substrate according to the first embodiment will be described.

  The surface of the first electrode film 10 made of a valve metal such as aluminum shown in FIG. 1A is made porous by electrolytic etching. The thickness of the first electrode film 10 is about 0.1 mm, for example.

  As shown in FIG. 1B, an oxide film 11 is formed by anodizing the porous surface of the first electrode film 10. Hereinafter, a method for forming the oxide film 11 will be described.

  First, the first film 10 is washed with hydrofluoric acid and distilled water. Thereafter, anodization is performed in an aqueous solution in which 150 g of ammonium adipate is dissolved in 1000 ml of pure water. The aqueous solution temperature during anodization was 85 ° C., the formation voltage was 100 V, the current was 0.3 A, and the voltage application time was 20 minutes. In addition, you may use ammonium pentaborate aqueous solution etc. for anodization.

  After the oxide film 11 is formed, a solution containing polyethylene dioxythiophene and styrene sulfonic acid is applied onto the oxide film 11 and dried. By repeating this process twice, a second electrode film 12 made of a conductive polymer and having a thickness of about 15 μm is formed. The first electrode film 10, the oxide film 11, and the second electrode film 12 constitute a solid electrolytic capacitor. The first electrode film 10 becomes an anode, and the second electrode film 12 becomes a cathode.

  FIG. 1C shows an example of an enlarged sectional view of the porous surface of the first electrode film 10, the oxide film 11 covering the surface, and the second electrode film 12. Since the surface of the first electrode film 10 has a porous structure, the effective area of the capacitor increases.

  As shown in FIG. 1D, a plurality of openings are formed in three layers from the first electrode film 10 to the second electrode film 12. The plurality of openings are divided into openings 15A belonging to the first group (cathode group) and openings 15B belonging to the second group (anode group). The planar shape of the openings 15A and 15B is circular, and the diameter of the opening 15A belonging to the first group is larger than the diameter of the opening 15B belonging to the second group. For example, the diameter of the first group of openings 15A is 150 μm, and the diameter of the second group of openings 15B is 50 μm. These openings 15A and 15B can be formed, for example, by press punching using a mold. Thereby, the capacitor film 18 in which the openings 15A and 15B are formed is completed.

  FIG. 1E shows a partial plan view of the capacitor film 18. A cross-sectional view taken along one-dot chain line 1D-1D in FIG. 1E corresponds to FIG. 1D. The openings 15A and 15B are arranged in a matrix. The first group of openings 15A and the second group of openings 15B are alternately arranged in the row direction and the column direction.

  As shown in FIG. 2A, a support substrate 20 made of an insulating material such as Pyrex glass is prepared. The thickness of the support substrate 20 is, for example, 300 μm.

As shown in FIG. 2B, a plurality of recesses are formed on one surface of the support substrate 20. The plurality of recesses are divided into a first group of recesses 22A and a second group of recesses 22B. Sand blasting can be employed to form these recesses. The opening surfaces of the recesses 22A and 22B are circular with a diameter of 350 μm, and the depth is 200 μm. The side surfaces are tapered, and the bottom surfaces of the recesses 22A and 22B are circular with a diameter of 150 μm. By using the sand blast method, a concave portion having a tapered side surface can be formed in this way. In place of the sand blasting method, wet etching using a chemical solution such as hydrofluoric acid, or dry etching using a reactive gas such as CF ₄ may be employed.

  FIG. 2C shows a partial plan view of the support substrate 20. A cross-sectional view taken along one-dot chain line 2B-2B in FIG. 2C corresponds to FIG. 2B. The first group of recesses 22A and the second group of recesses 22B correspond to positions corresponding to the first group of openings 15A and the second group of openings 15B, respectively, when the capacitor film 18 is stacked on the support substrate 20. Placed in. The size of the opening surface of the first group of recesses 22A is larger than that of the first group of openings 15A, and the size of the opening surface of the second group of recesses 22B is larger than that of the second group of openings 15B. large. In addition to the recesses 22A and 22B belonging to the first and second groups, the support substrate 20 is also formed with a plurality of recesses 22C belonging to the third group.

  FIG. 3A shows a cross-sectional view of the support substrate 20 in which the recesses 22A, 22B, and 22C belonging to the first to third groups are formed. The shape of the recess 22C belonging to the third group is the same as the shape of the recesses 22A and 22B belonging to the first and second groups.

  A conductive film 25 is formed on the surface of the support substrate 20 including the inner surfaces of the recesses 22A, 22B, and 22C. The conductive film 25 has a two-layer structure in which, for example, a 0.08 μm thick Cr film and a 0.5 μm thick Cu film are laminated in this order. The Cr film and the Cu film can be formed by sputtering, for example. The Cr film increases the adhesion of the Cu film.

  As shown in FIG. 3B, the conductive film 25 is patterned to expose the inner surface of the second group of recesses 22B and the periphery and the inner surface of the third group of recesses 22C. The inner surface of the first group of recesses 22 </ b> A remains covered with the conductive film 25.

  As shown in FIG. 3C, the capacitor film 18 is bonded to the support substrate 20 with a conductive adhesive so that the second electrode film 12 faces the support substrate 20 side. In FIG. 3C, the display of the oxide film 11 is omitted. The first group of openings 15A and the second group of openings 15B of the capacitor film 18 are positioned so as to be aligned with the first group of recesses 22A and the second group of recesses 22B formed in the support substrate 20, respectively. Align. It is preferable that the centers of the first group of openings 15A and the second group of openings 15B coincide with the centers of the first group of recesses 22A and the second group of recesses 22B. The capacitor film 18 is not disposed in the vicinity of the third group of recesses 22C.

  Since the opening 15A of the first group and the opening 15B of the second group are smaller than the opening surfaces of the recesses 22A and 22B, the portions adjacent to the edges of the openings 15A and 15B of the capacitor film 18 are the openings 22A and 22B. It is in a state of protruding like a bowl from the edge toward the center. The first group of openings 15A may be larger than the opening surface of the first group of recesses 22A. The second group of openings 15B is preferably smaller than the opening surface of the second group of recesses 22B. It should be noted that the hook-shaped portion formed on the opening surface of the second group of recesses 22B does not necessarily have to be disposed on the entire outer periphery of the opening surface. You may arrange | position a bowl-shaped part only in a part of outer periphery of an opening surface.

  For example, an epoxy silver paste can be used as the conductive adhesive. The curing temperature is 120 ° C., the heating time is 1 hour, and the thickness of the silver paste layer is 40 μm. In place of the silver paste, other conductive adhesives may be used. For example, a conductive paste containing at least one of silver, copper, carbon, tin, and gold can be used.

  As shown in FIG. 3D, a resin coating film 30 containing silica in an epoxy resin is brought into close contact with the surfaces of the support substrate 20 and the capacitor film 18 using a vacuum laminating method. The vacuum lamination conditions are, for example, a heating temperature of 150 ° C. and a pressure of 0.6 MPa. The coating films 30 are filled in the recesses 22A, 22B, and 22C, and the portions adjacent to the edges of the openings 15A and 15B of the capacitor film 18 are curved downward along the side surfaces of the recesses 22A and 22B. The surface of the coating film 30 becomes flat.

  As shown in FIG. 3E, bottomed holes 32A to 32C are formed at positions where the recesses 22A to 22C are formed, respectively. For example, laser processing using a carbon dioxide laser can be applied to the formation of the bottomed holes 32A to 32C. The bottomed holes 32A to 32C reach positions deeper than the bottom surfaces of the recesses 22A to 22C, respectively, but do not penetrate the support substrate 20. Note that milling using a drill may be employed instead of laser processing.

  The bottomed hole 32A formed at the position of the recess 22A of the first group passes through the opening 15A without contacting the capacitor film 18. Further, since the conductive film 25 formed on the inner surface of the first group of recesses 22A is penetrated, the conductive film 25 is exposed on the side surface of the bottomed hole 32A.

  The first electrode film 10 in the vicinity of the edge of the opening 15B is exposed on the side surface of the bottomed hole 32B formed at the position of the concave portion 22B of the second group, so that the second electrode film 12 is not exposed. The shape, size, and position of the bottomed hole 32B are determined.

  The bottomed hole 32 </ b> C formed at the position of the recess 22 </ b> C of the third group penetrates the coating film 30 without contacting any of the capacitor film 18 and the conductive film 25.

  As shown in FIG. 3F, the bottomed holes 32A to 32C are filled with conductive members 40A to 40C, respectively, by a semi-additive method. Hereinafter, the semi-additive method will be briefly described.

  First, a seed layer is formed on the inner surfaces of the bottomed holes 32A to 32C and the upper surface of the coating film 30 by sputtering. This seed layer has a two-layer structure of a Cr film having a thickness of 0.08 μm and a Cu film having a thickness of 0.5 μm. A photosensitive resist film is disposed on the seed layer, and an opening is formed at the bottomed hole. This opening is slightly larger than the openings of the bottomed holes 32A to 32C. The seed layer is exposed in the opening formed in the resist film. The inside of the bottomed holes 32A to 32C is filled with Cu by plating Cu on the exposed seed layer. The thickness of the resist film is set such that the plated Cu does not reach the upper surface of the resist film. After plating with Cu, the resist film is removed. Further, the seed layer covered with the resist film is removed by etching. Through the steps so far, the conductive members 40A to 40C are formed.

  Note that a gas deposition method can be employed instead of the plating method. Further, after filling the bottomed hole with a conductive paste such as silver paste, the conductive paste may be cured.

  In the gas deposition method, the conductive material can be selectively filled into the bottomed hole by spraying the nano metal particles on the gas flow at a high speed from the nozzle. For example, by setting the substrate temperature during gas deposition to 100 ° C., using helium as the carrier gas, and setting the pressure difference between the raw material generation chamber and the conductive member deposition chamber to 150 to 200 kPa, the inside of the bottomed hole is reduced from Ag. It can be embedded with a dense conductive member.

  As shown in FIG. 3G, the lower end of the conductive members 40A to 40C is exposed by polishing the support substrate 20 from the back surface thereof.

  As shown in FIG. 3H, electrode pads 45A to 45C for external contacts are formed on the back surface of the support substrate 20. The electrode pads 45A to 45C are in contact with the conductive members 40A to 40C, respectively. The electrode pads 45A to 45C are formed by performing Ni plating after forming a Ti film and a Cu film by sputtering.

  The conductive member 40A disposed at the position of the recess 22A of the first group is electrically connected to the conductive film 25, and further electrically connected to the second electrode film 12 of the capacitor film 18 via the conductive film 25. Connected. The conductive member 40 </ b> B disposed at the position of the second group of recesses 22 </ b> B is electrically connected to the first electrode film 10 of the capacitor film 18, but does not contact the conductive film 25. That is, the conductive member 40 </ b> B is electrically insulated from the second electrode film 12. That is, the conductive members 40A and 40B are connected to the cathode and anode of the solid electrolytic capacitor formed by the capacitor film 18, respectively.

  The conductive member 40 </ b> C disposed at the position of the third group of recesses 22 </ b> C is not connected to any electrode film of the capacitor film 18 and penetrates from the surface of the coating film 30 to the back surface of the support substrate 20. The capacitor built-in substrate 50 is completed through the steps so far.

  In the first embodiment, the capacitor film 18 can be produced by using anodizing treatment, application of a conductive polymer, and press punching without using an expensive vacuum device or the like. Further, the capacitor film 18 can be manufactured without using a noble metal such as Pt or Au.

  FIG. 4 shows a structure when the semiconductor chip 70 is mounted on the package substrate 60 using the capacitor built-in substrate 50. A plurality of electrode pads 61 are formed on the element mounting surface of the package substrate 60, and bumps 62 are disposed thereon. A plurality of electrode pads 45 are arranged on the back surface of the capacitor built-in substrate 50, and the upper end of the conductive member 40 is exposed on the surface. A plurality of electrode pads 71 are formed on the bottom surface of the semiconductor chip 70, and bumps 72 are disposed thereon.

  The bumps 62 arranged on the package substrate 60 are fixed to the corresponding electrode pads 45 of the capacitor built-in substrate 50, and the bumps 72 arranged on the semiconductor chip 70 are fixed to the upper end of the corresponding conductive member 40 of the capacitor built-in substrate 50. Has been. The ground line of the semiconductor chip 70 is connected to the ground line of the package substrate 60 through the conductive member 40A disposed at the position of the recess 22A of the first group shown in FIG. 3H. The power supply line of the semiconductor chip 70 is connected to the power supply line of the package substrate 60 via the conductive member 40B arranged at the position of the second group of recesses 22B shown in FIG. 3H. The signal line of the semiconductor chip 70 is connected to the corresponding signal line of the package substrate 60 via the conductive member 40C disposed at the position of the recess 22C of the third group shown in FIG. 3H.

  Since the capacitor built-in substrate 50 is disposed immediately below the semiconductor chip 70, the wiring length from the power supply line or the ground line to the first electrode film (anode) 10 or the second electrode film (cathode) 12 of the capacitor is increased. Can be shortened. As a result, ESL and ESR can be reduced. The capacitance density of the solid electrolytic capacitor is 20 times or more higher than the capacitance density of the thin film capacitor using the ferroelectric film. For this reason, it is possible to increase the capacity of the decoupling capacitor.

  The direction of the current flowing through the conductive member 40A disposed at the position of the first group of the recesses 22A and the direction of the current flowing through the conductive member 40B disposed at the position of the second group of the recesses 22B are opposite to each other. The direction. In the capacitor film 50 according to the first embodiment, as shown in FIG. 2C, in the plan view, the first group of recesses 22A and the second group of recesses 22B are alternately arranged in the row direction and the column direction. Arranged. For this reason, the conductive members 40A and 40B through which current flows in directions opposite to each other are arranged at positions close to each other. Thereby, parasitic inductance can be reduced.

  In the first embodiment, when the second electrode film 12 shown in FIG. 1B is formed, a solution containing polyethylenedioxythiophene and styrenesulfonic acid is used. However, a solution containing another conductive polymer is used. It may be used. For example, a solution containing polypyrrole can be used. In the case of using a solution containing polypyrrole, for example, coating and drying are repeated three times to form the second electrode film 12 having a thickness of 30 μm.

  In the first embodiment, aluminum is used for the first electrode film 10 shown in FIG. 1A. However, other valve metals capable of forming an insulating oxide film by anodization (anodization) are used. May be used. For example, niobium can be used. When niobium is used, a niobium oxide film can be formed by anodizing in a phosphoric acid solution. For example, the solution temperature during formation may be 90 ° C., the formation voltage may be 150 V, the current may be 0.6 A, and the voltage application time may be 10 minutes.

  The relative dielectric constant of niobium oxide is about 42, which is larger than the relative dielectric constant 8 of aluminum oxide. For this reason, when niobium is used for the first electrode film 10, a large capacity of the solid electrolytic capacitor can be expected.

  FIG. 5 shows the capacitor built-in substrate according to the second embodiment together with the package substrate 60 and the semiconductor chip 70. A wiring layer 47 is formed on the surface of the capacitor built-in substrate 50 shown in FIG. 3H on the semiconductor chip 70 side. The wiring layer 47 has a multilayer structure in which insulating resin films such as polyimide and thin film wirings such as copper and aluminum are alternately stacked. A plurality of narrow pitch electrode pads 41 are arranged on the surface of the wiring layer 47. The narrow pitch electrode pads 41 are electrically connected to the corresponding conductive members 40 arranged in the capacitor built-in substrate 50 through the wirings in the wiring layer 47. The narrow pitch electrode pads 41 are distributed at a narrower pitch than the conductive member 40. One conductive member 40 is connected to a plurality of narrow pitch electrode pads 41.

  The electrode pads 71 of the semiconductor chip 70 are connected to the corresponding narrow pitch electrode pads 41 via the bumps 72.

  The wiring layer 47 can convert a relatively wide pitch of the electrode pads 45 disposed on the package substrate 60 side into a relatively narrow pitch of the narrow pitch electrode pads 41 disposed on the semiconductor chip 70 side. Thereby, it is possible to cope with a narrow pitch of bumps of the semiconductor chip.

  A third embodiment will be described with reference to FIGS. 6A to 6D. The first electrode film 10 shown in FIG. 6A is the same as that used in the first embodiment shown in FIG. 1A.

  As shown in FIG. 6B, an oxide film 11 and a second electrode film 12 are formed on the first electrode film 10 by the same method as in the first embodiment. In the second embodiment, a conductive film 13 is further formed on the second electrode film 12. The conductive film 13 is formed, for example, by applying and curing an epoxy silver paste. The curing conditions are 120 ° C. and 1 hour. The thickness of the conductive film 13 is about 20 μm, for example.

  As shown in FIG. 6C, openings 15A and 15B are formed in four layers from the first electrode film 10 to the conductive film 13 by a press punching method. Subsequent steps are the same as those in the first embodiment.

  FIG. 6D shows a cross-sectional view when an opening is formed by a press punching method without forming the conductive film 13. Since the second electrode film 12 is made of a conductive polymer that is softer than the first electrode film 10, when the openings 15A and 15B are formed, peeling 12a is likely to occur at the edges of the openings. When punching from the first electrode film 10 side, peeling tends to occur when the mold is inserted, and when punching from the second electrode film 12 side, peeling tends to occur when the mold is pulled out.

  In the second embodiment, a conductive film 13 that is harder than the second electrode film 12 is formed on the second electrode film 12 before press punching. For this reason, generation | occurrence | production of the peeling at the time of press punching can be suppressed.

  FIG. 7 is a sectional view of a capacitor built-in substrate according to the fourth embodiment. Hereinafter, description will be made by paying attention to differences from the capacitor built-in substrate 50 according to the first embodiment shown in FIG. 3H. FIG. 7 shows a portion where the first group of recesses 22A and the second group of recesses 22B are disposed, and the third group of recesses 22C is not shown.

  In the fourth embodiment, the side surfaces near the bottom surfaces of the recesses 22 </ b> A and 22 </ b> B are substantially perpendicular to the surface of the support substrate 20. The vertical side surface and the flat upper surface of the support substrate 20 are connected to each other with a smooth curved surface. The recesses 22A and 22B having such a cross-sectional shape can be formed by combining, for example, highly anisotropic dry etching and isotropic wet etching.

  The capacitor film 18 reaches a region in which the side surface is substantially vertical in the second group of recesses 22B. In the first group of recesses 22A, the substantially vertical side surface is not reached. The conductive member 40B disposed at the position of the second group of recesses 22B contacts the first electrode film 10 located on a substantially vertical side surface. The conductive member 40 </ b> A disposed at the position of the first group of recesses 22 </ b> A does not contact the capacitor film 18.

  In the first embodiment, as shown in FIG. 3H, the shape of the side surfaces of the recesses 22A to 22C is approximated by a conical surface that spreads upward. In this case, the conductive member 40 </ b> B contacts the first electrode film 10 at a position where the capacitor film 18 is inclined with respect to the surface of the support substrate 20. In the fourth embodiment, as shown in FIG. 7, the conductive member 40 </ b> B contacts the first electrode film 10 at a position where the capacitor film 18 takes a substantially vertical posture with respect to the surface of the support substrate 20.

  As described above, the capacitor film 18 is inclined or perpendicular to the surface of the support substrate 20, so that the conductive member 40 </ b> B is not brought into contact with the second electrode film 12, and is formed on the first electrode film 10. Can only be contacted.

  Although the present invention has been described with reference to the embodiments, the present invention is not limited thereto. It will be apparent to those skilled in the art that various modifications, improvements, combinations, and the like can be made.

(1A) to (1D) are cross-sectional views of a capacitor film used in the capacitor built-in substrate according to the first embodiment, and (1E) is a plan view thereof. (2A) and (2B) are cross-sectional views of a support substrate used in the capacitor built-in substrate according to the first embodiment, and (2C) is a plan view thereof. (3A)-(3C) are sectional views in the middle of manufacturing the capacitor built-in substrate according to the first embodiment. (3D)-(3F) are sectional views in the middle of manufacturing the capacitor built-in substrate according to the first embodiment. (3G) is a cross-sectional view in the process of manufacturing the capacitor-embedded substrate according to the first embodiment, and (3H) is a cross-sectional view of the capacitor-embedded substrate according to the first embodiment. 1 is a cross-sectional view of a capacitor built-in substrate, a package substrate, and a semiconductor chip according to a first embodiment. It is sectional drawing of the board | substrate with a built-in capacitor by a 2nd Example, a package board | substrate, and a semiconductor chip. (6A) to (6C) are cross-sectional views of the capacitor film used in the capacitor-embedded substrate according to the third embodiment, and (6D) is a cross-sectional view of the capacitor-embedded substrate shown for comparison. It is sectional drawing of the board | substrate with a built-in capacitor by the 4th example.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 1st electrode film 11 Oxide film 12 2nd electrode film 13 Conductive film 15A 1st group opening 15B 2nd group opening 18 Capacitor film 20 Support substrate 22A 1st group recessed part 22B 2nd group Concave portion 22C Third portion concave portion 25 Conductive film 30 Coating films 32A to 32C Bottomed holes 40A to 40C Conductive member 41 Narrow pitch electrode pads 45A to 45C 62 Bump 70 Semiconductor chip 71 Electrode pad 72 Bump

Claims (5)

A support substrate having a first recess and a second recess formed on the surface;
A conductive film formed on the inner surface of the first recess;
A first electrode film, a dielectric film, and a second electrode film are laminated, and the second electrode film is disposed on the surface and the conductive film in a direction toward the support substrate, and a part thereof A capacitor film disposed along at least a part of a side surface of the second concave portion so that the second electrode film is in contact with the conductive film;
An insulating coating film disposed on the surface and the capacitor film;
A first conductive member that reaches from the top surface of the coating film to the back surface of the support substrate at a position where the first concave portion is formed, and contacts the conductive film formed on the inner surface of the concave portion;
A second conductive member that reaches from the top surface of the coating film to the back surface of the support substrate at the position where the second recess is formed, and contacts the first electrode film of the capacitor film along the inner surface of the recess. And a capacitor built-in substrate.   The first electrode film is formed of a valve metal, the dielectric film is formed of a material obtained by anodizing the first electrode film, and the second electrode film is formed of a conductive polymer. The capacitor built-in substrate according to claim 1.   3. The capacitor-embedded substrate according to claim 1, wherein there are a plurality of the first recesses and the second recesses, and the first recesses and the second recesses are alternately arranged on the surface. . Preparing a capacitor film in which a first electrode film, a dielectric film, and a second electrode film are laminated;
Forming a first opening and a second opening larger than the first opening in the capacitor film;
Forming a first recess and a second recess at positions corresponding to the first opening and the second opening on the surface of the support substrate, respectively;
Forming a conductive film on the inner surface of the first recess and a partial region of the surface continuous with the inner surface;
The second electrode film faces the support substrate, the positions of the first opening and the first recess are aligned, the positions of the second opening and the second recess are aligned, and the first Bonding the capacitor film to the support substrate so that the two electrode films are electrically connected to the conductive film;
A step of adhering an insulating resin film to the capacitor film so that a portion adjacent to the edge of the second opening of the capacitor film is along the inner surface of the second recess;
Forming a plurality of bottomed holes at the positions of the first and second openings so that the first electrode film is exposed;
Filling the bottomed hole with a conductive member;
Polishing the support substrate from a second surface opposite to the first surface and exposing a lower end of the conductive member.   The method for manufacturing a capacitor built-in substrate according to claim 4, wherein the opening formed in the capacitor film is formed by press punching using a mold.

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