JP4795529B2 - Ceramic substrate, thin film circuit substrate, and method for manufacturing ceramic substrate - Google Patents

Ceramic substrate, thin film circuit substrate, and method for manufacturing ceramic substrate Download PDF

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JP4795529B2
JP4795529B2 JP2000373122A JP2000373122A JP4795529B2 JP 4795529 B2 JP4795529 B2 JP 4795529B2 JP 2000373122 A JP2000373122 A JP 2000373122A JP 2000373122 A JP2000373122 A JP 2000373122A JP 4795529 B2 JP4795529 B2 JP 4795529B2
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ceramic
ceramic substrate
sintered body
substrate
plate
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JP2002173361A (en
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靖 五代儀
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Toshiba Corp
Toshiba Materials Co Ltd
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Toshiba Corp
Toshiba Materials Co Ltd
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Abstract

PROBLEM TO BE SOLVED: To provide a ceramic board, which has excellent heat radiating property and high film coating property and on which a thin film printed circuit layer is surely formed, a thin film printed circuit board, which has high film coating property and on which the thin film printed circuit layer is formed, and a method of manufacturing the ceramic board prevented from the generation of warpage after polishing. SOLUTION: The ceramic board is composed of a plate like ceramic sintered compact 2 and the warpage of the board is controlled to <=5 &mu;m/inch.

Description

【0001】
【発明の属する技術分野】
本発明は、優れた放熱性を有し、薄膜回路層を形成可能なセラミック基板、薄膜回路基板およびセラミック基板の製造方法に関する。
【0002】
【従来の技術】
半導体素子を搭載する回路基板は、基板と、この基板の少なくとも一方の側面に銅などの導電体から成る回路層を配置して構成されている。回路基板の基板材料として、樹脂,金属,セラミックスなどの各種材料が知られている。従来、基板材料として、回路基板の用途に応じ、好適な材料が選択されていた。
【0003】
近年、半導体素子を高集積化,高速化,大チップ化した大規模集積回路(LSI:Large Scale Integration)などが実用化されている。半導体素子の高集積化に伴い、基板に要求される材料特性は、半導体チップの機械的応力面の保護から電気的,熱的な保護に移行している。樹脂,金属,セラミックスの中でもセラミックスは、放熱性,電気的特性,信頼性をはじめ総合的に優れた特性を有する。このため、セラミック基板が多用されている。
【0004】
さらに、最近では、半導体素子を一層、高集積化,高速化,大チップ化しているため、使用時の半導体素子からの発熱が増加してより一層温度が上昇する傾向にある。このため、基板材料の特性として、半導体素子から発生する熱を外部に効率良く放熱できる高放熱性が要求される。従って、高熱伝導率を有するAlN焼結体,SiC焼結体,Si焼結体などのセラミック基板が使用されている。
【0005】
セラミック基板の放熱性をより一層向上させるためには、セラミック基板に高熱伝導率を有する材料を適用するだけでなく、セラミック基板の板厚自体を小さくして熱抵抗値を下げることがセラミック基板にとって不可欠である。
【0006】
【発明の解決しようとする課題】
しかしながら、研磨加工によりセラミック基板厚を薄くすると、セラミック基板に反りが発生し、そのセラミック基板に形成する回路層の被覆性が低下するという問題を有していた。一方、研磨加工を施さないようにするため、予め薄肉のセラミック成形体を形成し焼結する方法もあるが、セラミック成形体は焼結時に収縮することからこのような方法であっても完全に反りを無くすことは難しかった。また、仮に反りを小さくできたとしてもセラミック焼結体の焼き上がり面では表面粗さが粗いものしか得られず、表面の平坦度を上げるには研磨加工は必須であり、研磨加工を行うと前述のような反りの問題が生じていた。
【0007】
本発明は、上述した問題を解決するためになされたものであり、優れた放熱性を有し、かつ、被膜性の高い薄膜回路層を確実に形成できるセラミック基板を提供することを目的とする。
【0008】
また、上記セラミック基板を用いて被膜性の高い薄膜回路層を形成した薄膜回路基板を提供することを目的とする。
【0009】
さらに、セラミック基板が薄肉であっても、研磨後の反り発生を防止できるセラミック基板の製造方法を提供することを目的とする。
【0010】
【課題を解決するための手段】
通常、セラミック基板上の電気・電子部品を電気的に接続するため、セラミック基板表面に銅などの導電体からなる回路層を形成する。回路層を薄膜形成する際、セラミック基板上にスパッタ法や真空蒸着法などの物理蒸着法を用いる。物理蒸着法は、セラミック基板の材料に左右されずに密着性を確保し易いという優れた特性を有するが、セラミック基板の表面形状に凹凸が存在する場合、段差部での薄膜の被覆性が劣る。このため、セラミック基板表面には高い平坦度が要求される。実際、蒸着膜により薄膜回路層を形成するためには、セラミック基板表面の表面粗さRaを0.5μm以下とすることが必要である。従って、セラミック基板表面の平坦化のため、研磨加工を施す必要がある。
【0011】
一方、薄肉のセラミック基板を製造する場合、焼結時における変形を防止するため、セッターなどの矯正冶具を用いて均等な荷重をかけて焼結する方法が用いられる。しかし、焼結後におけるセラミック基板表面は矯正冶具の表面状態に左右され、セラミック基板表面には不可避的に凹凸が生じる。このため、焼結後にセラミック基板表面を研磨加工することは必須である。
【0012】
通常、セラミック基板の研磨を行う際、水平に配置したセラミック基板の下面を固定し、上面にダイヤモンドなどの砥粒を含む上端盤を配置し、上端盤を回転または左右に移動して基板表面を研磨加工する片面研磨が行われている。
【0013】
片面研磨を行うと、セラミック基板の一方の面から力が研磨加工時に負荷される。この力によって、セラミック基板の材料内部に応力が発生する。セラミック基板が厚肉の場合、材料内部に発生する応力はセラミック基板内部で吸収され、セラミック基板自体が変形することはない。しかし、薄肉のセラミック基板では、片面研磨を行うと、セラミック基板の材料内部に発生する応力が吸収されず、材料内部の応力はそのままセラミック基板自体を変形させる。その結果、研磨加工後に反りが発生する。例えば、基板厚さが0.5mm以下の薄肉のセラミック基板では、研磨加工後に50μm/インチ(1インチあたり50μm程度)の反りが発生する。
【0014】
また、研磨加工時には、セラミック基板と上端盤との摩擦により摩擦熱が発生する。この摩擦熱によりセラミック基板が変形し易く、研磨加工後に反りが発生する原因の一つになっている。
【0015】
本発明者は、薄肉のセラミック基板を研磨する際、セラミック基板の両面から同時に両面研磨を施すことで、セラミック基板の材料内部に発生する応力に起因したセラミック基板の変形を防止し、研磨加工後におけるセラミック基板の反り発生を低減できることを見い出した。そして、セラミック基板の反りの発生を低減した結果、セラミック基板への蒸着による被覆性を大幅に向上でき、回路層を薄膜形成可能としたのである。
【0016】
すなわち、本発明のセラミック基板は、窒化アルミニウム粉末を主成分としY を4質量%以上含むセラミック粉末を焼成して得られ、窒化アルミニウムを主成分とする板状のセラミック焼結体の両表面を同時に研磨して得られた、短辺の長さが120mm以下、板厚が0.2〜0.5mmの略長方形の板状で、両表面の表面粗さRaが0.5μm以下のセラミック焼結体から成るセラミック基板であって、前記セラミック基板を構成するセラミック焼結体は、窒化アルミニウム結晶粒子の長軸径の平均粒径が2.3〜3.0μmであり、反りが1〜5μm/インチであることを特徴とする。また、本発明のセラミック基板は、窒化ケイ素粉末を主成分としY を5質量%以上含むセラミック粉末を焼成して得られ、窒化ケイ素を主成分とする板状のセラミック焼結体の両表面を同時に研磨して得られた、短辺の長さが120mm以下、板厚が0.2〜0.5mmの略長方形の板状で、両表面の表面粗さRaが0.5μm以下のセラミック焼結体から成るセラミック基板であって、前記セラミック基板を構成するセラミック焼結体は、窒化ケイ素結晶粒子の長軸径の平均粒径が2.0〜7.0μmであり、反りが1〜5μm/インチであることを特徴とする。
【0020】
上記態様のセラミック基板において、セラミック基板の少なくとも一方の表面に、厚さ0.5〜5.0μmの回路層が形成されている薄膜回路基板であることを特徴とする。なお、本発明の回路層は前述のように物理蒸着法により形成された薄膜であることが好ましいが、金属ペーストを用いた回路層であっても適用可能である。
【0021】
さらに、本発明のセラミック基板の製造方法は、窒化アルミニウム粉末を主成分としY を4質量%以上含むセラミック粉末を焼結して窒化アルミニウムを主成分とする板状のセラミック焼結体とし、このセラミック焼結体の両表面に研磨加工を同時に施して、短辺の長さが120mm以下、板厚が0.2〜0.5mmの略長方形の板状で、両表面の表面粗さRaが0.5μm以下のセラミック焼結体から成るセラミック基板を得るセラミック基板の製造方法であって、前記セラミック基板を構成するセラミック焼結体は、窒化アルミニウム結晶粒子の長軸径の平均粒径が2.3〜3.0μmであり、反りが1〜5μm/インチであることを特徴とする。また、本発明のセラミック基板の製造方法は、窒化ケイ素粉末を主成分としY を5質量%以上含むセラミック粉末を焼結して窒化ケイ素を主成分とする板状のセラミック焼結体とし、このセラミック焼結体の両表面に研磨加工を同時に施して、短辺の長さが120mm以下、板厚が0.2〜0.5mmの略長方形の板状で、両表面の表面粗さRaが0.5μm以下のセラミック焼結体から成るセラミック基板を得るセラミック基板の製造方法であって、前記セラミック基板を構成するセラミック焼結体は、窒化ケイ素結晶粒子の長軸径の平均粒径が2.0〜7.0μmであり、反りが1〜5μm/インチであることを特徴とする。
【0023】
また、窒化アルミニウム基板の場合、AlN結晶粒子の平均粒径を3.0μm以下としたセラミック焼結体を用いることが望ましい。特に、粒径を1.0μmから3.0μmまでの範囲と小径、かつ、均一な平均粒径することが好ましく、これにより、セラミック基板の研磨性向上を図れる。また、窒化ケイ素基板の場合、Si結晶粒子の長軸径は2.0〜7.0μmの範囲であると同様の効果が得られる。従来は、セラミック基板を片方ずつ研磨加工する片面研磨を施していたが、研磨性を向上することで両面研磨を同時に行うことが可能となった。
【0024】
このような本発明のセラミック基板の製造方法を用いれば、板厚が0.2〜0.5mmと薄いにも関わらず、反りの小さなセラミック基板を得ることができるのである。
【0025】
【発明の実施の形態】
以下、本発明の実施形態について、実施例1〜実施例12、参考例1および2、比較例1〜比較例10を用いて説明する。
【0026】
実施例1
本実施例では、窒化アルミニウム(AlN)焼結体から成るセラミック基板を下記の方法によって作製した。
【0027】
AlNの原料粉末(平均粒径1.8μm)に焼結助剤としてを質量%で(重量%と同様)5%添加し、更に、有機溶剤、バインダを添加してボールミルにて混合を行い、均一混合したスラリーを作製した。得られたスラリーをドクターブレード法により厚さ0.8mmのシート状に形成した。そして、焼結後3インチ角になるように割り掛けた状態にシートを切断した後、500℃で脱脂を行った。その後、非酸化性雰囲気中、1750℃で4時間焼結してAlN焼結体を得た。ここで、一旦、AlN焼結体の反りを測定した。
【0028】
図1は、平板1上にAlN焼結体2を配置し、AlN焼結体2の板厚方向から見た図である。まず、図1に示すAlN焼結体2の長さAを測定し、次に、平板1からAlN焼結体2の凹面までの垂直距離の最大値Bを測定した。そして、AlN焼結体2の長さAの1インチあたりの垂直距離Bを算出して、反りとした。その結果、反りは100μm/インチであった。
【0029】
このAlN焼結体の破断面からサンプル(単位面積50μm×50μm)を任意の3個所選択した。各サンプルを拡大写真により2000倍に拡大し、単位面積内に含まれるAlN結晶粒子個々の最大径を測定し、平均粒径を算出した。その結果、粒子の平均粒径は2.5μmであった。
【0030】
このように反りが100μm/インチ、粒子の平均粒径が2.5μmであるAlN焼結体2の両面を、下記の方法によって同時に研磨加工して、板厚0.5mm、表面粗さRa0.5μm以下としたセラミック基板を得た。
【0031】
すなわち、図2(a)に示すように、AlN焼結体2の両表面にAlN焼結体2の全面を被覆する上端盤3aと下端盤4aとを配置し、AlN焼結体2の端部は固定した。そして、上端盤3aと下端盤4aとを同時に移動させてAlN焼結体2の両表面を研磨した。このときの砥石の盤定は♯200〜1000の範囲で実施した。なお、AlN焼結体2のサイズが大きい場合には、図2(b)に示すように、AlN焼結体2の両表面の一部に上端盤3bと下端盤4bとを配置し、上端盤3bと下端盤4bとを同時に移動させてAlN焼結体2を研磨しても良い。
【0032】
このように両面を同時に研磨加工して得られたAlN基板の反りを測定した。その結果、下記の表1に示すように、研磨加工後のAlN基板の反りは、5μm/インチと、研磨前のものに比べて反りが大幅に減少した。
【0033】
参考例1
参考例では、以下のように、焼結条件および添加物を変えた。
【0034】
すなわち、AlNの原料粉末(平均粒径0.8μm)に焼結助剤としてを質量%で3%添加し、更に、有機溶剤、バインダを添加してボールミルにて混合を行い、均一混合したスラリーを作製した。得られたスラリーをドクターブレード法により厚さ0.8mmのシート状に形成した。そして、焼結後3インチ角になるように割り掛けた状態にシートを切断した後、520℃で脱脂を行った。その後、非酸化性雰囲気中、1800℃で3時間焼結して平均粒子径を2.0μmとした板状のAlN焼結体を得た。
【0035】
このAlN焼結体の両表面を同時に研磨して、板厚を0.5mmとしたセラミック基板を得て、反りを測定した。その結果、表1に示すように、セラミック基板の反りは3μm/インチであった。
【0036】
実施例2
本実施例では、以下のように、焼結条件および添加物を変えた。
【0037】
すなわち、AlNの原料粉末(平均粒径1.5μm)に焼結助剤としてを質量%で4%添加し、更に、有機溶剤、バインダを添加してボールミルにて混合を行い、均一混合したスラリーを作製した。得られたスラリーをドクターブレード法により厚さ0.7mmのシート状に形成した。そして、焼結後3インチ角になるように割り掛けた状態にシートを切断した後、550℃で脱脂を行った。その後、非酸化性雰囲気中、1820℃で2時間焼結して平均粒子径を2.3μmとした板状のAlN焼結体を得た。
【0038】
このAlN焼結体の両表面を同時に研磨して、板厚を0.4mmかつ表面粗さRaを0.05μm以下としたセラミック基板を得て、反りを測定した。その結果、表1に示すように、セラミック基板の反りは5μm/インチであった。
【0039】
実施例3
本実施例では、以下のように、焼結条件および添加物を変えた。
【0040】
すなわち、Siの原料粉末(平均粒径1.8μm)に焼結助剤としてを質量%で6%,TiOを1%添加し、更に、有機溶剤、バインダを添加してボールミルにて混合を行い、均一混合したスラリーを作製した。得られたスラリーをドクターブレード法により厚さ0.7mmのシート状に形成した。そして、焼結後3インチ角になるように割り掛けた状態にシートを切断した後、550℃で脱脂を行った。その後、非酸化性雰囲気中、1800℃で3時間焼結して、平均粒子径を4.2μmとした板状の窒化ケイ素(Si)焼結体を得た。なお、Siの平均粒子径は、AlN焼結体同様にSi焼結体の破断面において、単位面積50μm×50μmを任意の3個所選択し、その単位面積を2000倍程度の拡大写真に写し、そこに写る個々のSi結晶粒子の長軸径の平均値により求めたものである。
【0041】
このSi焼結体の両表面を同時に研磨して、板厚を0.5mmかつ表面粗さRaを0.3μm以下としたセラミック基板を得て、反りを測定した。その結果、表1に示すように、セラミック基板の反りは2μm/インチであった。
【0042】
実施例4
本実施例では、以下のように、焼結条件および添加物を変えた。
【0043】
すなわち、Siの原料粉末(平均粒径2.0μm)に焼結助剤としてを質量%で5%,Ybを3%,TiOを0.5%添加し、更に、有機溶剤、バインダを添加してボールミルにて混合を行い、均一混合したスラリーを作製した。得られたスラリーをドクターブレード法により厚さ0.6mmのシート状に形成した。そして、焼結後3インチ角になるように割り掛けた状態にシートを切断した後、500℃で脱脂を行った。その後、非酸化性雰囲気中、1820℃で3時間焼結して、平均粒子径を5.1μmとした板状のSi焼結体を得た。
【0044】
このSi焼結体の両表面を同時に研磨して、板厚を0.3mmかつ表面粗さRaを0.1μm以下としたセラミック基板を得て、反りを測定した。その結果、表1に示すように、セラミック基板の反りは5μm/インチであった。
【0045】
比較例1
本比較例では、以下のように、焼結条件および添加物を変えた。
【0046】
すなわち、AlNの原料粉末(平均粒径2.8μm)に焼結助剤としてを質量%で4%添加し、更に、有機溶剤、バインダを添加してボールミルにて混合を行い、均一混合したスラリーを作製した。得られたスラリーをドクターブレード法により厚さ0.8mmのシート状に形成した。そして、焼結後3インチ角になるように割り掛けた状態にシートを切断した後、550℃で脱脂を行った。その後、非酸化性雰囲気中、1820℃で3時間焼結して、平均粒子径を4.5μmとした板状のAlN焼結体を得た。
【0047】
このAlN焼結体の両表面を同時に研磨して、板厚を0.5mmかつ表面粗さRaを0.5μmとしたセラミック基板を得て、反りを測定した。その結果、表1に示すように、セラミック基板の反りは22μm/インチであった。
【0048】
比較例2
本比較例では、以下のように、焼結条件および添加物を変えた。
【0049】
すなわち、AlNの原料粉末(平均粒径1.3μm)に焼結助剤としてを質量%で5%添加し、更に、有機溶剤、バインダを添加してボールミルにて混合を行い、均一混合したスラリーを作製した。得られたスラリーをドクターブレード法により厚さ0.8mmのシート状に形成した。そして、焼結後3インチ角になるように割り掛けた状態にシートを切断した後、500℃で脱脂を行った。その後、非酸化性雰囲気中、1800℃で2時間焼結して、平均粒子径を2.0μmとした板状のAlN焼結体を得た。
【0050】
このAlN焼結体の片方の表面を研磨して、板厚を0.5mmかつ表面粗さRaを0.5μmとしたセラミック基板を得て、反りを測定した。その結果、表1に示すように、セラミック基板の反りは50μm/インチであった。
【0051】
比較例3
本比較例では、以下のように、焼結条件および添加物を変えた。
【0052】
すなわち、Siの原料粉末(平均粒径3.0μm)に焼結助剤としてを質量%で5%添加し、更に、有機溶剤、バインダを添加してボールミルにて混合を行い、均一混合したスラリーを作製した。得られたスラリーをドクターブレード法により厚さ0.8mmのシート状に形成した。そして、焼結後3インチ角になるように割り掛けた状態にシートを切断した後、500℃で脱脂を行った。その後、非酸化性雰囲気中、1820℃で8時間焼結して、平均粒子径(長軸径)を8.7μmとした板状のSi焼結体を得た。
【0053】
このSi焼結体の両面を同時に研磨して、板厚を0.5mmかつ表面粗さRaを0.5μmとしたセラミック基板を得て、反りを測定した。その結果、表1に示すように、セラミック基板の反りは20μm/インチであった。
【0054】
比較例4
本比較例では、以下のように、焼結条件および添加物を変えた。
【0055】
すなわち、Siの原料粉末(平均粒径1.8μm)に焼結助剤としてを質量%で7%添加し、更に、有機溶剤、バインダを添加してボールミルにて混合を行い、均一混合したスラリーを作製した。得られたスラリーをドクターブレード法により厚さ0.8mmのシート状に形成した。そして、焼結後3インチ角になるように割り掛けた状態にシートを切断した後、500℃で脱脂を行った。その後、非酸化性雰囲気中、1800℃で3時間焼結して、平均粒子径(長軸径)を5.5μmとした板状のSi焼結体を得た。
【0056】
このSi焼結体の片方の表面を研磨して、板厚を0.5mmかつ表面粗さRaを0.5μmとしたセラミック基板を得て、反りを測定した。その結果、表1に示すように、セラミック基板の反りは55μm/インチであった。
【0057】
【表1】

Figure 0004795529
【0058】
上記実施例1〜実施例4、参考例1および比較例1〜比較例4に示すセラミック基板を作製して反りを測定した結果、表1に示すように、片面を固定して研磨した比較例2,比較例4では、反りが50μm/インチ,55μm/インチ生じていた。これに対し、セラミック基板を両面同時に研磨した実施例1〜実施例4、参考例1では、いずれも反りが5μm/インチ以下となっており、反りを大幅に低減できることが判明した。
【0059】
従って、本実施形態によれば、セラミック基板を薄肉とした場合であっても、セラミック基板を両面研磨してセラミック基板の両表面から力を負荷することで、セラミック基板の材料内部に発生する応力を互いに相殺することで、研磨加工後のセラミック基板の反り発生を防止できる。
【0060】
また、比較例1,比較例3では、セラミック焼結体の粒子の平均粒径が本発明の好ましい範囲を超えており、セラミック基板両面を同時に研磨した場合であっても、反りが22μm/インチ,55μm/インチ生じていた。これに対し、セラミック焼結体の粒子の平均粒径を好ましい範囲にした実施例1〜実施例4、参考例1では、いずれも反りが5μm/インチであり、反りの発生を低減することができた。
【0061】
従って、本実施形態によれば、セラミック焼結体の粒子を小径化して研磨性を向上させることで、研磨加工時における摩擦熱の発生を抑制でき、より一層、反りの発生を防止できることが確認された。
【0062】
実施例5〜実施例8、参考例2、比較例5〜比較例8
実施例1〜実施例4、参考例1および比較例1〜比較例4のセラミック基板上に、スパッタ法により表2に示した回路層を設けた。その際に、スパッタ不良の発生する割合を求めた。なお、スパッタ不良とは、所定の配線形状になるようスパッタリングを行ったにも関わらず、所定の配線形状が得られなかったものの割合(%)を示したものである。その結果を表2に示す。
【0063】
【表2】
Figure 0004795529
【0064】
表2から分かる通り、本発明の実施例に係るセラミック基板は反りが小さいことから、スパッタ不良発生率を低減できることが分かった。また、本発明のセラミック基板は両面が研磨加工されていることから、表面裏面どちらにも回路層を設けることができる。そのため表面裏面の違いがないことからスパッタ装置に装着する際の方向性を気にしなくて済むため作業性が良好である。
【0065】
それに対し、比較例のセラミック基板は反りが大きいことから不良発生率が大きく、スパッタ等の物理蒸着法により回路層を設けることには向かないことが判明した。
【0066】
実施例9〜実施例12,比較例9,比較例10
基板サイズを表3のように変えた以外は、実施例1と同様としたセラミック基板を実施例、実施例10および比較例9とした。同じく基板サイズを表3のように変えた以外は、実施例と同様としたセラミック基板を実施例11、実施例12および比較例10とした。なお、比較例9および比較例10は、本発明の範囲外の基板サイズを有するものである。
【0067】
上記実施例〜実施例12,比較例9〜比較例10の反り量を測定した。その結果を表3に示す。
【0068】
【表3】
Figure 0004795529
【0069】
表3から分かる通り、セラミック基板の短辺が120mm以下であれば反り量を5μ/インチ以下にできることが分かった。
【0070】
それに対し、比較例9、比較例10のように基板サイズは本発明の範囲を超えて大きくなると本発明の効果が十分得られないことが判明した。これは基板サイズが大きくなりすぎると、研磨加工時の応力を緩和し難くなるためであると考えられる。
【0071】
【発明の効果】
以上説明したように、本発明のセラミック基板の製造方法によれば、放熱性に優れ、かつ研磨加工後における反りを低減したセラミック基板を得られる。また、セラミック基板上に被膜性の高い薄膜回路層を形成した回路基板を得ることができ、半導体素子を高集積化,高速化,大チップ化した高性能の回路部品が提供できる。
【図面の簡単な説明】
【図1】本発明の実施形態における、反りの測定方法を模式的に示す図。
【図2】本発明の実施形態における研磨加工を示す断面図であり、(a)はセラミック基板サイズが小である場合、(b)はセラミック基板サイズが大である場合の研磨加工を示す断面図。
【符号の説明】
1 平板
2 AlN焼結体
3a,3b 上端盤
4a,4b 下端盤
A AlN焼結体の長さ
B 平板からAlN焼結体の凹面までの垂直距離の最大値[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a ceramic substrate having excellent heat dissipation and capable of forming a thin film circuit layer, a thin film circuit substrate, and a method for manufacturing the ceramic substrate.
[0002]
[Prior art]
A circuit board on which a semiconductor element is mounted is configured by arranging a circuit layer made of a conductor such as copper on at least one side surface of the board. Various materials such as resins, metals, and ceramics are known as circuit board materials. Conventionally, a suitable material has been selected as a substrate material according to the use of the circuit board.
[0003]
2. Description of the Related Art In recent years, large scale integration (LSI: Large Scale Integration) in which semiconductor elements are highly integrated, speeded up, and made into large chips has been put into practical use. With the high integration of semiconductor elements, the material properties required for the substrate have shifted from protection of the mechanical stress surface of the semiconductor chip to electrical and thermal protection. Among resins, metals, and ceramics, ceramics have excellent overall characteristics including heat dissipation, electrical characteristics, and reliability. For this reason, ceramic substrates are frequently used.
[0004]
Furthermore, recently, since semiconductor devices have been further integrated, increased in speed, and made larger in size, heat generated from the semiconductor devices during use tends to increase further. For this reason, as a characteristic of the substrate material, a high heat dissipation property that can efficiently dissipate heat generated from the semiconductor element to the outside is required. Therefore, ceramic substrates such as AlN sintered bodies, SiC sintered bodies, and Si 3 N 4 sintered bodies having high thermal conductivity are used.
[0005]
In order to further improve the heat dissipation of the ceramic substrate, not only a material having high thermal conductivity is applied to the ceramic substrate, but also the ceramic substrate must be reduced in thickness by reducing the thickness of the ceramic substrate itself. It is essential.
[0006]
[Problem to be Solved by the Invention]
However, when the thickness of the ceramic substrate is reduced by polishing, the ceramic substrate is warped, and the coverage of the circuit layer formed on the ceramic substrate is reduced. On the other hand, there is a method in which a thin ceramic molded body is previously formed and sintered in order to avoid polishing, but the ceramic molded body shrinks at the time of sintering. It was difficult to eliminate the warp. In addition, even if the warpage can be reduced, only a rough surface is obtained on the baked surface of the ceramic sintered body, and polishing is essential to increase the flatness of the surface. The above-mentioned problem of warping has occurred.
[0007]
The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a ceramic substrate that has excellent heat dissipation and can reliably form a thin film circuit layer having high coating properties. .
[0008]
It is another object of the present invention to provide a thin film circuit board in which a thin film circuit layer having a high film property is formed using the ceramic substrate.
[0009]
Furthermore, it aims at providing the manufacturing method of the ceramic substrate which can prevent the curvature generation after grinding | polishing even if a ceramic substrate is thin.
[0010]
[Means for Solving the Problems]
Usually, in order to electrically connect electrical / electronic components on a ceramic substrate, a circuit layer made of a conductor such as copper is formed on the surface of the ceramic substrate. When forming the circuit layer as a thin film, a physical vapor deposition method such as sputtering or vacuum vapor deposition is used on the ceramic substrate. The physical vapor deposition method has an excellent characteristic that it is easy to ensure adhesion without being influenced by the material of the ceramic substrate, but when the surface shape of the ceramic substrate has irregularities, the coverage of the thin film at the step portion is inferior. . For this reason, high flatness is required for the ceramic substrate surface. Actually, in order to form the thin film circuit layer by the vapor deposition film, the surface roughness Ra of the ceramic substrate surface needs to be 0.5 μm or less. Therefore, it is necessary to polish the surface of the ceramic substrate for planarization.
[0011]
On the other hand, when manufacturing a thin ceramic substrate, a method of sintering by applying an equal load using a correction tool such as a setter is used in order to prevent deformation during sintering. However, the surface of the ceramic substrate after sintering depends on the surface state of the correction jig, and irregularities are inevitably generated on the surface of the ceramic substrate. For this reason, it is essential to polish the ceramic substrate surface after sintering.
[0012]
Normally, when polishing a ceramic substrate, the lower surface of a horizontally arranged ceramic substrate is fixed, an upper end plate containing abrasive grains such as diamond is disposed on the upper surface, and the upper end plate is rotated or moved left and right to move the substrate surface. One-side polishing for polishing is performed.
[0013]
When single-side polishing is performed, force is applied from one side of the ceramic substrate during polishing. This force generates stress inside the ceramic substrate material. When the ceramic substrate is thick, the stress generated in the material is absorbed inside the ceramic substrate and the ceramic substrate itself is not deformed. However, in a thin ceramic substrate, when single-side polishing is performed, the stress generated inside the material of the ceramic substrate is not absorbed, and the stress inside the material directly deforms the ceramic substrate itself. As a result, warping occurs after polishing. For example, in a thin ceramic substrate having a substrate thickness of 0.5 mm or less, warping of 50 μm / inch (about 50 μm per inch) occurs after polishing.
[0014]
Further, during the polishing process, frictional heat is generated due to friction between the ceramic substrate and the upper end board. This frictional heat easily deforms the ceramic substrate, which is one of the causes of warping after polishing.
[0015]
When polishing a thin ceramic substrate, the present inventor simultaneously performs double-side polishing from both sides of the ceramic substrate to prevent deformation of the ceramic substrate due to stress generated inside the ceramic substrate material, and after polishing processing. It has been found that the generation of warpage of the ceramic substrate can be reduced. As a result of reducing the occurrence of warping of the ceramic substrate, the coverage by vapor deposition on the ceramic substrate can be greatly improved, and the circuit layer can be formed into a thin film.
[0016]
That is, the ceramic substrate of the present invention is mainly composed of aluminum nitride powder obtained by firing the ceramic powder containing Y 2 O 3 4% by weight or more, the sheet-shaped ceramic sintered body mainly composed of aluminum nitride Obtained by polishing both surfaces at the same time, and having a short side length of 120 mm or less and a plate thickness of 0.2 to 0.5 mm. The surface roughness Ra of both surfaces is 0.5 μm. A ceramic substrate comprising the following ceramic sintered body, wherein the ceramic sintered body constituting the ceramic substrate has an average particle diameter of a major axis diameter of aluminum nitride crystal particles of 2.3 to 3.0 μm, and warps Is 1 to 5 μm / inch. The ceramic substrate of the present invention is obtained by firing a ceramic powder containing silicon nitride powder as a main component and containing 5% by mass or more of Y 2 O 3 , and is a plate-like ceramic sintered body containing silicon nitride as a main component. It is a substantially rectangular plate shape having a short side length of 120 mm or less and a plate thickness of 0.2 to 0.5 mm obtained by polishing both surfaces at the same time, and the surface roughness Ra of both surfaces is 0.5 μm or less. The ceramic sintered body comprising the ceramic sintered body, wherein the ceramic sintered body constituting the ceramic substrate has an average particle diameter of the major axis diameter of silicon nitride crystal particles of 2.0 to 7.0 μm, and warpage 1 to 5 μm / inch.
[0020]
The ceramic substrate of the above aspect is a thin film circuit substrate in which a circuit layer having a thickness of 0.5 to 5.0 μm is formed on at least one surface of the ceramic substrate. Note that the circuit layer of the present invention is preferably a thin film formed by physical vapor deposition as described above, but a circuit layer using a metal paste is also applicable.
[0021]
Furthermore, the manufacturing method of the ceramic substrate of the present invention, plate-shaped ceramic sintered mainly composed of aluminum nitride by sintering a ceramic powder containing Y 2 O 3 as a main component of aluminum nitride powder 4 wt% or more The surface of both surfaces of the ceramic sintered body is subjected to polishing at the same time and is a substantially rectangular plate having a short side length of 120 mm or less and a plate thickness of 0.2 to 0.5 mm. A method of manufacturing a ceramic substrate for obtaining a ceramic substrate comprising a ceramic sintered body having a roughness Ra of 0.5 μm or less, wherein the ceramic sintered body constituting the ceramic substrate has an average major axis diameter of aluminum nitride crystal particles The particle size is 2.3 to 3.0 μm, and the warp is 1 to 5 μm / inch. Also, the method for producing a ceramic substrate of the present invention is a plate-like ceramic sintered body containing silicon nitride as a main component by sintering ceramic powder containing silicon nitride powder as a main component and containing 5% by mass or more of Y 2 O 3. The both surfaces of this ceramic sintered body are polished simultaneously to form a substantially rectangular plate with a short side length of 120 mm or less and a plate thickness of 0.2 to 0.5 mm. A method of manufacturing a ceramic substrate for obtaining a ceramic substrate comprising a ceramic sintered body having a thickness Ra of 0.5 μm or less, wherein the ceramic sintered body constituting the ceramic substrate comprises an average grain having a major axis diameter of silicon nitride crystal particles The diameter is 2.0 to 7.0 μm, and the warp is 1 to 5 μm / inch.
[0023]
In the case of an aluminum nitride substrate, it is desirable to use a ceramic sintered body in which the average particle diameter of AlN crystal particles is 3.0 μm or less. In particular, it is preferable that the particle diameter is in the range of 1.0 μm to 3.0 μm, a small diameter, and a uniform average particle diameter, whereby the polishability of the ceramic substrate can be improved. In the case of a silicon nitride substrate, the same effect can be obtained when the major axis diameter of the Si 3 N 4 crystal particles is in the range of 2.0 to 7.0 μm. Conventionally, single-side polishing was performed by polishing the ceramic substrate one by one, but double-side polishing can be performed simultaneously by improving the polishing properties.
[0024]
By using such a method for producing a ceramic substrate of the present invention, it is possible to obtain a ceramic substrate with a small warp, although the plate thickness is as thin as 0.2 to 0.5 mm.
[0025]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described using Examples 1 to 12, Reference Examples 1 and 2 , and Comparative Examples 1 to 10.
[0026]
Example 1
In this example, a ceramic substrate made of an aluminum nitride (AlN) sintered body was produced by the following method.
[0027]
Add 5% by mass of Y 2 O 3 as a sintering aid to AlN raw material powder (average particle size 1.8 μm) (similar to weight%), and add an organic solvent and a binder. Mixing was performed to prepare a uniformly mixed slurry. The obtained slurry was formed into a sheet having a thickness of 0.8 mm by a doctor blade method. Then, after sintering, the sheet was cut into a 3 inch square and degreased at 500 ° C. Then, it sintered at 1750 degreeC for 4 hours in non-oxidizing atmosphere, and obtained the AlN sintered compact. Here, the warpage of the AlN sintered body was once measured.
[0028]
FIG. 1 is a view in which an AlN sintered body 2 is arranged on a flat plate 1 and viewed from the thickness direction of the AlN sintered body 2. First, the length A of the AlN sintered body 2 shown in FIG. 1 was measured, and then the maximum value B of the vertical distance from the flat plate 1 to the concave surface of the AlN sintered body 2 was measured. Then, the vertical distance B per inch of the length A of the AlN sintered body 2 was calculated and used as the warp. As a result, the warpage was 100 μm / inch.
[0029]
Three arbitrary samples (unit area 50 μm × 50 μm) were selected from the fracture surface of the AlN sintered body. Each sample was magnified 2000 times with an enlarged photograph, the maximum diameter of each AlN crystal particle contained in the unit area was measured, and the average particle diameter was calculated. As a result, the average particle size of the particles was 2.5 μm.
[0030]
Thus, both surfaces of the AlN sintered body 2 having a warp of 100 μm / inch and an average particle diameter of 2.5 μm were simultaneously polished by the following method to obtain a plate thickness of 0.5 mm, a surface roughness Ra0. A ceramic substrate having a thickness of 5 μm or less was obtained.
[0031]
That is, as shown in FIG. 2 (a), an upper end disk 3 a and a lower end panel 4 a that cover the entire surface of the AlN sintered body 2 are arranged on both surfaces of the AlN sintered body 2. The part was fixed. And the upper end board 3a and the lower end board 4a were moved simultaneously, and both surfaces of the AlN sintered compact 2 were grind | polished. At this time, the grinding wheel was fixed in the range of # 200 to 1000. When the size of the AlN sintered body 2 is large, as shown in FIG. 2B, an upper end panel 3b and a lower end panel 4b are arranged on a part of both surfaces of the AlN sintered body 2, and the upper end The AlN sintered body 2 may be polished by moving the board 3b and the lower end board 4b simultaneously.
[0032]
The warpage of the AlN substrate obtained by simultaneously polishing both surfaces in this way was measured. As a result, as shown in Table 1 below, the warpage of the AlN substrate after polishing was 5 μm / inch, and the warpage was greatly reduced compared to that before the polishing.
[0033]
Reference example 1
In this reference example , the sintering conditions and additives were changed as follows.
[0034]
That is, 3% by weight of Y 2 O 3 was added as a sintering aid to the raw material powder of AlN (average particle size 0.8 μm), and further an organic solvent and a binder were added and mixed in a ball mill, A uniformly mixed slurry was prepared. The obtained slurry was formed into a sheet having a thickness of 0.8 mm by a doctor blade method. Then, after sintering, the sheet was cut into a 3 inch square and degreased at 520 ° C. Thereafter, a plate-like AlN sintered body having an average particle diameter of 2.0 μm was obtained by sintering at 1800 ° C. for 3 hours in a non-oxidizing atmosphere.
[0035]
Both surfaces of this AlN sintered body were polished simultaneously to obtain a ceramic substrate having a plate thickness of 0.5 mm, and the warpage was measured. As a result, as shown in Table 1, the warpage of the ceramic substrate was 3 μm / inch.
[0036]
Example 2
In this example, sintering conditions and additives were changed as follows.
[0037]
That is, 4% by mass of Y 2 O 3 as a sintering aid is added to the raw material powder of AlN (average particle size 1.5 μm), and further, an organic solvent and a binder are added and mixed in a ball mill, A uniformly mixed slurry was prepared. The obtained slurry was formed into a sheet having a thickness of 0.7 mm by a doctor blade method. Then, after sintering, the sheet was cut into a 3 inch square and degreased at 550 ° C. Thereafter, sintering was performed at 1820 ° C. for 2 hours in a non-oxidizing atmosphere to obtain a plate-like AlN sintered body having an average particle diameter of 2.3 μm.
[0038]
Both surfaces of this AlN sintered body were polished simultaneously to obtain a ceramic substrate having a plate thickness of 0.4 mm and a surface roughness Ra of 0.05 μm or less, and the warpage was measured. As a result, as shown in Table 1, the warpage of the ceramic substrate was 5 μm / inch.
[0039]
Example 3
In this example, sintering conditions and additives were changed as follows.
[0040]
That is, 6% by mass of Y 2 O 3 and 1% of TiO 2 are added as a sintering aid to the raw material powder of Si 3 N 4 (average particle diameter 1.8 μm), and further an organic solvent and a binder are added. Then, mixing was performed with a ball mill to prepare a uniformly mixed slurry. The obtained slurry was formed into a sheet having a thickness of 0.7 mm by a doctor blade method. Then, after sintering, the sheet was cut into a 3 inch square and degreased at 550 ° C. Thereafter, in a non-oxidizing atmosphere, and sintered for 3 hours at 1800 ° C., to obtain a mean particle diameter plate-shaped silicon nitride was 4.2μm (Si 3 N 4) is a sintered body. The average particle size the Si 3 N 4, in fracture surface of the AlN sintered body likewise Si 3 N 4 sintered body, the unit area 50 [mu] m × 50 [mu] m to select any three points, 2000 times the unit area It is obtained by the average value of the major axis diameters of the individual Si 3 N 4 crystal grains shown in the enlarged photograph.
[0041]
Both surfaces of this Si 3 N 4 sintered body were polished simultaneously to obtain a ceramic substrate having a plate thickness of 0.5 mm and a surface roughness Ra of 0.3 μm or less, and the warpage was measured. As a result, as shown in Table 1, the warpage of the ceramic substrate was 2 μm / inch.
[0042]
Example 4
In this example, sintering conditions and additives were changed as follows.
[0043]
That is, 5% by mass of Y 2 O 3 as a sintering aid, 3% of Yb 2 O 3 and 0.5% of TiO 2 are added to the raw material powder of Si 3 N 4 (average particle size 2.0 μm). Further, an organic solvent and a binder were added and mixed by a ball mill to prepare a uniformly mixed slurry. The obtained slurry was formed into a sheet having a thickness of 0.6 mm by a doctor blade method. Then, after sintering, the sheet was cut into a 3 inch square and degreased at 500 ° C. Thereafter, in a non-oxidizing atmosphere, and sintered for 3 hours at 1820 ° C., to obtain a mean particle diameter and 5.1μm plate-shaped Si 3 N 4 sintered body.
[0044]
Both surfaces of this Si 3 N 4 sintered body were polished simultaneously to obtain a ceramic substrate having a plate thickness of 0.3 mm and a surface roughness Ra of 0.1 μm or less, and the warpage was measured. As a result, as shown in Table 1, the warpage of the ceramic substrate was 5 μm / inch.
[0045]
Comparative Example 1
In this comparative example, the sintering conditions and additives were changed as follows.
[0046]
That is, 4% by mass of Y 2 O 3 as a sintering aid was added to the raw material powder of AlN (average particle size 2.8 μm), and further, an organic solvent and a binder were added and mixed in a ball mill, A uniformly mixed slurry was prepared. The obtained slurry was formed into a sheet having a thickness of 0.8 mm by a doctor blade method. Then, after sintering, the sheet was cut into a 3 inch square and degreased at 550 ° C. Then, it sintered at 1820 degreeC in non-oxidizing atmosphere for 3 hours, and obtained the plate-shaped AlN sintered compact which made the average particle diameter 4.5 micrometers.
[0047]
Both surfaces of this AlN sintered body were polished simultaneously to obtain a ceramic substrate having a plate thickness of 0.5 mm and a surface roughness Ra of 0.5 μm, and the warpage was measured. As a result, as shown in Table 1, the warpage of the ceramic substrate was 22 μm / inch.
[0048]
Comparative Example 2
In this comparative example, the sintering conditions and additives were changed as follows.
[0049]
That is, 5% by mass of Y 2 O 3 was added as a sintering aid to the raw material powder of AlN (average particle size 1.3 μm), and further, an organic solvent and a binder were added and mixed in a ball mill, A uniformly mixed slurry was prepared. The obtained slurry was formed into a sheet having a thickness of 0.8 mm by a doctor blade method. Then, after sintering, the sheet was cut into a 3 inch square and degreased at 500 ° C. Then, it sintered at 1800 degreeC for 2 hours in non-oxidizing atmosphere, and obtained the plate-shaped AlN sintered compact which made the average particle diameter 2.0 micrometers.
[0050]
One surface of this AlN sintered body was polished to obtain a ceramic substrate having a plate thickness of 0.5 mm and a surface roughness Ra of 0.5 μm, and the warpage was measured. As a result, as shown in Table 1, the warpage of the ceramic substrate was 50 μm / inch.
[0051]
Comparative Example 3
In this comparative example, the sintering conditions and additives were changed as follows.
[0052]
That is, 5% by mass of Y 2 O 3 as a sintering aid is added to Si 3 N 4 raw material powder (average particle size: 3.0 μm), and further, an organic solvent and a binder are added and mixed in a ball mill. To prepare a uniformly mixed slurry. The obtained slurry was formed into a sheet having a thickness of 0.8 mm by a doctor blade method. Then, after sintering, the sheet was cut into a 3 inch square and degreased at 500 ° C. Thereafter, sintering was performed at 1820 ° C. for 8 hours in a non-oxidizing atmosphere to obtain a plate-like Si 3 N 4 sintered body having an average particle diameter (major axis diameter) of 8.7 μm.
[0053]
Both surfaces of this Si 3 N 4 sintered body were simultaneously polished to obtain a ceramic substrate having a plate thickness of 0.5 mm and a surface roughness Ra of 0.5 μm, and the warpage was measured. As a result, as shown in Table 1, the warpage of the ceramic substrate was 20 μm / inch.
[0054]
Comparative Example 4
In this comparative example, the sintering conditions and additives were changed as follows.
[0055]
That is, 7% by mass of Y 2 O 3 as a sintering aid is added to Si 3 N 4 raw material powder (average particle size 1.8 μm), and further an organic solvent and a binder are added and mixed in a ball mill. To prepare a uniformly mixed slurry. The obtained slurry was formed into a sheet having a thickness of 0.8 mm by a doctor blade method. Then, after sintering, the sheet was cut into a 3 inch square and degreased at 500 ° C. Thereafter, sintering was performed at 1800 ° C. for 3 hours in a non-oxidizing atmosphere to obtain a plate-like Si 3 N 4 sintered body having an average particle diameter (major axis diameter) of 5.5 μm.
[0056]
One surface of this Si 3 N 4 sintered body was polished to obtain a ceramic substrate having a plate thickness of 0.5 mm and a surface roughness Ra of 0.5 μm, and the warpage was measured. As a result, as shown in Table 1, the warpage of the ceramic substrate was 55 μm / inch.
[0057]
[Table 1]
Figure 0004795529
[0058]
As a result of producing the ceramic substrates shown in Examples 1 to 4, Reference Example 1 and Comparative Examples 1 to 4 and measuring the warpage, as shown in Table 1, a comparative example in which one side was fixed and polished 2 and Comparative Example 4 had warpage of 50 μm / inch and 55 μm / inch. On the other hand, in Examples 1 to 4 and Reference Example 1 in which both sides of the ceramic substrate were polished simultaneously, the warpage was 5 μm / inch or less, and it was found that the warpage can be greatly reduced.
[0059]
Therefore, according to the present embodiment, even when the ceramic substrate is thin, the stress generated inside the material of the ceramic substrate by applying a force from both surfaces of the ceramic substrate by polishing both sides of the ceramic substrate. By canceling out each other, warpage of the ceramic substrate after polishing can be prevented.
[0060]
Moreover, in Comparative Example 1 and Comparative Example 3, the average particle diameter of the sintered ceramic particles exceeded the preferred range of the present invention, and even when both surfaces of the ceramic substrate were polished simultaneously, the warpage was 22 μm / inch. , 55 μm / inch. On the other hand, in Examples 1 to 4 and Reference Example 1 in which the average particle size of the ceramic sintered body particles is in a preferable range, the warpage is 5 μm / inch, and the occurrence of warpage can be reduced. did it.
[0061]
Therefore, according to the present embodiment, it is confirmed that the generation of frictional heat at the time of polishing can be suppressed and the occurrence of warpage can be further prevented by reducing the diameter of the ceramic sintered body and improving the polishability. It was done.
[0062]
Example 5 to Example 8, Reference Example 2, Comparative Example 5 to Comparative Example 8
On the ceramic substrates of Examples 1 to 4, Reference Example 1 and Comparative Examples 1 to 4, the circuit layers shown in Table 2 were provided by sputtering. At that time, the rate of occurrence of spatter defects was determined. Note that the sputter failure refers to the percentage (%) of the cases where the predetermined wiring shape was not obtained even though the sputtering was performed to obtain the predetermined wiring shape. The results are shown in Table 2.
[0063]
[Table 2]
Figure 0004795529
[0064]
As can be seen from Table 2, it was found that the ceramic substrate according to the example of the present invention has a small warp, so that the spatter defect occurrence rate can be reduced. In addition, since both sides of the ceramic substrate of the present invention are polished, circuit layers can be provided on both the front and back surfaces. Therefore, since there is no difference between the front and back surfaces, the workability is good because it is not necessary to worry about the directivity when mounting on the sputtering apparatus.
[0065]
On the other hand, the ceramic substrate of the comparative example has a large warp, so the defect occurrence rate is large, and it has been found that it is not suitable for providing a circuit layer by physical vapor deposition such as sputtering.
[0066]
Examples 9 to 12, Comparative Example 9, and Comparative Example 10
A ceramic substrate similar to that of Example 1 except that the substrate size was changed as shown in Table 3 was designated as Example 9 , Example 10, and Comparative Example 9. Similarly, Example 11 , Example 12 and Comparative Example 10 were the same ceramic substrates as Example 3 except that the substrate size was changed as shown in Table 3. Note that Comparative Example 9 and Comparative Example 10 have substrate sizes outside the scope of the present invention.
[0067]
Above Examples 9 to 12 was measured warpage of Comparative Example 9 to Comparative Example 10. The results are shown in Table 3.
[0068]
[Table 3]
Figure 0004795529
[0069]
As can be seen from Table 3, if the short side of the ceramic substrate is 120 mm or less, the amount of warpage can be reduced to 5 μ / inch or less.
[0070]
On the other hand, it has been found that the effects of the present invention cannot be sufficiently obtained when the substrate size becomes larger than the range of the present invention as in Comparative Examples 9 and 10. This is thought to be because if the substrate size becomes too large, it becomes difficult to relieve stress during polishing.
[0071]
【The invention's effect】
As described above, according to the method for manufacturing a ceramic substrate of the present invention, a ceramic substrate having excellent heat dissipation and reduced warpage after polishing can be obtained. In addition, a circuit board in which a thin film circuit layer having a high coating property is formed on a ceramic substrate can be obtained, and a high-performance circuit component in which semiconductor elements are highly integrated, speeded up, and made into a large chip can be provided.
[Brief description of the drawings]
FIG. 1 is a diagram schematically showing a method for measuring warpage in an embodiment of the present invention.
FIGS. 2A and 2B are cross-sectional views showing a polishing process in an embodiment of the present invention, where FIG. 2A is a cross-section showing a polishing process when the ceramic substrate size is small, and FIG. 2B is a cross-sectional view showing the polishing process when the ceramic substrate size is large; Figure.
[Explanation of symbols]
1 Flat plate 2 AlN sintered body 3a, 3b Upper end plate 4a, 4b Lower end plate A Length of AlN sintered body B Maximum value of vertical distance from flat plate to concave surface of AlN sintered body

Claims (5)

窒化アルミニウム粉末を主成分としY を4質量%以上含むセラミック粉末を焼成して得られ、窒化アルミニウムを主成分とする板状のセラミック焼結体の両表面を同時に研磨して得られた、短辺の長さが120mm以下、板厚が0.2〜0.5mmの略長方形の板状で、両表面の表面粗さRaが0.5μm以下のセラミック焼結体から成るセラミック基板であって、
前記セラミック基板を構成するセラミック焼結体は、窒化アルミニウム結晶粒子の長軸径の平均粒径が2.3〜3.0μmであり、反りが1〜5μm/インチであることを特徴とするセラミック基板。
Aluminum nitride powder as a main component was obtained by firing the ceramic powder containing Y 2 O 3 4% by mass or more, obtained by polishing the both surfaces of the plate-shaped ceramic sintered body mainly composed of aluminum nitride at the same time A ceramic comprising a ceramic sintered body having a substantially rectangular plate shape with a short side length of 120 mm or less and a plate thickness of 0.2 to 0.5 mm, and a surface roughness Ra of both surfaces of 0.5 μm or less. A substrate,
The ceramic sintered body constituting the ceramic substrate has a major axis diameter of aluminum nitride crystal particles of 2.3 to 3.0 μm and a warp of 1 to 5 μm / inch. substrate.
窒化ケイ素粉末を主成分としYMainly composed of silicon nitride powder Y 2 O 3 を5質量%以上含むセラミック粉末を焼成して得られ、窒化ケイ素を主成分とする板状のセラミック焼結体の両表面を同時に研磨して得られた、短辺の長さが120mm以下、板厚が0.2〜0.5mmの略長方形の板状で、両表面の表面粗さRaが0.5μm以下のセラミック焼結体から成るセラミック基板であって、Is obtained by firing a ceramic powder containing 5% by mass or more, and obtained by simultaneously polishing both surfaces of a plate-like ceramic sintered body containing silicon nitride as a main component, the length of the short side is 120 mm or less, A ceramic substrate made of a ceramic sintered body having a substantially rectangular plate shape with a plate thickness of 0.2 to 0.5 mm and a surface roughness Ra of both surfaces of 0.5 μm or less,
前記セラミック基板を構成するセラミック焼結体は、窒化ケイ素結晶粒子の長軸径の平均粒径が2.0〜7.0μmであり、反りが1〜5μm/インチであることを特徴とするセラミック基板。  The ceramic sintered body constituting the ceramic substrate is characterized in that the average particle diameter of the major axis diameter of the silicon nitride crystal particles is 2.0 to 7.0 μm, and the warp is 1 to 5 μm / inch. substrate.
請求項1または2に記載のセラミック基板の少なくとも一方の表面に、厚さ0.5〜5.0μmの回路層が形成されていることを特徴とする薄膜回路基板。A thin film circuit board, characterized in that on at least one surface of a ceramic substrate according to claim 1 or 2, the circuit layer having a thickness of 0.5~5.0μm is formed. 窒化アルミニウム粉末を主成分としY を4質量%以上含むセラミック粉末を焼結して窒化アルミニウムを主成分とする板状のセラミック焼結体とし、このセラミック焼結体の両表面に研磨加工を同時に施して、短辺の長さが120mm以下、板厚が0.2〜0.5mmの略長方形の板状で、両表面の表面粗さRaが0.5μm以下のセラミック焼結体から成るセラミック基板を得るセラミック基板の製造方法であって、
前記セラミック基板を構成するセラミック焼結体は、窒化アルミニウム結晶粒子の長軸径の平均粒径が2.3〜3.0μmであり、反りが1〜5μm/インチであることを特徴とするセラミック基板の製造方法。
Aluminum nitride powder as a main component by sintering a ceramic powder containing Y 2 O 3 4% by mass or more and a plate-shaped ceramic sintered body mainly composed of aluminum nitride, on both surfaces of the ceramic sintered body Polishing is performed at the same time to form a ceramic plate with a short side length of 120 mm or less and a plate thickness of 0.2 to 0.5 mm and a surface roughness Ra of 0.5 μm or less on both surfaces. A ceramic substrate manufacturing method for obtaining a ceramic substrate comprising a body,
The ceramic sintered body constituting the ceramic substrate has a major axis diameter of aluminum nitride crystal particles of 2.3 to 3.0 μm and a warp of 1 to 5 μm / inch. A method for manufacturing a substrate.
窒化ケイ素粉末を主成分としYMainly composed of silicon nitride powder Y 2 O 3 を5質量%以上含むセラミック粉末を焼結して窒化ケイ素を主成分とする板状のセラミック焼結体とし、このセラミック焼結体の両表面に研磨加工を同時に施して、短辺の長さが120mm以下、板厚が0.2〜0.5mmの略長方形の板状で、両表面の表面粗さRaが0.5μm以下のセラミック焼結体から成るセラミック基板を得るセラミック基板の製造方法であって、A ceramic powder containing 5% by mass or more is sintered to form a plate-like ceramic sintered body mainly composed of silicon nitride, and both surfaces of the ceramic sintered body are subjected to polishing processing at the same time, and the length of the short side Ceramic substrate manufacturing method for obtaining a ceramic substrate comprising a ceramic sintered body having a substantially rectangular plate shape having a thickness of 120 mm or less and a plate thickness of 0.2 to 0.5 mm, and a surface roughness Ra of both surfaces of 0.5 μm or less Because
前記セラミック基板を構成するセラミック焼結体は、窒化ケイ素結晶粒子の長軸径の平均粒径が2.0〜7.0μmであり、反りが1〜5μm/インチであることを特徴とするセラミック基板の製造方法。  The ceramic sintered body constituting the ceramic substrate is characterized in that the average particle diameter of the major axis diameter of the silicon nitride crystal particles is 2.0 to 7.0 μm, and the warp is 1 to 5 μm / inch. A method for manufacturing a substrate.
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