JP4793610B2 - Semiconductor device substrate and semiconductor device manufacturing method - Google Patents

Semiconductor device substrate and semiconductor device manufacturing method Download PDF

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JP4793610B2
JP4793610B2 JP2001095082A JP2001095082A JP4793610B2 JP 4793610 B2 JP4793610 B2 JP 4793610B2 JP 2001095082 A JP2001095082 A JP 2001095082A JP 2001095082 A JP2001095082 A JP 2001095082A JP 4793610 B2 JP4793610 B2 JP 4793610B2
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film
semiconductor device
dam
substrate
liquid resin
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JP2002299509A (en
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彰夫 門馬
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New Japan Radio Co Ltd
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New Japan Radio Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Description

【0001】
【発明の属する技術分野】
本発明は、半導体装置用基板及びこれを用いた半導体装置の製造方法に関し、特に、半導体素子を封止する封止樹脂を所望の領域内にせき止めることのできるものに関する。
【0002】
【従来の技術】
リードフレームや配線基板上に搭載された半導体素子を腐食等から保護するため、従来からトランスファモールドやポッティングモールドによる樹脂封止が行われている。前者は金型にて一度に大量のパッケージを形成するもので、リードフレーム上に搭載された半導体素子の樹脂封止に適している。一方、後者のポッティングモールドは、半導体素子上に液状樹脂を滴下し、硬化させてパッケージを形作るものであり、トランスファモールドより量産性は劣るが、過度の熱履歴や注入圧を与えない分、素子の特性変化などの虞がない。また、携帯機器などには、いわゆるチップサイズパッケージ(CSP)が求められているように、パッケージの小型化は今後ますます進む方向にある。しかるにそのような小型のパッケージをトランスファモールドで形成すると、キャビティの微細化に伴ってゲート等の樹脂流路も狭小化するため、かなりの注入圧力を要する。そのため樹脂の未充填やボイドの混入、更にはワイヤの破断等種々の問題を引き起こす虞がある。その点、ポッティングモールドによれば確実に樹脂を塗布することができ、しかも素子や配線に余分な応力を与えずに済むため、物理的な問題が殆どなく、その意味では極めて小さいパッケージを形成するのに適していると言える。
【0003】
以下に、ポッティングモールドに用いられる半導体基板と、該半導体基板を用いた半導体装置の製造方法について、図3を用いて説明する。なお、(a)は半導体装置の製造過程におけるポッティングモールド完了後の状態を示す断面図を、(b)は(a)の上面図を、(c)は最終的に得られた半導体装置の斜視図をそれぞれ示している。本図において、1は基板、2aはメタル配線、2bはダイパッド、2cは電極、3はスルーホール、4はボンディングワイヤ、5は半導体素子、6は封止樹脂、7はレジスト膜、8は単位半導体素子形成領域、10はサイドスルー、11はダム、30は集合基板、31は半導体装置を示す。
【0004】
図3(c)に示す半導体装置のパッケージは、LCC(Lead-less Chip Carrier)構造のCSPであり、側面にスルーホール3が分割されて形成されたサイドスルー10を有するものである。その製造には集合基板30が用いられ、図3(a)の断面図に示すように、絶縁性の基板1の表面にメタル配線2aやダイパッド2bからなる回路パターンが、裏面に電極2cがそれぞれ形成され、メタル配線2aと電極2cを電気的に接続するスルーホール3が形成されている。また、スルーホール3内への樹脂侵入を防ぐために図示のようなレジスト膜7等が必要に応じて設けられている。
【0005】
ここで、基板1は、ガラスエポキシやテフロンガラスクロス等のガラス繊維強化プラスチック系やアルミナ等のセラミック系の電気的絶縁性を示す板状物である。メタル配線2a、ダイパッド2b及び電極2cは、銅箔の被着・エッチングや導電性ペーストの印刷等で形成され、スルーホール3はメッキ等により形成されている。メタル配線2a及びダイパッド2bからなる回路パターンは、半導体装置を一度に多数形成できるよう、複数個形成されている。この回路パターンを含む半導体装置となる部分(単位半導体形成領域8)を除く部分は後に廃棄されるため、コストパフォーマンスを上げる意味でも最小限に留められている。また、回路パターンは、単位半導体形成領域8毎に切断分離し易いようマトリクス状に並べて形成される(図3(b))。そのため、基板1が矩形の平面形状を有していることが一般的である。
【0006】
このような集合基板30を使用した半導体装置の製造方法は、まず最初に半導体素子5を搭載し、第2にダム11を形成し、第3に封止樹脂6を形成し、最後に単体の半導体素子31に個別化するといった工程を踏む。
【0007】
まず最初の半導体素子5を搭載する工程は、ダイパッド2b上への銀ペーストの塗布、チップマウンタによる半導体素子5のダイボンディング、ワイヤボンダーによる半導体素子5とメタル配線2a間のボンディングワイヤ4を介した電気的接続が主に行われる。但し、半導体素子5をフリップチップとし、フリップチップボンディングによる方法が採用される場合もある。
【0008】
第2のダム11を形成する工程では、ディスペンサーやスクリーン印刷等によるダム材の塗布・硬化が主である。即ち、ダム材を最外郭にある単位半導体形成領域8から所定距離離間させて基板1外周に沿って塗布し、これを所定の温度で硬化させ、ダム11を形成する。
【0009】
第3の封止樹脂6の形成工程では、液状樹脂をダム11で囲まれた領域に塗布して硬化させる、いわゆるポッティングモールドを行う。
【0010】
最後の個別化工程では、図3(b)に示すように単位半導体装置形成領域8(未だ分割されていない1個の半導体装置)毎に区画するようマトリクス状にダイシングラインを決め、そのダイシングラインに沿ってブレード等で切断し、図3(c)に示すような個片の半導体装置31を得る。
【0011】
【発明が解決しようとする課題】
しかしながら、上記第2の工程で形成したダム11で囲まれる領域に第3の工程でポッティングモールドを行うと、図1(a)に点線で示したように、液状樹脂がダムの内側全体に広がらず、封止樹脂6の厚さが設計値からずれることがある。これは、液状樹脂が表面張力によって、より表面積の少ない形状になろうとするため、ダム11の角部で濡れが悪くなることが原因である。
【0012】
そのため、ダム11に近い単位半導体形成領域8から分離されてできた半導体装置31は、図3(c)に示したように、一様な樹脂厚みにならず、不良となってしまう。さらには、樹脂のはじかれた部分33が大きくなると半導体装置31の厚みが設定値より厚くなり、基板一枚ごと全て不良となることもある。
【0013】
これを解決するために、ダム11に角部を作らないようにすることが考えられるが、そのためには基板1に余計な面積を確保する必要が生じ、それだけコストパフォーマンスが低下する。例えば、ダム11の角部を丸めるためには基板1の大きさを拡大するか単位半導体装置形成領域8の個数を下げねばならず、基板1の平面形状を矩形から円形にしたり、矩形の角部を丸めたり面取りしたりすると、同じように半導体装置の取れ個数が少なくなってしまう。
【0014】
【課題を解決するための手段】
上記課題を達成するため、本願に係る半導体装置用基板の発明は、絶縁板上に半導体素子が搭載可能な複数の回路パターンが形成され、液状樹脂による樹脂封止後個別の半導体装置に分割可能に構成された半導体装置用基板において、前記液状樹脂との接触角が前記絶縁板よりも小さい材料からなり、前記複数の回路パターンを枠状に囲む膜が被着され、該膜上に重畳または該膜に外接してダムが形成され、該ダム内側に前記膜が露出していることを特徴とする半導体装置用基板。
【0015】
かかる構成とすることにより、封止樹脂が前記膜上で広がるようになるので、ダムの角部で封止樹脂がはじかれた領域が無くなる。したがって、樹脂厚が設計値からずれることが無くなる。なお、前記膜として、液状やドライフィルム状等のソルダーレジストを採用することで、通常の基板作製工程で半導体装置用基板を構成できる。また、ソルダーレジストは、感光性の材料であることから所望の形状にパターンニングでき、必要な部分にのみ構成することができる。
【0016】
また、本願に係る半導体装置の製造方法の発明は、前記した半導体装置用基板に前記半導体素子を搭載し、該半導体素子を被覆するよう前記ダムで囲まれた領域に前記液状樹脂を滴下し、該液状樹脂が硬化した後、前記膜を組み込まないように個別の半導体装置に分割することを特徴とする。
【0017】
このような製造方法で作製した半導体装置は、樹脂厚が設計値通りになるとともに、切断面にレジストを含まないため界面数が少なくなり剥離に強くなる。
【0018】
【発明の実施の形態】
以下に、本発明の実施形態を図1及び図2を参照して説明する。なお、これらの図において、前に説明した図3内の符号と同一の符号のものは、同一または相当するものを示す。
【0019】
図1(a)は、半導体装置用基板の発明に係る実施の形態を示す側面断面図である。図示の通り、基板1には膜12が被着しており、その上にダム11が、膜12を全て覆うことなく、一部を露出させるよう重畳して形成されている。また、図1(b)に平面図で示すように、膜12は半導体装置が形成される部分を囲む枠状に形成され、ダム11と単位半導体形成領域8との間に一定幅で露出している。
【0020】
この膜12は、例えば液状樹脂の界面活性力を高める高分子膜等がよく、基板1と比較して濡れ性がよい材料からなる。本例では、ソルダーレジストを採用した。ソルダーレジストは、主に電子機器に内蔵されるプリント配線板の金属配線等を保護する保護膜として用いられるが、経時劣化が少なく、半導体装置中に残しても信頼性を損なうことがない。なお、ソルダーレジストの被着方法として、液状にしたものをスプレーコーティングする方法やフィルム状にしものをラミネートする方法がある。
【0021】
次に、このような集合基板40を用いて半導体装置を製造する方法について説明する。なお、上記したように、ダム11は膜12と共に予め集合基板40の一部として形成されているので、ダムの形成工程は省略される。また、最初に半導体素子が搭載されるが、従来と同様なので説明を省略し、封止樹脂を形成する工程から説明する。
【0022】
図2(a)及び(b)は、図1に示した集合基板40上に封止樹脂6を形成した様子を示す側面断面図及び平面図である。封止樹脂6は、液状樹脂をディスペンサー等によりダム11で囲まれる領域内に滴下し、所定の温度で硬化させて形成される。液状樹脂が集合基板40の中央上に滴下されると、最初、ほぼ円上に濡れ広がり、滴下点から一番近い集合基板40の短辺方向(図2(b)の図面上下方向)にあるダム11にまで達する。続いて長辺方向(図2(b)の図面左右方向)にもさらに濡れ広がってゆくが、その途中で液状樹脂の供給が止まる。これは、パッケージの厚みを一定にするため、所定量の供給に留めねばならず、供給時間を長くすると生産性が悪くなるためである。ディスペンサーからの液状樹脂の供給が停止した後は、集合基板40とシリンジ吐出口の落差で発生する運動エネルギーを付勢力として利用することができず、液状樹脂自体に掛かる重力により集合基板40の平面上に広がってゆく。従って、ほぼ全面に広がりかけた頃には、液状樹脂の形状が薄い層状になっており、その表面はダム11の角部近傍を除いてほぼ水平となるため、重力によってより薄く広がろうとする力と液状樹脂自体の表面張力が均衡してくる。この時点で完全に均衡してしまった場合、液状樹脂が更に広がるためには、液状樹脂と集合基板40(厳密には基板1)との界面活性力のレベルが高い、即ち濡れ性がよいことが条件になる。従来はなんら対策がなされていなかったため、図3(b)に示したように樹脂はじき部分33が発生したが、本実施の形態では、その部分に液状樹脂と濡れ性がよい膜12が被着されているので、更に濡れ広がることになる。なお、従来の樹脂はじき部分33を膜12が全て覆い尽くさずとも、ダム11角部の2辺から膜12を伝って液状樹脂が回り込むため、全面を濡らすことができる。このような効果を期待するためには、液状樹脂が一般的なエポキシ系樹脂ならば、ソルダーレジストからなる膜12のダム11から内側へ露出する幅を約5mm程度とすればよい。
【0023】
このようにして封止樹脂6を形成した後、図2(b)に示す単位半導体装置形成領域8毎に区画するようマトリクス状にダイシングラインを決め、そのダイシングラインに沿ってブレード等で切断し、図2(c)に示すような個片の半導体装置31を得る。この際、半導体装置31に前記した膜12が組み込まれないように切断する。なお、膜12が予め半導体装置31となる領域を避けて被着してあるのはこのためである。
【0024】
以上に述べた集合基板40は、上記したような構成であるため、樹脂封止過程において液状樹脂の薄く広がる力が衰えても、その広がる範囲(ダム11で囲まれた範囲)の外周部に液状樹脂とよく濡れる膜が存在するため、さらに隅々にまで濡れ広がり、樹脂はじき部分が発生しない。なお、濡れがよいという判断は、接触角の大小で行い、接触角が小さければ濡れ性がよいと判断する。ここで、接触角とは、水平面上に静止した液状樹脂表面が水平面と接する点における仮想接面を考えたとき、その仮想接面が水平面となす角を言う。
【0025】
また、ディスペンサーによるダム材の定量塗布は、シリンジ内ダム材の経時による粘度変化や充填量の変動等によって圧力の変動があるため、一定の技術が必要であるが、ダムが予め形成された状態で市場に投入されるため、購入者において開発費等のコストを削減することができる。
【0026】
また、上記集合基板40を使用した半導体装置の製造方法においては、予めダムの形成された集合基板40を組み立て工程に投入するため、以降のダムを形成する工程が省かれる。その上、上記した膜12が形成されているため、液状樹脂が全面に広がり、製造歩留まりが向上する。そして、分割後には、膜12が半導体装置31内に残らないため、ダイシング時における封止樹脂6との界面剥離を考慮せずにすむ。即ち、膜12の弾力性等に縛られることなく、液状樹脂との濡れ性のよいものだけを選択できる。
【0027】
本実施例では、半導体装置用の集合基板31について述べたが、ダム11を半導体素子5毎に作製する必要のある半導体装置においても適用可能で、基板上に複数個のダムを設ける半導体装置についても同様である。また、ダム11を膜12に重畳するよう形成したが、膜12に外接する構成としても、ダム11で囲まれる領域の内側に膜12が露出するので、同様である。
【0028】
【発明の効果】
上述したように、本発明によれば、ダム11の内側に基板よりも接触角の小さい材料からなる膜を被着することで、液状樹脂が膜上で広がり、ダムの角部で液状樹脂がはじかれる領域が無くなる。これにより、封止樹脂の厚みが設計値からずれることが無くなり、半導体装置の製造歩留まりを向上させる。
【図面の簡単な説明】
【図1】本発明に係る半導体装置用基板と半導体装置の実施の形態を示す図である。
【図2】本発明に係る半導体装置用基板と半導体装置の樹脂塗布例を示す図である。
【図3】従来のLCC構造の半導体装置用基板と半導体装置を示す図である。
【符号の説明】
1:基板(絶縁板)、2a:メタル配線、2b:ダイパッド、2c:電極、3:スルーホール、4:ボンディングワイヤ、5:半導体素子、6:封止樹脂、7:ドライフィルム状のソルダーレジスト、8:Agペースト、10:サイドスルー、11:ダム、12:ソルダーレジスト、30:集合基板、31:半導体装置、33:樹脂はじき部分、40:集合基板
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a substrate for a semiconductor device and a method for manufacturing a semiconductor device using the same, and more particularly to a substrate capable of blocking a sealing resin for sealing a semiconductor element in a desired region.
[0002]
[Prior art]
In order to protect a semiconductor element mounted on a lead frame or a wiring board from corrosion or the like, resin sealing is conventionally performed by transfer molding or potting molding. The former forms a large number of packages at once with a mold, and is suitable for resin sealing of a semiconductor element mounted on a lead frame. On the other hand, the latter potting mold is a solution in which a liquid resin is dropped onto a semiconductor element and cured to form a package. Although the mass productivity is inferior to that of a transfer mold, the element does not give excessive heat history or injection pressure. There is no risk of changes in characteristics. Further, as a so-called chip size package (CSP) is required for portable devices and the like, the downsizing of the package is in the direction of further progress. However, when such a small package is formed by transfer molding, a resin flow path such as a gate is narrowed with the miniaturization of the cavity, so that a considerable injection pressure is required. Therefore, there is a possibility of causing various problems such as unfilling of resin, mixing of voids, and breakage of wires. In that respect, the potting mold can reliably apply the resin, and it is not necessary to apply extra stress to the elements and wiring, so there are almost no physical problems, and in that sense, an extremely small package is formed. It can be said that it is suitable for.
[0003]
Hereinafter, a semiconductor substrate used for the potting mold and a method for manufacturing a semiconductor device using the semiconductor substrate will be described with reference to FIGS. 1A is a cross-sectional view showing a state after the potting mold is completed in the manufacturing process of the semiconductor device, FIG. 2B is a top view of FIG. 1A, and FIG. 3C is a perspective view of the finally obtained semiconductor device. Each figure is shown. In this figure, 1 is a substrate, 2a is a metal wiring, 2b is a die pad, 2c is an electrode, 3 is a through hole, 4 is a bonding wire, 5 is a semiconductor element, 6 is a sealing resin, 7 is a resist film, and 8 is a unit. Semiconductor element formation region, 10 is a side through, 11 is a dam, 30 is a collective substrate, and 31 is a semiconductor device.
[0004]
The package of the semiconductor device shown in FIG. 3C is a CSP having an LCC (Lead-less Chip Carrier) structure, and has a side through 10 formed by dividing a through hole 3 on a side surface. The assembly substrate 30 is used for the manufacture, and as shown in the cross-sectional view of FIG. 3A, a circuit pattern composed of metal wiring 2a and a die pad 2b is formed on the surface of the insulating substrate 1, and an electrode 2c is formed on the back surface. A through hole 3 that is formed and electrically connects the metal wiring 2a and the electrode 2c is formed. Further, a resist film 7 or the like as shown is provided as necessary to prevent the resin from entering the through hole 3.
[0005]
Here, the board | substrate 1 is a plate-shaped object which shows the electrical insulation of ceramic type | system | groups, such as glass fiber reinforced plastic type | system | groups, such as glass epoxy and a Teflon glass cloth, and an alumina. The metal wiring 2a, the die pad 2b, and the electrode 2c are formed by depositing / etching copper foil, printing a conductive paste, or the like, and the through hole 3 is formed by plating or the like. A plurality of circuit patterns including the metal wiring 2a and the die pad 2b are formed so that a large number of semiconductor devices can be formed at a time. Since the portion excluding the portion (unit semiconductor formation region 8) that becomes the semiconductor device including this circuit pattern is discarded later, it is kept to a minimum in the sense of improving cost performance. The circuit patterns are formed in a matrix so as to be easily cut and separated for each unit semiconductor formation region 8 (FIG. 3B). For this reason, the substrate 1 generally has a rectangular planar shape.
[0006]
A method of manufacturing a semiconductor device using such a collective substrate 30 is as follows. First, the semiconductor element 5 is mounted, the dam 11 is formed second, the sealing resin 6 is formed third, and finally a single unit is formed. A process of individualizing the semiconductor element 31 is performed.
[0007]
First, the process of mounting the first semiconductor element 5 includes applying silver paste onto the die pad 2b, die bonding of the semiconductor element 5 with a chip mounter, and bonding wires 4 between the semiconductor element 5 and the metal wiring 2a with a wire bonder. Electrical connection is mainly made. However, the semiconductor element 5 may be a flip chip and a method by flip chip bonding may be employed.
[0008]
In the step of forming the second dam 11, dam material is mainly applied and cured by a dispenser, screen printing, or the like. That is, the dam material is applied along the outer periphery of the substrate 1 at a predetermined distance from the unit semiconductor formation region 8 that is the outermost shell, and is cured at a predetermined temperature to form the dam 11.
[0009]
In the step of forming the third sealing resin 6, a so-called potting mold is performed in which the liquid resin is applied to the region surrounded by the dam 11 and cured.
[0010]
In the final individualization step, as shown in FIG. 3B, dicing lines are determined in a matrix so as to be divided into unit semiconductor device formation regions 8 (one semiconductor device that is not yet divided), and the dicing lines are divided. Are cut with a blade or the like to obtain individual semiconductor devices 31 as shown in FIG.
[0011]
[Problems to be solved by the invention]
However, when potting molding is performed in the third step in the region surrounded by the dam 11 formed in the second step, the liquid resin spreads over the entire inside of the dam as shown by the dotted line in FIG. Therefore, the thickness of the sealing resin 6 may deviate from the design value. This is because the liquid resin tends to become a shape having a smaller surface area due to the surface tension, so that the wetting at the corners of the dam 11 becomes worse.
[0012]
For this reason, the semiconductor device 31 that is separated from the unit semiconductor formation region 8 near the dam 11 does not have a uniform resin thickness as shown in FIG. Furthermore, when the resin-repelled portion 33 becomes larger, the thickness of the semiconductor device 31 becomes thicker than a set value, and all the substrates may be defective.
[0013]
In order to solve this problem, it is conceivable that corners are not formed in the dam 11. However, for that purpose, it is necessary to secure an extra area in the substrate 1, and the cost performance is lowered accordingly. For example, in order to round the corners of the dam 11, the size of the substrate 1 must be increased or the number of unit semiconductor device forming regions 8 must be reduced. If the portion is rounded or chamfered, the number of semiconductor devices that can be taken is reduced.
[0014]
[Means for Solving the Problems]
In order to achieve the above object, the invention of the substrate for a semiconductor device according to the present application can be divided into individual semiconductor devices after resin circuit sealing with a liquid resin in which a plurality of circuit patterns capable of mounting semiconductor elements are formed on an insulating plate In the semiconductor device substrate configured as described above, a film having a contact angle with the liquid resin is smaller than that of the insulating plate, and a film surrounding the plurality of circuit patterns in a frame shape is attached, and is superimposed on the film. A semiconductor device substrate characterized in that a dam is formed on the outer side of the film, and the film is exposed inside the dam.
[0015]
With this configuration, since the sealing resin spreads on the film, there is no region where the sealing resin is repelled at the corners of the dam. Therefore, the resin thickness does not deviate from the design value. In addition, the board | substrate for semiconductor devices can be comprised in a normal board | substrate preparation process by employ | adopting solder resists, such as liquid form and a dry film form, as said film | membrane. Further, since the solder resist is a photosensitive material, it can be patterned into a desired shape and can be formed only in a necessary portion.
[0016]
Further, the invention of the method of manufacturing a semiconductor device according to the present application includes mounting the semiconductor element on the semiconductor device substrate, dropping the liquid resin on a region surrounded by the dam so as to cover the semiconductor element, After the liquid resin is cured, it is divided into individual semiconductor devices so as not to incorporate the film.
[0017]
In a semiconductor device manufactured by such a manufacturing method, the resin thickness is as designed, and the resist is not included in the cut surface.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to FIGS. 1 and 2. In these drawings, the same reference numerals as those in FIG. 3 described above denote the same or corresponding elements.
[0019]
FIG. 1A is a side sectional view showing an embodiment according to the invention of a substrate for a semiconductor device. As shown in the figure, a film 12 is deposited on the substrate 1, and a dam 11 is formed on the substrate 1 so as to be partially exposed without covering the entire film 12. Further, as shown in a plan view in FIG. 1B, the film 12 is formed in a frame shape surrounding a portion where the semiconductor device is formed, and is exposed between the dam 11 and the unit semiconductor formation region 8 with a certain width. ing.
[0020]
The film 12 is preferably a polymer film that enhances the surface activity of the liquid resin, for example, and is made of a material having better wettability than the substrate 1. In this example, a solder resist is employed. The solder resist is mainly used as a protective film for protecting the metal wiring or the like of a printed wiring board built in an electronic device, but is less deteriorated with time and does not impair reliability even if left in a semiconductor device. In addition, as a method for depositing the solder resist, there are a method of spray coating a liquefied material and a method of laminating the material in a film form.
[0021]
Next, a method for manufacturing a semiconductor device using such a collective substrate 40 will be described. As described above, since the dam 11 is formed in advance as a part of the collective substrate 40 together with the film 12, the step of forming the dam is omitted. Also, the semiconductor element is first mounted, but since it is the same as in the prior art, the description is omitted and the process of forming the sealing resin will be described.
[0022]
2A and 2B are a side sectional view and a plan view showing a state in which the sealing resin 6 is formed on the collective substrate 40 shown in FIG. The sealing resin 6 is formed by dropping a liquid resin into a region surrounded by the dam 11 with a dispenser or the like and curing it at a predetermined temperature. When the liquid resin is dropped on the center of the collective substrate 40, the liquid resin initially spreads almost on a circle and is in the short side direction of the collective substrate 40 closest to the dropping point (the vertical direction of the drawing in FIG. 2B). Reach up to dam 11. Subsequently, the liquid resin further wets and spreads in the long side direction (the left-right direction in FIG. 2B), but the supply of the liquid resin stops halfway. This is because in order to make the thickness of the package constant, the supply of a predetermined amount must be stopped, and the productivity becomes worse if the supply time is lengthened. After the supply of the liquid resin from the dispenser is stopped, the kinetic energy generated by the drop between the collective substrate 40 and the syringe discharge port cannot be used as an urging force, and the plane of the collective substrate 40 is caused by the gravity applied to the liquid resin itself. It spreads up. Accordingly, when the liquid resin is almost spread over the entire surface, the shape of the liquid resin is a thin layer, and the surface is almost horizontal except for the vicinity of the corner of the dam 11, so that it tends to be thinner and spread by gravity. The force and the surface tension of the liquid resin itself are balanced. If the liquid resin is completely balanced at this point, in order for the liquid resin to spread further, the level of the surface activity between the liquid resin and the collective substrate 40 (strictly, the substrate 1) is high, that is, the wettability is good. Is a condition. Since no countermeasure has been taken in the past, a resin repelling portion 33 was generated as shown in FIG. 3B, but in this embodiment, a liquid resin and a film 12 having good wettability are deposited on this portion. Because it is, it will spread further wet. Even if the conventional resin repelling part 33 is not completely covered by the film 12, the liquid resin flows around the film 12 from the two sides of the corner of the dam 11, so that the entire surface can be wetted. In order to expect such an effect, if the liquid resin is a general epoxy resin, the width of the film 12 made of solder resist exposed from the dam 11 to the inside may be about 5 mm.
[0023]
After forming the sealing resin 6 in this way, dicing lines are determined in a matrix so as to be divided into the unit semiconductor device forming regions 8 shown in FIG. 2B, and cut along the dicing lines with a blade or the like. As shown in FIG. 2C, an individual semiconductor device 31 is obtained. At this time, the semiconductor device 31 is cut so as not to incorporate the film 12. This is the reason why the film 12 is deposited in advance avoiding the region to be the semiconductor device 31.
[0024]
Since the collective substrate 40 described above has the above-described configuration, even if the thin spreading force of the liquid resin in the resin sealing process is reduced, the outer peripheral portion of the spreading range (the range surrounded by the dam 11). Since there is a film that wets well with the liquid resin, the film spreads to every corner and the resin repelling portion does not occur. The determination that the wetness is good is made based on the contact angle. If the contact angle is small, it is determined that the wettability is good. Here, the contact angle refers to an angle formed by the imaginary tangent plane and the horizontal plane when the imaginary tangent plane at the point where the liquid resin surface stationary on the horizontal plane contacts the horizontal plane is considered.
[0025]
In addition, the constant application of the dam material by the dispenser requires a certain technique because there is a fluctuation in pressure due to a change in the viscosity of the dam material in the syringe over time, a fluctuation in the filling amount, etc. Therefore, the purchaser can reduce costs such as development costs.
[0026]
Further, in the method of manufacturing a semiconductor device using the collective substrate 40, the collective substrate 40 on which the dam is formed in advance is put into the assembly process, so that the subsequent dam forming step is omitted. In addition, since the above-described film 12 is formed, the liquid resin spreads over the entire surface, improving the manufacturing yield. Since the film 12 does not remain in the semiconductor device 31 after the division, it is not necessary to consider interface peeling with the sealing resin 6 during dicing. That is, only those having good wettability with the liquid resin can be selected without being restricted by the elasticity of the film 12.
[0027]
In this embodiment, the collective substrate 31 for a semiconductor device has been described. However, the present invention can also be applied to a semiconductor device in which the dam 11 needs to be manufactured for each semiconductor element 5, and a semiconductor device in which a plurality of dams are provided on a substrate. Is the same. Further, although the dam 11 is formed so as to overlap the film 12, the configuration circumscribing the film 12 is the same because the film 12 is exposed inside the region surrounded by the dam 11.
[0028]
【The invention's effect】
As described above, according to the present invention, by applying a film made of a material having a smaller contact angle than the substrate to the inside of the dam 11, the liquid resin spreads on the film, and the liquid resin is spread at the corners of the dam. There is no area to be repelled. Thereby, the thickness of the sealing resin does not deviate from the design value, and the manufacturing yield of the semiconductor device is improved.
[Brief description of the drawings]
FIG. 1 is a diagram showing an embodiment of a semiconductor device substrate and a semiconductor device according to the present invention.
FIG. 2 is a view showing a semiconductor device substrate according to the present invention and a resin application example of the semiconductor device.
FIG. 3 is a diagram showing a conventional semiconductor device substrate having an LCC structure and a semiconductor device.
[Explanation of symbols]
1: substrate (insulating plate), 2a: metal wiring, 2b: die pad, 2c: electrode, 3: through hole, 4: bonding wire, 5: semiconductor element, 6: sealing resin, 7: dry film solder resist 8: Ag paste, 10: Side-through, 11: Dam, 12: Solder resist, 30: Collective substrate, 31: Semiconductor device, 33: Resin repelling part, 40: Collective substrate

Claims (2)

絶縁板上に半導体素子が搭載可能な複数の回路パターンが形成され、液状樹脂による樹脂封止後個別の半導体装置に分割可能に構成された半導体装置用基板において、
前記液状樹脂との接触角が前記絶縁板よりも小さい材料からなり、前記複数の回路パターンを枠状に囲む膜が被着され、該膜上に重畳または該膜に外接してダムが形成され、該ダム内側に前記膜が露出していることを特徴とする半導体装置用基板。
A plurality of circuit patterns on which a semiconductor element can be mounted on an insulating plate is formed, and a semiconductor device substrate configured to be separable into individual semiconductor devices after resin sealing with a liquid resin,
A film having a contact angle with the liquid resin made of a material smaller than that of the insulating plate, a film surrounding the plurality of circuit patterns in a frame shape is attached, and a dam is formed on the film so as to overlap or circumscribe the film. A substrate for a semiconductor device, wherein the film is exposed inside the dam.
絶縁板上に半導体素子が搭載可能な複数の回路パターンが形成され、液状樹脂による樹脂封止後個別の半導体装置に分割可能に構成された半導体装置用基板であって、前記液状樹脂との接触角が前記絶縁板よりも小さい材料からなり、前記複数の回路パターンを枠状に囲む膜が被着され、該膜上に重畳または該膜に外接してダムが形成され、該ダム内側に前記膜が露出した半導体装置用基板に、A substrate for a semiconductor device in which a plurality of circuit patterns on which a semiconductor element can be mounted is formed on an insulating plate, and is configured to be separable into individual semiconductor devices after resin sealing with a liquid resin, which is in contact with the liquid resin A film having a corner smaller than that of the insulating plate, a film surrounding the plurality of circuit patterns in a frame shape is attached, and a dam is formed on the film so as to overlap or circumscribe the film. On the semiconductor device substrate with the exposed film,
前記半導体素子を搭載し、該半導体素子を被覆するよう前記ダムで囲まれた領域に前記液状樹脂を滴下し、該液状樹脂が硬化した後、前記膜を組み込まないように個別の半導体装置に分割することを特徴とした半導体装置の製造方法。  The semiconductor element is mounted, and the liquid resin is dropped on a region surrounded by the dam so as to cover the semiconductor element. After the liquid resin is cured, the semiconductor element is divided into individual semiconductor devices so as not to incorporate the film. A method for manufacturing a semiconductor device, comprising:
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