JP4779606B2 - Electronic substrate, manufacturing method thereof, and electronic apparatus - Google Patents

Description

  The present invention relates to an electronic substrate, a manufacturing method thereof, and an electronic apparatus.

An electronic substrate (semiconductor chip) on which an electronic circuit is formed is mounted on an electronic device such as a mobile phone or a personal computer. This electronic substrate may be used together with passive elements such as resistors, inductor elements, and capacitors. Patent Documents 1 and 2 propose a technique for forming a spiral inductor element on an electronic substrate. The spiral inductor element has a spiral winding formed on the surface of a base serving as a core. Non-Patent Document 1 proposes a technique for forming a toroidal inductor element on an electronic substrate. In the toroidal inductor element, a spiral winding is formed around a ring-shaped core.
JP 2002-164468 A JP 2003-347410 A Ermolov et al, `` Microreplicated RF Toroidal Inductor '', IEEE Transactions on Microwave Theory and Techniques, Vol.52, No.1, January 2004, p29-36

However, since leakage current is generated due to interference between the magnetic flux generated in the inductor element and silicon constituting the electronic substrate, there is a problem that there is a limit in improving the Q value (ratio between the inductance and the resistance value) of the inductor element. .
Recently, it has been studied to cause an inductor element formed on an electronic substrate or a semiconductor chip to function as a part of a power supply circuit such as a choke coil or a transformer. In this case, it is essential to improve the inductance value of the inductor element. However, the improvement of the inductance value of the inductor element is accompanied by an increase in the number of windings of the coil, and heat is also generated because a large amount of current flows. Therefore, suppression of the enlargement of an electronic substrate and suppression of a temperature rise are desired.

  The present invention has been made in order to solve the above-described problems, and it is possible to improve an electrical characteristic and an electronic substrate capable of improving a heat dissipation characteristic, a manufacturing method thereof, and an electronic device. For the purpose of provision.

In order to achieve the above object, an electronic substrate according to the present invention is an electronic substrate including an inductor element on a base, and includes a plurality of first wirings formed on the base, and the plurality of first wirings. An insulating member continuously formed so as to cover a central portion; and a plurality of second wirings formed so as to cross a surface of the insulating member, wherein the second wiring is an end of the first wiring. And the end of the other first wiring not adjacent to the first first wiring are sequentially connected, and the inductor element includes a plurality of the first wiring and the second wiring. It is characterized by having a winding.
According to this configuration, a plurality of windings can be alternately arranged, and the winding density can be improved. As a result, the magnetic flux density can be increased, and the inductance value and Q value of the inductor element can be improved. Therefore, the electrical characteristics of the electronic substrate can be improved.

Further, an electrode for connecting the inductor element to the outside may be provided, and the plurality of windings may be coupled to different electrodes.
According to this structure, it becomes possible to comprise a transformer by the inductor element provided with the several winding.

Further, an electrode for connecting the inductor element to the outside may be provided, and the plurality of windings may be coupled to the common electrode.
According to this configuration, it is possible to provide an electronic substrate that includes a highly efficient inductor element and has excellent electrical characteristics.

The insulating member is preferably made of a magnetic material.
According to this configuration, the magnetic flux density can be increased, and the electrical characteristics of the electronic substrate can be improved.

It is desirable that all or part of the periphery of the base is covered with a heat radiating member made of a material having a higher thermal conductivity than the base.
According to this configuration, it is possible to quickly release the heat generated in the electronic substrate to the outside. Therefore, the temperature rise of the electronic substrate can be suppressed.

Moreover, it is desirable that the heat dissipating member is fixed to the base via an adhesive in which metal fine particles are dispersed.
Dispersing the metal fine particles increases the thermal conductivity of the adhesive, so that the heat generated in the electronic substrate can be quickly released to the outside. Therefore, the temperature rise of the electronic substrate can be suppressed.

On the other hand, an electronic substrate manufacturing method according to the present invention is an electronic substrate manufacturing method including an inductor element on a base, the step of forming a plurality of first wires on the base, and the plurality of first A step of continuously forming an insulating member so as to cover a central portion of the wiring, and a step of forming a plurality of second wirings so as to cross the surface of the insulating member, and in the step of forming the second wiring, By arranging the second wiring so as to sequentially connect the end portion of the one first wiring and the end portion of the other first wiring not adjacent to the one first wiring, the first wiring The inductor element having a plurality of windings made of the second wiring is formed.
According to this configuration, it is possible to easily form an inductor element having a plurality of windings.

In the step of forming the second wiring, it is desirable to form a connection wiring between the electrode for connecting the inductor element to the outside and the first wiring or the second wiring.
According to this configuration, the number of turns of the winding can be changed by changing the first wiring or the second wiring to which the connection wiring is to be connected, and the characteristics of the inductor element can be changed at low cost. be able to. Thereby, change of the transformation rate of a transformer, etc. can be performed easily.

On the other hand, an electronic apparatus according to the present invention includes the above-described electronic substrate.
According to this configuration, since the low-cost electronic substrate having excellent electrical characteristics is provided, a low-cost electronic device having excellent electrical characteristics can be provided.

Embodiments of the present invention will be described below with reference to the drawings. In each drawing used for the following description, the scale of each member is appropriately changed to make each member a recognizable size.
(First embodiment)
FIG. 1 is an explanatory view of an electronic substrate, FIG. 1 (a) is a plan view, and FIG. 1 (b) is a side sectional view taken along line BB of FIG. 1 (a). In FIG. 1A, description of a solder resist and a heat radiating member, which will be described later, is omitted. As shown in FIG. 1A, the electronic substrate 1 according to this embodiment is a bare chip of an integrated circuit such as an IC or LSI, and includes an inductor element 40 on the surface of the base 10.

  As shown in FIG. 1B, the electronic substrate 1 includes a base 10 made of silicon, glass, quartz, quartz, or the like. An electronic circuit (not shown) is formed on the surface of the base 10. In the electronic circuit, at least a wiring pattern is formed, semiconductor elements such as a plurality of passive components (components), a plurality of transistors, a plurality of thin film transistors (TFTs), and wirings connecting them to each other. It is constituted by. In order to protect the electronic circuit, a passivation film 8 made of an electrically insulating material such as SiN is formed on the surface of the base 10. On the other hand, an electrode 62 for electrically connecting the electronic circuit to the outside is formed on the peripheral edge portion and the center portion of the base 10. An opening of the passivation film 8 is formed on the surface of the electrode 62.

(Inductor element)
FIG. 2 is an explanatory diagram of the inductor element, FIG. 2 (a) is a plan view, and FIG. 2 (b) is a side cross-sectional view taken along line CC in FIG. 2 (a). In FIG. 2A, descriptions of a solder resist and a heat radiating member, which will be described later, are omitted. In FIG. 2A, the upper side of the paper surface is the + Y direction, and the right side of the paper surface is the + X direction. As shown in FIG. 2A, the inductor element 40 includes a line-shaped magnetic layer (insulating member) 31, a plurality of first wirings 12 arranged so as to cross the back surface of the magnetic layer 31, and a magnetic layer. A plurality of second wirings 22 arranged so as to cross the surface of 31, and a spiral winding 41 is formed by the first wiring 12 and the second wiring 22. The primary side winding 141 and the secondary side winding 241 are arranged around the core 42 made of the magnetic layer 31 to form an inductor having a primary and a secondary. This can function as a high frequency input stage, an I / F stage (intermediate frequency stage) coil or a transformer. In the case of an inductor used for high frequency, a magnetic layer is not necessarily required, and a resin layer may be used instead of the magnetic layer. They may be a resin for a stress relaxation layer described later. This is the same in all embodiments described later.

  As shown in FIG. 2B, the first wiring 12 is formed on the surface of the passivation film 8. The first wiring 12 includes copper (Cu), gold (Au), silver (Ag), titanium (Ti), tungsten (W), titanium tungsten (TiW), titanium nitride (TiN), nickel (Ni), nickel It is made of a conductive material such as vanadium (NiV), chromium (Cr), aluminum (Al), or palladium (Pd). It should be noted that the constituent material of the first wiring 12 can be appropriately selected according to characteristics such as a resistance range necessary for the winding of the inductor element 40 and an allowable current value. In the case where the first wiring 12 is formed by electrolytic plating, the first wiring 12 is formed on the surface of the underlayer, but the description of the underlayer is omitted in FIG.

  As shown in FIG. 2A, the first wiring 12 is patterned into a substantially parallelogram shape, and a plurality of first wirings 12 are arranged substantially in parallel. The space between the adjacent first wirings 12 is desirably formed with a constant width near the resolution limit of photolithography. Thereby, the ratio of L / S (Line and Space) of the first wiring 12 is increased, and the wiring resistance can be reduced. Of the plurality of first wirings 12, the first wiring 118 arranged at the end on the + Y side is connected to the primary electrode 111 via the connection wiring 111a, and the first wiring 218 arranged next to the first wiring 118 is connected. The secondary electrode 211 is connected to the secondary electrode 211 via the connection wiring 211a.

A line-shaped magnetic layer 31 is formed so as to cover the central portion of the plurality of first wirings 12.
As shown in FIG. 2B, the cross section perpendicular to the extending direction of the magnetic layer 31 has a substantially semicircular shape. By adopting ferrite as the magnetic material constituting the magnetic layer 31, the magnetic material can be introduced at low cost. Ferrite is a general term for complex oxides composed mainly of Fe2O3 and divalent metal oxides, and has electrical insulation. As will be described later, ferrite can be obtained by oxidizing Fe, which is a first metal, and Mn, Co, Ni, etc., which are second metals. Spinel type ferrite (MFe2O4) is a soft magnetic material, magnetoplumbite type ferrite (MFe12O19) is a permanent magnet, and garnet type ferrite (MFe5O12; M = Y, Sm, Gd, Dy, Ho, Er, Yb) is a micro material. Used as a wave material for circulators, isolators and the like. Since ferrite is an oxide and has an insulating surface, a coil pattern to be described later can be formed immediately above. When the magnetic layer 31 is formed of a magnetic metal layer such as iron, it is preferable to perform an insulating process such as oxidizing the surface or depositing an insulating resin. Further, the magnetic layer may be an amorphous metal layer having a high magnetic permeability represented by an Fe-based material.

  As shown in FIG. 2A, the second wiring 22 is formed so as to cross the surface of the magnetic layer 31. The second wiring 22 is also formed of the same conductive material as the first wiring 12. The second wiring 22 is also patterned into a substantially parallelogram shape, and a plurality of second wirings 22 are arranged substantially in parallel. It is desirable that the space between the adjacent second wirings 22 is also formed with a constant width near the resolution limit of photolithography. Of the plurality of second wirings 22, the second wiring 128 disposed at the end portion on the −Y side is coupled to the primary electrode 121 via the coupling wiring 121 a, and the second wiring 228 disposed adjacent thereto. Is connected to the secondary electrode 221 through the connecting wiring 221a.

The plurality of second wirings 22 includes a primary side second wiring 122 and a secondary side second wiring 222.
The second wiring 122 on the primary side includes, in order, an end on the + X side of one first wiring 113 and an end on the −X side of another first wiring 114 that is not adjacent to the first wiring 113. It is arranged to be connected. A primary winding 141 is formed by the second wiring 122 and the first wirings 113 and 114. The primary winding 141 is connected to the primary electrodes 111 and 121.

The second wiring 222 on the secondary side includes the + X side end portion of the first wiring 213 adjacent to the first wiring 113 and the other first wiring not adjacent to the first wiring 213. It arrange | positions so that the -X side edge part of 214 may be connected in order. A secondary winding 241 is formed by the second wiring 222 and the first wirings 213 and 214. The secondary winding 241 is connected to the secondary electrodes 211 and 221.
In this manner, the primary winding 141 and the secondary winding 241 are arranged around the core of the magnetic layer 31 to form a transformer. Thereby, the electronic substrate of this embodiment can be utilized as an IC chip for a power supply circuit. In the present embodiment, the example in which the inductor element 40 is inserted between the electrodes has been described. However, the place where the inductor element 40 is inserted is between the electrode and the external terminal, between the external terminal and the external terminal, or in other electronic substrates. Various modifications can be made to the connection destination such as between passive components. This is the same in all embodiments described later.

As described above, in the present embodiment, the second wiring is arranged so as to sequentially connect the end of one first wiring and the end of another first wiring not adjacent to the first first wiring. The inductor element including a plurality of windings composed of the first wiring and the second wiring is formed. According to this configuration, a plurality of windings can be alternately arranged, and the winding density can be improved. As a result, the magnetic flux density can be increased, and the electrical characteristics of the electronic substrate can be improved.
By configuring the core 42 of the inductor element 40 with a magnetic material, the magnetic flux density can be increased, and the L value (inductor elementance) and Q value of the inductor element 40 can be significantly improved.

  FIG. 3 is an explanatory view of a modification of the electronic substrate, and is a side sectional view of a portion corresponding to the line CC in FIG. 2 (a). In the modification shown in FIG. 3, a conductive layer (electrical shield layer) 7 is formed on substantially the entire back surface of the passivation film 8. The conductive layer 7 can be formed of a conductive material such as Al or Cu using an electronic circuit formation process. If the conductive layer 7 is held at ground or at a constant potential, the influence (coupling) of the magnetic field of the inductor element 40 on the electronic circuit including the active element of the substrate 10 can be reduced by the electromagnetic shielding effect. The conductive layer 7 may be formed at any position between the inductor element 40 and the electronic circuit. In addition, the conductive layer 7 may be formed at least in the region where the inductor element 40 is formed, even though it is not formed on the substantially entire surface of the electronic substrate. Further, the magnetic shield layer may be formed of the above-described magnetic material (ferrite, amorphous metal layer, or the like) instead of the conductive layer, which has higher magnetic shield characteristics and improved inductor characteristics. Although not shown, an electric or magnetic shield layer may be formed on the side surface and upper surface of the inductor by the same process as described below. By doing so, the electrical and magnetic shield characteristics are further improved.

(Relocation wiring, etc.)
As shown in FIG. 1B, the electronic substrate 1 according to the present embodiment has a connection terminal 63 used for connection with the mating member, and stress relaxation that relaxes the stress difference between the base 10 and the mating member. Layer 30. Further, the periphery of the substrate 10 is covered with a heat radiating member 72 having a high thermal conductivity.

  As shown in FIG. 1A, a plurality of electrodes 62 are aligned along the peripheral edge of the electronic substrate 1. Due to the recent miniaturization of the electronic substrate 1, the pitch between the adjacent electrodes 62 has become very narrow. When the electronic substrate 1 is mounted on the mating member, there is a possibility that a short circuit occurs between the adjacent electrodes 62. Therefore, in order to widen the pitch between the electrodes 62, a rearrangement wiring 64 for the electrodes 62 is formed.

  Specifically, a plurality of pads constituting the connection terminal 63 are formed at the center of the surface of the electronic substrate 1. A rearrangement wiring 64 drawn from the electrode 62 is connected to the connection terminal 63. As a result, the narrow-pitch electrodes 62 are drawn out to the central portion to widen the pitch. For the formation of such an electronic substrate 1, W-CSP (Wafer Level Chip Scale Package) technology in which rearrangement wiring, resin sealing, and the like are performed in a wafer state and then separated into individual electronic substrates 1. Is being used.

  As shown in FIG. 1B, bumps 78 are formed on the surface of the connection terminal 63. The bumps 78 are, for example, solder bumps, and are formed by a printing method or the like. The bump 78 is mounted on the connection terminal of the counterpart member.

  A solder resist 66 is formed around the bump 78. The solder resist 66 serves as a partition wall of the bump 78 when the bump 78 is mounted on the counterpart member, and is made of an electrically insulating material such as a resin. The solder resist 66 covers the entire surface of the substrate 10 including the inductor element.

  By the way, when the electronic substrate 1 is mounted on the counterpart member, a thermal stress is generated between the two due to the difference in thermal expansion coefficient between the base 10 of the electronic substrate 1 and the counterpart member. In order to relieve this thermal stress, the stress relaxation layer 30 is formed between the connection terminal 63 and the base body 10. The stress relaxation layer 30 is formed to a predetermined thickness from a resin material such as photosensitive polyimide, BCB (benzocyclobutene), or phenol novolac resin.

  As shown in FIG. 1A, in the electronic substrate 1 of the present embodiment, the stress relaxation layer 30 is formed in a region other than the region where the inductor element 40 is formed. If an inductor element is formed on the surface of the stress relaxation layer 30, it is possible to secure a distance between the inductor element 40 and the substrate 10 made of silicon or the like, and suppress leakage current generated due to magnetic flux interference with silicon. can do. As a result, the Q value of the inductor element can be improved, and the electrical characteristics of the inductor element 40 can be improved.

  Returning to FIG. 1B, the heat radiating member 72 is disposed so as to cover the back surface and the side surface of the base 10. The heat radiating member 72 is made of a material having a higher thermal conductivity than the constituent material of the base body 10. For example, the heat radiating member 72 can be formed by press-molding a Cu thin plate having a higher thermal conductivity than that of silicon constituting the substrate 10.

  The heat radiating member 72 is fixed to the base 10 via an adhesive 71 disposed on the back surface of the base 10. As the adhesive 71, it is desirable to employ a resin paste that is a main component in which metal fine particles having high thermal conductivity are dispersed. Specifically, it is possible to employ an Ag paste in which Ag fine particles are dispersed. The adhesive 71 can be applied by discharging it from a dispenser or the like.

  As described above, when the electronic substrate 1 of the present embodiment is used in a power supply circuit, a large current flows through the inductor element and the electronic substrate 1 generates heat. In this embodiment, the periphery of the electronic substrate 1 is covered with the heat radiating member 72 and the heat radiating member 72 is fixed to the base body 10 with an adhesive having a high thermal conductivity. It becomes possible to do. Thereby, the temperature rise of the electronic substrate 1 can be suppressed, and the reliability of the electronic substrate can be improved. As a result, the electronic substrate of this embodiment can be used for the power supply circuit.

(Mounting structure)
FIG. 4 is an explanatory diagram of the mounting structure of the electronic substrate according to the first embodiment, and is a cross-sectional view of a portion corresponding to the line BB in FIG. As shown in FIG. 4, the electronic substrate 1 according to this embodiment is used by being mounted on a counterpart member 90. A wiring pattern (not shown) and lands 92 and 94 are formed on the surface of the mating member 90. Solder balls 93 and 95 are formed on the surfaces of the lands 92 and 94. In this embodiment, the solder bonding method has been described. However, instead of the solder balls 93 and 95, other known mounting methods such as an adhesive bonding method such as silver paste may be used.

  Then, by connecting the solder bump 78 of the electronic substrate 1 and the solder ball 93 of the counterpart member 90, the connection terminal 63 of the electronic substrate 1 and the land 92 of the counterpart member 90 are electrically connected. Further, the heat radiating member 72 of the electronic substrate 1 is connected to the land 94 of the mating member 90 via the solder ball 95. These connections can be performed collectively using reflow, FCB (Flip Chip Bonding), or the like.

  Thus, by connecting the heat dissipation member 72 to the counterpart member 90, the heat dissipation efficiency of the electronic substrate 1 can be improved. Further, the heat radiating member 72 can be grounded via the mating member 90, and the electronic substrate 1 can be electrically isolated from the outside. As a result, the reliability of the electronic substrate can be improved.

(Electronic substrate manufacturing method)
Next, a method for manufacturing the electronic substrate according to the first embodiment will be described.
FIG. 5 is a process diagram of the method of manufacturing the electronic substrate according to the first embodiment, and is a plan view in the inductor element formation region. Note that W-CSP technology is used for manufacturing the electronic substrate. That is, the following steps are collectively performed on the wafer, and finally, the wafer is separated into individual electronic substrates using dicing or the like.

  First, as shown in FIG. 5A, a plurality of first wires 12 and connecting wires 111a and 211a (hereinafter referred to as “first wires 12 etc.”) are formed. The first wiring 12 is formed on the surface of a base film (not shown). This base film is composed of a lower barrier layer and an upper seed layer. First, the barrier layer prevents diffusion of Cu into an electrode made of Al or the like, and is formed with a thickness of about 100 nm using TiW, TiN, or the like. The seed layer functions as an electrode when the first wiring 12 and the like are formed by an electrolytic plating method, and is continuously formed with a thickness of about several hundreds of nanometers using Cu or the like. They are often formed by sputtering, CVD, electroless plating, or the like. Next, a mask having an opening in the formation region of the first wiring 12 and the like is formed. Next, electrolytic Cu plating is performed using the seed layer of the base film as an electrode, and Cu is embedded in the opening of the mask to form the first wiring 12 and the like. This may be formed by an electroless plating method or the like. After removing the mask, the base film is etched using the first wiring 12 and the like as a mask.

Next, as shown in FIG. 5B, a line-shaped magnetic layer 31 is formed so as to cover the central part of the plurality of first wirings 12. Here, a method of forming the magnetic layer 31 made of ferrite will be described as an example.
First, a metal film is formed on the entire surface of the wafer. This metal film is composed of Fe as the first metal and Mn, Co, Ni, or the like as the second metal. The metal film can be formed using an electrolytic plating method or an electroless plating method. If the first metal and the second metal are deposited at the same time, it is possible to form a mixed metal film. If the first metal and the second metal are alternately deposited, the first metal and the second metal are deposited. It is possible to form a metal film in which two metals are alternately stacked. The ratio between the first metal and the second metal may be 1: 1, for example. In addition, as a 2nd metal, you may employ | adopt not only one type of metals among Mn, Co, Ni etc. but 2 or more types of metals.

  Next, the metal film is oxidized. The oxidation of the metal film can be performed by heating while holding the wafer in an atmosphere of oxygen gas or the like, and can also be performed by immersing the substrate in an oxidant liquid such as potassium dichromate. It is. By these treatments, the first metal and the second metal constituting the metal film are both oxidized to form ferrite. If these processes are repeated, an arbitrary thickness of ferrite is formed.

  It is also possible to employ a recently developed ferrite plating method as a method for forming ferrite. The ferrite plating method is a method of directly forming a ferromagnetic ferrite film in an aqueous solution at room temperature to about 90 ° C. Specifically, first, OH groups serving as adsorption sites for metal ions are formed on the surface of the substrate. Next, the substrate is immersed in a solution (FeCl2 aqueous solution or the like) containing Fe2 + or other metal ions (Co2 +, Ni2 +, Mn2 +, Zn2 +, etc.). Then, metal ions are adsorbed on the OH groups on the substrate surface. Next, a part of divalent Fe2 + is oxidized to trivalent Fe3 + by introducing an oxidant such as nitrite ion (NO2-) or air. Furthermore, spinel ferrite can be generated by adsorbing metal ions to the Fe3 +.

Next, the magnetic layer 31 is patterned in a line shape. Patterning of the magnetic layer 31 can be performed using wet etching. Specifically, first, a resist film is formed on the entire surface of the magnetic layer 31, and a mask is formed in a region where the magnetic layer 31 should be left by performing exposure and development. Next, the wafer is immersed in an aqueous etchant solution such as ferric chloride or sodium thiosulfate. Note that the concentration of the etchant aqueous solution may be approximately the same as that in the case of etching the Fe layer, and is appropriately adjusted in view of the thickness of the magnetic layer. Also, the immersion time of the wafer is appropriately adjusted in view of the concentration of the etchant aqueous solution and the thickness of the magnetic layer. The patterning of the magnetic layer 31 can also be performed using dry etching.
The magnetic layer 31 can be directly drawn and formed by a droplet discharge method, a printing method, or the like. Thus, the magnetic layer 31 having a predetermined pattern is formed. Of course, the magnetic layer 31 may be formed of a material other than the ferrite described above.

  Next, as shown in FIG. 5C, a plurality of second wirings 22 and connection wirings 121 a and 221 a (hereinafter referred to as “second wiring 22 etc.”) are formed so as to cross the surface of the magnetic layer 31. . The specific method is the same as the method for forming the first wiring 12 and the like described above. The second wiring 22 and the like are desirably formed at the same time as the rearrangement wiring and the like in the process of forming the rearrangement wiring and the connection terminal (hereinafter referred to as “relocation wiring and the like”). Thus, by forming the second wiring 22 and the like simultaneously with the rearrangement wiring and the like, the manufacturing process can be simplified and the manufacturing cost can be reduced. In addition, the second wiring 22 and the like can be accurately formed using plating, photolithography, and the like, and an inductor element having desired characteristics can be formed.

  In the formation process of the second wiring and the like, one first wiring 113 and another first wiring 114 that is not adjacent to the first first wiring 113 are sequentially connected by the second wiring 122 so that the primary side Winding 141 is formed. In addition, one first wiring 213 and another first wiring 214 not adjacent to the first first wiring 213 are sequentially connected by a second wiring 222 to form a secondary winding 241. According to this configuration, an inductor element having a plurality of windings can be easily formed by the same number of steps as that for forming an inductor element having one winding. It is also possible to tune the inductor element characteristics by trimming the second wiring 22 formed on the surface of the magnetic layer 31 with a laser or the like.

  By the way, in the formation process of the second wiring and the like, the second wiring 22 is formed, and the connection wirings 121a and 221a for connecting the second wiring 22 and the electrodes 121 and 221 are formed. Specifically, among the plurality of second wirings 22, the connection wiring 121 a that connects the outermost second wiring 128 to the primary side electrode 121, and the second wiring 228 that is adjacent to the inner side are connected to the secondary side electrode 221. A connection wiring 221a to be connected is formed.

On the other hand, it is also possible to form a connection wiring that connects another second wiring to the secondary electrode 221.
FIG. 6 is an explanatory diagram of a modification of the method for manufacturing an electronic substrate. In this modification, a connection wiring 227 a that connects another second wiring 227 different from the above-described second wiring 228 to the secondary electrode 221 is formed. Such connection wiring can be easily changed by changing a mask for electrolytic plating.

  Thus, the number of turns of the secondary winding can be easily changed by changing the second wiring to which the connection wiring is to be connected. Thereby, it becomes possible to change the ratio of the number of turns of the primary side winding 141 and the number of turns of the secondary side winding 241, and the transformation rate of the transformer can be changed. In addition, as a case where a transformation rate is changed, the case where it carries out according to a user specification, the case where it carries out in relation to the characteristic of the other element in an electronic substrate, etc. are considered.

  As described above in detail, in the method for manufacturing the electronic substrate according to the present embodiment, the connection wiring between the second wiring and the electrode is formed in the step of forming the second wiring. According to this configuration, it is possible to change the number of windings of the inductor element by changing only the shape of the connection wiring in the formation process of the second wiring while sharing the first wiring and the magnetic layer. Become. Thereby, the characteristic change of an inductor element can be performed at low cost.

(Second Embodiment)
FIG. 7 is a plan view of the electronic substrate according to the second embodiment. In FIG. 7, the upper side of the drawing is the + Y direction, and the right side of the drawing is the + X direction. In the electronic substrate according to the second embodiment, a plurality of windings 141, 241, and 341 are formed around the magnetic layer 31, and each winding is connected to a common electrode 11, 21. Note that detailed description of portions having the same configuration as in the first embodiment is omitted.

  In the second embodiment, a plurality of first wirings 12 are formed substantially in parallel on the surface of the base 10. Further, a linear magnetic layer 31 is formed so as to cover the central portion of the plurality of first wirings 12. Further, a plurality of second wirings 22 are formed substantially in parallel so as to cross the surface of the magnetic layer 31.

  Here, the + X side end of one first wiring 113 and the −X side end of another first wiring 114 not adjacent to the first wiring 113 are sequentially connected by the second wiring 122. Thus, the first winding 141 is formed. In addition, an end on the + X side of one first wiring 213 adjacent to one first wiring 113 and an end on the −X side of another first wiring 214 not adjacent to the first first wiring 213 are provided. The second windings 241 are sequentially connected by the second wiring 222. Further, an end on the + X side of one first wiring 313 adjacent to one first wiring 213 and an end on the −X side of another first wiring 314 not adjacent to the first first wiring 313 are provided. The third winding 341 is formed by being sequentially connected by the second wiring 322. As a result, three windings 141, 241, and 341 are formed around the magnetic layer 31.

  Of the plurality of first wirings 12, three first wirings 118, 218, and 318 arranged at the end on the + Y side are connected to the common electrode 11 via the connection wiring 11a. In addition, among the plurality of second wirings 22, three second wirings 128, 228, and 328 arranged at the end portion on the −Y side are coupled to the common electrode 21 through the coupling wiring 21 a. As a result, the three windings 141, 241, and 341 are connected to the common electrodes 11 and 21.

  Thus, in the electronic substrate according to the second embodiment, a plurality of windings 141, 241, and 341 are formed around the magnetic layer 31, and each winding is connected to the common electrodes 11 and 21. did. Thus, by making the winding of the inductor element into a braided structure, it is possible to increase the winding density of the winding and improve the magnetic flux density. As a result, the L value (inductance elementance) and Q value of the inductor element 40 can be remarkably improved, and the electrical characteristics of the electronic substrate can be improved.

In the second embodiment, the spiral winding is arranged around the linear core 42 to form the linear inductor element 40. However, it is possible to form inductor elements having other shapes. is there.
FIG. 8 is a plan view of a modification of the inductor element. In FIG. 8, description of windings and the like is omitted, and only a schematic shape of the inductor element is shown. As shown in FIG. 8A, if a substantially circular toroidal inductor element is formed, the magnetic flux forms a closed loop, and thus a highly efficient inductor element can be provided. Further, if the substantially rectangular shape shown in FIG. 8B or the polygonal shape shown in FIG. 8C is used, the design is easy and an inductor element having desired characteristics can be formed.

  Further, a spiral inductor element shown in FIG. 8 (e) may be formed. According to this structure, it becomes possible to arrange many windings in a narrow region, and the magnetic flux density can be improved. It should be noted that the magnetic flux density can be further improved by providing a space in the center of the spiral. Further, as shown in FIG. 8E, a spiral inductor element that gradually increases from the inside toward the outside may be formed. At this time, it is desirable to increase the cross-sectional areas of the first wiring and the second wiring from the inside toward the outside. According to this configuration, it is possible to achieve both the reduction of the wiring resistance of the inductor element and the reduction of the formation region, and a highly efficient inductor element can be formed.

(Electronics)
Next, an example of an electronic device including the above-described electronic substrate (electronic substrate) will be described.
FIG. 9 is a perspective view of the mobile phone. The electronic board described above is arranged inside the casing of the mobile phone 300. According to this configuration, since the low-cost electronic substrate with excellent electrical characteristics is provided, a low-cost mobile phone with excellent electrical characteristics can be provided.

  Note that the semiconductor device described above can be applied to various electronic devices other than mobile phones. For example, LCD projectors, multimedia-compatible personal computers (PCs) and engineering workstations (EWS), pagers, word processors, TVs, viewfinder type or monitor direct view type video tape recorders, electronic notebooks, electronic desk calculators, car navigation systems The present invention can be applied to electronic devices such as a device, a POS terminal, and a device provided with a touch panel. In either case, a low-cost electronic device having excellent electrical characteristics can be provided.

  It should be noted that the technical scope of the present invention is not limited to the above-described embodiments, and includes those in which various modifications are made to the above-described embodiments without departing from the spirit of the present invention. In other words, the specific materials and layer configurations described in the embodiments are merely examples, and can be changed as appropriate.

  For example, in the above-described embodiment, the inductor element is formed on the surface of the electronic substrate. However, the inductor element may be formed on the back surface of the electronic substrate, and conduction with the surface may be ensured by the through electrode. Moreover, in the said embodiment, although the inductor element was formed in the electronic substrate in which the electronic circuit was formed, you may form an inductor element in the electronic substrate which consists of an electrically insulating material. Moreover, in the said embodiment, although the 1st wiring and the 2nd wiring were formed by the electroplating method, you may employ | adopt other film-forming methods, such as a sputtering method and a vapor deposition method.

In the example described above, the mixed structure of the relocation wiring type wafer level package structure and the inductor structure has been described. However, the wafer level package structure is not limited to this, and a wafer having a Cu post structure in the external terminal portion. Other known wafer level package structures such as a level package structure and an inductor structure may be mixed. In either case, a structure excellent in both reliability and inductor characteristics can be provided.

It is explanatory drawing of the electronic substrate which concerns on 1st Embodiment. It is explanatory drawing of an inductor element. It is explanatory drawing of the modification of an electronic substrate. It is explanatory drawing of the mounting structure of the electronic substrate which concerns on 1st Embodiment. It is process drawing of the manufacturing method of the electronic substrate which concerns on 1st Embodiment. It is explanatory drawing of the modification of the manufacturing method of an electronic substrate. It is a top view of the electronic substrate which concerns on 2nd Embodiment. It is explanatory drawing of the modification of an inductor element. It is a perspective view of a mobile phone.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Electronic substrate 10 ... Base | substrate 11,21 ... Electrode 12 ... 1st wiring 22 ... 2nd wiring 31 ... Magnetic layer (insulating member) 40 ... Inductor element 41 ... Winding 71 ... Adhesive 72 ... Heat radiation member 113,114 ... 1st wiring 122 ... 2nd wiring 121a, 221a ... Connection wiring 141, 241 ... Winding

Claims (3)

A plurality of first wirings formed on the substrate;
An insulating member continuously formed covering a central portion of the plurality of first wires;
A plurality of second wiring formed across the surface of said insulating member,
An electrode for connecting each of the first wiring and the second wiring to the outside;
A heat dissipating member covering the whole or a part of the periphery of the substrate with an adhesive in which metal fine particles are dispersed;
Including
The second wiring sequentially connects an end portion of one first wiring and an end portion of another first wiring not adjacent to the first wiring to form an inductor element,
The inductor element includes a plurality of windings composed of the first wiring and the second wiring,
A plurality of said windings, connected to different said electrode or is connected to the common of said electrode, said insulating member is formed of a magnetic material, an electronic board having the inductor element on the substrate Because
The electrode for connecting the inductor element to the outside and the first wiring or the second wiring are connected to each other,
An electronic substrate characterized by that. Forming a plurality of the first wiring on the substrate,
A step of continuously forming the insulating member covers the central portion of the plurality of the first wiring,
Forming a plurality of the second wiring so as to traverse the surface of said insulating member,
Forming the electrode for connecting the first wiring and the second wiring to the outside;
Connecting the heat dissipating member to the whole or a part of the periphery of the substrate via the adhesive in which the metal fine particles are dispersed;
Including
The insulating member is made of the magnetic material,
In the step of forming the second wiring, the end of one first wiring and the end of the other first wiring not adjacent to the first wiring are connected in order, and the second wiring Place the wiring ,
Forming a plurality of windings composed of the first wiring and the second wiring ;
An electronic substrate manufacturing method for forming an inductor element on the substrate,
In the step of forming the second wiring, the connection wiring between the electrode for connecting the inductor element to the outside and the first wiring or the second wiring is formed,
A method of manufacturing an electronic substrate, comprising forming the inductor element. An electronic device comprising the electronic substrate according to claim 1 .

Images