JP2008103398A - Electronic substrate, its manufacturing method, and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic substrate which can enhance electric characteristics and heat dissipation characteristics, to provide its manufacturing method, and to provide an electronic apparatus. <P>SOLUTION: In the electronic substrate 1 having an inductor element 40 formed on a substrate 10, the core 42 of the inductor element 40 is formed of a second magnetic layer 31, periphery of the inductor element 40 is covered with magnetic layers 35 and 36, and resin layers 37 and 38 are formed in the clearance of adjoining windings 41 of the inductor element 40. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an electronic substrate, a manufacturing method thereof, and an electronic apparatus.

An electronic substrate (semiconductor chip) on which an electronic circuit is formed is mounted on an electronic device such as a mobile phone or a personal computer. This electronic substrate may be used together with passive elements such as resistors, inductor elements, and capacitors. Patent Documents 1 and 2 propose a technique for forming a spiral inductor element on an electronic substrate. The spiral inductor element has a spiral winding formed on the surface of a base serving as a core. Non-Patent Document 1 proposes a technique for forming a toroidal inductor element on an electronic substrate. In the toroidal inductor element, a spiral winding is formed around a ring-shaped core.
JP 2002-164468 A JP 2003-347410 A Ermolov et al, “Microreplicated RF Toroidal Inductor”, IEEE Transactions on Microwave Theory and Techniques, Vol. 52, no. 1, January 2004, p29-36

However, since leakage current is generated due to interference between the magnetic flux generated in the inductor element and silicon constituting the electronic substrate, there is a problem that there is a limit in improving the Q value (ratio between the inductance and the resistance value) of the inductor element. .
Recently, it has been studied to cause an inductor element formed on an electronic substrate or a semiconductor chip to function as a part of a power supply circuit such as a choke coil or a transformer. In this case, it is essential to improve the inductance value of the inductor element. However, the improvement of the inductance value of the inductor element is accompanied by an increase in the number of windings of the coil, and heat is also generated because a large amount of current flows. Therefore, suppression of the enlargement of an electronic substrate and suppression of a temperature rise are desired.

  The present invention has been made in order to solve the above-described problems, and it is possible to improve an electrical characteristic and an electronic substrate capable of improving a heat dissipation characteristic, a manufacturing method thereof, and an electronic device. For the purpose of provision.

In order to achieve the above object, an electronic board according to the present invention is an electronic board having an inductor element on a base, the core of the inductor element is formed of a magnetic material, and the periphery of the inductor element is magnetic. It is covered with a body material, and a gap between adjacent windings of the inductor element is filled with a nonmagnetic material.
According to this configuration, since the core of the inductor element is formed of a magnetic material, the magnetic flux density can be increased, and the inductance value and Q value of the inductor element can be improved. Further, since the periphery of the inductor element is also covered with a magnetic material to form a closed magnetic circuit, the magnetic flux density can be further increased and the inductance value and Q value of the inductor element can be improved. Therefore, the electrical characteristics of the electronic substrate can be improved.
Furthermore, since the nonmagnetic material is filled in the gap between the adjacent windings of the inductor element, it is possible to suppress the lines of magnetic force from being canceled by the gap between the windings, and to concentrate the lines of magnetic force inside the magnetic material.

The magnetic material is preferably ferrite.
According to this configuration, the magnetic material can be introduced at a low cost.

The nonmagnetic material is preferably a resin.
According to this configuration, the nonmagnetic material can be introduced at a low cost.

The inductor element is preferably a toroidal inductor element having a ring-shaped core and a helical winding.
According to this configuration, since the magnetic flux forms a closed loop, a highly efficient inductor element can be formed.

The inductor element is preferably a spiral inductor element in which spiral windings are formed in a plane.
According to this configuration, a thin and highly efficient inductor element can be formed.

It is desirable that the spiral winding is formed in a plurality of layers with a nonmagnetic material interposed therebetween.
According to this configuration, since a large amount of magnetic flux can be generated, an inductor element having a high inductance value and a high Q value can be formed.

It is desirable that all or part of the periphery of the base is covered with a heat radiating member made of a material having a higher thermal conductivity than the base.
According to this configuration, it is possible to quickly release the heat generated in the electronic substrate to the outside.
Therefore, the heat dissipation characteristics of the electronic substrate can be improved.

Moreover, it is desirable that the heat dissipating member is fixed to the base via an adhesive in which metal fine particles are dispersed.
Dispersing the metal fine particles increases the thermal conductivity of the adhesive, so that the heat generated in the electronic substrate can be quickly released to the outside. Therefore, the heat dissipation characteristics of the electronic substrate can be improved.

On the other hand, an electronic substrate manufacturing method according to the present invention is a method for manufacturing an electronic substrate having an inductor element on a substrate, the step of forming a first magnetic layer on the substrate, and the first magnetic layer on the substrate. Forming a plurality of first wirings, forming a first nonmagnetic layer in a gap between the adjacent first wirings, and forming a second magnetic layer so as to cover a central portion of the plurality of first wirings. Forming, a step of forming a plurality of second wirings so as to cross the surface of the second magnetic layer, a step of forming a second nonmagnetic layer in a gap between the adjacent second wirings, and the plurality of Forming a third magnetic layer so as to cover the second wiring, and in the step of forming the second wiring, an end of one of the first wiring and an end of the other first wiring Are arranged in order so that the first wiring and the second wiring are connected. And forming the inductor element having a winding made of.
According to this configuration, it is possible to easily form an inductor element having the magnetic layer as a core and the periphery covered with the magnetic layer.

A method of manufacturing an electronic substrate having an inductor element on a substrate, the step of forming a first magnetic layer on the substrate, and a spiral shape forming the inductor element on the first magnetic layer The method includes a step of forming a winding, a step of forming a nonmagnetic layer in a gap between the windings, and a step of forming a second magnetic layer so as to cover the winding.
According to this configuration, it is possible to easily form an inductor element having the magnetic layer as a core and the periphery covered with the magnetic layer.

Further, it is desirable that the plurality of windings be stacked with the nonmagnetic layer interposed between them by repeating the winding forming step and the nonmagnetic layer forming step.
According to this configuration, since a large amount of magnetic flux can be generated, an inductor element having a high inductance value and a high Q value can be formed.

Further, it is desirable to include a step of trimming a part of the winding to adjust the characteristics of the inductor element.
According to this configuration, an inductor element having desired characteristics can be formed.

On the other hand, an electronic apparatus according to the present invention includes the above-described electronic substrate.
According to this configuration, since the low-cost electronic substrate having excellent electrical characteristics is provided, a low-cost electronic device having excellent electrical characteristics can be provided.

Embodiments of the present invention will be described below with reference to the drawings. In each drawing used for the following description, the scale of each member is appropriately changed to make each member a recognizable size.
(First embodiment)
FIG. 1 is an explanatory view of an electronic substrate, FIG. 1 (a) is a plan view, and FIG. 1 (b) is a side sectional view taken along line BB of FIG. 1 (a). In FIG. 1A, descriptions of a solder resist and a heat radiating member, a first magnetic layer, a third magnetic layer, a first resin layer, and a second resin layer, which will be described later, are omitted. As shown in FIG. 1A, the electronic substrate 1 according to this embodiment is a bare chip of an integrated circuit such as an IC or LSI, and includes an inductor element 40 on the surface of the base 10.

As shown in FIG. 1B, the electronic substrate 1 includes a base 10 made of silicon, glass, quartz, quartz, or the like. An electronic circuit (not shown) is formed on the surface of the base 10.
In the electronic circuit, at least a wiring pattern is formed, semiconductor elements such as a plurality of passive components (components), a plurality of transistors, and a plurality of thin film transistors (TFTs), wirings interconnecting them, and the like It is constituted by. In order to protect the electronic circuit, a passivation film 8 made of an electrically insulating material such as SiN is formed on the surface of the base 10. On the other hand, an electrode 62 for electrically connecting the electronic circuit to the outside is formed on the peripheral edge portion and the center portion of the base 10.

(Inductor element)
An electronic substrate 1 shown in FIG. 1A includes an inductor element 40 on a base 10.
FIG. 2 is an explanatory diagram of the inductor element, FIG. 2 (a) is a plan view, and FIG. 2 (b) is a side cross-sectional view taken along line CC in FIG. 2 (a). In FIG. 2A, descriptions of a solder resist and a heat radiating member, which will be described later, are omitted. As shown in FIG. 2A, the inductor element 40 includes a ring-shaped core 42 formed by the second magnetic layer 31, and a spiral winding 41 formed around the core 42. ing. The winding 41 is constituted by the first wiring 12 disposed on the back surface of the second magnetic layer 31 and the second wiring 22 disposed on the surface of the second magnetic layer 31.

As shown in FIG. 2B, a first magnetic layer 35 made of a magnetic material is formed on the surface of the passivation film 8. The first magnetic layer 35 is formed in a substantially circular shape in plan view that is slightly larger than the region where the inductor element 40 is formed.
By adopting ferrite as the magnetic material, the magnetic material can be introduced at low cost. Ferrite is a general term for complex oxides composed mainly of Fe2O3 and divalent metal oxides. As will be described later, ferrite can be obtained by oxidizing Fe, which is a first metal, and Mn, Co, Ni, etc., which are second metals. Spinel type ferrite (MFe2O4) is a soft magnetic material, magnetoplumbite type ferrite (MFe12O19) is a permanent magnet, and garnet type ferrite (MFe5O12; M = Y, Sm, Gd, Dy, Ho, Er, Yb) is a micro material. Used as a wave material for circulators, isolators and the like. Since ferrite is an oxide and has an insulating surface, a coil pattern to be described later can be formed immediately above. When the first magnetic layer 35 is formed of a magnetic metal layer such as iron, it is preferable to perform an insulating process such as oxidizing the surface or depositing an insulating resin. Further, the magnetic layer may be an amorphous metal layer having a high magnetic permeability represented by an Fe-based material.

A first wiring 12 is formed on the passivation film 8 and the first magnetic layer 35.
The first wiring 12 includes copper (Cu), gold (Au), silver (Ag), titanium (Ti), tungsten (W), titanium tungsten (TiW), titanium nitride (TiN), nickel (Ni), nickel It is made of a conductive material such as vanadium (NiV), chromium (Cr), aluminum (Al), or palladium (Pd). It should be noted that the constituent material of the first wiring 12 can be appropriately selected according to characteristics such as a resistance range necessary for the winding of the inductor element and an allowable current value. In the case where the first wiring 12 is formed by electrolytic plating, the first wiring 12 is formed on the surface of the underlayer, but the description of the underlayer is omitted in FIG.

  As shown in FIG. 2A, the first wiring 12 is patterned in a substantially trapezoidal shape, and a plurality of first wirings 12 are arranged radially on the same circumference. The space between the adjacent first wirings 12 is desirably formed with a constant width near the resolution limit of photolithography. Thereby, the ratio of L / S (Line and Space) of the first wiring 12 is increased, and the wiring resistance can be reduced. One of the plurality of first wirings 12 is connected to the electrode 11 via the connection wiring 12a.

  Here, a nonmagnetic material layer is formed in the space between the adjacent first wirings 12. As the nonmagnetic material layer, a first resin layer 37 made of a photosensitive resin such as acrylic resin, photosensitive polyimide, BCB (benzocyclobutene), or phenol novolac resin is formed. The first resin layer 37 is patterned by photolithography, and is formed in the same thickness as the first wiring 12 in the space between the adjacent first wirings 12 on the surface of the first magnetic layer 35.

A second magnetic layer 31 made of a magnetic material is formed so as to cover the first wiring 12.
An inner through hole (via) 33 and an outer through hole 34 are formed in the second magnetic layer 31. The inner through hole 33 is formed so that the inner end portion of the first wiring 12 is exposed, and a plurality of inner through holes 33 are arranged on the same circumference.
In addition, what is necessary is just to form the opening shape of the inner side through-hole 33 and the outer side through-hole 34 in a fan shape, a rectangle, an ellipse, an ellipse etc. Alternatively, a plurality of inner through holes 33 and / or a plurality of outer through holes 34 may be connected to form a ring-shaped through hole.

  As shown in FIG. 2B, the second wiring 22 is formed on the surface of the second magnetic layer 31. The second wiring 22 is also formed of the same conductive material as the first wiring 12. The second wiring 22 is also filled inside the inner through hole 33 and the outer through hole 34 and is connected to the first wiring 12.

  As shown in FIG. 2A, the second wiring 22 is formed on the inner through hole 33 formed on one of the adjacent first wirings 12 and on the other first wiring. The outer through-hole 34 is patterned. That is, the second wiring 22 is formed so as to cross the second magnetic layer 31. As in the case of the first wiring 12, it is desirable that the space between the adjacent second wirings 22 is formed to have a constant width near the resolution limit of photolithography.

  Here, a nonmagnetic material layer is also formed in a space between the adjacent second wirings 22. As the nonmagnetic material layer, a second resin layer 38 made of a photosensitive resin such as acrylic resin, photosensitive polyimide, BCB (benzocyclobutene), or phenol novolac resin is formed. As shown in FIG. 2B, the second resin layer 38 is patterned by a photolithography method or the like, and the same as the second wiring 22 in the space between the adjacent second wirings 22 on the surface of the second magnetic layer 31. It is formed with a film thickness. The second resin layer 38 is formed so as to connect the inner end of one first resin layer 37 and the outer end of the other first resin layer 37 among the adjacent first resin layers 37. ing. As a result, the first resin layer 37 and the second resin layer 38 are formed in all the gaps between the adjacent windings 41.

  A third magnetic layer 36 is further formed on the surface of the second magnetic layer 31 on which the second wiring 22 and the second resin layer 38 are formed. The third magnetic layer 36 has a substantially circular shape in plan view, and is formed in substantially the same shape as the second magnetic layer 31 described above.

FIG. 3 is a side sectional view of a portion corresponding to the line FF in FIG.
As shown in FIG. 3, the inductor element 40 on the substrate 10 is surrounded by the magnetic layers 35, 31, and 36 to form a closed magnetic path shielded from the outside. For this reason, a magnetic field 100 generated in a direction perpendicular to the paper surface of FIG. 3 due to a current flowing through the inductor element 40 (a two-dot chain line arrow in FIG. 3) mainly passes through the magnetic layers 35, 31, and 36 having a high magnetic permeability. Pass through. Therefore, leakage of magnetic flux is reduced in the closed magnetic circuit type.

  Returning to FIG. 2A, one of the plurality of second wirings 22 is connected to the other electrode 21 through the connection wiring 22 a. In the present embodiment, the example in which the inductor element 40 is inserted between the electrodes 11 and 21 has been described. However, the insertion place is between the electrode and the external terminal, between the external terminal and the external terminal, or on other electronic substrates. Various modifications can be made to the connection destination such as between built-in passive components. This is the same in all embodiments described later.

  In this way, the first wiring 12 and the second wiring 22 are sequentially connected to form a spiral winding 41. Since ferrite is an electrically insulating material having a high resistivity, the first wiring 12 and the second wiring 22 can be formed adjacent to the ferrite. A ring-shaped core 42 is constituted by the second magnetic layer 31 inside the winding 41. The inductor 41 is configured by the winding wire 41 and the core 42. Thus, the toroidal inductor element 40 having the ring-shaped core is more efficient than the inductor element having the linear core because the magnetic flux forms a closed loop.

  By configuring the core 42 of the inductor element 40 with a magnetic material, the magnetic flux density can be increased, and the L value (inductance) and Q value of the inductor element 40 can be significantly improved. As a result, the inductor element 40 of the present embodiment can function as a choke coil or the like of the power supply circuit. The second magnetic layer 31 is not necessarily formed on substantially the entire surface of the electronic substrate, and may be formed in the vicinity of the region where the inductor element 40 is formed.

Further, the magnetic layers 35, 31, and 36 made of a magnetic material surround the periphery of the inductor element 40 to form a closed magnetic circuit. In such a closed magnetic circuit type, since the magnetic flux generated in the inductor element 40 mainly passes through the core 42 having a high magnetic permeability, it is compared with the open magnetic circuit type in which the periphery of the inductor element 40 is not shielded. There is little leakage of magnetic flux to the outside. Therefore, it is possible to prevent a leakage current that is generated due to interference with a peripheral member such as the base 10 that is in contact with the inductor element 40. Further, the magnetic flux density can be further increased, and higher L value (inductance) and Q value can be obtained.
In addition, since the resin layers 37 and 38 are formed in the space between the adjacent wirings of the first wiring 11 and the second wiring 22, the lines of magnetic force are offset by the space between the wirings of the first wiring 11 and the second wiring 22. This can be suppressed and the lines of magnetic force can be concentrated inside the magnetic layers 35, 31 and 36.

  FIG. 4 is an explanatory diagram of a modified example of the electronic substrate, and is a side cross-sectional view of a portion corresponding to the line CC in FIG. In the modification shown in FIG. 4, a conductive layer (electrical shield layer) 7 is formed on substantially the entire back surface of the passivation film 8. The conductive layer 7 can be formed of a conductive material such as Al or Cu using an electronic circuit formation process. If the conductive layer 7 is held at ground or at a constant potential, the influence (coupling) of the magnetic field of the inductor element 40 on the electronic circuit including the active element of the substrate 10 can be reduced by the electromagnetic shielding effect. The conductive layer 7 may be formed at any position between the inductor element 40 and the electronic circuit. In addition, the conductive layer 7 may be formed at least in the region where the inductor element 40 is formed, even though it is not formed on the substantially entire surface of the electronic substrate. Further, the magnetic shield layer may be formed of the above-described magnetic material (ferrite, amorphous metal layer, or the like) instead of the conductive layer, which has higher magnetic shield characteristics and improved inductor characteristics. Although not shown, an electric or magnetic shield layer may be formed on the side surface and upper surface of the inductor by the same process as described below. By doing so, the electrical and magnetic shield characteristics are further improved.

(Relocation wiring, etc.)
As shown in FIG. 1B, the electronic substrate 1 according to the present embodiment includes a connection terminal 63 used for connection with the counterpart member. Further, the periphery of the substrate 10 is covered with a heat radiating member 72 having a high thermal conductivity.

  As shown in FIG. 1A, a plurality of electrodes 62 are aligned along the peripheral edge of the electronic substrate 1. Due to the recent miniaturization of the electronic substrate 1, the pitch between the adjacent electrodes 62 has become very narrow. When the electronic substrate 1 is mounted on the mating member, there is a possibility that a short circuit occurs between the adjacent electrodes 62. Therefore, in order to widen the pitch between the electrodes 62, a rearrangement wiring 64 for the electrodes 62 is formed.

  Specifically, a plurality of pads constituting the connection terminal 63 are formed at the center of the surface of the electronic substrate 1. A rearrangement wiring 64 drawn from the electrode 62 is connected to the connection terminal 63. As a result, the narrow-pitch electrodes 62 are drawn out to the central portion to widen the pitch. For the formation of such an electronic substrate 1, W-CSP (Wafer Level Chip Scale Package) technology in which rearrangement wiring, resin sealing, and the like are collectively performed in a wafer state and then separated into individual electronic substrates 1. Is being used.

  FIG. 5 is an explanatory diagram of the electronic substrate according to the first embodiment, and is a cross-sectional view taken along line AA of FIG. Bumps 78 are formed on the surface of the connection terminal 63. The bumps 78 are, for example, solder bumps, and are formed by a printing method or the like. The bump 78 is mounted on the connection terminal of the counterpart member.

  A solder resist 66 is formed around the bump 78. The solder resist 66 serves as a partition wall for the bump 78 when the electronic substrate 1 is mounted on the counterpart member, and is made of an electrically insulating material such as a resin. The solder resist 66 covers the entire surface of the substrate 10 including the magnetic layers 35, 31 and 36.

On the other hand, the heat radiating member 72 is disposed so as to cover the back surface and the side surface of the base 10. The heat radiating member 72 is made of a material having a higher thermal conductivity than the constituent material of the base body 10.
For example, the heat radiating member 72 can be made of Cu having a higher thermal conductivity than silicon constituting the base body 10. The heat radiating member 72 is fixed to the base 10 via an adhesive 71 disposed on the back surface of the base 10. As the adhesive 71, it is desirable to employ a resin paste that is a main component in which metal fine particles having high thermal conductivity are dispersed. Specifically, it is possible to employ an Ag paste in which Ag fine particles are dispersed.

  As described above, when the electronic substrate 1 of this embodiment is used in a power supply circuit, a large current flows through the inductor element 40 and the electronic substrate 1 generates heat. In this embodiment, the periphery of the electronic substrate 1 is covered with the heat radiating member 72 and the heat radiating member 72 is fixed to the base body 10 with an adhesive having high thermal conductivity, so that the heat generated in the electronic substrate 1 is quickly released to the outside. It becomes possible to do. Thereby, it becomes possible to suppress the temperature rise of the electronic substrate 1, and the reliability of the electronic substrate 1 can be improved. As a result, the electronic substrate of this embodiment can be used for the power supply circuit.

(Mounting structure)
FIG. 6 is an explanatory diagram of the mounting structure of the electronic substrate according to the first embodiment, and is a cross-sectional view of a portion corresponding to the line AA in FIG. As shown in FIG. 6, the electronic substrate 1 according to this embodiment is used by being mounted on a counterpart member 90. A wiring pattern (not shown) and lands 92 and 94 are formed on the surface of the mating member 90. Solder balls 93 and 95 are formed on the surfaces of the lands 92 and 94. In this embodiment, the solder bonding method has been described. However, instead of the solder balls 93 and 95, other known mounting methods such as an adhesive bonding method such as silver paste may be used.

  Then, the solder bumps 78 of the electronic substrate 1 and the solder balls 93 of the counterpart member 90 are coupled, and the connection terminals 63 of the electronic substrate 1 and the lands 92 of the counterpart member 90 are electrically connected. Further, the heat radiating member 72 of the electronic substrate 1 is connected to the land 94 of the mating member 90 via the solder ball 95. These connections can be performed collectively using reflow, FCB (Flip Chip Bonding), or the like.

  Thus, by connecting the heat dissipation member 72 to the counterpart member 90, the heat dissipation efficiency of the electronic substrate 1 can be improved. Further, the heat radiating member 72 can be grounded via the mating member 90, and the electronic substrate 1 can be electrically isolated from the outside. As a result, the reliability of the electronic substrate can be improved.

(Electronic substrate manufacturing method)
Next, a method for manufacturing the electronic substrate according to the first embodiment will be described.
7 and 8 are process diagrams of the method for manufacturing the electronic substrate according to the first embodiment, and are cross-sectional views taken along a line AA in FIG. Note that W-CSP technology is used for manufacturing the electronic substrate. That is, the following steps are collectively performed on the wafer and finally separated into individual electronic substrates.

First, as shown in FIG. 7A, the first magnetic layer 35 is formed on the surface of the passivation film 8 of the wafer 10a.
Here, a method for forming the first magnetic layer 35 made of ferrite will be described as an example.
First, a metal film is formed on the entire surface of the wafer 10a. This metal film is composed of Fe as the first metal and Mn, Co, Ni, or the like as the second metal. The metal film can be formed using an electrolytic plating method or an electroless plating method. If the first metal and the second metal are deposited at the same time, it is possible to form a mixed metal film. If the first metal and the second metal are alternately deposited, the first metal and the second metal are deposited. It is possible to form a metal film in which two metals are alternately stacked. The ratio between the first metal and the second metal may be 1: 1, for example. In addition, as a 2nd metal, you may employ | adopt not only one type of metals among Mn, Co, Ni etc. but 2 or more types of metals.

  Next, the metal film is oxidized. The oxidation of the metal film can be performed by heating while holding the wafer 10a in an atmosphere of oxygen gas or the like, or by immersing the substrate in a liquid of an oxidizing agent such as potassium dichromate. Is possible. By these treatments, the first metal and the second metal constituting the metal film are both oxidized to form ferrite. If these processes are repeated, an arbitrary thickness of ferrite is formed.

  It is also possible to adopt a recently developed ferrite plating method as a method for forming ferrite. The ferrite plating method is a method of directly forming a ferromagnetic ferrite film in an aqueous solution at room temperature to about 90 ° C. Specifically, first, OH groups serving as adsorption sites for metal ions are formed on the surface of the substrate. Next, the substrate is immersed in a solution (FeCl2 aqueous solution or the like) containing Fe2 + or other metal ions (Co2 +, Ni2 +, Mn2 +, Zn2 +, etc.). Then, metal ions are adsorbed on the OH groups on the substrate surface. Next, a part of divalent Fe2 + is oxidized to trivalent Fe3 + by introducing an oxidant such as nitrite ion (NO2-) or air. Further, spinel ferrite can be generated by adsorbing metal ions to the Fe3 +.

  Next, the planar shape of the first magnetic layer 35 is patterned. At this time, the first magnetic layer 35 may be left only in the vicinity of the above-described inductor element formation region, and the first magnetic layer 35 in other regions may be removed.

The patterning of the first magnetic layer 35 can be performed using wet etching. Specifically, first, a resist film is formed on the entire surface of the first magnetic layer 35, and a mask is formed in a region where the first magnetic layer 35 is to be formed by exposure and development. Next, the wafer 10a is immersed in an etchant aqueous solution such as ferric chloride or sodium thiosulfate. Note that the concentration of the etchant aqueous solution may be approximately the same as that in the case of etching the Fe layer, and is appropriately adjusted in view of the thickness of the magnetic layer. The immersion time of the wafer 10a is also adjusted as appropriate in view of the concentration of the etchant aqueous solution and the thickness of the magnetic layer. The patterning of the first magnetic layer 35 can also be performed using dry etching.
Thus, the first magnetic layer 35 having a predetermined pattern is formed. Of course, the first magnetic layer 35 may be formed of a material other than the ferrite described above.

  Next, the first wiring 12 and the connection wiring (hereinafter referred to as “first wiring 12 etc.”) are formed on the surface of the first magnetic layer 35. As a premise thereof, a base film is formed on the surface of the first magnetic layer 35. This base film is composed of a lower barrier layer and an upper seed layer. First, the barrier layer prevents diffusion of Cu into an electrode made of Al or the like, and is formed with a thickness of about 100 nm using TiW, TiN, or the like. The seed layer functions as an electrode when the first wiring 12 and the like are formed by an electrolytic plating method, and is continuously formed with a thickness of about several hundreds of nanometers using Cu or the like. They are often formed by sputtering, CVD, electroless plating, or the like. Next, a mask having an opening in the formation region of the first wiring 12 and the like is formed. Next, electrolytic Cu plating is performed using the seed layer of the base film as an electrode, and Cu is embedded in the opening of the mask to form the first wiring 12 and the like. This may be formed by an electroless plating method or the like. After removing the mask, the base film is etched using the first wiring 12 and the like as a mask.

Next, the first resin layer 37 (see FIG. 2A) is formed in the space between the adjacent first wirings 12.
Specifically, first, a photosensitive resin that becomes the first resin layer 37 is applied to the entire surfaces of the first magnetic layer 35 and the first wiring 12 by a droplet discharge method, a spin coating method, or the like. Next, by exposing and developing, the photosensitive resin is left in the region where the first resin layer 37 is to be formed, that is, the space between the adjacent first wirings 12, and the photosensitive resin in other regions is removed. Further, etching may be performed to planarize the patterned first resin layer 37 to the same thickness as the first wiring 12.

Next, as shown in FIG. 7B, a second magnetic layer 31 is formed so as to cover the first wiring 12 and the like.
Specifically, the second magnetic layer 31 is formed on the surfaces of the first wiring 12 and the first magnetic layer 35 (see FIG. 7A) described above in the same manner as the method for forming the first magnetic layer 35. Next, the second magnetic layer 31 is formed so as to cover the central portion of the first wiring 12 while exposing the end portion of the first wiring 12 by forming the inner through hole and the outer through hole described above. At the same time, the planar shape of the second magnetic layer 31 is patterned.
In this case, the second magnetic layer 31 may be left only in the vicinity of the inductor element formation region, and the second magnetic layer 31 in other regions may be removed.

The patterning of the second magnetic layer 31 can be performed using wet etching or dry etching in the same manner as the method for forming the first magnetic layer 35 described above.
Thus, the second magnetic layer 31 having a predetermined pattern is formed. Of course, the second magnetic layer 31 may be formed of a material other than the ferrite described above.

  Next, as shown in FIG. 7C, the rearrangement wiring 64 and the connection terminal 63 (hereinafter referred to as “relocation wiring 64 etc.”) are formed on the surface of the second magnetic layer 31. In the step of forming the rearrangement wiring 64 and the like, the second wiring 22 and the connection wiring (hereinafter referred to as “second wiring 22 and the like”) are formed simultaneously with the rearrangement wiring 64 and the like. The specific method is the same as the method of forming the first wiring 12 and the like described above. At this time, the second wiring 22 is arranged so as to sequentially connect the end of one first wiring 12 and the end of the other first wiring 12, thereby forming the first wiring 12 and the second wiring 22. A winding is formed. In this way, by forming the second wiring 22 and the like simultaneously with the rearrangement wiring 64 and the like, the manufacturing process can be simplified and the manufacturing cost can be reduced. In addition, the second wiring 22 and the like can be accurately formed using plating, photolithography, or the like, and an inductor element having desired characteristics can be formed. It is also possible to tune the inductor element characteristics by trimming the second wiring 22 formed on the surface of the second magnetic layer 31 with a laser or the like.

Next, a second resin layer 38 (see FIG. 2A) is formed in the space between the adjacent second wirings 22.
Specifically, first, a photosensitive resin that becomes the second resin layer 38 is applied to the entire surface of the second magnetic layer 31 and the second wiring 22 by a droplet discharge method, a spin coating method, or the like. Next, by exposing and developing, the photosensitive resin is left in the region where the second resin layer 38 is to be formed, that is, in the space between the adjacent second wirings 22, and the photosensitive resin in other regions is removed. Further, etching may be performed to planarize the patterned second resin layer 38 to the same thickness as the second wiring 22.

Next, the third magnetic layer 36 is formed on the inductor element.
Specifically, the third magnetic layer 36 is formed on the surface of the second magnetic layer 31 in the same manner as the method for forming the first magnetic layer 35 and the second magnetic layer 31 described above. At this time, patterning is performed so that the third magnetic layer 36 is left only in the vicinity of the inductor element formation region, and the third magnetic layer 36 in other regions is removed.
The patterning of the third magnetic layer 36 can be performed using wet etching or dry etching, similarly to the method of forming the first magnetic layer 35 and the second magnetic layer 31 described above.
Thus, the third magnetic layer 36 having a predetermined pattern is formed. Of course, the second magnetic layer 31 may be formed of a material other than the ferrite described above.

Next, as shown in FIG. 8A, a solder resist 66 is formed on the entire surface of the wafer 10a. Note that an opening 67 of the solder resist 66 is formed above the connection terminal 63.
Next, as shown in FIG. 8B, a bump 78 is formed on the surface of the connection terminal 63 inside the opening.
Here, the individual electronic substrates 1 are separated from the wafer 10a. The electronic substrate 1 can be separated by dicing or the like.

Next, as shown in FIG. 8C, an adhesive 71 is applied to the back surface of the substrate 10. The adhesive 71 can be applied by discharging it from a dispenser or the like.
Next, as shown in FIG.8 (d), the heat radiating member 72 is mounted | worn. First, the heat radiating member 72 is formed by press-molding a copper plate into a box shape. Next, the base body 10 is inserted inside the heat radiating member 72, and the bottom surface of the heat radiating member 72 and the back surface of the base body 10 are fixed by the adhesive 71.
Thus, the electronic substrate 1 according to this embodiment is completed.

  As described in detail above, according to the method of manufacturing the electronic substrate according to the present embodiment shown in FIG. 5, the inductor element 40 (see FIG. 2) having the second magnetic layer 31 as the core 42 is easily formed. be able to. Then, by forming the core of the inductor element 40 with the second magnetic layer 31, the magnetic flux density can be increased, and the electrical characteristics of the inductor element 40 can be improved.

Further, the magnetic layers 35, 31, and 36 made of a magnetic material surround the periphery of the inductor element 40 to form a closed magnetic circuit. In the closed magnetic circuit type, since the magnetic flux generated in the inductor element 40 mainly passes through the core 42 having a high magnetic permeability, the external magnetic circuit type is not compared with the open magnetic circuit type that does not shield the periphery of the inductor element 40. There is little leakage of magnetic flux. Therefore, it is possible to prevent a leakage current that is generated due to interference with a peripheral member such as the base 10 that is in contact with the inductor element 40. Further, the magnetic flux density can be further increased, and higher L value (inductance) and Q value can be obtained.
In addition, since the resin layers 37 and 38 are formed in the space between the adjacent wirings of the first wiring 11 and the second wiring 22, the lines of magnetic force are offset by the space between the wirings of the first wiring 11 and the second wiring 22. This can be suppressed and the lines of magnetic force can be concentrated inside the magnetic layers 35, 31 and 36.

(First modification)
FIG. 9 is an explanatory view of a modified example of the inductor element, FIG. 9A is a plan view, and FIG. 9B is a cross-sectional view taken along the line DD in FIG. 9A. In the first embodiment, a three-dimensional inductor element (toroidal inductor element) having a ring-shaped core is employed. Instead, a three-dimensional inductor element 140 having a linear core shown in FIG. 9A is employed. It is also possible to do.

  As shown in FIG. 9B, in the first modification, the first magnetic layer 35 made of ferrite is formed on the surface of the base 10 in a region where the inductor element 140 is formed, that is, in a substantially linear shape. The first magnetic layer 35 can be formed by the same material as that of the first embodiment and by the same method as that of the first embodiment. Is also possible.

As shown in FIG. 9A, a plurality of first wirings 12 are formed on the surfaces of the base 10 and the first magnetic layer 35. The first wiring 12 is formed of the same material as that of the first embodiment by the same method as that of the first embodiment. A plurality of first wirings 12 are arranged in parallel. One of the plurality of first wirings 12 is connected to the electrode 11 via the connection wiring 12a.
Further, a nonmagnetic material layer is formed in the space between the adjacent first wirings 12. As the nonmagnetic material layer, a first resin layer 37 made of a photosensitive resin is formed. The first resin layer 37 is formed of the same material as that of the first embodiment by the same method as that of the first embodiment.

  The second magnetic layer 31 is formed so as to cover the central portion while exposing the end portions of the first wiring 12 and the first resin layer 37. The second magnetic layer 31 is formed in a substantially linear shape using the same material as that of the first embodiment. As shown in FIG. 9B, the cross section perpendicular to the extending direction of the second magnetic layer 31 has a substantially semicircular shape. The second magnetic layer 31 can be formed by the same method as in the first embodiment, but can also be directly drawn and formed by a droplet discharge method, a printing method, or the like.

  As shown in FIG. 9A, a plurality of second wirings 22 are formed so as to cross the surface of the second magnetic layer 31. This second wiring 22 is also formed by the same method as in the first embodiment, using the same material as that in the first embodiment. A plurality of second wirings 22 are arranged in parallel. One of the plurality of second wirings 22 is connected to the electrode 21 through the connection wiring 22a.

The second wiring 22 is formed so as to connect the inner end of one first wiring and the outer end of the other first wiring among the adjacent first wirings 12. Thus, the 1st wiring 12 and the 2nd wiring 22 are connected in order, and the helical winding 41 is formed. A linear core 42 is constituted by the second magnetic layer 31 inside the winding 41. The winding 41 and the core 42 constitute a three-dimensional inductor element 140.
Further, a nonmagnetic material layer is formed in the space between the adjacent second wirings 22. As the nonmagnetic material layer, a second resin layer 38 made of a photosensitive resin is formed. The second resin layer 38 is formed by the same method as in the first embodiment, using the same material as that in the first embodiment. The second resin layer 38 is formed so as to connect the inner end of one first resin layer 37 and the outer end of the other first resin layer 37 among the adjacent first resin layers 37. ing. As a result, the first resin layer 37 and the second resin layer 38 are formed in all the gaps between the adjacent windings 41.

  Further, as shown in FIG. 11B, a third magnetic layer 36 made of ferrite is formed on the surface of the inductor element 140 so as to cover the inductor element 140 and overlap the end portion of the first magnetic layer 35. ing. The third magnetic layer 36 can be formed of the same material as that of the first embodiment by the same method as that of the first embodiment, but can be directly drawn and formed by a droplet discharge method, a printing method, or the like. Is also possible.

  As described above, the same effect as that of the first embodiment can be obtained even in the electronic substrate including the linear three-dimensional inductor element 140.

(Second Embodiment)
FIG. 10 is a plan view of a modified example of the inductor element, FIG. 10 (a) is a plan view, and FIG. 10 (b) is a cross-sectional view taken along line EE in FIG. 10 (a). In the first embodiment and the first modified example, the three-dimensional inductor element is employed. However, instead of this, a planar inductor element (spiral inductor element) 240 shown in FIG. 10A may be employed. .

  As shown in FIG. 10B, the first magnetic layer 32 is formed on the surface of the substrate 10, and the winding 41 is formed on the surface of the first magnetic layer 32. The winding 41 is formed in the same plane in a side view shown in FIG. 10B and in a spiral shape in a plan view shown in FIG. The winding 41 is not limited to the substantially rectangular spiral shape shown in FIG. 10A, and can be formed into a substantially circular or substantially polygonal spiral shape. The outer end portion of the winding 41 is connected to the electrode 21 through the connection wiring 22a. Further, the inner end portion of the winding 41 is connected to the electrode 11 through the connection wiring 12a. The connection wiring 12 a is routed from the hole 32 a formed in the first magnetic layer 32 to the back surface of the first magnetic layer 32 so as not to be short-circuited with the winding 41 formed on the surface of the first magnetic layer 32. Has been placed.

  As shown in FIG. 10B, the first magnetic layer 32 below the winding 41 functions as the core 42, thereby forming the inductor element 240. Further, a nonmagnetic material layer is formed between the wires 41 of the inductor element 240. As the nonmagnetic material layer, a resin layer 39 made of a photosensitive resin such as acrylic resin, photosensitive polyimide, BCB (benzocyclobutene), or phenol novolac resin is formed. Then, the second magnetic layer 53 is formed so as to cover the surface of the inductor element 240 formed in a spiral shape, and the magnetic layers 32 and 53 form a closed magnetic path in which the inductor element 240 is shielded from the outside. Yes.

(Manufacturing method of inductor element)
Next, a method for manufacturing the inductor element according to the second embodiment will be described. Detailed description of the same parts as those in the first embodiment will be omitted.
11 and 12 are process diagrams of the method for manufacturing the electronic substrate according to the second embodiment, and are cross-sectional views taken along a line EE in FIG. Note that W-CSP technology is used for manufacturing the electronic substrate. That is, the following steps are collectively performed on the wafer and finally separated into individual electronic substrates.

  First, as shown in FIG. 11A, the connecting wiring 12a is formed on the surface of the passivation film 8 of the wafer 10a.

  Next, as shown in FIG. 11B, the first magnetic layer 32 is formed on the surfaces of the wafer 10a and the connection wiring 12a. Further, the hole 32a of the first magnetic layer 32 is formed so that one end of the connection wiring 12a is exposed.

  Next, as illustrated in FIG. 11C, the winding 41 is formed on the surface of the first magnetic layer 32. In the step of forming the winding 41, simultaneously with the winding 41, rearrangement wiring and connection terminals are formed on the surface of the first magnetic layer 32. Further, the inner end portion of the winding 41 is connected to the electrode 11 through the connecting wire 12a, and the connecting wire 22a that connects the electrode 21 is formed at the outer end portion (see FIG. 10).

Next, as shown in FIG. 12A, a resin layer 39 is formed between the wires 41. Specifically, the photosensitive resin is applied to the entire surface of the wafer 10a, and the photosensitive resin is left in the space between the wirings 41, and the photosensitive resin in other regions is removed.
Subsequently, as shown in FIG. 12B, the second magnetic layer 53 is formed so as to cover the winding 41.
As described above, the inductor element 240 according to the present embodiment can be formed on the wafer 10a.

According to the second embodiment described above, the magnetic field lines indicated by the two-dot chain line in FIG. 10B mainly pass through the first magnetic layer 32 and the second magnetic layer 36 having high magnetic permeability. Thereby, the leakage of magnetic flux decreases and the magnetic flux density increases, and the inductance value and Q value of the inductor element can be improved. Therefore, the same effect as that of the first embodiment can be obtained even in the electronic substrate including the planar inductor element 240.
Note that the second magnetic layer 53 may not be filled in the hole 32 a of the first magnetic layer 32 formed in the center of the winding 41.

(First modification)
FIG. 13 is a cross-sectional view of a modification of the planar inductor element 240 shown in FIG. In the second embodiment, the single-layer planar inductor element 240 is provided on the base 10 to constitute the electronic substrate. However, in the first modification, two layers of inductor elements (spiral inductor elements) 240A and 240B are provided on the base 10. Are stacked.

As shown in FIG. 13, the inductor elements 240A and 240B of the present modification include a winding 41A formed on the surface of the first magnetic layer 32, and a first portion formed between and on the wiring of the winding 41A. A resin layer 39A and a winding 41B laminated on the first resin layer 39A are provided. Further, the second resin layer 39B is formed in the same thickness as the winding 41B between the windings 41B. And the 2nd magnetic layer 36 is formed so that the winding 41B and the 2nd resin layer 39B may be covered.
The windings 41A and 41B are formed so as to overlap in plan view. Further, the winding 41B is connected to the electronic circuit of the base 10 by an electrode (not shown).

(Manufacturing method of inductor element)
Next, a method for manufacturing an inductor element according to the first modification will be described with reference to FIG. In addition, the detailed description is abbreviate | omitted about the part which becomes the same as 1st Embodiment or 2nd Embodiment.
FIG. 14 is a process diagram of the electronic substrate manufacturing method according to the first modification, and is a cross-sectional view of a portion corresponding to FIG. Note that W-CSP technology is used for manufacturing the electronic substrate. That is, the following steps are collectively performed on the wafer and finally separated into individual electronic substrates.

  First, up to the step of forming the winding 41A on the surface of the first magnetic layer 32, it is formed by the same method as the step of forming the winding 41 in the second embodiment shown in FIG.

Next, the first resin layer 39A is formed between the surface of the winding 41A and the wiring.
At this time, the photosensitive resin is left in the space between the surface of the winding 41A and the wiring, and the photosensitive resin in other regions is removed. Then, the surface of the patterned first resin layer 39A is planarized by etching.

Next, as shown in FIG. 14B, a winding 41B is further formed on the surface of the flattened first resin layer 39A.
Next, as shown in FIG. 14C, the second resin layer 39B is formed to have the same thickness as the winding 41B also between the wirings of the winding 41B. Further, as shown in FIG. 14D, the second magnetic layer 53 is formed so as to cover the inductor elements 240A and 240B.
As described above, the inductor elements 240A and 240B according to this modification can be formed on the wafer 10a.

Therefore, in this modification, in addition to the same effects as those of the second embodiment, the two layers of inductor elements 240A and 240B are formed on the substrate 10 in a stacked manner, so that a large amount of magnetic flux can be generated. Therefore, the inductance value and Q value of the inductor element can be improved.
Note that the second magnetic layer 53 may not be filled in the hole 32a of the first magnetic layer 32 formed at the center of the winding.

(Electronics)
Next, an example of an electronic device including the above-described electronic substrate (electronic substrate) will be described.
FIG. 15 is a perspective view of a mobile phone. The electronic board described above is arranged inside the casing of the mobile phone 300. According to this configuration, since the low-cost electronic substrate with excellent electrical characteristics is provided, a low-cost mobile phone with excellent electrical characteristics can be provided.

  Note that the semiconductor device described above can be applied to various electronic devices other than mobile phones. For example, LCD projectors, multimedia personal computers (PCs) and engineering workstations (EWS), pagers, word processors, TVs, viewfinder type or monitor direct view type video tape recorders, electronic notebooks, electronic desk calculators, car navigation systems The present invention can be applied to electronic devices such as a device, a POS terminal, and a device provided with a touch panel. In either case, a low-cost electronic device having excellent electrical characteristics can be provided.

  It should be noted that the technical scope of the present invention is not limited to the above-described embodiments, and includes those in which various modifications are made to the above-described embodiments without departing from the spirit of the present invention. In other words, the specific materials and layer configurations described in the embodiments are merely examples, and can be changed as appropriate.

For example, in the above-described embodiment, the inductor element is formed on the surface of the electronic substrate. However, the inductor element may be formed on the back surface of the electronic substrate, and conduction with the surface may be ensured by the through electrode. Moreover, in the said embodiment, although the inductor element was formed in the electronic substrate in which the electronic circuit was formed, you may form an inductor element in the electronic substrate which consists of an electrically insulating material. Moreover, in the said embodiment, although the 1st wiring and the 2nd wiring were formed by the electroplating method, you may employ | adopt other film-forming methods, such as a sputtering method and a vapor deposition method.
Furthermore, the planar inductor element may be laminated in two or more layers.

  In the example described above, the mixed structure of the relocation wiring type wafer level package structure and the inductor structure has been described. However, the wafer level package structure is not limited to this, and a wafer having a Cu post structure in the external terminal portion. Other known wafer level package structures such as a level package structure and an inductor structure may be mixed. In either case, a structure excellent in both reliability and inductor characteristics can be provided.

It is explanatory drawing of an electronic substrate. It is explanatory drawing of an inductor element. It is explanatory drawing of an inductor element. It is explanatory drawing of the modification of an electronic substrate. It is explanatory drawing of the electronic substrate which concerns on 1st Embodiment. It is explanatory drawing of the mounting structure of the electronic substrate which concerns on 1st Embodiment. It is process drawing of the manufacturing method of the electronic substrate which concerns on 1st Embodiment. It is process drawing of the manufacturing method of the electronic substrate which concerns on 1st Embodiment. It is explanatory drawing of the electronic substrate which concerns on the 1st modification of 1st Embodiment. It is explanatory drawing of the electronic substrate which concerns on 2nd Embodiment. It is process drawing of the manufacturing method of the electronic substrate which concerns on 2nd Embodiment. It is process drawing of the manufacturing method of the electronic substrate which concerns on 2nd Embodiment. It is explanatory drawing of the electronic substrate which concerns on the 1st modification of 2nd Embodiment. It is process drawing of the manufacturing method of the electronic substrate which concerns on the 1st modification of 2nd Embodiment. It is a perspective view of a mobile phone.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Electronic substrate 10 ... Base | substrate 31 ... 2nd magnetic layer 32 ... 1st magnetic layer 35 ... 1st magnetic layer 36 ... 3rd magnetic layer 37 ... 1st resin layer 38 ... 2nd resin layer 39 ... Resin layer 39A ... 1st DESCRIPTION OF SYMBOLS 1 Resin layer 39B ... 2nd resin layer 40,140,240,240A, 240B ... Inductor element 41,41A, 41B ... Winding 42 ... Core 63 ... Connecting terminal 71 ... Adhesive 72 ... Heat-dissipation member 90 ... Pairing member 300 …Electronics

Claims (13)

An electronic substrate having an inductor element on a substrate,
The core of the inductor element is formed of a magnetic material, and the periphery of the inductor element is covered with a magnetic material.
Further, the non-magnetic material is filled in the gap between the adjacent windings of the inductor element.   The electronic substrate according to claim 1, wherein the magnetic material is ferrite.   The electronic substrate according to claim 1, wherein the nonmagnetic material is a resin.   4. The electronic substrate according to claim 1, wherein the inductor element is a toroidal inductor element having a ring-shaped core and a spiral winding. 5.   4. The electronic substrate according to claim 1, wherein the inductor element is a spiral inductor element in which spiral windings are formed in a plane. 5.   6. The electronic substrate according to claim 5, wherein the spiral winding is formed to be laminated over a plurality of layers with a nonmagnetic material interposed therebetween.   7. The electron according to claim 1, wherein the whole or a part of the periphery of the base is covered with a heat radiating member made of a material having a higher thermal conductivity than that of the base. substrate.   The electronic substrate according to claim 7, wherein the heat radiating member is fixed to the base via an adhesive in which metal fine particles are dispersed. A method of manufacturing an electronic substrate having an inductor element on a substrate,
Forming a first magnetic layer on the substrate;
Forming a plurality of first wirings on the first magnetic layer;
Forming a first nonmagnetic layer in a gap between the adjacent first wirings;
Forming a second magnetic layer so as to cover a central portion of the plurality of first wirings;
Forming a plurality of second wirings so as to cross the surface of the second magnetic layer;
Forming a second nonmagnetic layer in a gap between adjacent second wirings;
Forming a third magnetic layer so as to cover the plurality of second wirings,
In the step of forming the second wiring, the first wiring is arranged by sequentially connecting the end of one of the first wiring and the end of the other first wiring. And forming the inductor element having a winding made of the second wiring. A method of manufacturing an electronic substrate having an inductor element on a substrate,
Forming a first magnetic layer on the substrate;
Forming a spiral winding constituting the inductor element on the first magnetic layer;
Forming a nonmagnetic layer in the gap between the windings;
And a step of forming a second magnetic layer so as to cover the winding. By repeating the step of forming the winding and the step of forming the nonmagnetic layer,
The method of manufacturing an electronic substrate according to claim 10, wherein a plurality of the windings are stacked with a nonmagnetic layer interposed therebetween.   The method of manufacturing an electronic substrate according to claim 9, further comprising a step of trimming a part of the wiring to adjust the characteristics of the inductor element.   An electronic apparatus comprising the electronic substrate according to claim 1.

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