JP4775302B2 - Semiconductor evaluation equipment - Google Patents

Description

  The present invention relates to a semiconductor evaluation apparatus.

  Conventionally, as a semiconductor evaluation apparatus, for example, a technique described in Patent Document 1 is known. A generally known semiconductor evaluation apparatus will be described with reference to FIG. 5 including the technique described in this document.

  As shown in FIG. 5, as one of the EMC (electromagnetic compatibility) tests, which are semiconductor device (IC) characteristic evaluation tests, there is an immunity test for evaluating the resistance due to external interference waves (for example, patents). Reference 1). As one of the immunity tests, there is a DPI (Direct RF Power Injection) test defined in the test standard IEC62132-4.

  FIG. 5 shows a schematic configuration example of a semiconductor evaluation apparatus that performs a DPI test. As shown in FIG. 5, the semiconductor evaluation apparatus basically includes a DPI tester 110, an output signal measuring device 40, and an evaluator 50.

  Among these, the DPI tester 110 applies (injects) high-frequency noise, such as 100 MHz to 2 GHz, to the IC 130 to be evaluated including the peripheral components. Specifically, the DPI tester 110 includes a high-frequency signal generator 11 that generates a high-frequency signal, a terminal 14 connected through an amplifier 12 and a directional coupler 13 connected to the high-frequency signal generator 11. It has. The high-frequency signal generated by the high-frequency signal generator 11 is amplified by the amplifier 12, and the DPI tester 110 is connected to one (injection terminal) of the plurality of terminals of the IC 130 to be tested. Is output as high-frequency noise via the terminal 14. A filter 15 is interposed between the terminal 14 and the injection terminal, and the DC component is cut from the high frequency signal amplified by the amplifier 12 by the filter 15. For example, a capacitor is used as the filter 15.

  The DPI tester 110 includes a first and second power detectors 16 and 17 connected to the directional coupler 13, and a power measuring device 18 connected to the first and second power detectors 16 and 17. The first and second power detectors 16 and 17 and the power measuring device 18 measure the true traveling wave power. That is, a high-frequency wave (traveling wave) in the traveling direction is extracted from the directional coupler 13, the power (Pf) is detected by the first power detector 16, and the detection result is input to the power measuring device 18. A high frequency (reflected wave) opposite to the traveling direction is extracted from the coupler 13, the power (Pr) is detected by the second power detector 17, and the detection result is input to the power meter 18. At 18, the power of the traveling wave and the reflected wave is subtracted to measure the true traveling wave power (Pnet = Pf−Pr).

  The IC to be evaluated 130 is mounted together with peripheral components on an evaluation board made of a printed board (not shown), for example, and the terminal 14 of the DPI tester 110 is connected to the target via the filter 15 and the wiring formed on the board to be evaluated. The evaluation IC 130 is electrically connected to a terminal to be an injection terminal among the plurality of terminals 131 included in the evaluation IC 130.

  The output signal measuring instrument 40 measures the IC characteristics of the IC 130 to be evaluated into which high frequency noise has been injected. For example, a monitor device such as an oscilloscope can be used. The output signal measuring instrument 40 is electrically connected to a terminal (monitor terminal) different from the injection terminal of the terminal of the evaluated IC 130 via, for example, a coaxial cable.

The evaluator 50 controls the high-frequency signal generator 11 (injection power control). The evaluator 50 captures the true traveling wave power measurement result from the power meter 18 and also captures the IC characteristic measurement result from the output signal measuring device 40. Based on these results, the evaluator IC 130 evaluates the evaluation target IC 130. Evaluate tolerance to high frequency noise.
Japanese Patent No. 3642979

  By the way, in such a conventional semiconductor evaluation apparatus, as shown in FIG. 6 as an example, the evaluation target IC 130 to be evaluated is mounted on an evaluation board together with peripheral components and wiring, and then a plurality of terminals of the evaluation target IC 130 are provided. Every time, the power generated by the high-frequency signal generator 11 is injected, and the output signal monitor 40 monitors the output at a monitor terminal different from the injection terminal into which the power is injected. Such an evaluation result is not, of course, an evaluation result of the evaluation target IC 130 alone, but a characteristic (impedance) of the shape of the wiring electrically connected to the evaluation target IC 130 and its peripheral components, the peripheral components, and the like. ) Including the evaluation results.

  Further, in the conventional semiconductor evaluation apparatus, when the high frequency signal (power) generated by the high frequency signal generator 11 is injected into the injection terminal of the IC to be evaluated 130, the wirings connected to the plurality of terminals of the IC to be evaluated 130, respectively. Reflection occurs due to the different impedances of the wiring shape and peripheral components. This reflection is only noise for the injected high-frequency signal, and the injected high-frequency signal is attenuated. In addition, the amount of reflection also differs between the terminals due to the difference in the wiring shape of the wiring connected to each of the plurality of terminals of the IC 130 to be evaluated and the impedance of peripheral components and the like. Therefore, even if the same high-frequency signal is generated by the high-frequency signal generator 11 and the same high-frequency signal is injected into each of the plurality of terminals of the IC 130 to be evaluated, the output for the high-frequency signal attenuated by different reflection amounts However, the output for the same high-frequency signal is not always obtained.

  On the other hand, it is conceivable to execute the power injection test with the evaluated IC 130 alone without electrically connecting the evaluated IC 130 with peripheral components and wiring. However, the evaluation result obtained in such a case is different from the evaluation result of the evaluated IC 130 in an actual situation in which it is electrically connected to peripheral components and wirings.

  The present invention has been made in view of such circumstances, and its purpose is to evaluate the tolerance of a single semiconductor device to be evaluated against high-frequency noise in the actual operation state including peripheral components. An object of the present invention is to provide a semiconductor evaluation apparatus capable of performing the above.

In order to achieve such an object, according to the first aspect of the present invention, a tester including a high-frequency signal generator that generates a high-frequency signal and a semiconductor device to be evaluated are mounted, and the semiconductor device has A first mounting board having a plurality of dedicated first connectors for each of a plurality of terminals; a second mounting board having a second connector on which peripheral components of the semiconductor device are mounted and electrically connected to the peripheral components; An output signal measuring instrument for measuring an output signal output from a terminal to be a monitor terminal among a plurality of terminals included in the semiconductor device mounted on the first mounting board; the first connector; and the second connector. It is electrically connected to the peripheral component through a mechanical connection with a connector and is an injection terminal among a plurality of terminals of the semiconductor device in an operating state including the peripheral component. A semiconductor evaluation device comprising: an evaluation means for injecting a high-frequency signal into a terminal through the high-frequency signal generator and measuring the output signal at the time of injecting the high-frequency signal to evaluate a tolerance for the high-frequency signal for each of the plurality of terminals as an apparatus, the first formed in the mounting substrate, each wire of said plurality of terminals to said first connector, each of the impedance is identical to each other and the signal from the tester to said plurality of terminals The impedance of each part in the transmission path is impedance-matched, and a transmission suppressing means that suppresses transmission of an AC component of the electric signal to be transmitted is interposed between the peripheral component and the second connector. It was decided that

In such a configuration as a semiconductor evaluation device, the semiconductor device to be evaluated and its peripheral components are separately mounted on the first and second mounting substrates, which are different substrates, while the first and second connectors are mounted. It is also electrically connected by being mechanically connected. In the first mounting substrate, the wiring from a plurality of terminals to the first connector included in the semiconductor device, each of the impedance is the same as one another, and each unit in the signal transmission path from the tester to said plurality of terminals Are impedance matched. Further, in the second mounting board, a transmission suppressing unit that suppresses transmission of an AC signal among electric signals to be transmitted is interposed between the peripheral component and the second connector. Oite to this configuration, in the operating state of the semiconductor device including the peripheral components, as well as injection of high-frequency signals for each of a plurality of terminals of the semiconductor device produced by the high frequency signal generator, when the high-frequency signal injection By measuring the output signal output from the monitor terminal of the semiconductor device with a signal measuring instrument, the tolerance for the high frequency signal is evaluated for each terminal through the evaluation means.

Thus, the impedance of each part in the signal transmission path from the tester to the plurality of terminals is impedance-matched, and the impedance of each wiring formed on the first mounting board is the same, and the plurality of terminals included in the semiconductor device Since the impedance of the wiring does not change every time, even if a high frequency signal is injected, reflection hardly occurs. Therefore, the high-frequency signal is less likely to be attenuated. Even if it is attenuated, the attenuation amount (reflection amount) does not change for each terminal and is substantially the same. And the same high frequency signal is injected into each terminal of the IC 130 to be evaluated, so that an output for the same high frequency signal can be obtained.

  Further, since the transmission suppressing means is interposed between the peripheral component and the second connector, the transmission suppressing means hardly transmits the high frequency signal generated by the high frequency signal generator 11 even if it is transmitted to the peripheral component. Therefore, the evaluation result does not include the shape of the wiring electrically connected to the peripheral component, the characteristics of the peripheral component, and the like. In addition, at this time, since the transmission suppressing unit transmits the direct current component of the transmitted electric signal, the semiconductor device is in an actual operation state including the peripheral circuit.

  In this way, unlike the prior art described in the background art section, the tolerance for high-frequency noise of the single semiconductor device to be evaluated is evaluated for each terminal, even though it is in the actual operating condition including peripheral components. Will be able to. The first mounting board can be shared as long as the number of terminals of the semiconductor device to be evaluated is the same.

  In the configuration according to claim 1, for example, as in the invention according to claim 2, the first connector surrounds a mounting position where the semiconductor device is mounted on the first mounting board. It is good also as arrange | positioning around it.

  Usually, the wiring impedance changes depending on the wiring length, cross-sectional area, cross-sectional shape, and the like. In that respect, in the configuration according to claim 2, for example, as in the invention according to claim 3, the first connector is arranged on a circumference centered on the mounting position. If the wiring of the mounting board is formed radially from the plurality of terminals of the semiconductor device to the first connector, the wiring can be easily formed on the first mounting board.

  In such a configuration, for example, as in the invention described in claim 4, it is desirable that the wiring of the first mounting board is formed by a microstrip line.

  For example, as in the invention described in claim 5, the first and second connectors are arranged only on one surface of the first and second mounting boards, respectively, and the first and second mounting boards are The first and second connectors may be mechanically connected to form a layered body that is supported in a hierarchical manner so that the mounting surfaces of the first and second connectors face each other. . Thereby, since the area which the 1st and 2nd mounting board occupies can be made small, the size reduction of the said semiconductor evaluation apparatus can also be achieved.

  Normally, in order to reduce the influence of external electromagnetic noise on the evaluation result, it is desirable to perform the evaluation in an anechoic chamber, but such an anechoic chamber becomes a large-scale facility.

In that respect, in the configuration according to claim 5, for example, as in the invention according to claim 6, the first mounting board has the semiconductor on the same surface as the surface on which the first connector is disposed. And an electromagnetic absorption plate that absorbs external electromagnetic noise on a surface opposite to the surface on which the first connector is disposed, and the second mounting board is external on the same surface as the surface on which the second connector is disposed. An electromagnetic absorption plate that absorbs electromagnetic noise is included, and the laminate has an electromagnetic absorption plate that absorbs external electromagnetic noise on its side surface. Can be reduced with a simple configuration.

  As the transmission suppressing means, for example, a bias tee including an inductor may be employed as in the invention described in claim 7.

  Further, for example, as in the invention described in claim 8, the semiconductor evaluation apparatus includes a plurality of first mounting substrates that inject high-frequency signals through the high-frequency signal generator, and includes a switching unit that switches between them. The evaluation unit may evaluate a tolerance for the high-frequency signal for each semiconductor device while switching the first mounting substrate for injecting the high-frequency signal through the switching unit. As a result, the time required for evaluating a plurality of semiconductor devices can be shortened.

  Further, for example, as in the invention described in claim 9, the tester includes an input signal measuring device that measures an input signal injected into a terminal to be an injection terminal among a plurality of terminals of the semiconductor device. And the evaluation means may evaluate the tolerance for the high-frequency signal for each of the plurality of terminals by measuring the output signal and the input signal at the time of injection of the high-frequency signal. As a result, the evaluation means actually measures the input signal input to the injection terminal of the semiconductor device and the output signal output from the monitor terminal, and evaluates the semiconductor device based on them, thereby improving the evaluation accuracy. Will be able to.

  An embodiment of a semiconductor evaluation apparatus according to the present invention will be described below with reference to FIGS. Here, FIG. 1 is a plan view showing a planar structure of a first mounting substrate on which a semiconductor device to be evaluated, which is employed in the present embodiment, is mounted. 2A and 2B are side views respectively showing the side structure of the first mounting board and the second mounting board on which the peripheral components of the semiconductor device are mounted. FIG. 3 shows the first mounting board. FIG. 5 is a side view showing a side structure of the second mounting board and a state in which the first and second mounting boards are mechanically connected. The semiconductor evaluation apparatus of this embodiment also has a configuration according to the conventional semiconductor evaluation apparatus shown in FIG. Therefore, in the following description, the description about the element which overlaps with the conventional semiconductor evaluation apparatus is omitted.

  As shown in FIG. 1, a semiconductor device 20 to be evaluated in the present embodiment is mounted on the upper surface of a first mounting substrate 21 having a substantially square shape in plan view at the substantially center of the first mounting substrate 21. The semiconductor device 20 has a plurality of terminals (for example, “20” in the present embodiment). In the following, for convenience, specific “19” terminals among the plurality of terminals are referred to as injection terminals 21b for injecting a high-frequency signal to be described later, and specific “one” of the plurality of terminals. These terminals are described as monitor terminals 21c for monitoring a response waveform at the time of high-frequency signal injection. Actually, each of these terminals functions simultaneously as a monitor terminal as well as an injection terminal. be able to. Therefore, the distinction between terminals such as injection terminals or monitor terminals is not limited to the illustrated mode, but is arbitrary. Incidentally, the distinction between the terminals such as the injection terminal or the monitor terminal is independent of the functional input terminal or output terminal of the semiconductor device 20. Furthermore, although the first mounting substrate 21 of the present embodiment has a substantially square shape in plan view, the first mounting substrate 21 is not limited thereto and may have a polygonal shape in plan view such as a circular shape in plan view or an octagonal shape in plan view.

As shown in FIG. 1, the first mounting substrate 21 has a dedicated first connector 21 a for each of a plurality of terminals included in the semiconductor device 20. These first connectors 21 a are arranged on the same concentric circumference centering on the mounting position where the semiconductor device 20 is mounted, and surround the semiconductor device 20. The first connector 21a of the present embodiment is arranged on the same concentric circumference with the mounting position of the semiconductor device 20 as the center. However, the first connector 21a is not limited to this and is arranged on the concentric circumference. Even if it is arranged in a rectangular shape, it is optional as long as it has the same impedance as will be described later.

Further, as shown in FIG. 1, the injection terminal 21b and the monitor terminal 21c of the semiconductor device 20 are electrically connected to the first connector 21a by a wiring 21d formed using an appropriate metal material such as aluminum or copper. It is connected to the. Of these wirings 21d, the wiring extending left and right in FIG. 1 from the semiconductor device 20 is formed in a substantially straight line, and the wiring extending in the vertical direction in FIG. 1 from the semiconductor device 20 is formed in a straight line. However, in the vicinity of the first connector 21a, it extends slightly to the left and right. Thus, the wiring 21d is formed radially around the semiconductor device 20, and is formed on the first mounting substrate 21 so that the impedance from the injection terminal 21b and the monitor terminal 21c to the first connector 21a is the same. ing. Moreover, the impedance of each part in the signal transmission path from the DPI tester 110 to the injection terminal 21b is impedance matched. Thereby, since the impedance of the wiring 21d does not change for each of the terminals 21b and 21c included in the semiconductor device 20, reflection is less likely to occur even if a high frequency signal is injected. Therefore, the high-frequency signal is less attenuated, and even if it is attenuated, the attenuation amount (reflection amount) does not change for each of the terminals 21b and 21c and is substantially the same. And the same high frequency signal is injected into each injection terminal 21b of the semiconductor device 20, so that an output for the same high frequency signal can be obtained from the monitor terminal 21c.

  Here, as shown in FIG. 2A, the first mounting substrate 21 includes the semiconductor device 20, the injection terminal 21b and the monitor terminal 21c (not shown in FIG. 2A) of the semiconductor device 20, and the above. The first connector 21a and the wiring 21d are all provided on the same mounting surface (the lower surface of the mounting substrate 21 in FIG. 2A).

Further, as shown in FIG. 2 (a), the first mounting board 21 has an appropriate electromagnetic absorbing material on the surface opposite to the mounting surface, that is, on the upper surface of the mounting board 21 in FIG. 2 (a). An electromagnetic absorbing plate 21e that absorbs electromagnetic noise is formed. The electromagnetic absorbing plate 21e is formed in the same outer shape as that of the first mounting substrate 21, and thus covers the entire upper surface of the first mounting substrate 21. 2A can be absorbed, and as a result, the electromagnetic noise is superimposed on the electrical signal transmitted through the semiconductor device 20, the wiring 24d, and the like. It becomes possible to suppress.

On the other hand, as shown in FIG. 2B, the peripheral component 22 of the semiconductor device 20 is mounted on one surface of the second mounting substrate 23, for example, the lower surface of the mounting substrate 23. On the surface opposite to the mounted surface, that is, on the upper surface of the mounting substrate 23, a second connector 23a electrically connected to the peripheral component 22 through a wiring 23d and a bias tee 24 described later is disposed. . In FIG. 2B, for convenience, the second mounting board 23 is shown as having “two” each of the second connectors 23a. Since there are the same number of second connectors 23a as the number of one connector 21a, actually, there are “20” second connectors 23a. Since the number varies depending on the semiconductor device 20 to be evaluated, it is not limited to “20”.

  Further, as shown in FIG. 2B, the peripheral component 22 includes a wiring 23d formed on the lower surface of the second mounting substrate 23 with an appropriate metal material such as aluminum or copper, and the bias tee 24. Is electrically connected to the second connector 23a via a bias tee 24 that suppresses transmission of an AC component of the electric signal.

  Specifically, as shown in FIG. 2B, the wiring 23 d extends from the peripheral component 22 mounted on the lower surface of the second mounting board 23 to a portion immediately below the bias tee 24 on the lower surface of the second mounting board 23. Up to this point, it is formed along the lower surface of the second mounting substrate 23. The wiring 23 d penetrates through the second mounting substrate 23 from a portion immediately below the bias tee 24 and is connected to the bias tee 24. The bias tee 24 basically includes an inductor (not shown). In general, the impedance of an inductor increases as the electrical signal transmitted through the inductor becomes higher in frequency, while the impedance decreases as the electrical signal transmitted through the inductor becomes lower in frequency. For this reason, the bias tee 24 suppresses transmission of a high-frequency component of the electric signal transmitted through the bias tee 24 and does not prevent transmission of a low-frequency component or a DC component. As a result, the high frequency signal generated by the high frequency signal generator 11 is hardly transmitted by the bias tee 24 even if it is transmitted to the peripheral components. Therefore, the evaluation result does not include the characteristics of the wiring 23 d electrically connected to the peripheral component 22, the peripheral component 22, and the like. In addition, at this time, the bias tee 24 transmits a direct current component of the electric signal to be transmitted, so that the semiconductor device 20 is in an actual operation state including the peripheral component 22.

  Further, as shown in FIG. 2B, the second mounting board 23 has an appropriate electromagnetic absorption on the mounting surface of the second connector 23a, that is, the upper surface of the second mounting board 23 in FIG. An electromagnetic absorbing plate 23e that is made of a material and absorbs electromagnetic noise is disposed. The electromagnetic absorbing plate 23e is formed in the same outer shape as the second mounting substrate 23, and covers the entire upper surface of the second mounting substrate 23. Thereby, the electromagnetic noise which is going to propagate from the lower side to the upper side in FIG. 2B can be absorbed. As a result, the first and second mounting boards 21 and 23 are connected through the first and second connectors 21a and 23a. When mechanically connected, it is possible to suppress such electromagnetic noise from being superimposed on an electrical signal transmitted through the semiconductor device 20, the wiring 24d, and the like.

  Similarly, as shown in FIG. 2B, the second mounting board 23 has an electromagnetic absorbing plate 25 that absorbs electromagnetic noise and is made of an appropriate electromagnetic absorbing material. When the first and second connectors 21a and 23a are mechanically connected to each other, the electromagnetic absorbing plate 25 indicates that "the upper surface of the first mounting substrate 21 to the side surface of the first mounting substrate 21 to the first mounting substrate 21. Sides of the semiconductor device 20 and the first connector 21a disposed on the lower surface to the side of the second connector 23a and the bias tee 24 disposed on the upper surface of the second mounting substrate 23 to the side surface of the second mounting substrate 23 To the side of the peripheral component 22 disposed on the lower surface of the second mounting substrate 23 ”. As a result, electromagnetic noise that tends to propagate from left to right and from right to left in FIG. 2B can be absorbed, and as a result, the first and second connectors 21a and 23a can be used for the first. In addition, when the second mounting boards 21 and 23 are mechanically connected, it is possible to suppress such electromagnetic noise from being superimposed on the electrical signal transmitted through the semiconductor device 20, the wiring 24d, and the like.

  Similarly, as shown in FIG. 2B, the second mounting board 23 includes an electromagnetic absorbing plate 26 that absorbs electromagnetic noise and is formed using an appropriate electromagnetic absorbing material. The electromagnetic absorbing plate 26 is also formed in the same outer shape as the second mounting substrate 23 and covers the entire lower surface of the second mounting substrate 23. As a result, electromagnetic noise that propagates from the lower side to the upper side in FIG. 2B can be absorbed, and such electromagnetic noise is prevented from being superimposed on the electrical signal transmitted through the peripheral component 22 and the wiring 23d. Will be able to.

  In evaluating the tolerance of the semiconductor device 20 against high frequency signals using the first mounting board 21 and the second mounting board 23 configured as described above, as shown in FIG. By mechanically connecting the two connectors 23a, a stacked body 30 is formed which is supported in a hierarchical manner so that the mounting surfaces of the first connector 21a and the second connector 23a face each other. Incidentally, although not shown, the output terminal of the DPI tester 110 (high-frequency signal generator 11) is connected to the bias tee 24 from the side surface of the laminated body 30 via, for example, a coaxial cable. A high frequency signal is injected. As described above, when the first and second connectors 21a and 23a are mechanically connected, the semiconductor device 20 mounted on the first mounting substrate 21 and the peripheral component 22 mounted on the second mounting substrate 23 are electrically connected. Will be connected. When the first and second connectors 21a and 23a are mechanically connected, the electromagnetic absorbing plate 21e is the upper surface of the first mounting substrate 21, the electromagnetic absorbing plate 25 is the side surface of the laminate 30, and the electromagnetic absorbing plate. 23e covers the upper surface of the second mounting substrate 23, so that an anechoic chamber is formed inside the laminate 30. As a result, the semiconductor device 20 to be evaluated is subjected to an evaluation experiment in the anechoic chamber together with the wiring 21d, the peripheral component 22, and the wiring 23d. The external electromagnetic noise has almost no effect on the evaluation results obtained through the column.

  In addition, since the power injection experiment is performed in such a small anechoic chamber, the influence of external electromagnetic noise is almost eliminated. However, when the semiconductor device 20 including the peripheral component 22 is in an operating state, the semiconductor Electromagnetic noise is generated from the device 20, the wiring 21d, the peripheral component 22, the wiring 23d, and the like. Among these radiant noises, the radiant noise generated from the peripheral component 22 and the wiring 23d can be absorbed because the electromagnetic absorbing plate 23e is provided, and the influence of the radiant noise on the evaluation result is affected. Can be reduced.

  Further, the first mounting substrate 21 can be shared as long as the number of terminals 21b and 21c of the semiconductor device 20 to be evaluated is the same.

  Note that the semiconductor evaluation apparatus according to the present invention is not limited to the configuration exemplified in the above embodiment, and can be implemented as, for example, the following form in which the present embodiment is appropriately changed.

  In the above embodiment, as shown in FIG. 2A, the normal wiring 21d is formed on the lower surface of the first mounting substrate 21, but the present invention is not limited to this. In addition, for example, as a so-called microstrip line in which a GND wiring (not shown) is disposed around the wiring 21d and a GND wiring is also disposed immediately above the wiring 21d (between the wiring 21d and the lower surface of the first mounting substrate 21). Also good. Thereby, the noise superimposed on the transmitted electric signal can be further reduced.

  In the above-described embodiment, the evaluation experiment (power injection experiment) is performed using only one stacked body 30 in which the first and second mounting boards 21 and 23 are mechanically connected by the first and second connectors 21a and 23a. ), But is not limited to this. In addition to this, for example, as shown in FIG. 4 as a diagram corresponding to FIG. 5, the semiconductor evaluation device 10 a includes a plurality of first mounting substrates 21 (more precisely, stacked bodies 30) on which the semiconductor devices 20 are mounted, For example, it is assumed that a switching circuit 60 configured by arranging a plurality of switching elements in multiple stages is provided. The evaluator 50 may evaluate the tolerance for the high-frequency signal for each semiconductor device 20 while switching the first mounting substrate 21 for injecting the high-frequency signal through the switching circuit 60 every predetermined time (scanning). As a result, it is possible to reduce the time required for evaluating the tolerance of the plurality of semiconductor devices 20. Incidentally, the impedance of the electrical signal transmission path from the output terminal of the DPI tester 110 to the switching circuit 60 and the impedance of the wiring in the switching circuit 60 may be impedance matched, similar to the first mounting board 21. desirable. As a result, the injected high-frequency signal is attenuated not only on the first mounting board 21 but also on the electrical signal transmission path from the output terminal of the DPI tester 110 to the switching circuit 60 and the wiring of the switching circuit 60. Almost disappears.

  In the above embodiment, as shown in FIGS. 2 and 3, the semiconductor evaluation apparatus employs the second mounting board 23 in which the bias tee 24 is interposed between the peripheral component 22 and the second connector 23a. However, it is not limited to this. In short, the intended purpose can be achieved if the transmission of the alternating current component of the transmitted electric signal can be suppressed.

  In the above embodiment, as shown in FIGS. 2 and 3, the semiconductor evaluation apparatus includes the electromagnetic absorbing plates 21e, 23e, 25, and 26, thereby forming a so-called anechoic chamber inside the stacked body 30. However, it is not limited to this. Such electromagnetic absorbing plates 21e, 23e, 25 and 26 may be omitted. This also achieves the intended purpose.

The top view of the 1st mounting board employ | adopted with one Embodiment of the semiconductor evaluation apparatus concerning this invention. In the embodiment, (a) and (b) are side views of a first mounting board and a second mounting board. The side view which shows the state in which the 1st mounting board and the 2nd mounting board were mechanically connected in the embodiment. The block diagram which shows the whole structure about the modification of the semiconductor evaluation apparatus which concerns on this invention. The block diagram which shows the whole structure about the conventional semiconductor evaluation apparatus. The top view of the mounting board | substrate employ | adopted in the conventional semiconductor evaluation apparatus.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10, 10a ... Semiconductor evaluation apparatus, 11 ... High frequency signal generator, 12 ... Amplifier, 13 ... Directional coupler, 14 ... Output terminal, 15 ... Filter, 16 ... 1st power detector, 17 ... 2nd power detector , 18 ... Electric power measuring device (input signal measuring device), 20 ... Semiconductor device, 21 ... First mounting substrate, 21a ... First connector, 21b ... Injection terminal, 21c ... Monitor terminal, 21d ... Wiring, 21e ... Electromagnetic absorption plate 22 ... Peripheral parts, 23 ... Second mounting board, 23a ... Second connector, 23d ... Wiring, 23e ... Electromagnetic absorber, 24 ... Bias tee, 25 ... Electromagnetic absorber, 30 ... Laminate, 40 ... Output signal measurement 50 ... evaluator (evaluation means), 60 ... switching circuit (switching means), 110 ... DPI tester, 120 ... mounting substrate, 130 ... IC to be evaluated, 131 ... terminal.

Claims (9)

A tester configured to include a high-frequency signal generator for generating a high-frequency signal;
A first mounting substrate on which a semiconductor device to be evaluated is mounted and a plurality of dedicated first connectors for each of a plurality of terminals of the semiconductor device;
A second mounting substrate having a second connector on which peripheral components of the semiconductor device are mounted and electrically connected to the peripheral components;
An output signal measuring instrument for measuring an output signal output from a terminal to be a monitor terminal among a plurality of terminals of the semiconductor device mounted on the first mounting substrate;
An injection terminal among a plurality of terminals of the semiconductor device which is electrically connected to the peripheral component through mechanical connection between the first connector and the second connector and which is in an operation state including the peripheral component An evaluation means for injecting a high-frequency signal into the terminal through the high-frequency signal generator and measuring the output signal at the time of the high-frequency signal injection to evaluate a tolerance for the high-frequency signal for each of the plurality of terminals; A semiconductor evaluation apparatus comprising:
Formed in said first mounting substrate, each wire of said plurality of terminals to said first connector, each of the impedance is the same as one another and, in the signal transmission path from the tester to said plurality of terminals The impedance of each part is impedance matched ,
A semiconductor evaluation apparatus characterized in that a transmission suppressing means that suppresses transmission of an AC component of an electric signal to be transmitted is interposed between the peripheral component and the second connector.   2. The semiconductor evaluation apparatus according to claim 1, wherein the first connector is arranged around a mounting position that is a position where the semiconductor device is mounted on the first mounting board. The first connector is disposed on a circumference centered on the mounting position;
The semiconductor evaluation apparatus according to claim 2, wherein the wiring of the first mounting substrate is formed radially from a plurality of terminals of the semiconductor device to the first connector.   The semiconductor evaluation apparatus according to claim 1, wherein the wiring of the first mounting substrate is formed by a microstrip line. The first and second connectors are disposed only on one surface of the first and second mounting boards, respectively.
The first and second mounting boards are stacked in layers so that the mounting surfaces of the first and second connectors face each other by mechanically connecting the first and second connectors. The semiconductor evaluation apparatus according to claim 1, wherein the semiconductor evaluation apparatus forms a body. The first mounting board has an electromagnetic absorbing plate that absorbs electromagnetic noise on a surface opposite to the surface on which the first connector is disposed while the semiconductor is provided on the same surface as the surface on which the first connector is disposed. Have
The second mounting substrate has an electromagnetic absorbing plate that absorbs electromagnetic noise on the same surface as the surface on which the second connector is disposed,
The semiconductor evaluation apparatus according to claim 5, wherein the laminated body has an electromagnetic wave anechoic chamber by having an electromagnetic absorption plate for absorbing electromagnetic noise on a side surface thereof.   The semiconductor evaluation apparatus according to claim 1, wherein the transmission suppression unit is a bias tee including an inductor. The semiconductor evaluation apparatus includes a plurality of first mounting substrates that inject high-frequency signals through the high-frequency signal generator, and includes a switching unit that switches between them.
The evaluation means evaluates a tolerance for the high-frequency signal for each semiconductor device while switching the first mounting substrate for injecting the high-frequency signal through the switching means. The semiconductor evaluation apparatus according to item. The tester has an input signal measuring device for measuring an input signal injected into a terminal to be an injection terminal among a plurality of terminals of the semiconductor device,
9. The evaluation unit according to claim 1, wherein the evaluation unit evaluates a tolerance for the high-frequency signal for each of the plurality of terminals by measuring the output signal and the input signal when the high-frequency signal is injected. The semiconductor evaluation apparatus according to one item.

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