TWM574692U - Probe holder and test interface device - Google Patents

Probe holder and test interface device Download PDF

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Publication number
TWM574692U
TWM574692U TW107216419U TW107216419U TWM574692U TW M574692 U TWM574692 U TW M574692U TW 107216419 U TW107216419 U TW 107216419U TW 107216419 U TW107216419 U TW 107216419U TW M574692 U TWM574692 U TW M574692U
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probes
probe holder
probe
wafer
tested
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TW107216419U
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Chinese (zh)
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楊治敏
許芳儀
王偉丞
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中華精測科技股份有限公司
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Priority to TW107216419U priority Critical patent/TWM574692U/en
Publication of TWM574692U publication Critical patent/TWM574692U/en

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Abstract

一種探針座,用於電性連接待測晶片,其中待測晶片具有複數個測試點。探針座包括基座和探針。基座在其厚度方向上設置有貫通孔,基座之介於每一個貫通孔之間的部分至少具有一金屬材料。探針分別設置於貫通孔內且一一對應電性接觸待測晶片的測試點。本揭示亦提供一種包含探針座的測試介面裝置。 A probe holder for electrically connecting a wafer to be tested, wherein the wafer to be tested has a plurality of test points. The probe holder includes a base and a probe. The pedestal is provided with a through hole in a thickness direction thereof, and a portion of the pedestal between each of the through holes has at least one metal material. The probes are respectively disposed in the through holes and correspond one-to-one to the test points of the wafer to be tested. The present disclosure also provides a test interface device including a probe holder.

Description

探針座及測試介面裝置 Probe holder and test interface device

本揭示關於一種測試介面裝置,特別是關於晶片測試的探針座及包含探針座的測試介面裝置。 The present disclosure relates to a test interface device, and more particularly to a probe holder for wafer testing and a test interface device including a probe holder.

在半導體的後段製程中,封裝後測試(Final Test)會對封裝後的晶片進行電性功能測試,藉以找出不合格的晶片並將其淘汰。通常,在進行晶片測試時,測試機需透過探針卡這類的測試介面裝置來電性接觸待測晶片(Device Under Test,DUT)。也就是說,將探針卡作為測試機與待測晶片之間的傳輸介面,用以傳輸測試信號與電源信號,並配合探針卡與測試機的控制與分析程序,達到量測待測晶片之電性特徵的目的。 In the back-end process of the semiconductor, the Final Test performs an electrical functional test on the packaged wafer to identify and eliminate the failed wafer. Usually, during the wafer test, the test machine needs to make a contact with the device under test (DUT) through a test interface device such as a probe card. That is to say, the probe card is used as a transmission interface between the test machine and the wafer to be tested, and is used for transmitting test signals and power signals, and is matched with the control and analysis program of the probe card and the test machine to measure the wafer to be tested. The purpose of the electrical characteristics.

然而,傳統的探針卡由於其探針座係由工程塑膠製成,並無法阻隔訊號產生的電場與磁場,因此相鄰的探針容易因電磁場耦合而產生串音(Crosstalk)效應。當探針之間的距離愈短,串音的耦合能量便愈大,會造成各訊號的彼此干擾與失真。如此,將影響到測試機的測試結果,嚴重者會導致測試失敗。 However, since the conventional probe card is made of engineering plastic and cannot block the electric field and magnetic field generated by the signal, the adjacent probe is easy to generate a crosstalk effect due to electromagnetic field coupling. When the distance between the probes is shorter, the coupling energy of the crosstalk is larger, which causes mutual interference and distortion of the signals. In this way, it will affect the test results of the test machine, and in severe cases, the test will fail.

因此,有必要提出一種探針座及測試介面裝置來克服上述習知技術的問題。 Therefore, it is necessary to propose a probe holder and a test interface device to overcome the problems of the prior art described above.

本揭示提供一種探針座及測試介面裝置,其能解決習知技術中的問題。 The present disclosure provides a probe holder and test interface device that solves the problems in the prior art.

本揭示之一種探針座,用於電性連接一待測晶片,其中該待 測晶片具有複數個測試點。該探針座包括:一基座,在其厚度方向上設置有複數個貫通孔,其中該基座之介於該每一個貫通孔之間的部分至少具有一金屬材料;以及複數個探針,分別設置於該複數個貫通孔內且一一對應電性接觸該待測晶片的該複數個測試點。 A probe holder for electrically connecting a wafer to be tested, wherein the The test wafer has a plurality of test points. The probe holder includes: a pedestal having a plurality of through holes in a thickness direction thereof, wherein a portion of the pedestal between each of the through holes has at least one metal material; and a plurality of probes, The plurality of test points are respectively disposed in the plurality of through holes and are in electrical contact with the plurality of test points of the wafer to be tested.

在一實施例中,該基座係由一金屬材料一體成型。 In one embodiment, the base is integrally formed from a metallic material.

在一實施例中,該複數個測試點包括複數個訊號測試點和複數個接地測試點。 In one embodiment, the plurality of test points includes a plurality of signal test points and a plurality of ground test points.

在一實施例中,該複數個探針包括複數個第一探針和複數個第二探針,該複數個第一探針分別電性接觸該複數個訊號測試點,該複數個第二探針分別電性接觸該複數個接地測試點。 In an embodiment, the plurality of probes comprise a plurality of first probes and a plurality of second probes, the plurality of first probes electrically contacting the plurality of signal test points, respectively, and the plurality of second probes The pins are electrically contacted to the plurality of ground test points, respectively.

在一實施例中,該每一個第一探針表面塗佈有一絕緣層。 In an embodiment, each of the first probe surfaces is coated with an insulating layer.

在一實施例中,該複數個第一探針所在的貫通孔的內壁各具有一絕緣層。 In one embodiment, the inner walls of the through holes in which the plurality of first probes are located each have an insulating layer.

在一實施例中,該探針座進一步包括:複數個絕緣元件,分別設置於該每一個第一探針及該每一個第一探針所在的貫通孔的內壁之間。 In one embodiment, the probe holder further includes: a plurality of insulating members respectively disposed between the inner walls of each of the first probes and the through holes in which each of the first probes is located.

本揭示之一種測試介面裝置,包括:一探針座,用於電性連接一待測晶片,其中該待測晶片具有複數個測試點,該探針座包括:一基座,在其厚度方向上設置有複數個貫通孔,其中該基座之介於該每一個貫通孔之間的部分至少具有一金屬材料;以及複數個探針,分別設置於該複數個貫通孔內且一一對應電性接觸該待測晶片的該複數個測試點。以及一電路板,用於電性連接一測量裝置,其中該電路板具有一金屬線路,該金屬線路電性接觸該複數個探針。 A test interface device includes a probe holder for electrically connecting a wafer to be tested, wherein the wafer to be tested has a plurality of test points, and the probe holder comprises: a base in a thickness direction thereof a plurality of through holes are disposed, wherein a portion of the pedestal between each of the through holes has at least one metal material; and a plurality of probes are respectively disposed in the plurality of through holes and are electrically connected to each other Sexually contacting the plurality of test points of the wafer to be tested. And a circuit board for electrically connecting to a measuring device, wherein the circuit board has a metal circuit electrically contacting the plurality of probes.

1‧‧‧測試介面裝置 1‧‧‧Test interface device

2‧‧‧待測晶片 2‧‧‧Samps to be tested

3‧‧‧測量裝置 3‧‧‧Measurement device

10‧‧‧探針座 10‧‧‧ probe holder

11‧‧‧電路板 11‧‧‧ boards

20‧‧‧訊號測試點 20‧‧‧ Signal test point

21‧‧‧接地測試點 21‧‧‧ Grounding test point

100‧‧‧基座 100‧‧‧Base

101‧‧‧貫通孔 101‧‧‧through holes

102‧‧‧第一探針 102‧‧‧First probe

103‧‧‧第二探針 103‧‧‧Second probe

104‧‧‧絕緣層 104‧‧‧Insulation

106‧‧‧金屬層 106‧‧‧metal layer

110‧‧‧金屬線路 110‧‧‧Metal lines

第1圖顯示根據本揭示實施例之測試介面裝置的晶片測試架構示意圖。 1 shows a schematic diagram of a wafer test architecture of a test interface device in accordance with an embodiment of the present disclosure.

第2圖顯示根據本揭示另一實施例之探針座的剖視圖。 Figure 2 shows a cross-sectional view of a probe holder in accordance with another embodiment of the present disclosure.

第1圖顯示根據本揭示實施例之測試介面裝置的晶片測試架構示意圖。如第1圖所示,晶片測試架構主要包括測試介面裝置1、待測晶片2和測量裝置3。待測晶片2具有複數個測試點20、21。測試點20、21包括複數個訊號測試點20和複數個接地測試點21。 1 shows a schematic diagram of a wafer test architecture of a test interface device in accordance with an embodiment of the present disclosure. As shown in FIG. 1, the wafer test architecture mainly includes a test interface device 1, a wafer 2 to be tested, and a measuring device 3. The wafer 2 to be tested has a plurality of test points 20,21. Test points 20, 21 include a plurality of signal test points 20 and a plurality of ground test points 21.

本揭示之測試介面裝置1包括:探針座10和電路板11。探針座10用於電性連接待測晶片2,其包括:基座100和複數個探針102、103。基座100在其厚度方向上設置有複數個貫通孔101,其中基座100之介於每一個貫通孔101之間的部分至少具有一金屬材料。在本實施例中,基座100係由一金屬材料一體成型。再者,複數個探針102、103分別設置於複數個貫通孔101內且一一對應電性接觸待測晶片2的複數個測試點20、21。如第1圖所示,探針102、103包括複數個第一探針102和複數個第二探針103,其中複數個第一探針102分別電性接觸複數個訊號測試點20,且複數個第二探針103分別電性接觸複數個接地測試點21。此外,電路板11用於電性連接測量裝置3,其中電路板11具有金屬線路110,金屬線路110電性接觸複數個探針102、103。在一實施例中,金屬線路110可為微帶線(trace)形式。 The test interface device 1 of the present disclosure includes a probe holder 10 and a circuit board 11. The probe base 10 is used to electrically connect the wafer to be tested 2, and includes a base 100 and a plurality of probes 102, 103. The susceptor 100 is provided with a plurality of through holes 101 in the thickness direction thereof, and a portion of the susceptor 100 interposed between each of the through holes 101 has at least one metal material. In the present embodiment, the base 100 is integrally formed of a metal material. Furthermore, the plurality of probes 102 and 103 are respectively disposed in the plurality of through holes 101 and correspond to the plurality of test points 20 and 21 electrically contacting the wafer 2 to be tested. As shown in FIG. 1 , the probes 102 and 103 include a plurality of first probes 102 and a plurality of second probes 103 , wherein the plurality of first probes 102 are electrically connected to the plurality of signal test points 20 respectively, and the plurality of signals The second probes 103 are electrically contacted with a plurality of ground test points 21, respectively. Furthermore, the circuit board 11 is used to electrically connect the measuring device 3, wherein the circuit board 11 has a metal line 110 that electrically contacts a plurality of probes 102, 103. In an embodiment, the metal line 110 can be in the form of a microstrip trace.

繼續參考第1圖,由於基座100係由金屬材料製成,為避免與用以傳遞訊號的第一探針102接觸造成短路,故可在每一個第一探針102的表面塗佈絕緣層104,或者在第一探針102所在的貫通孔101的內壁設置絕緣層104,也可以設置複數個獨立的絕緣元件(圖中未示出),該絕緣元件可以分別設置於每一個第一探針102及每一個第一探針102所在的貫通孔101的內壁之間。 Continuing to refer to FIG. 1, since the susceptor 100 is made of a metal material, an insulating layer may be applied to the surface of each of the first probes 102 in order to avoid short circuit caused by contact with the first probe 102 for transmitting signals. 104, or an insulating layer 104 is disposed on the inner wall of the through hole 101 where the first probe 102 is located, and a plurality of independent insulating elements (not shown) may be disposed, and the insulating elements may be respectively disposed on each of the first The probe 102 and the inner wall of the through hole 101 where each of the first probes 102 are located.

當進行晶片測試時,待測晶片2透過訊號測試點20發出測試 訊號,然後測試訊號依序經過探針座10的第一探針102及電路板11的金屬線路110,最後傳送至測量裝置3。藉由測量裝置3進行各種訊號的分析,以確認待測晶片2的功能是否正常。 When the wafer test is performed, the wafer 2 to be tested is tested by the signal test point 20 The signal is then passed through the first probe 102 of the probe holder 10 and the metal line 110 of the circuit board 11 and finally to the measuring device 3. The measurement device 3 performs analysis of various signals to confirm whether the function of the wafer 2 to be tested is normal.

第2圖顯示根據本揭示另一實施例之探針座10的剖視圖。第2圖與第1圖的差異在於,第1圖中基座100全部由金屬材料製成,但第2圖的基座100大部分由絕緣材料(如工程塑膠)製成,而且基座100之介於每一個貫通孔101之間的部分具有一金屬層106。金屬層106的設置,同樣可以達到電磁屏蔽的效果。 FIG. 2 shows a cross-sectional view of a probe holder 10 in accordance with another embodiment of the present disclosure. The difference between FIG. 2 and FIG. 1 is that the susceptor 100 in FIG. 1 is entirely made of a metal material, but the susceptor 100 of FIG. 2 is mostly made of an insulating material (such as engineering plastic), and the susceptor 100 A portion between each of the through holes 101 has a metal layer 106. The arrangement of the metal layer 106 can also achieve the effect of electromagnetic shielding.

綜上所述,本揭示之特點在於使用金屬材料來製成探針座的基座,提高探針的電磁屏蔽(Shielding)能力,降低訊號之間的串音(Crosstalk)與訊號失真,從而達到準確傳輸測試訊號的目的。 In summary, the present disclosure is characterized in that the base of the probe base is made of a metal material, the electromagnetic shielding capability of the probe is improved, and crosstalk and signal distortion between signals are reduced. The purpose of accurately transmitting test signals.

雖然本揭示已用較佳實施例揭露如上,然其並非用以限定本揭示,本揭示所屬技術領域中具有通常知識者在不脫離本揭示之精神和範圍內,當可作各種之更動與潤飾,因此本揭示之保護範圍當視後附之申請專利範圍所界定者為準。 The present disclosure has been disclosed in the above preferred embodiments. However, it is not intended to limit the scope of the disclosure, and various modifications and changes can be made without departing from the spirit and scope of the disclosure. Therefore, the scope of protection of this disclosure is subject to the definition of the scope of the patent application.

Claims (8)

一種探針座,用於電性連接一待測晶片,其中該待測晶片具有複數個測試點,該探針座包括:一基座,在其厚度方向上設置有複數個貫通孔,其中該基座之介於該每一個貫通孔之間的部分至少具有一金屬材料;以及複數個探針,分別設置於該複數個貫通孔內且一一對應電性接觸該待測晶片的該複數個測試點。 a probe holder for electrically connecting a wafer to be tested, wherein the wafer to be tested has a plurality of test points, the probe holder includes: a base, and a plurality of through holes are disposed in a thickness direction thereof, wherein the probe a portion of the pedestal between each of the through holes has at least one metal material; and a plurality of probes respectively disposed in the plurality of through holes and correspondingly electrically contacting the plurality of the wafers to be tested Test point. 如請求項1所述的探針座,其中該基座係由一金屬材料一體成型。 The probe holder according to claim 1, wherein the base is integrally formed of a metal material. 如請求項1所述的探針座,其中該複數個測試點包括複數個訊號測試點和複數個接地測試點。 The probe base of claim 1, wherein the plurality of test points comprise a plurality of signal test points and a plurality of ground test points. 如請求項3所述的探針座,其中該複數個探針包括複數個第一探針和複數個第二探針,該複數個第一探針分別電性接觸該複數個訊號測試點,該複數個第二探針分別電性接觸該複數個接地測試點。 The probe base of claim 3, wherein the plurality of probes comprise a plurality of first probes and a plurality of second probes, the plurality of first probes electrically contacting the plurality of signal test points, respectively The plurality of second probes electrically contact the plurality of ground test points respectively. 如請求項4所述的探針座,其中該每一個第一探針表面塗佈有一絕緣層。 The probe holder of claim 4, wherein each of the first probe surfaces is coated with an insulating layer. 如請求項4所述的探針座,其中該複數個第一探針所在的貫通孔的內壁各具有一絕緣層。 The probe holder according to claim 4, wherein the inner walls of the through holes in which the plurality of first probes are located each have an insulating layer. 如請求項4所述的探針座,進一步包括:複數個絕緣元件,分別設置於該每一個第一探針及該每一個第一探針所在的貫通孔的內壁之間。 The probe holder according to claim 4, further comprising: a plurality of insulating members respectively disposed between the inner walls of each of the first probes and the through holes in which each of the first probes is located. 一種測試介面裝置,包括:一探針座,用於電性連接一待測晶片,其中該待測晶片具有複數個測試點,該探針座包括: 一基座,在其厚度方向上設置有複數個貫通孔,其中該基座之介於該每一個貫通孔之間的部分至少具有一金屬材料;以及複數個探針,分別設置於該複數個貫通孔內且一一對應電性接觸該待測晶片的該複數個測試點;以及一電路板,用於電性連接一測量裝置,其中該電路板具有一金屬線路,該金屬線路電性接觸該複數個探針。 A test interface device includes: a probe holder for electrically connecting a wafer to be tested, wherein the wafer to be tested has a plurality of test points, and the probe holder comprises: a pedestal having a plurality of through holes in a thickness direction thereof, wherein a portion of the pedestal between each of the through holes has at least one metal material; and a plurality of probes are respectively disposed on the plurality of And a plurality of test points in the through hole and electrically contacting the wafer to be tested; and a circuit board for electrically connecting a measuring device, wherein the circuit board has a metal line, and the metal line is in electrical contact The plurality of probes.
TW107216419U 2018-12-03 2018-12-03 Probe holder and test interface device TWM574692U (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI679424B (en) * 2019-03-29 2019-12-11 矽品精密工業股份有限公司 Detection device and manufacturing method thereof
TWI798069B (en) * 2022-04-26 2023-04-01 寶虹科技股份有限公司 probe card

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI679424B (en) * 2019-03-29 2019-12-11 矽品精密工業股份有限公司 Detection device and manufacturing method thereof
TWI798069B (en) * 2022-04-26 2023-04-01 寶虹科技股份有限公司 probe card

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