JP4766455B2 - Color image forming apparatus - Google Patents

Description

  The present invention relates to a color image forming apparatus such as a color printer or a digital color copying machine.

  In the case of a color image forming apparatus such as a color laser printer, it is necessary to prevent “color shift”. One method of preventing “color misregistration” is a method of correcting “color misregistration” by changing the printing clock frequency for each color to slightly change the printing position of each color.

  On the other hand, it is conceivable to use serial transfer for transferring image data between components constituting the color image forming apparatus (for example, between an image processing unit and a laser exposure unit). However, in this case, if the above-described color misregistration correction method is applied, the transmission side must change the frequency of the print clock for each color, and as a result, the reception side cannot know the transfer rate on the transmission side. Data cannot be received.

  Japanese Patent Laid-Open No. 11-177543 discloses that when serial communication is performed in an asynchronous manner, the data transfer rate on the transmission side is detected on the reception side, and the data transfer rate on the reception side is matched with that on the transmission side. In order to be able to do this, the transmission side transmits a start bit having a width corresponding to one cycle of the data transfer rate frequency, and the reception side detects the data transfer rate on the transmission side by measuring this width. A configuration is disclosed.

However, with the technology described in the publication, the following problems may occur when the data transfer rate is increased. That is, since the data is not activated (DC balance transfer or the like) before transmitting the start bit, the start bit rises dull, and the width of one cycle cannot be accurately transferred to the receiving side. . On the other hand, if the data is activated (DC balance transfer or the like) before transmitting the start bit, the start bit cannot be detected on the receiving side.
Japanese Patent Laid-Open No. 11-177543

  An object of the present invention is to provide a color image forming apparatus capable of changing the frequency of a print clock on the transmission side even when serial transfer is used for transferring image data between components of the color image forming apparatus. It is to provide.

The color image forming apparatus according to the present invention includes a clock control circuit that selects and outputs one of a plurality of clock candidates having different frequencies, and uses the clock output from the clock control circuit. An image data transmission unit that serially transfers image data and a clock selection circuit that selects a clock to be used for serial transfer from a plurality of clock candidates having different frequencies, and using the clock selected by the clock selection circuit An image data receiving unit that receives image data from the image data transmitting unit, and the image data transmitting unit is selected by the clock control circuit when serially transferring to another clock having a different frequency. put only the signal line time corresponding to the clock after the change of the predetermined time for each candidate of a clock The change between the signal level of the H and L levels is stopped, the image data receiving unit measures a time variation between the signal level of the H level and the L level in the signal line is stopped, A clock used for serial transfer is selected based on a comparison between a predetermined threshold value and a measured time for each clock that is a selection target of the clock selection circuit .

In this case, the image data transmitting unit may transmit the loopback check data to the image data receiving unit using the changed clock. Further, the image data receiving unit receives the loopback check data using a clock selected based on a comparison between a predetermined threshold for each clock and the measured time, and the image data transmitting unit You may make it send back to. Further, in response to the transmission of the loopback check data, the image data transmission unit compares the reception data sent from the image data reception unit with the loopback check data, thereby The image data receiving unit may determine whether or not the correct clock has been selected.

In the above case, the image data transmission unit may further include a parallel / serial conversion circuit that converts the image data into serial data based on the clock supplied from the clock control circuit .

  In this case, the clock control circuit may change the clock supplied to the parallel / serial conversion circuit for each color. The image data transmission unit further includes a serial / parallel conversion circuit for converting serial data sent from the image data reception unit into parallel data based on a clock supplied from the clock control circuit. May be.

The image data receiving unit may further include a serial / parallel conversion circuit for converting the image data received from the image data transmitting unit into parallel data based on the clock selected by the clock selection circuit . Good. Furthermore, the clock selection circuit measures an activation stop detection circuit for detecting that the change between the H level and the L level of the signal level in the signal line is stopped, and the time when the change is stopped. An activation stop time measuring circuit and a clock switching circuit for selecting and outputting a clock corresponding to the measurement result by the activation stop time measuring circuit from a plurality of candidates may be provided. The image data receiving unit further includes a parallel / serial conversion circuit that converts the loopback check data received from the image data transmission unit into serial data based on the clock selected by the clock selection circuit. It may be.

The clock selection circuit stops the clock output when the change between the H level and the L level of the signal line in the signal line does not start even after a predetermined time has elapsed. Also good.

  In the above case, a printing unit that forms a color image based on the image data received by the image data receiving unit and outputs the color image to a sheet may be further provided.

  According to the present invention, even when serial transfer is used for transferring image data between components of a color image forming apparatus, the frequency of the print clock can be changed on the transmission side.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a block diagram showing the overall configuration of a color image forming apparatus according to the present invention.

  As shown in the figure, a color image forming apparatus 100 according to the present invention receives an image data transmission unit (MCU) 110 that transmits image data and image data transmitted from the image data transmission unit (MCU) 110. An image data receiving unit (ROS) 120 and a printing unit 130 that forms a color image and transfers it to paper based on the image data received by the image data receiving unit 120 are provided. For example, the image data transmission unit 110 corresponds to a control unit that controls the operation of the color image forming apparatus, and the image data reception unit 120 includes a laser exposure unit that performs exposure scanning on the photosensitive drum based on the image data. Applicable. The color image forming apparatus 100 is connected to an image data generating apparatus (DFE) 140 that generates image data to be output by the color image forming apparatus 100.

  As shown in the figure, the image data transmission unit (MCU) 110 includes a CPU 111, a ROM 112, a RAM 113, a loopback transmission data transfer circuit 114, a parallel / serial conversion circuit 115, a REFVCLK control circuit 116, A serial-parallel conversion circuit 117, a loopback reception data storage circuit 118, and a loopback reception data comparison circuit 119 are provided.

  The CPU 111 controls the circuits 114 to 119 by executing a program stored in the ROM 112 or the like. The ROM 112 and the RAM 113 are storage devices that store programs and data used by the CPU 111.

  When the loopback transmission data transfer circuit 114 is set to the loopback mode by the CPU 111 when switching the REFVCLK (printing clock) used for data transfer, the loopback transmission data transfer circuit 114 supplies a loop set in advance to the parallel / serial conversion circuit 115. Transfers back-check transmission data.

  The parallel / serial conversion circuit 115 is prepared for each color of Y (yellow), M (magenta), C (cyan), and K (black), and converts image data and light amount correction data into serial data. Are sent to the image data receiving unit 120. The parallel / serial conversion circuit 115 converts parallel data into serial data based on REFVCLK supplied from the REFVCLK control circuit 116.

  The REFVCLK control circuit 116 switches REFVCLK as appropriate for each color of YMCK and supplies the selected REFVCLK to the parallel / serial conversion circuit 115 and the serial / parallel conversion circuit 117 in order to perform color misregistration correction.

  The serial / parallel conversion circuit 117 is prepared for each color of YMCK and converts the serial data sent from the image data receiving unit 120 into parallel data. The parallel / serial conversion circuit 115 converts parallel data into serial data based on REFVCLK supplied from the REFVCLK control circuit 116.

  The loopback reception data storage circuit 118 stores reception data for loopback check from the image data reception unit 120 converted into parallel data by the serial / parallel conversion circuit 117 when the CPU 111 is set to the loopback mode. To do.

  The loopback received data comparison circuit 119 is sent back from the image data receiving unit 120 and stored in the loopback received data storage circuit 118 and stored in the loopback transmission data transfer circuit 114 in the loopback mode. The expected value data (loopback check transmission data) is compared. If they match as a result of the comparison, the data transfer speed is matched between the image data transmission unit 110 and the image data reception unit 120, and the data is correctly transferred. That is, the REFVCLK selected by the image data transmission unit 110 is correctly transmitted to the image data reception unit 120.

  On the other hand, as shown in the figure, the image data receiving unit 120 includes a serial / parallel conversion circuit 121, a REFVCLK selection circuit 122, a parallel / serial conversion circuit 123, and a light amount correction control unit 124.

  The serial / parallel conversion circuit 121 converts serial image data received from the image data transmission unit 110 into parallel data and outputs the parallel data to the printing unit 130. In the case of light quantity correction data, the data is transferred to the light quantity correction control unit 124. The serial / parallel conversion circuit 121 converts serial data into parallel data in synchronization with REFVCLK supplied from the REFVCLK selection circuit 122.

  The REFVCLK selection circuit 122 selects an appropriate REFVCLK (that is, REFVCLK selected by the image data transmission unit 110) by monitoring the activation state of the serial data signal from the image data transmission unit 110. Details of the REFVCLK selection circuit 122 will be described later.

  The parallel / serial conversion circuit 123 transfers the SOS signal and the light amount correction control information to the image data transmission unit 110. Further, immediately after the switching of REFVCLK by the REFVCLK selection circuit 122, the loopback check transmission data synchronized with the newly selected REFVCLK is received from the REFVCLK selection circuit 122, converted into serial data, and converted into an image. Transfer the data to the data transmission unit 110. The parallel / serial conversion circuit 123 converts parallel data into serial data in synchronization with REFVCLK selected and supplied by the REFVCLK selection circuit 122.

  The light amount correction control unit 124 performs light amount correction such as APC control based on the light amount correction data transmitted from the image data transmission unit 110.

  Next, details of the REFVCLK selection circuit 122 will be described.

  FIG. 2 is a block diagram showing a configuration of the REFVCLK selection circuit 122.

  As shown in the figure, the REFVCLK selection circuit 122 includes an activation stop detection circuit 210, an activation stop time measurement circuit 220, a REFVCLK switching circuit 230, a REFVCLK generation circuit 240, and a flip-flop circuit 250.

  The activation stop detection circuit 210 is prepared for each color of YMCK, and continuously monitors the serial data signal of each color of YMCK sent from the transmission side, and detects that the activation of the signal line has stopped. Then, an activation stop time measurement signal is output to the activation stop time measurement circuit 220 (by changing from L to H) to instruct to start the measurement of the activation stop time. For example, the activation stop detection circuit 210 determines that the activation of the signal line has stopped when it is detected that no change in L / H occurs for a predetermined time or more.

  The activation stop detection circuit 210 determines that the activation has been resumed when the repetition of the L / H change of the serial data signal is started again after detecting the activation stop, and stops the output of the activation stop time measurement signal. Then, the activation stop time measuring circuit 220 is instructed to end the measurement of the activation stop time (by changing from H to L).

  The activation stop time measurement circuit 220 is prepared for each color of YMCK and starts measurement of the activation stop time in response to an instruction to start measurement from the activation stop detection circuit 210. A measurement counter for measuring the stop time is provided. As a measurement clock used for counting by the measurement counter, either REFVCLK generated by the REFVCLK generation circuit 240 may be used, or a dedicated clock may be provided.

  The activation stop time measurement circuit 220 continues to measure the activation stop time while the activation stop time measurement signal is output from the activation stop detection circuit 210. Then, the REFVCLK selection data is sent to the REFVCLK switching circuit 230 so that the REFVCLK is automatically switched every time a predetermined predetermined time elapses. In other words, the REFVCLK switching circuit 230 selects a REFVCLK that is predetermined according to the count value of the measurement counter.

  The REFVCLK switching circuit 230 selects a REFVCLK corresponding to the selection data from a plurality of types of REFVCLK supplied from the REFVCLK generation circuit 240 based on the REFVCLK selection data passed from the activation stop time measurement circuit 220. , To output.

  The REFVCLK generation circuit 240 generates a plurality of types (for example, N pieces of REFVCLKs) that are appropriately switched by the image data transmission unit 110 to perform color misregistration correction. The type of REFVCLK used by the image data transmission unit 110 is determined in advance.

  The flip-flop circuit 250 is prepared for each color of YMCK, and synchronizes the YMCK image data passed from the serial / parallel conversion circuit 121 with the REFVCLK selected by the REFVCLK switching circuit 230. The flip-flop circuit 250 passes the YMCK image data synchronized with the REFVCLK selected by the REFVCLK switching circuit 230 to the parallel / serial conversion circuit 123.

  Next, the operation of the color image forming apparatus 100 having the above configuration will be described.

  When it is necessary to switch REFVCLK in order to perform color misregistration correction, the image data transmission unit 110 first stops the activation of the serial data signals for each color of YMCK sent to the image data reception unit 120 for a predetermined time. The time for which the image data transmission unit 110 stops the activation of the serial data signal is determined in advance corresponding to the type (for example, frequency) of REFVCLK that can be selected by the image data transmission unit 110 (REFVCLK control circuit 116). . That is, the image data transmission unit 110 stops the activation of the serial data signal only for a time corresponding to the specific type of REFVCLK to be switched.

  Then, the image data transmission unit 110 resumes the activation of the serial data signal after a predetermined time has passed, and the loopback check data is transferred from the loopback transmission data transfer circuit 114 via the parallel / serial conversion circuit 115 to the image data. Transfer to the receiver 120. At this time, the parallel / serial conversion circuit 115 converts the loopback check data into serial data using the REFVCLK after switching.

  On the other hand, in the image data transmission unit 120, when the activation stop detection circuit 210 of the REFVCLK selection circuit 122 detects that the activation of the signal line has stopped, the activation stop time measuring circuit 220 is inactivated. A measurement signal is output to instruct to start measuring the activation stop time.

  When the activation stop detection circuit 210 instructs to start the measurement of the activation stop time, the activation stop time measurement circuit 220 resets the measurement counter to set the counter value to 0 and starts counting up from 0 again. To start. Further, the activation stop time measuring circuit 220 outputs REFVCLK selection data for selecting REFVCLK determined in accordance with the current count value to the REFVCLK switching circuit 230. For example, REFVCLK selection data for causing the REFVCLK switching circuit 230 to select REFVCLK0 is output.

  Thereafter, the activation stop time measurement circuit 220 continues to measure the activation stop time. For example, when the measurement time (count value of the measurement clock) becomes equal to or greater than a first threshold (for example, 100), the REFVCLK switching circuit. REFVCLK selection data for causing 230 to select REFVCLK1 is output. Similarly, when the count value subsequently increases and becomes a second threshold value (for example, 200) or more, REFVCLK selection data for causing the REFVCLK switching circuit 230 to select REFVCLK2 is output. For example, when the count value at the time when the measurement stop instruction is issued from the activation stop detection circuit 210 is between the first threshold value and the second threshold value (for example, 150), REFVCLK1 is selected. It will be.

  If activation is not resumed even when the count reaches the predetermined maximum count value M or more, the activation stop time measurement circuit 220 causes the REFVCLK switching circuit 230 to output REFVCLK selection data (FAIL data). ) Is output.

  When the REFVCLK selection data is received from the activation stop time measurement circuit 220, the REFVCLK switching circuit 230 selects the REFVCLK corresponding to the current REFVCLK selection data from the plurality of types of REFVCLK input from the REFVCLK generation circuit 240. Then, the data is supplied to the serial / parallel conversion circuit 121 and the parallel / serial conversion circuit 123 for each color. However, when the REFVCLK selection data from the activation stop time measuring circuit 220 is FAIL data, the REFVCLK output from the REFVCLK switching circuit 230 is logic fixed (H or L). If REFVCLK is not output from the REFVCLK switching circuit 230, loopback check data cannot be looped back to the transmission side, and it is possible to detect that some trouble has occurred on the transmission side.

  When the activation of the serial data signal is resumed after the lapse of a predetermined time, the serial-parallel conversion circuit 121 uses the REFVCLK selected by the REFVCLK selection circuit 122 to loop back sent from the image data transmission unit 110. The check data is converted into parallel data and passed to the REFVCLK selection circuit 122. The REFVCLK selection circuit 122 passes the loopback check data passed from the serial / parallel conversion circuit 121 to the parallel / serial conversion circuit 123 via the flip-flop circuit 250. The parallel / serial conversion circuit 123 converts the loopback check data passed from the REFVCLK selection circuit 122 into serial data using the REFVCLK selected by the REFVCLK selection circuit 122 and sends it back to the image data transmission unit 110. .

  The image data transmission unit 110 converts the loopback check data sent back from the image data reception unit 120 into parallel data by the serial / parallel conversion circuit 117 and stores the parallel data in the loopback reception data storage circuit 118. When the loopback reception data comparison circuit 119 compares the reception data read from the loopback reception data storage circuit 118 with the transmission data read from the loopback transmission data transfer circuit 114, and the two match. The image data receiving unit 120 determines that the correct REFVCLK has been selected.

  As described above, according to the present embodiment, the frequency of the print clock can be changed for each color even when serial transfer is used for transferring image data between components of the color image forming apparatus. Color misregistration correction can be realized by changing the frequency of the print clock for each color.

  Note that the REFVCLK switching process is performed, for example, in an inter image (an area other than print data). Further, even when REFVCLK switching for correcting color misregistration is not necessary, REFVCLK switching processing (in this case, the same REFVCLK as before) is performed every predetermined period (interval of image data transfer) such as inter-image between jobs. It is possible to provide a recovery function for a temporarily occurring failure.

  Further, input data from the image data generation device (DFE) may be used as loopback check data without providing a loopback check transmission data transfer circuit.

1 is a block diagram illustrating an overall configuration of a color image forming apparatus according to the present invention. 3 is a block diagram showing a configuration of a REFVCLK selection circuit 122. FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 Color image forming apparatus 110 Image data transmission part 111 CPU
112 ROM
113 RAM
114 Loopback transmission data transfer circuit 115 Parallel / serial conversion circuit 116 REFVCLK control circuit 117 Serial / parallel conversion circuit 118 Loopback reception data storage circuit 119 Loopback reception data comparison circuit 120 Image data reception unit 121 Serial / parallel conversion circuit 122 REFVCLK selection circuit 123 Parallel / serial conversion circuit 124 Light amount correction control unit 130 Printing unit 210 Activation stop detection circuit 220 Activation stop time measurement circuit 230 REFVCLK switching circuit 240 REFVCLK generation circuit 250 Flip-flop circuit

Claims (10)

An image data transmission unit that has a clock control circuit that selects and outputs one of a plurality of clock candidates having different frequencies, and serially transfers image data using the clock output from the clock control circuit When,
An image having a clock selection circuit for selecting a clock used for serial transfer from a plurality of clock candidates having different frequencies, and receiving image data from the image data transmission unit using the clock selected by the clock selection circuit A data receiving unit,
The image data transmission unit, when changing to another clock having a different frequency and serially transferring, corresponds to the clock after the change in a predetermined time for each clock candidate to be selected by the clock control circuit The change in the signal level between the H level and the L level in the signal line is stopped for the time, and the loop back check data is transmitted to the image data receiving unit using the changed clock, and the loop back check is performed. Whether the image data receiving unit has selected the correct clock by comparing the received data sent from the image data receiving unit and the loopback check data in response to the data transmission. Determine
The image data receiving unit measures a time when a change between the H level and the L level of the signal level in the signal line is stopped, and sets a predetermined threshold value for each clock that is a selection target of the clock selection circuit. Based on the comparison with the measured time, a clock used for serial transfer is selected, and the loopback check data is received using the selected clock and sent back to the image data transmission unit. A characteristic color image forming apparatus. The image data transmitting unit
The color image forming apparatus according to claim 1, further comprising a parallel-serial conversion circuit that converts image data into serial data based on a clock supplied from the clock control circuit. 3. The color image forming apparatus according to claim 2 , wherein the clock control circuit can change a clock supplied to the parallel / serial conversion circuit for each color. The image data transmission unit further includes a serial-parallel conversion circuit that converts serial data sent from the image data reception unit into parallel data based on a clock supplied from the clock control circuit. The color image forming apparatus according to claim 2 or 3 . The image data receiving unit
Based on the selected clock by the clock selection circuit, any one of claims 2 to 4, further comprising a serial-parallel conversion circuit for converting the image data received from the image data transmission unit to parallel data The color image forming apparatus according to one item. The clock selection circuit includes:
An activation stop detection circuit for detecting that the change between the H level and the L level of the signal level in the signal line is stopped;
An activation stop time measuring circuit for measuring a time when the change is stopped;
6. The color image forming apparatus according to claim 5 , further comprising a clock switching circuit that selects and outputs a clock corresponding to a measurement result by the activation stop time measuring circuit from a plurality of candidates. The image data receiving unit further includes a parallel / serial conversion circuit that converts loop back check data received from the image data transmission unit into serial data based on a clock selected by the clock selection circuit. A color image forming apparatus according to claim 5 or 6 . The clock selection circuit stops clock output when a change between the H level and the L level of the signal line in the signal line is not started even after a predetermined time has elapsed. The color image forming apparatus according to any one of claims 5 to 7 . The color image according to any one of claims 1 to 8 , further comprising a printing unit that forms a color image based on the image data received by the image data receiving unit and outputs the color image to a sheet. Forming equipment. An image data transmission unit that has a clock control circuit that selects and outputs one of a plurality of clock candidates having different frequencies, and serially transfers image data using the clock output from the clock control circuit When,
An image having a clock selection circuit for selecting a clock used for serial transfer from a plurality of clock candidates having different frequencies, and receiving image data from the image data transmission unit using the clock selected by the clock selection circuit A data receiving unit,
When the image data transmission unit continuously transfers a plurality of image data with a predetermined interval using a predetermined clock, the clock that is a selection target of the clock control circuit during the predetermined interval The change between the H level and the L level of the signal line in the signal line is stopped for a time corresponding to the predetermined clock in a predetermined time for each candidate of the candidates , and a loopback check is performed using the changed clock. Transmitting data to the image data receiving unit, and comparing the received data sent from the image data receiving unit with the loop back check data in response to the transmission of the loop back check data To determine whether the image data receiving unit has selected the correct clock,
The image data receiving unit measures a time during which a change between the H level and the L level of the signal line in the signal line is stopped during a predetermined interval for receiving a plurality of image data, and the clock selection Select a clock to be used for serial transfer based on a comparison between a predetermined threshold for each clock that is a circuit selection target and the measured time, and receive the loopback check data using the selected clock. A color image forming apparatus which sends back to the image data transmission unit .

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