JP4746502B2 - Memory-type LCD - Google Patents

Description

  The present invention relates to a memory-type liquid crystal panel, and in particular, enables low-voltage operation by utilizing the memory effect of two stable states of liquid crystal, and further provides display quality with an easy circuit configuration for realizing highlighted display. The present invention relates to a memory-type liquid crystal display device that improves the above.

  In electronic books and electronic newspapers that have recently attracted attention, a liquid crystal having a memory property has attracted attention as a display device of a portable information terminal that does not frequently switch display screens. Having a memory property means that a display state can be maintained even when no voltage is applied. By using this feature, the power consumption of the liquid crystal display device can be reduced. As a liquid crystal material used for a liquid crystal panel having a memory property, a ferroelectric liquid crystal, a cholesteric liquid crystal, and the like are known.

  Here, a method of driving the liquid crystal panel will be described using a ferroelectric liquid crystal as the memory liquid crystal. FIG. 2 is a cross-sectional view showing a configuration of a general liquid crystal panel. As shown in FIG. 2, the liquid crystal panel 40 includes a pair of glass substrates 43 a and 43 b sandwiching a liquid crystal layer 42 having a thickness of about 2 μm, and a sealant 47 that bonds the two glass substrates 43 a and 43 b. It is configured. Transparent electrodes (ITO) 44a and 44b are formed on the opposing surfaces of the glass substrates 43a and 43b so that a plurality of pixels are arranged in a dot matrix, and alignment films 45a and 45b are arranged thereon. An orientation treatment is performed.

  Furthermore, the 1st polarizing plate 41a is installed in the outer side of one glass substrate (henceforth a 1st glass substrate) 43a. On the outside of the other glass substrate (hereinafter referred to as a second glass substrate) 43b, a second polarizing plate 41b is installed so that the first polarizing plate 41a and the polarization axis are different by 90 °. A reflector 46 is disposed outside the second polarizing plate 41b. Further, instead of the second polarizing plate 41b and the reflecting plate 46, a reflective polarizing plate having a polarizing function may be installed. Moreover, you may arrange | position the reflecting plate 46 inside the 2nd polarizing plate 41b as a semi-transmissive reflecting plate.

  Next, the electro-optic effect of the ferroelectric liquid crystal will be described. FIG. 3 is a characteristic diagram of transmittance and voltage of the ferroelectric liquid crystal. The ferroelectric liquid crystal has two stable states, and the two stable states are switched by applying a voltage exceeding a certain threshold, and the first ferroelectric state (ON state) or the first is changed depending on the polarity of the applied voltage. Two ferroelectric states (OFF state) can be selected. That is, at the initial stage (no voltage applied), the first ferroelectric state exists stably in the first or second ferroelectric state, but when the voltage exceeds V1 and reaches V2, the first ferroelectric state is obtained. Even if the applied voltage is gradually lowered from this state, the first ferroelectric state is maintained. Further, by applying a voltage exceeding V3 to V4, the liquid crystal molecules are switched to the second ferroelectric state. Even if the applied voltage is gradually increased from that state, the second ferroelectric state is maintained. As is apparent from this characteristic diagram, a liquid crystal display using ferroelectric liquid crystal can maintain its transmittance, that is, display state (memory property) even when no voltage is applied, that is, when power consumption is zero.

FIG. 4 is a plan view of a liquid crystal panel when ferroelectric liquid crystal is formed in matrix-type pixels (for example, 3 × 3). A matrix type liquid crystal panel as shown in FIG. 4 normally performs display by a time-division driving method. That is, the scan electrode groups TP1 to TP3 are sequentially applied as scan side voltage waveforms from a scan electrode drive circuit (not shown) to, for example, TP1, TP2,. Similarly, a voltage waveform is applied in parallel from the signal electrode drive circuit (not shown) to the signal electrode groups SG1 to SG3. A signal waveform corresponding to the content displayed on the pixel is output as the signal side voltage.

  At this time, the absorption axes of the pair of polarizing plates (not shown) arranged outside the liquid crystal panel are crossed Nicols so that white display is performed in the ON state and black display is performed in the OFF state. Arrange as follows.

  Next, a driving method in which the pixel Pix (1, 1) in the first row and the first column of the ferroelectric liquid crystal panel shown in FIG. 2 is first displayed in white (a) and then in black (b) is shown in FIG. Will be described. FIG. 5 shows a scanning voltage waveform and a signal voltage waveform for driving a general ferroelectric liquid crystal panel, and a composite voltage waveform applied to a pixel and a transmittance curve of the ferroelectric liquid crystal. . The horizontal axis represents time, and the vertical axis represents voltage for each voltage waveform and transmittance for the transmittance curve.

  In the first field period F1, during the reset period RS, a bipolar pulse of the reset voltage ± VS as shown by the scan side voltage waveform TP1 is applied to all the scan electrodes TP1 to TP3. At the same time, a bipolar pulse of the signal voltage ± VD as shown by the signal side voltage waveform SG1 is applied to all the signal electrodes. As a result, in the second half of the reset period RS, the voltage − (VS + VD) of the difference between the reset voltage and the signal voltage is applied to all the pixels, and all the pixels exceed the threshold voltage V4 in FIG. The dielectric state, that is, black display.

  In the selection period SE, a bipolar pulse with a selection voltage ± VS is applied to the scan electrode TP1, and a bipolar pulse with a signal voltage ± VD is applied to the signal electrode SG1. As a result, in the second half of the selection period SE1, the voltage + (VS + VD), which is the difference between the selection voltage and the signal voltage, is applied to the pixel Pix (1,1), exceeds the threshold voltage V2 in FIG. The state, that is, white display.

  In the holding period NSE, a voltage of zero is applied to the scan electrode TP1, and a bipolar pulse of a signal voltage ± VD corresponding to the display content is applied to the signal electrode SG1. The pulse indicated by a square in the figure is an arbitrary pulse train composed of + VD and -VD. For example, as with the reset voltage, one display content is applied in the order of + VD and -VD, and the other display content is applied in the order of -VD and + VD. As indicated by the composite voltage waveform TS (1,1), in the holding period NSE1, the signal-side voltage waveform SG1 is reflected as it is, and a voltage of ± VD is applied to Pix (1,1), but the threshold voltage V3 in FIG. Therefore, the transmittance determined in the selection period SE1 is maintained, and the white display is maintained.

  In the second field period F2, in the reset period RS, a bipolar pulse of the reset voltage ± VRT as shown by the scanning side voltage waveform TP1 is applied to all the scanning electrodes TP1 to TP3. At the same time, a bipolar pulse of the signal voltage ± VD as shown by the signal side voltage waveform SG1 is applied to all the signal electrodes. As a result, in the latter half of the reset period RS, the voltage − (VRT + VD) that is the difference between the reset voltage and the signal voltage is applied to all the pixels, and all the pixels exceed the threshold voltage V4 in FIG. The dielectric state, that is, black display.

  In the selection period SE, a bipolar pulse with a selection voltage ± VS is applied to the scan electrode TP1, and a bipolar pulse with a signal voltage ± VD is applied to the signal electrode SG1. Thereby, in the second half of the selection period SE2, the difference voltage + (VS−VD) between the selection voltage and the signal voltage is applied to the pixel Pix (1,1), but does not exceed the threshold voltage V1 in FIG. The transmittance determined in the reset period RS is maintained and black display is maintained.

  In the holding period NSE, a voltage of zero is applied to the scan electrode TP1, and a bipolar pulse of a signal voltage ± VD corresponding to the display content is applied to the signal electrode SG1. The pulse indicated by a square in the figure is an arbitrary pulse train composed of + VD and -VD. For example, as with the reset voltage, one display content is applied in the order of + VD and -VD, and the other display content is applied in the order of -VD and + VD. As shown by the composite voltage waveform TS (1, 1), in the holding period NSE, the signal-side voltage waveform SG1 is reflected as it is, and a voltage of ± VD is applied to Pix (1, 1), but the threshold voltage V1 in FIG. Therefore, the transmittance determined in the reset period RS is maintained and black display is maintained.

  Thus, the positive side effective value and the negative side effective value of the drive voltage are set to be equal in the frame period constituting one screen. The transmittance waveform TV (1, 1) is obtained when the optical characteristics when the above waveform is applied to the ferroelectric liquid crystal panel is detected by a photodetector or the like.

  FIG. 6 shows a display example in which the driving method shown in FIG. 5 is used for a digital timepiece or the like. A case of performing a specific display mode such as time correction (flashing display to inform the operator of the correction location) will be described. When the time “10:23:45” is displayed and the “45” portion representing the second is to be corrected, only the “45” portion is blinked. When the drive waveform described above is employed, first, the correction portion is displayed in white (bright state) in the first half of the reset period RS1, black display (dark state) in the second half, and “45” is not displayed in the selection period S1. It becomes. Next, white display is performed in the first half of the reset period RS2, black display is performed in the second half, and “45” is displayed in the selection period SE2. A non-selection period is provided after the selection periods SE1 and SE2, respectively, but is omitted from FIG.

  Thus, conventionally, in order to drive the memory liquid crystal, in order to reduce the burden on the scan electrode drive circuit (driver IC) that outputs the scan side voltage waveform, separately from the scan electrode drive circuit (driver IC), There has been proposed a method that includes an independent voltage conversion unit and that can vary the drive voltage applied to the liquid crystal (see, for example, Patent Document 1). The memory-type liquid crystal element disclosed in Patent Document 1 is a liquid crystal display device in which a cholesteric liquid crystal or a chiral nematic liquid crystal is used as a liquid crystal material and a structure in which three display layers are overlapped in the vertical direction is employed.

  In addition, a liquid crystal display element driving device having an inversion / flashing display function by providing a display data processing circuit that processes with a predetermined logic in accordance with a command from a display controller has been proposed (for example, see Patent Document 2).

JP 2001-42812 A (page 4, FIG. 4) JP-A-6-118937 (pages 11-12, FIG. 2)

  When a matrix type liquid crystal panel having scanning electrodes and signal electrodes is manufactured using a ferroelectric liquid crystal having a memory operation mode and data is displayed on the ferroelectric liquid crystal by a line sequential driving method, Since a reset period for displaying the screen in white or black at a time was required, there was a problem that the screen switching speed was slow.

  Further, in the reset period in which the entire screen is displayed simultaneously, the output transistors of the driver IC connected to each pixel of the liquid crystal display device are all turned on and the impedance is lowered. Therefore, it is necessary to increase the current capability supplied to the driver IC. There was also a problem of increasing power consumption.

  In addition, when performing a specific display mode such as blinking display, the entire screen is displayed in white or black at the same time during the reset period, so when displaying specific data, there is a period in which no data is displayed on the screen, The problem that the display quality is remarkably deteriorated was also found.

  In order to solve the above-described problems and achieve the object, the present invention adopts the following configuration. To form one screen in a memory type liquid crystal display device using a memory type liquid crystal panel in which a memory type liquid crystal having at least two stable states is sandwiched between a pair of substrates having a scanning electrode and a signal electrode on opposite surfaces The frame period is a reset period in which one of the two stable states of the memory liquid crystal is in a stable state, a selection period in which the display state is determined, and a non-selection in which the display state determined in the selection period is maintained Switching between a normal display mode composed of a period and a specific display mode in which a frame period is composed only of a selection period in which the display state is determined and a non-selection period in which the display state determined in the selection period is maintained A mechanism is provided.

  When the display mode is switched to the specific display mode, reverse display is performed. Further, the positive side effective value and the negative side effective value of the drive voltage applied to the memory-type liquid crystal panel are equal in a frame period constituting one screen.

  The frame period is composed of two periods, a first field period and a second field period. The selection pulse applied in the selection period in the first field period and the selection pulse in the second field are polar. Is inverted. The scan-side voltage waveform applied to the scan electrode in the selection period is configured by a bipolar pulse, and the signal-side voltage waveform applied to the signal electrode is configured by a unipolar pulse.

  When the display mode is switched to the specific display mode, partial driving in which a voltage is applied only to some of the scanning electrodes or signal electrodes is performed.

  According to the present invention, since a reset period is not required when switching screens when displaying specific data, the rewriting time can be shortened. Further, since the reset voltage supplied to the driver IC during the reset period is not necessary, the power supply circuit can be reduced, and low power consumption and low cost can be realized.

  Furthermore, when performing a specific display, there is no period during which no data is displayed on the screen, and thus an easy-to-see display medium is possible.

  Embodiments of a memory-type liquid crystal display device according to the present invention will be described below in detail with reference to the drawings. As the memory liquid crystal of the present invention, a ferroelectric liquid crystal, a cholesteric liquid crystal, or the like can be employed.

  In this embodiment, a ferroelectric liquid crystal is used for the memory type liquid crystal panel. In this embodiment, the liquid crystal panel configuration shown in FIG. 2 and the electrode configuration shown in FIG. 4 described above are adopted, and the relationship between the applied voltage and the transmittance of the liquid crystal panel shows the characteristics shown in FIG. Hereinafter, a specific driving method of the liquid crystal display device of the present invention will be described with reference to FIGS.

FIG. 7 is a display example in which the driving method using the present invention is used for a digital timepiece or the like. A case where a specific display mode such as time correction is performed will be described. When the time “10:23:45” is displayed and the “45” portion representing the second is to be corrected, only the “45” portion is highlighted. In the driving method using the present invention, no reset period is required, and display is performed only in the selection periods SE1 and SE2 and the non-selection period. In the selection period SE1, black characters “45” are displayed on a white background, and in the selection period SE2, white characters “45” are displayed on a black background. By sequentially performing the selection periods SE1 and SE2, the second part of “45” is highlighted and the operator can be notified of the correction part.

  Next, a driving method for performing the display of FIG. 7 will be described with reference to FIGS. As shown in FIG. 4, in the first time (a), the pixel Pix (1,1) in the first row and the first column of the ferroelectric liquid crystal panel is white, and the pixel Pix (1,2 in the first row and the second column is displayed. ) Is displayed in black, and at the next time (b), the pixel Pix (1,1) in the first row and first column is displayed in black, and the pixel Pix (1,2) in the first row and second column is displayed in white. The method is shown below.

  In the first period F1 of FIG. 1, the pixel Pix (1, 1) in the first row and first column of the ferroelectric liquid crystal panel shown in FIG. The scan electrode TP1 outputs a bipolar pulse with a selection voltage ± VS and outputs a holding voltage of 0 V during the holding period NSE. During the selection period SE, the signal electrode SG1 outputs a unipolar pulse of the data voltage -VD.

  The drive voltage applied to the pixel Pix (1,1) is as shown in TS (1,1) when the potential on the scanning electrode side is 0V. When a voltage (+ VS + VD) is applied in the second half of the selection period SE, the threshold value V1 in FIG. In the holding period NSE, since the scan side electrode waveform is a constant output, a voltage waveform ± VD equivalent to the signal side electrode waveform is applied, but the threshold value V3 in FIG. The dielectric state, that is, the white display is maintained.

  Similarly, in order for the pixel Pix (1,2) in the first row and the second column to display black, in the first period F1, the scanning electrode TP1 outputs a bipolar pulse of the selection voltage ± VS in the selection period SE. The holding voltage 0V is output during the holding period NSE. In the selection period SE, the signal electrode SG2 outputs a unipolar pulse of the data voltage + VD.

  The driving voltage applied to the pixel Pix (1,2) is as shown in TS (1,2) when the potential on the scanning electrode side is 0V. When a voltage (− (+ VS + VD)) is applied in the first half of the selection period SE, the threshold value V3 in FIG. 3 is exceeded and the second ferroelectric state, that is, black display is obtained. In the holding period NSE, since the scan side electrode waveform is a constant output, a voltage waveform ± VD equivalent to the signal side electrode waveform is applied, but does not exceed the threshold value V1 in FIG. The dielectric state, that is, black display is maintained.

  In the second period F2, as shown in FIG. 4B, in order for the pixel Pix (1,1) in the first row and the first column of the ferroelectric liquid crystal panel to display black, the scanning electrode is selected in the selection period SE. TP1 outputs a bipolar pulse with a selection voltage ± VS, and outputs a holding voltage of 0 V during the holding period NSE. During the selection period SE, the signal electrode SG1 outputs a data voltage + VD direction pulse.

  The drive voltage applied to the pixel Pix (1,1) is as shown in TS (1,1) when the potential on the scanning electrode side is 0V. When a selection pulse (-(VS + VD)) is applied in the second half of the selection period SE, the threshold value V3 in FIG. 3 is exceeded and the second ferroelectric state, that is, black display is obtained. In the holding period NSE, since the scan side electrode waveform is a constant output, a voltage waveform ± VD equivalent to the signal side electrode waveform is applied, but does not exceed the threshold value V1 in FIG. The dielectric state, that is, black display is maintained.

  Similarly, in order for the pixel Pix (1,2) in the first row and the second column to display white, in the first period F2, the scanning electrode TP1 outputs a bipolar pulse of the selection voltage ± VS in the selection period SE. The holding voltage 0V is output during the holding period NSE. During the selection period SE, the signal electrode SG2 outputs a unipolar pulse of the data voltage -VD.

  The driving voltage applied to the pixel Pix (1,2) is as shown in TS (1,2) when the potential on the scanning electrode side is 0V. When the selection pulse (+ VS + VD) is applied in the first half of the selection period SE, the threshold value V1 in FIG. In the holding period NSE, since the scan side electrode waveform is a constant output, a voltage waveform ± VD equivalent to the signal side electrode waveform is applied, but the threshold value V3 in FIG. The dielectric state, that is, the white display is maintained.

  In this embodiment, the reference potential is set to 0 V. However, any value can be easily realized by making the reference potential of the scanning electrode waveform equal to the reference potential of the signal side electrode waveform. In addition, a driving method in which 0 V is inserted at the time of switching of each voltage application in order to reduce a through current in a circuit or a crosstalk in a liquid crystal display, but a driving method in which 0 V is not inserted at the time of switching may be used.

  Thus, the positive side effective value and the negative side effective value of the drive voltage are set to be equal in the frame period constituting one screen. In addition, the polarity of the selection pulse applied in the selection period in the first field period and the selection pulse applied in the selection period in the second field period are inverted. Further, the scanning-side voltage waveform TP1 applied during the selection period is composed of bipolar pulses, and the signal voltage waveforms SG1, SG2 are composed of unipolar pulses. The transmittance waveforms TV (1, 1) and TV (2, 1) are obtained when the optical characteristics when the above-described waveform is applied to the ferroelectric liquid crystal panel are detected by a photodetector or the like.

  Further, in the present invention, since the memory-type liquid crystal is used, the display can be maintained once writing is performed in the display area excluding the area where the reverse display is performed. Therefore, partial driving can be performed in which a voltage is applied only to a region where reverse display is performed. By performing partial driving in this way, it is possible to further reduce power consumption.

  If such a driving method is employed, inversion driving can be performed as shown in FIG. 7 without providing the reset period RS. Further, in the normal display mode in which the normal time display is performed, the display is performed by the driving method as shown in FIG. 5 including the reset period RS, the selection period SE, and the non-selection period NSE, and the time correction is performed. In the display mode, a driving method as shown in FIG. 1 including only the selection period SE and the non-selection period NSE without the reset period RS is used.

  FIG. 8 shows a schematic circuit block diagram of a liquid crystal display device for driving the memory type liquid crystal in the present embodiment. The memory-type liquid crystal panel 40 controls a scan electrode drive circuit 81 for applying a voltage waveform to each scan electrode, a signal electrode drive circuit 82 for applying a voltage waveform to each signal electrode, and the entire attractive liquid crystal display device. The controller 83 is driven by a RAM 84 that temporarily stores various data and a ROM 85 that stores font data and programs for displaying characters.

  The power supply circuit 80 generates power necessary for each block circuit by a charge pump method, a switching regulator method, or the like, and includes a dry battery, a photovoltaic device (such as a solar cell), a secondary battery, or the like as a power source.

  Further, when the external switch 86 is pressed by the operator, the control unit 83 outputs a control signal to the scan electrode driving circuit 81 and the signal electrode driving circuit 82 so as to switch from the normal mode display state to the specific mode display.

This makes it possible to repeatedly display an arbitrary color (white or black) on an arbitrary pixel by a combination of the selection voltage from the scanning electrode and the data voltage from the signal electrode in the selection period, as shown in FIG. In the time correction mode of the watch, the negative / positive inversion function can be easily realized.

  Further, unnecessary display (entire black or white) due to the reset period is eliminated, so that display quality is remarkably improved. Furthermore, the voltage applied to the ferroelectric liquid crystal can have the same time average between the positive side and the negative side due to the selection period and the holding period of the plurality of field periods, so that the liquid crystal is not deteriorated due to the application of the DC voltage.

  In addition, since the reset period is not required, the entire screen is not displayed in the same manner, so that the output transistors of the driver IC connected to each pixel of the liquid crystal panel are not all turned on at the same time. By increasing the on-resistance of the transistor, it is possible to reduce the through current and the like and reduce the power consumption of the IC. Further, the power supply circuit for supplying power to the plurality of output transistors is reduced, and the chip size of the IC can be reduced.

  As described above, the memory-type liquid crystal display device according to the present invention is useful for a display medium of a portable information terminal, and particularly suitable for a terminal that needs to be used for a long time even when driven by a solar battery such as a digital watch. ing. In addition, since the screen is not frequently rewritten, a good display with no screen flicker can be realized.

It is a characteristic view which shows the relationship between the drive waveform and optical response in the memory-type liquid crystal of this invention. It is sectional drawing which shows the structure of the liquid crystal display panel of this invention. It is a characteristic view which shows the relationship between the applied voltage and the transmittance | permeability in a ferroelectric liquid crystal. It is the top view which showed electrode arrangement when a liquid crystal panel was formed in the matrix type pixel. It is a characteristic view which shows the relationship between the drive waveform and optical response in the conventional memory type liquid crystal. It is an example of a display when performing the specific display of the digital timepiece using the conventional memory type liquid crystal. It is an example of a display when performing the specific display of the digital timepiece using the memory type liquid crystal of the present invention. 1 is a schematic block configuration diagram of a liquid crystal display device for driving a memory-type liquid crystal according to the present invention.

Explanation of symbols

TP1 First row scan electrode TP2 Second row scan electrode SG1 First column signal electrode TS (1,1) Combined voltage waveform applied to pixel of first row and first column TS (2,1) Second row and first column Composite voltage waveform applied to pixel TV (1, 1) Transmittance characteristic waveform of pixel in 1 row and 1 column TV (2, 1) Transmittance characteristic waveform in pixel of 2 row and 1 column 40 Liquid crystal panel 41a, 41b Polarizing plate 42 Liquid crystal layer 43a, 43b Glass substrate 44a, 44b Transparent electrode 45a, 45b Alignment film 46 Reflector 47 Sealant 80 Power supply circuit 81 Scanning electrode driving circuit 82 Signal electrode driving circuit 83 Control unit 84 RAM
85 ROM
86 External switch

Claims (5)

In a memory type liquid crystal display device having a memory type liquid crystal panel in which a memory type liquid crystal having at least two stable states is sandwiched between a pair of substrates having a scanning electrode and a signal electrode on opposite surfaces,
A frame period for forming one screen is determined by a reset period in which one of the two stable states of the memory liquid crystal is in a stable state, a selection period in which a display state is determined, and the selection period. A normal display mode configured with a non-selection period for maintaining the displayed display state;
The frame period includes a mechanism for switching between a selection period for determining a display state and a specific display mode configured only by a non-selection period for maintaining the display state determined in the selection period ;
A memory type liquid crystal display device , wherein inversion is performed in the specific display mode .   2. The memory-type liquid crystal display device according to claim 1, wherein a positive-side effective value and a negative-side effective value of a driving voltage applied to the memory-type liquid crystal panel are equal in a frame period constituting the one screen.   The frame period includes two periods, a first field period and a second field period, and a selection pulse applied in the selection period in the first field period, and the frame field in the second field. 2. The memory type liquid crystal display device according to claim 1, wherein the polarity of the selection pulse is inverted.   The scan-side voltage waveform applied to the scan electrode in the selection period is configured by a bipolar pulse, and the signal-side voltage waveform applied to the signal electrode is configured by a unipolar pulse. Item 2. The memory-type liquid crystal display device according to Item 1.   2. The memory-type liquid crystal display device according to claim 1, wherein when the display mode is switched to the specific display mode, partial driving is performed in which a voltage is applied only to some of the scanning electrodes or the signal electrodes.

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