JP4722866B2 - Organic electroluminescent display device and manufacturing method thereof - Google Patents

Description

  The present invention relates to an organic light emitting display device and a method for manufacturing the same, and more particularly, to an organic electric field including a protection circuit for preventing a pixel and a driving unit included in the organic light emitting display device from being destroyed by electrostatic discharge. The present invention relates to a light emitting display device and a manufacturing method thereof.

  An organic light emitting display (Organic Light Emitting Display) includes an organic light emitting device (OLED) that generates light by recombination of electrons supplied from a cathode and holes supplied from an anode. This is a type of flat panel display device. Such an organic light emitting display device has advantages that it is thin, has a wide viewing angle, and has a high response speed.

  The organic light emitting display device is classified into a passive drive method and an active drive method according to a driving method. The passive drive method is a method in which a positive electrode and a negative electrode are formed on a substrate so as to be orthogonal to each other, and then a line is selected and driven. On the other hand, in the active driving method, a thin film transistor (TFT) formed in each pixel is used to supply a driving current corresponding to a data signal to the organic electroluminescent device so that light is emitted from the organic electroluminescent device. As a method for embodying an image, compared to the passive drive method, it has an advantage that it can exhibit a stable luminance, consumes less power, and is advantageous for high resolution and large display applications.

  2. Description of the Related Art Conventionally, an organic light emitting display includes a pixel region including pixels arranged in a matrix form and a non-pixel region including a power source for driving the pixels and a driving unit. A pixel in the pixel region includes a thin film transistor and an organic electroluminescent element necessary for driving or switching operation. The pixel area and the non-pixel area are electrically connected through a plurality of lines.

  The conventional organic light emitting display as described above is generally manufactured through a thin film transistor forming step, an organic electroluminescent element forming step, a sealing step, and a modulating step. In the organic light emitting display device, static electricity may be generated due to internal environmental factors or other external environmental factors during the manufacturing process. Static electricity can be generated in almost all manufacturing processes including vapor deposition and etching for manufacturing an organic light emitting display. Further, it may be generated by an external environment while an image is displayed on the organic light emitting display device.

  A conventional organic light emitting display device has a problem that an internal circuit is damaged by electrostatic discharge (ESD) generated by the manufacturing stage and external environmental factors described above.

  The present invention has been made in order to solve the problems of the conventional organic light emitting display device, and its purpose is to destroy the pixels and the driving unit included in the organic light emitting display device from electrostatic discharge. It is an object to provide an organic light emitting display device including an electrostatic discharge circuit for preventing the above.

  To achieve the above object, an organic light emitting display according to the present invention includes a substrate including a pixel region and a non-pixel region, and an electrostatic discharge circuit formed in the non-pixel region of the substrate. To do.

  According to the present invention, the electrostatic discharge circuit includes a semiconductor layer formed on the substrate, a gate insulating film formed on the semiconductor layer, a gate electrode formed on the gate insulating film, and the gate. An interlayer insulating film formed to cover the electrodes and a source / drain electrode formed on the interlayer insulating film.

  According to the present invention, the source / drain electrodes are formed to be spaced apart from the gate electrode by a distance of 1 μm to 10 μm in the horizontal direction.

  According to the present invention, the non-pixel region includes at least one driving unit for driving the pixels in the pixel region, and a pad unit for electrically connecting the pixel and the driving unit to an external module. Can further be included. At this time, the pad portion may be formed on at least one side of the inner periphery of the substrate. At this time, the electrostatic discharge circuit may be formed on at least one side selected from the remaining area excluding the area where the pad portion is formed on the inner periphery of the substrate.

  According to the present invention, the electrostatic discharge circuit is independently formed on each side of the inner periphery of the substrate.

  In addition, according to the present invention, the electrostatic discharge circuit can be integrally formed so as to surround the inner periphery of the substrate. At this time, the gate electrode may be electrically connected to a ground pad formed on the pad portion.

  In addition, according to the present invention, the electrostatic discharge circuit further includes a buffer layer formed between the substrate and the semiconductor layer.

  In addition, according to the present invention, the electrostatic discharge circuit further includes a protective layer formed on an upper surface of the source / drain electrode.

  In addition, according to the present invention, the electrostatic discharge circuit includes a conductive contact for electrically connecting the source / drain electrode and the semiconductor layer.

  In addition, according to the present invention, the electrostatic discharge circuit may further include an electrode layer formed on the upper surface of the protective layer. At this time, the electrode layer may be electrically connected to the source / drain electrode through a conductive via hole.

  The method for manufacturing an organic light emitting display device according to the present invention includes a step of preparing a substrate having a pixel region and a non-pixel region, a step of forming a semiconductor layer in the pixel region and the non-pixel region, and the pixel region. And forming a gate insulating film on the semiconductor layer of the non-pixel region, forming a gate electrode on the gate insulating film of the pixel region and the non-pixel region, and an interlayer covering the gate electrode of the pixel region and the non-pixel region Forming an insulating film; and forming a source / drain electrode in an interlayer insulating film of the pixel region and the non-pixel region, wherein at least one thin film transistor is formed in the pixel region, and the non-pixel region Is characterized in that an electrostatic discharge circuit is formed. At this time, the electrostatic discharge circuit may be formed on the same layer as the thin film transistor.

  According to the organic light emitting display device and the manufacturing method thereof according to the present invention, an electrostatic discharge circuit is formed on at least one side of the inner periphery of the substrate, thereby preventing the pixel and the driving unit from being damaged by electrostatic discharge. is there.

  In addition, according to the present invention, it is possible to control static electricity having a relatively high voltage level by controlling the horizontal distance between the source / drain electrodes and the gate electrode of the electrostatic discharge circuit.

  Further, according to the present invention, the gate insulating film and the interlayer insulating film included in the electrostatic discharge circuit are insulated from the electrostatic discharge generated in the vertical direction between the source / drain electrode and the semiconductor layer or between the gate electrode and the semiconductor layer. This has the effect of protecting the electrostatic discharge of the organic light emitting display device by inducing breakdown.

  In addition, according to the present invention, the electrostatic discharge circuit in the non-pixel region is manufactured by a method substantially similar to that of the thin film transistor in the pixel region, and the manufacturing cost and time of the organic light emitting display device are reduced.

  Hereinafter, an organic light emitting display according to the present invention will be described in detail with reference to the accompanying drawings and embodiments. In the drawings, parts not related to the description are omitted for clear description of the present invention, and like parts are denoted by like reference numerals throughout the specification.

  FIG. 1 is a schematic view illustrating an organic light emitting display according to an embodiment of the present invention.

  Referring to FIG. 1, the organic light emitting display device 100 according to an embodiment of the present invention is formed on a pixel region 110 a including pixels (P, Pixel) arranged in a matrix form and an outer periphery of the pixel region 110 a. A substrate 110 including the non-pixel region 110b and an electrostatic discharge circuit 120 formed on the non-pixel region 110b are included.

  The substrate 110 includes a substantially rectangular pixel region 110a and a non-pixel region 110b formed on the outer periphery of the pixel region 110a. At this time, the data driver 130, the scan driver 140, and the light emission control driver 150 may be further electrically connected to the substrate 110.

  The pixel area 110a is an area where an image is implemented by driving a plurality of pixels arranged in a matrix. Each pixel is formed in a region where a data line (not shown), a scan line (not shown), and a light emission control line (not shown) intersect. Although not shown in the drawings, the pixel P may include a driving element formed in a thin film transistor, at least one switching element, a capacitive element, and an organic electroluminescent element.

  The non-pixel region 110b is formed on the substrate 110 in a region surrounding the pixel region 110a. The non-pixel region 110b includes an electrostatic discharge circuit 120, a data driver 120 for supplying drive signals to each data line, scan line, and light emission control line defining the pixel P, a scan driver 130, and a light emission control driver. 140 can be formed. The non-pixel region 110b may include a pad 160 for electrically connecting the pixel P, the data driver 130, the scan driver 140, the light emission control driver 150, and an external module.

  The electrostatic discharge circuit 120 is formed in the non-pixel region 110 b in the substrate 110. The electrostatic discharge circuit 120 may be formed on at least one side of the end of the substrate 110. The electrostatic discharge circuit 120 is formed on each remaining side of the substrate 110 excluding a portion where a pad portion 160 described below is formed. At this time, the electrostatic discharge circuit 120 may be integrally formed so as to surround each side of the substrate 110. Such an electrostatic discharge circuit 120 is driven from an electrostatic discharge (ESD) that can be generated during the manufacturing process of the organic light emitting display device 100 or subsequent handling thereof. It serves to prevent the device, switching device or organic electroluminescent device from being damaged. The electrostatic discharge circuit 120 can also protect circuits formed in the non-pixel region 110b such as the data driver 130, the scan driver 140, the light emission control driver 150, and the pad 160 described below. Although the electrostatic discharge circuit 120 according to the present invention is described as being formed at the edge of the substrate, the present invention is not limited to this, and the electrostatic discharge circuit 120 can be formed at other portions of the substrate 110 that are vulnerable to electrostatic discharge. Of course. A more detailed structure for the electrostatic discharge circuit 120 will also be described in detail.

  The data driver 130, the scan driver 140, and the light emission control driver 150 may be formed in the non-pixel region 110b of the substrate 110 in the form of an integrated circuit (IC). The data driver 130, the scan driver 140, and the light emission control driver 150 may be formed in the same layer as that for forming a thin film transistor (not shown) included in the pixel P in the pixel region 110a. Meanwhile, the data driver 130, the scan driver 140, and the light emission control driver 150 may be formed on another substrate without being formed on the substrate 110. Each of the driving units 130, 140, and 150 formed on a separate substrate (not shown) includes TCP (Tape Carrier Package), FPC (Flexible Printed Circuit), TAB (Tape Carrier Package), and COG (Chip On Glass). ) And its equivalents may be electrically connected to the substrate 110. However, the present invention is limited to the form and formation position of the driving units 130, 140, and 150. It is not something.

  The pad unit 160 is formed in the non-pixel region 110 b of the substrate 110. The pad unit 160 is formed on one side of the substrate 110 to electrically connect the external circuit module (not shown) and the driving units 130, 140, 150 or the external circuit module and the pixel P. The electrostatic discharge circuit 120 can be electrically connected to a ground pad 160 a formed on at least one side of the pad unit 160.

  Next, the electrostatic discharge circuit 120 used in the organic light emitting display device 100 according to an embodiment of the present invention will be described in more detail.

  FIG. 2 is a view showing a layout corresponding to a part (A in FIG. 1) of the electrostatic discharge circuit 120 of the organic light emitting display device 100 according to an embodiment of the present invention, and FIG. 4 is a cross-sectional view of the electrostatic discharge circuit 120 cut along the line -I, and FIG. 4 is a cross-sectional view of the electrostatic discharge circuit 120 cut along the line II-II in FIG. The electrostatic discharge circuit 120 described below does not correspond to only a part of the substrate 110 (A in FIG. 1), but of course can be applied to the electrostatic discharge circuit 120 formed in all other parts. It is.

  Referring to FIGS. 2 to 4, the electrostatic discharge circuit 120 of the organic light emitting display 100 according to an embodiment of the present invention is formed on a buffer layer 120 a formed on the substrate 110 and on the buffer layer 120 a. A semiconductor layer 120b, a gate insulating film 120c formed on the semiconductor layer 120b, a gate electrode 120d formed on the gate insulating film 120c, an interlayer insulating film 120e and an interlayer formed so as to cover the gate electrode 120d A source / drain electrode 120f formed on the insulating film 120e.

  The substrate 110 is formed in a plate shape having an upper surface and a lower surface, and a thickness between the upper surface and the lower surface is about 0.05 to 1 mm. When the thickness of the substrate 110 is less than 0.05 mm, the substrate 110 is easily damaged by cleaning, etching, heat treatment, and the like, and has a disadvantage that it is weak against external force. On the contrary, when the thickness of the substrate 110 is larger than 1 mm, there is a disadvantage that it is difficult to apply to various display devices which are recent slimming. The substrate 110 may be any one selected from glass, plastic, stainless steel, nanocomposite material, and equivalents, but the present invention is not limited to such a material. Absent. The substrate 110 may be divided into a pixel region 110a including a thin film transistor (not shown) and an organic electroluminescent element (not shown) and a non-pixel region 110b where various driving units are formed.

The buffer layer 120a prevents moisture (H ₂ O), hydrogen (H ₂ ), oxygen (O ₂ ), or the like from penetrating through the substrate 110 into the electrostatic discharge circuit 120 including the semiconductor layer 120b described below. Have a role to play. Therefore, the buffer layer 120a is at least one selected from a silicon oxide film (SiO ₂ ), a silicon nitride film (Si ₃ N ₄ ), an inorganic film, and an equivalent thereof that are easily formed during the semiconductor process. However, the present invention is not limited to this material. In the present invention, the buffer layer 120a may be omitted if necessary.

  The semiconductor layer 120b is formed on the buffer layer 120a or the substrate 110. The semiconductor layer 120b plays a role of inducing electrostatic discharge together with the gate electrode 120d and the source / drain electrode 120f described below. The semiconductor layer 120b may be any one selected from amorphous silicon, micro silicon (grain size between amorphous silicon and polycrystalline silicon (silicon having a grain size), organic substances, and equivalents thereof. Here, the material of the semiconductor layer 120b is not limited.

  The gate insulating film 120c is formed on the upper surface of the semiconductor layer 120b. The gate insulating film 120c is formed in order to obtain electrical insulation between a gate electrode 120d and a semiconductor layer 120b described below. The gate insulating film 120c may be formed on at least one selected from a silicon oxide film, a silicon nitride film, an inorganic film, or an equivalent film easily obtained during a semiconductor process. Here, the material of the gate insulating film 120c is not limited. Of course, such a gate insulating film 120c can also be formed on the buffer layer 120a which is the inner periphery of the semiconductor layer 120b. The gate insulating film 120c induces dielectric breakdown of static electricity flowing through the gate electrode 120d or the source / drain electrode 120f to discharge static electricity, thereby driving the pixels P in the pixel region 110a and the non-pixel region 110b. 130, 140, 150 is prevented from being damaged by electrostatic discharge. At this time, the thickness (T1 in FIG. 4) of the gate insulating film 120c between the semiconductor layer 120b and the gate electrode 120d is formed to have a thickness of about 1 μm or less, and is slightly low static electricity corresponding to about several hundred volts. When this occurs, the dielectric breakdown breaks down and protects the organic light emitting display device 100 from electrostatic discharge.

  The gate electrode 120d is formed on the gate insulating film 120c. More specifically, the gate electrode 120d is formed in a region corresponding to the semiconductor layer 120b from above the gate insulating film 120c. The gate electrode 120d can be electrically connected to a ground pad (160a in FIG. 1) included in the pad portion (160 in FIG. 1). The gate electrode 120d is usually selected from metal (Mo, MoW, Ti, Cu, Al, AlNd, Cr, Mo alloy, Cu alloy, Al alloy, etc.), doped polycrystalline silicon, and equivalents thereof. However, the present invention is not limited to the material of the gate electrode 120d.

  The interlayer insulating film 120e is formed on the gate electrode 120d. Of course, the interlayer insulating film 120e can also be formed on the gate insulating film 120c formed on the inner periphery of the gate electrode 120d. At this time, the interlayer insulating film 120e may be formed of any one selected from a polymer series, a plastic series, a glass series, or a series equivalent thereto. The material is not limited. The interlayer insulating film 120e can also be formed of the same material as the gate insulating film 120c. The interlayer insulating film 120e has a role of inducing dielectric breakdown due to static electricity flowing through the source / drain electrode 120f or the gate electrode 120d like the gate insulating film 120c.

  The source / drain electrode 120f may be formed on the interlayer insulating film 120e. At this time, a conductive contact c1 that penetrates the interlayer insulating film 120e can be formed between the source / drain electrode 120f and the semiconductor layer 120b. The source / drain electrode 120f can be electrically connected to the semiconductor layer 120b by the conductive contact c1. At this time, the horizontal distance (l1 in FIG. 4) between the source / drain electrode 120f and the gate electrode 120d may be separated by a distance of 1 μm to 10 μm. If the horizontal distance (l1 in FIG. 4) is shorter than 1 μm, the resistance between the source / drain electrode 120f and the gate electrode 120d is lowered, and the voltage level protected by the electrostatic discharge circuit 120 is reduced. . That is, it becomes difficult to control high static electricity that is several thousand volts or more. On the other hand, when the horizontal distance (l1 in FIG. 4) is longer than 10 μm, the resistance is increased and the protected voltage level is increased, but in the region of the electrostatic discharge circuit 120 that can be formed in the non-pixel region 110b. Therefore, the horizontal distance (l1 in FIG. 4) is preferably controlled within 10 μm. Meanwhile, the thickness T2 between the source / drain electrode 120f and the semiconductor layer 120b may be formed to have a thickness of about 1 μm or less. The source / drain electrode 120f is integrally formed so that the source region and the drain region are electrically connected, and does not operate during normal driving of the organic light emitting display device 100. The source / drain electrode 120f may be formed of a metal material such as the gate electrode 120d described above, but the present invention is not limited to the material of the source / drain electrode 120f.

  A protective film 120g and a planarization film 120h may be further formed on the source / drain electrode 120f. The protective film 120g is formed to cover the source / drain electrode 120f and the interlayer insulating film 120e, and has a role of protecting the source / drain electrode 120f and the gate electrode 120d. The protective film 120g may be formed of any one selected from a normal inorganic film and its equivalent, but the present invention is not limited to the material of the protective film 120g. Also, the planarization film 120h is formed so as to cover the protective film 120g, and helps to make the surface of the electrostatic discharge circuit 120 flat overall. The planarization film 120h may be formed of at least one selected from benzocyclobutene (BCB), acrylic, and equivalents thereof, but is not limited thereto. It is not a thing.

  An electrode layer 120i may be further formed on the planarization film 120h. The electrode layer 120i is electrically connected to the source / drain electrode 120f through the conductive via hole v1. The electrode layer 120i discharges static electricity through the conductive via hole v1 and the source / drain electrode 120f when static electricity is generated. The electrode layer 120i can be formed of a metal material such as the gate electrode 120d described above, but the present invention is not limited to the material of the electrode layer 120i.

  Next, the operation of the electrostatic discharge circuit 120 formed according to the embodiment of the present invention will be described in more detail.

  FIG. 5 is a view illustrating a path through which static electricity is discharged in the organic light emitting display 100 according to an embodiment of the present invention. According to the present invention, static electricity is large and the first path (circle 1) between the source / drain electrode 120f and the gate electrode 120d, and the second path (circle 2) between the source / drain electrode 120f and the semiconductor layer 120b. And it can discharge via the 3rd path | route (circle 3) between the gate electrode 120d and the semiconductor layer 120b.

  The first path (circle 1) is a path for discharging through the interlayer insulating film 120e between the source / drain electrode 120f and the gate electrode 120d. Static electricity generated from the source / drain electrode 120f and having a relatively high voltage level can be strongly discharged in the direction of the gate electrode 120d. The interlayer insulating film 120e formed between the source / drain electrode 120f and the gate electrode 120d is broken down to protect electrostatic discharge. Of course, the static electricity generated in the source / drain electrode 120f can be discharged to the ground pad 160a connected to the gate electrode 120d. The source / drain electrode 120f and the gate electrode 120d are formed to be separated from each other by about 1 μm to 10 μm in the horizontal direction with the interlayer insulating film 120e interposed therebetween. If the horizontal distance (l1) between the source / drain electrode 120f and the gate electrode 120d is shorter than 1 μm, the resistance between the source / drain electrode 120f and the gate electrode 120d is reduced, and the electrostatic discharge circuit. The voltage level protected by 120 is reduced. That is, it becomes difficult to control high static electricity of several thousand volts or more. On the other hand, when the horizontal distance (l1) is longer than 10 μm, the resistance is increased, so that the voltage level to be protected is increased, but in the region of the electrostatic discharge circuit 120 that can be formed in the non-pixel region 110b, Due to limitations, the horizontal distance (l1) is preferably controlled within 10 μm.

  The second path (circle 2) is a path for discharging through the interlayer insulating film 120e and the gate insulating film 120c between the source / drain electrode 120f and the semiconductor layer 120b. Static electricity generated from the source / drain electrode 120f and having a relatively low voltage level can be discharged in the direction in which the semiconductor layer 120b is formed. In this case, the interlayer insulating film 120e and the gate insulating film 120c have a role of protecting electrostatic discharge while being broken down. The thickness T2 between the source / drain electrode 120f and the semiconductor layer 120b is formed to be approximately 1 μm or less, so that the organic light emitting display 100 can be protected from static electricity having a relatively low voltage level.

  The third path (circle 3) is a path for discharging through the gate insulating film 120c between the gate electrode 120d and the semiconductor layer 120b. Static electricity generated from the gate electrode 120d can be discharged in the direction in which the semiconductor layer 120b is formed. In this case, the organic light emitting display device 100 can be protected from electrostatic discharge while the gate insulating film 120c is broken down. A thickness T1 between the gate electrode 120d and the semiconductor layer 120b is formed to be approximately 1 μm or less, so that the organic light emitting display device 100 can be protected from static electricity having a relatively low voltage level. On the other hand, static electricity generated from the gate electrode 120d can be discharged to the ground pad 160a without causing dielectric breakdown of the gate insulating film 120c.

  According to the organic light emitting display device of the present invention described above, the electrostatic discharge circuit 120 has various advantages from a relatively low level of static electricity to a high level of static electricity.

  Next, a method for manufacturing the organic light emitting display device 100 according to an embodiment of the present invention will be described.

  FIG. 6 is a flowchart sequentially illustrating a method of manufacturing an organic light emitting display according to an embodiment of the present invention. FIGS. 7a to 7f are diagrams illustrating an organic field manufactured sequentially according to the manufacturing steps of FIG. FIG. 8 illustrates a pixel area 110a and a non-pixel area 110b of an organic light emitting display 100 completed according to an embodiment of the present invention.

  Referring to FIGS. 6 to 8, a method for manufacturing an organic light emitting display device according to an embodiment of the present invention includes a substrate preparation step S1 for preparing a substrate having a pixel region 110a and a non-pixel region 110b, and a semiconductor layer. At least one thin film transistor 170 is formed in the pixel region 110a through the forming step S2, the gate insulating film forming step S3, the gate electrode forming step S4, the interlayer insulating film forming step S5, and the source / drain electrode forming step S6. In addition, an electrostatic discharge circuit 120 is formed in the non-pixel region 110b.

  Referring to FIG. 7a, the substrate preparation step S1 is a step of preparing the substrate 110 in the pixel region 110a and the non-pixel region 110b. In the substrate preparation step S1, the substrate 110 having an upper surface and a lower surface are cleaned so that no foreign matter is contained in the plate 110 and in the following manufacturing steps, the substrate 110 is compacted (pre-processed so as not to be easily deformed by heat or pressure). The method may further include a step of being compacted. The substrate 110 is preferably prepared to have a thickness of 0.05 mm to 1 mm. If the thickness of the substrate 110 is less than 0.05 mm, the substrate 110 is easily damaged during cleaning, etching, and heat treatment during the manufacturing process, and is difficult to handle and easily damaged by external force. When the thickness of the substrate 110 is greater than 1 mm, there is a disadvantage that it is difficult to apply to various display devices which have recently been slimmed. The substrate 110 is divided into a pixel region 110a where the thin film transistor 170 and the organic electroluminescent element 180 are formed, and a non-pixel region 110b where the electrostatic discharge circuit 120 and various driving units are formed.

If the substrate 110 is prepared, buffer layers 170a and 120a having a certain thickness are formed in the pixel region 110a and the non-pixel region 110b on the upper surface of the substrate 110, respectively. The buffer layers 170a and 120a may be formed in the pixel region 110a and the non-pixel region 110b, respectively, or simultaneously. The buffer layers 170 a and 120 a have a role of preventing impurities from flowing into internal circuits such as the thin film transistor 170, the organic electroluminescent element 180, and the electrostatic discharge circuit 120 through the substrate 110. Also, the buffer layers 170a and 120a help to form the semiconductor layers 170b and 120b on the surface. The buffer layers 170a and 120a are at least selected from a silicon oxide film (SiO ₂ ), a silicon nitride film (Si ₃ N ₄ ), an inorganic film, and equivalents that can be easily formed during a semiconductor process. However, the material is not limited to the material of the buffer layers 170a and 120a. At this time, the buffer layers 170a and 120a may be formed in a multilayer structure as needed. Further, the buffer layers 170a and 120a may be omitted as necessary.

  In the semiconductor layer forming step S2, referring to FIG. 7B, semiconductor layers 170b and 120b are formed in the pixel region 110a and the non-pixel region 110b of the substrate 110. The semiconductor layers 170b and 120b can be formed in the pixel region 110a and the non-pixel region 110b, respectively, or simultaneously. At this time, buffer layers 170a and 120a may be further formed between the substrate 110 and the semiconductor layers 170b and 120b.

When the substrate 110 is prepared, the buffer layers 170a and 120a are formed to have a certain thickness in the pixel region 110a and the non-pixel region 110b on the upper surface of the substrate 110, respectively. The buffer layers 170a and 120a may be formed in the pixel region 110a and the non-pixel region 110b, respectively, or simultaneously. The buffer layers 170 a and 120 a have a role of preventing impurities from flowing into internal circuits such as the thin film transistor 170, the organic electroluminescent element 180, and the electrostatic discharge circuit 120 through the substrate 110. Also, the buffer layers 170a and 120a help to form the semiconductor layers 170b and 120b on the surface. The buffer layers 170a and 120a are at least selected from a silicon oxide film (SiO ₂ ), a silicon nitride film (Si ₃ N ₄ ), an inorganic film, and equivalents that can be easily formed during a semiconductor process. However, the present invention is not limited to the material of the buffer layers 170a and 120a. At this time, the buffer layers 170a and 120a may be formed in a multilayer structure as needed. Further, the buffer layers 170a and 120a may be omitted as necessary.

  The semiconductor layers 170b and 120b include source and drain regions (not shown) formed on opposite sides and a channel region (not shown) formed between the source and drain regions. The semiconductor layers 170b and 120b may be any one selected from amorphous silicon, micro silicon, an organic material, and an equivalent thereof. However, the present invention is not limited to the material of the semiconductor layers 170b and 120b. It is not limited to. For example, the semiconductor layers 170b and 120b may be formed in a desired position and pattern through a silicon crystallization step and a polycrystalline silicon patterning step.

  The silicon crystallization step includes depositing amorphous silicon on the upper surfaces of the buffer layers 170a and 120a and then crystallizing the amorphous silicon to form polysilicon. Polysilicon can also be formed by crystallizing micro silicon. Amorphous silicon is selected from plasma enhanced chemical vapor deposition (PECVD), low pressure chemical vapor deposition (LPCVD), sputtering, and equivalent methods. The upper surface of the buffer layers 170a and 120a can be deposited by any one method, but the present invention is not limited to the method for forming amorphous silicon. After amorphous silicon is deposited on the buffer layer 120, the amorphous silicon is crystallized through a method described below to form polysilicon.

  The amorphous silicon includes a laser crystallization method (ELA) using an excimer laser, a metal catalyst crystallization method (MIC: Metal Induced Crystallization) using a metal catalyst (promoting material), and a solid phase crystallization (SPC: It can be crystallized via a Solid Phase Crystallization) method or the like. In addition, there is a sequential lateral crystallization (SLS) method in which a mask is additionally used in the existing laser crystallization method.

  In the laser crystallization method, the most frequently used method is that the crystallization method of the existing polycrystalline liquid crystal display device can be used as it is, and the process method is simple and the technical development for the process method is completed. is there.

  The metal catalyst crystallization method is one of methods that can be crystallized at a low temperature without using a laser crystallization method. Initially, metal catalyst metals such as Ni, Co, Pd, and Ti are deposited or spin coated on the amorphous silicon surface, and the metal catalyst metal directly penetrates the amorphous silicon surface to form amorphous silicon. As a method of crystallization while changing the temperature, there is an advantage that crystallization can be performed at a low temperature.

  Other than the above metal catalyst crystallization method, when a metal layer is interposed on the surface of amorphous silicon, a mask is used to suppress the contamination of a specific region of the thin film transistor such as nickel silicide to the maximum. There is an advantage that you can. Such a crystallization method is referred to as a metal-induced solid-phase growth method (MILC). As a mask used in the metal catalyst-induced side crystallization method, a shadow mask can be used, and the shadow mask can be a sector mask or a dot mask.

  In addition to the above metal catalyst crystallization method, when the metal catalyst layer is deposited or spin coated on the amorphous silicon surface, the amount of the metal catalyst flowing into the amorphous silicon is controlled by interposing a capping layer first. There is a metal catalyst induced capping layer crystallization method (MICC: Metal Induced Lateral Crystallization with Capping Layer). As the capping layer, a silicon nitride film can be used. The amount of metal catalyst flowing from the metal catalyst layer into the amorphous silicon varies depending on the thickness of the silicon nitride film. At this time, the metal catalyst flowing into the silicon nitride film may be formed on the entire silicon nitride film, or may be selectively formed using a shadow mask or the like. After the metal catalyst layer is crystallized from amorphous silicon to polycrystalline silicon, the capping layer can be selectively removed. As the capping layer removal method, a wet etching method (wet etching) or a dry etching method (dry etching) can be used. After the polycrystalline silicon is formed, via holes (not shown) are formed on interlayer insulating films 170e and 120e described below, and then impurities are introduced into the crystallized polycrystalline silicon through the via holes. Metal catalyst impurities formed inside can be additionally removed. At this time, a method of additionally removing metal catalyst impurities is called a gettering step. The gettering step includes a heating step of heating the thin film transistor at a low temperature in addition to the step of injecting the impurities. A high-quality thin film transistor can be realized through the gettering process.

  The micro silicon generally has a crystal grain size between amorphous silicon and polycrystalline silicon, and usually means that the size is from 1 nm to 100 nm. The electron transfer diagram of the micro silicon is 1 to 50 or less, and the hole transfer diagram is 0.01 to 0.2 or less. Micro silicon is characterized in that the size of the crystal grains is smaller than that of polycrystalline silicon, the protrusion region between the crystal grains is formed small, and does not hinder the movement of electrons between the crystal grains, Uniform characteristics can be shown.

  The micro silicon crystal grain method includes a thermal crystallization method and a laser crystallization method. Thermal crystallization methods include a method of obtaining a crystal structure simultaneously with vapor deposition of amorphous silicon and a reheating method. The laser crystallization method is a method in which amorphous silicon is deposited by chemical vacuum deposition and amorphous silicon is deposited by chemical vacuum deposition, and then crystallized using a laser. There are mainly diode lasers. The diode laser mainly uses a red wavelength of about 800 nm. The red wavelength has a role to contribute to the uniform crystallization of the microsilicon crystalline material.

  The polycrystalline silicon formed by the above-described method forms a desired number of semiconductor layers 170b and 120b at desired positions through a polycrystalline silicon patterning step. The polycrystalline silicon patterning step includes processes such as photoresist coating, exposure, phenomenon, etching, and photoresist thinning.

  In the gate insulating film formation step S3, referring to FIG. 7c, gate insulating films 170c and 120c having a constant thickness are formed on the upper surfaces of the semiconductor layers 170b and 120b. The gate insulating films 170c and 120c may be formed in the pixel region 110a and the non-pixel region 110b, respectively, or simultaneously. At this time, the gate insulating films 170c and 120c can also be formed on the upper surfaces of the buffer layers 170a and 120a, which are inner peripheral edges of the semiconductor layers 170b and 120b. The gate insulating films 170c and 120c can be formed through at least one method selected from PECVD, LPCVD, sputtering, and equivalent methods. At this time, the gate insulating films 170c and 120c may be formed on at least one selected from a silicon oxide film, a silicon nitride film, an inorganic film, or an equivalent thereof. The material of the films 170c and 120c is not limited.

  In the gate electrode formation step S4, referring to FIG. 7d, gate electrodes 170d and 120d are formed at positions corresponding to the semiconductor layers 170b and 120b on the gate insulating films 170c and 120c in the pixel region 110a and the non-pixel region 110b, respectively. Is done. The gate electrodes 170d and 120d can be deposited on the top surfaces of the gate insulating films 170c and 120c by at least one method selected from PECVD, LPCVD, sputtering, and equivalent methods. After the gate electrodes 170d and 120d are deposited on the gate insulating films 170c and 120c, a desired number of gate electrodes 170d and 120d are formed at desired positions through processes such as photoresist coating, exposure, phenomenon, etching, and photoresist thinning. Can do. Such gate electrodes 170d, 120d are typically made of metal (Mo, MoW, Ti, Cu, Al, AlNd, Cr, Mo alloy, Cu alloy, Al alloy, etc.), doped polycrystalline silicon and its equivalents. However, the present invention is not limited to the material of the gate electrodes 170d and 120d.

  In the interlayer insulating film forming step S5, referring to FIG. 7e, interlayer insulating films 170e and 120e are formed on the upper surfaces of the gate electrodes 170d and 120d in the pixel region 110a and the non-pixel region 110b, respectively. Of course, the interlayer insulating films 170e and 120e can also be formed on the gate insulating films 170c and 120c which are the inner peripheral edges of the gate electrodes 170d and 120d. At this time, contact holes for connecting the semiconductor layers 170b and 120b and the source / drain electrodes 170f and 120f described below can be formed in the interlayer insulating films 170e and 120e through an etching process. The interlayer insulating films 170e and 120e may be formed of any one selected from a polymer series, a plastic series, a glass series, or an equivalent series thereof, but the present invention is not limited thereto. .

  In the source / drain electrode formation step S6, referring to FIG. 7f, the source / drain electrodes 170f and 120f and the conductive contacts c2 and c1 are formed on the upper surfaces of the interlayer insulating films 170e and 120e of the pixel region 110a and the non-pixel region 110b, respectively. It is formed. The source / drain electrodes 170f and 120f are deposited by at least one method selected from PECVD, LPCVD, sputtering, and equivalent methods, and then are applied with photoresist, exposed, phenomenon, etched, and photoresist thin film. A desired number of patterns are patterned at a desired position through processes such as the above. At this time, conductive contacts c2 and c1 are formed by filling the contact holes formed in the interlayer insulating film forming step S5 with a conductive material. The conductive contacts c2 and c1 can be formed of the same metal material as the gate electrodes 170d and 120d and the source / drain electrodes 170f and 120f, but the present invention is limited to the material of the conductive contacts c2 and c1. It is not a thing. The source / drain electrode 170f of the pixel region 110a can be formed independently of the source region (not shown) and drain region (not shown) of the semiconductor layer 170b. In the source / drain electrode 120f, electrodes in contact with the source region and the drain region are integrally formed. Therefore, the electrostatic discharge circuit 120 does not operate when a general drive voltage is applied.

  Referring to FIG. 8 according to the embodiment of the present invention, a thin film transistor 170 for supplying a driving current to the organic electroluminescence device 180 is formed in the pixel region 110a of the substrate 110, and the non-pixel region 110b is formed. The electrostatic discharge circuit 120 is formed to protect the thin film transistor 170 and the organic electroluminescent device 180 from being destroyed from electrostatic discharge.

  Meanwhile, protective films 170g and 120g and planarization films 170h and 120h may be further formed on the upper surfaces of the source / drain electrodes 170f and 120f formed in the pixel region 110a and the non-pixel region 110b, respectively. The pixel region 110a and the non-pixel region 110b may be formed to be electrically connected to the organic electroluminescent element 180 and the electrode layer 120i through the conductive via holes v2 and v1, respectively.

  The pixel region 110a is formed in the approximate center of the substrate 110, and the pixel included in the pixel region 110a includes at least one thin film transistor 170. At this time, the electrostatic discharge circuit 120 formed in the non-pixel region 110b is formed on at least one side of the inner periphery of the substrate 110 surrounding the pixel region 110a.

  The method for manufacturing the organic light emitting display device 100 described above has been described centering on a full surface light emission method in which light is emitted in the upper direction of the substrate 110. The present invention can also be applied to the double-sided light emitting method that simultaneously emits light in the upper and lower directions of the substrate 110.

  According to the manufacturing method described above, the electrostatic discharge circuit 120 can be manufactured by substantially the same method as that of the thin film transistor 170, which is effective in reducing the manufacturing cost and the time of the organic light emitting display device 100.

  Due to the formation of the electrostatic discharge circuit 120, static electricity can be generated during the manufacturing process of forming the conductive via hole v2 for electrically connecting the thin film transistor 170 and the organic electroluminescent element 180 in the pixel region 110a. The thin film transistor 170 and the organic electroluminescent element 180 can be protected. The electrostatic discharge circuit 120 can prevent at least one driving unit (see 130, 140, and 150 in FIG. 1) formed in the non-pixel region 110b from being damaged by electrostatic discharge.

  FIG. 9 is a schematic view illustrating an organic light emitting display device according to another embodiment of the present invention.

  Referring to FIG. 9, an organic light emitting display 200 according to another embodiment of the present invention includes an electrostatic discharge circuit 220 that is independently formed on each side of a substrate 210 including a pixel region 210a and a non-pixel region 210b. including. Accordingly, the electrostatic discharge circuit 220 can be selectively formed only in a region where the electrostatic discharge is frequently performed or in other necessary regions. Of course, each of the electrostatic discharge circuits 220 is electrically connected to a ground pad (not shown) of the pad portion 260 formed on the substrate 210. Since the detailed structure of the electrostatic discharge circuit 220 according to another embodiment of the present invention is formed in the same manner as that of the embodiment of the present invention, detailed description thereof is omitted.

  According to the above-described embodiment and other embodiments of the present invention, the organic light-emitting display device has an electrostatic discharge circuit formed on at least one side of the substrate, thereby causing internal factors during the manufacturing process or other external environment. It is possible to prevent the pixel or the driver from being damaged by the electrostatic discharge generated by the above.

  On the other hand, in this invention, an organic electroluminescent element consists of a positive electrode (ITO), an organic layer, and a negative electrode (metal). The organic layer includes a light emitting layer that emits light by combining electrons and holes to form excitons (Emitting Layer, EML), an electron transport layer that transports electrons (Electron Transport Layer, ETL), and a positive layer that transports holes. It can consist of a hole transport layer (HTL). Also, an electron injection layer (Electron Injection Layer, EIL) for injecting electrons is formed on one side of the electron transport layer, and a hole injection layer for injecting holes is formed on one side of the hole transport layer. (Hole Injecting Layer, HIL) can be further formed. In the case of a phosphorescent organic electroluminescent device, a hole blocking layer (HBL) can be selectively formed between the light emitting layer (EML) and the electron transport layer (ETL). An electron blocking layer (EBL) may be selectively formed between the light emitting layer (EML) and the hole transport layer (HTL).

  In addition, the organic layer may be formed as a slim organic electroluminescent device (Slim OLED) structure in which two types of layers are mixed to reduce the thickness. For example, a hole injection transport layer (HITL) structure that forms a hole injection layer and a hole transport layer at the same time, and an electron injection transport layer (Electron Injection layer) that forms an electron injection layer and an electron transport layer at the same time (Transport Layer, EITL) structure can be selectively formed. The slim type organic electroluminescent device as described above has a purpose of use in increasing luminous efficiency. In addition, a buffer layer can be formed as a selective layer between the positive electrode (ITO) and the light emitting layer. The buffer layer can be divided into an electron buffer layer that buffers electrons and a hole buffer layer that buffers holes.

  The electron buffer layer can be selectively formed between the negative electrode (metal) and the electron injection layer (EIL), and can be formed instead of the electron injection layer (EIL) function. At this time, the laminated structure of the organic layer can be light emitting layer (EML) / electron transport layer (ETL) / electron buffer layer / negative electrode (metal). The hole buffer layer can be selectively formed between the positive electrode (ITO) and the hole injection layer (HIL), and can be formed instead of the hole injection layer (HIL) function. . At this time, the stacked structure of the organic layer can be positive electrode (ITO) / hole buffer layer / hole transport layer (HTL) / light emitting layer (EML).

  A possible laminated structure for the above structure is described as follows.

(A) Normal stack structure (Normal Stack Structure)
(1) Positive electrode / hole injection layer / hole transport layer / light emitting layer / electron transport layer / electron injection layer / negative electrode,
(2) positive electrode / hole buffer layer / hole injection layer / hole transport layer / light emitting layer / electron transport layer / electron injection layer / negative electrode,
(3) positive electrode / hole injection layer / hole transport layer / light emitting layer / electron transport layer / electron injection layer / electron buffer layer / negative electrode,
(4) Positive electrode / hole buffer layer / hole injection layer / hole transport layer / light emitting layer / electron transport layer / electron injection layer / electron buffer layer / negative electrode,
(5) Positive electrode / hole injection layer / hole buffer layer / hole transport layer / light emitting layer / electron transport layer / electron injection layer / negative electrode,
(6) Positive electrode / hole injection layer / hole transport layer / light emitting layer / electron transport layer / electron buffer layer / electron injection layer / negative electrode.

(B) Normal Slim Structure
(1) Positive electrode / hole injection transport layer / light emitting layer / electron transport layer / electron injection layer / negative electrode,
(2) Positive electrode / hole buffer layer / hole injection transport layer / light emitting layer / electron transport layer / electron injection layer / negative electrode,
(3) Positive electrode / hole injection layer / hole transport layer / light emitting layer / electron injection transport layer / electron buffer layer / negative electrode,
(4) Positive electrode / Hole buffer layer / Hole transport layer / Light emitting layer / Electron injection / transport layer / Electron buffer layer / Negative electrode,
(5) positive electrode / hole injection transport layer / hole buffer layer / light emitting layer / electron transport layer / electron injection layer / negative electrode,
(6) Positive electrode / hole injection layer / hole transport layer / light emitting layer / electron buffer layer / electron injection transport layer / negative electrode.

(C) Inverted stack structure (Inverted Stack Structure)
(1) negative electrode / electron injection layer / electron transport layer / light emitting layer / hole transport layer / hole injection layer / positive electrode,
(2) negative electrode / electron injection layer / electron transport layer / light emitting layer / hole transport layer / hole injection layer / hole buffer layer / positive electrode,
(3) negative electrode / electron buffer layer / electron injection layer / electron transport layer / light emitting layer / hole transport layer / hole injection layer / positive electrode,
(4) negative electrode / electron buffer layer / electron injection layer / electron transport layer / light emitting layer / hole transport layer / hole buffer layer / positive electrode,
(5) negative electrode / electron injection layer / electron transport layer / light emitting layer / hole transport layer / hole buffer layer / hole injection layer / positive electrode,
(6) Negative electrode / electron injection layer / electron buffer layer / electron transport layer / light emitting layer / hole transport layer / hole injection layer / positive electrode.

(D) Inverted Slim Structure
(1) negative electrode / electron injection layer / electron transport layer / light emitting layer / hole injection transport layer / positive electrode,
(2) negative electrode / electron injection layer / electron transport layer / light emitting layer / hole injection transport layer / hole buffer layer / positive electrode,
(3) negative electrode / electron buffer layer / electron injection transport layer / light emitting layer / hole transport layer / hole injection layer / positive electrode,
(4) negative electrode / electron buffer layer / electron injection transport layer / light emitting layer / hole transport layer / hole buffer layer / positive electrode,
(5) negative electrode / electron injection layer / electron transport layer / light emitting layer / hole buffer layer / hole injection transport layer / positive electrode,
(6) Negative electrode / electron injection transport layer / electron buffer layer / light emitting layer / hole transport layer / hole injection layer / positive electrode.

  As a method for driving such an organic electroluminescent element, a passive matrix (active matrix) method and an active matrix (active matrix) method are known. In the passive matrix method, the positive electrode and the negative electrode are formed so as to be orthogonal to each other, and the line is selected and driven, so the manufacturing process is simple and the investment cost is low. There are many disadvantages. The active matrix method has the advantage that an active element such as a thin film transistor and a dose element are formed in each pixel, so that a current consumption amount is low, an image quality and a lifetime are excellent, and it can be expanded to a medium size. There is.

  As described above, the present invention is not limited to the above-described specific preferred embodiments, and based on the basic concept of the present invention claimed from the claims, those who have ordinary knowledge in the technical field, Various implementation variations are possible, and such variations are within the scope of the claims of the present invention.

1 is a schematic diagram of an organic light emitting display according to an embodiment of the present invention. It is the layout which showed A part of FIG. It is sectional drawing which cut | disconnected FIG. 2 along the II line. It is sectional drawing which cut | disconnected FIG. 2 along the II-II line. 1 is a diagram illustrating a path through which static electricity is discharged from an organic light emitting display according to an embodiment of the present invention. 3 is a flowchart sequentially illustrating a method of manufacturing an organic light emitting display according to an embodiment of the present invention. FIG. 7 is a diagram illustrating an organic light emitting display device formed according to the steps of FIG. 6. FIG. 7 is a diagram illustrating an organic light emitting display device formed according to the steps of FIG. 6. FIG. 7 is a diagram illustrating an organic light emitting display device formed according to the steps of FIG. 6. FIG. 7 is a diagram illustrating an organic light emitting display device formed according to the steps of FIG. 6. FIG. 7 is a diagram illustrating an organic light emitting display device formed according to the steps of FIG. 6. FIG. 7 is a diagram illustrating an organic light emitting display device formed according to the steps of FIG. 6. 1 is a diagram illustrating a pixel region and a non-pixel region of an organic light emitting display device manufactured according to an embodiment of the present invention. FIG. 6 is a schematic diagram of an organic light emitting display device according to another embodiment of the present invention.

Explanation of symbols

100, 200 Organic electroluminescent display device 110, 210 Substrate 110a, 210a Pixel region 110b, 210b Non-pixel region 120, 220 Electrostatic discharge circuit
120a buffer layer 120b semiconductor layer 120c gate insulating film 120d gate electrode 120e interlayer insulating film 120f source / drain electrode
130 Data Driver 140 Scan Driver 150 Light Emission Control Driver 160, 260 Pad 160a Ground Pad

Claims (21)

A substrate including a pixel region and a non-pixel region;
An electrostatic discharge circuit formed in the non-pixel region of the substrate,
The non-pixel region further includes at least one driving unit for driving pixels in the pixel region, and a pad unit for electrically connecting the pixel and the driving unit to an external module,
The electrostatic discharge circuit is formed on at least one side selected from the rest excluding the area of the pad portion formed on at least one side of the inner periphery of the substrate,
Further, the electrostatic discharge circuit is formed so as to cover the semiconductor layer formed on the substrate, the gate insulating film formed on the semiconductor layer, the gate electrode formed on the gate insulating film, and the gate electrode. An organic light emitting display device comprising: an interlayer insulating film formed on the substrate; and a source / drain electrode formed on the interlayer insulating film . The organic light emitting display as claimed in claim 1 , wherein the source / drain electrodes are spaced apart from the gate electrode by a distance of 1m to 10m in the horizontal direction.   The organic light emitting display as claimed in claim 1, wherein the electrostatic discharge circuit is independently formed on each side of the inner periphery of the substrate.   The organic light emitting display as claimed in claim 1, wherein the electrostatic discharge circuit is integrally formed so as to surround an inner periphery of the substrate.   The organic light emitting display as claimed in claim 1, wherein the gate electrode is electrically connected to a ground pad formed on the pad portion. The organic light emitting display as claimed in claim 1 , wherein the electrostatic discharge circuit further includes a buffer layer formed between the substrate and the semiconductor layer. The organic light emitting display as claimed in claim 1 , wherein the electrostatic discharge circuit further includes a protective layer formed on an upper surface of the source / drain electrode. The organic light emitting display as claimed in claim 1 , wherein the electrostatic discharge circuit includes a conductive contact for electrically connecting the source / drain electrode and the semiconductor layer. The organic light emitting display as claimed in claim 7 , wherein the electrostatic discharge circuit further includes an electrode layer formed on an upper surface of the protective layer. The organic light emitting display as claimed in claim 9 , wherein the electrode layer is electrically connected to the source / drain electrode through a conductive via hole. Providing a substrate having a pixel region and a non-pixel region;
Forming a semiconductor layer in the pixel region and the non-pixel region;
Forming a gate insulating film in the semiconductor layer of the pixel region and the non-pixel region;
Forming a gate electrode in the gate insulating film of the pixel region and the non-pixel region;
Forming an interlayer insulating film covering the gate electrode of the pixel region and the non-pixel region;
Forming a source / drain electrode in an interlayer insulating film of the pixel region and the non-pixel region, and
At least one thin film transistor is formed in the pixel region,
In the non-pixel region, an electrostatic discharge circuit is formed,
The non-pixel region further includes at least one driving unit for driving the pixels in the pixel region, and a pad unit for electrically connecting the pixel and the driving unit to an external module,
The organic discharge circuit according to claim 1, wherein the electrostatic discharge circuit is formed on at least one side selected from the remaining areas excluding the pad region formed on at least one side of the inner periphery of the substrate. A method for manufacturing an electroluminescent display device. 12. The method of manufacturing an organic light emitting display device according to claim 11 , wherein the electrostatic discharge circuit is formed on the same layer as the thin film transistor. 12. The organic electroluminescence according to claim 11 , wherein the source / drain electrodes in the non-pixel region are formed to be separated from the gate electrode in the non-pixel region by a distance of 1 μm to 10 μm in the horizontal direction. Manufacturing method of display device. 12. The method of manufacturing an organic light emitting display device according to claim 11 , wherein the electrostatic discharge circuit is independently formed on each side of the inner periphery of the substrate. The method of manufacturing an organic light emitting display device according to claim 11 , wherein the electrostatic discharge circuit is integrally formed so as to surround an inner periphery of the substrate. The method of claim 11 , wherein the gate electrode is electrically connected to a ground pad formed on the pad portion. The method of claim 11 , wherein the electrostatic discharge circuit further includes a step of forming a buffer layer between the substrate and the semiconductor layer. The method of claim 11 , wherein the electrostatic discharge circuit further includes a step of forming a protective layer on the upper surface of the source / drain electrode. 12. The method of claim 11 , wherein the electrostatic discharge circuit includes a conductive contact for electrically connecting the source / drain electrode and the semiconductor layer. The method of claim 18 , wherein the electrostatic discharge circuit further includes a step of forming an electrode layer on the upper surface of the protective layer. 21. The method of claim 20 , wherein the electrode layer is electrically connected to the source / drain electrode through a conductive via hole.

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