JP4705724B2 - Auto zero correction circuit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an auto-zero compensation circuit for eliminating the influence of the circuit offset voltage, such as A / D converter to input alternating with more measured voltage and the ground voltage to the FET switch.
[0002]
[Prior art]
In an electric measuring device that performs A / D conversion on a signal under measurement and performs a digital process, the specific offset component generated from the A / D converter affects the measurement accuracy, particularly when the signal under measurement is very small. It will be.
[0003]
Therefore, auto calibration is performed in which the measured voltage and the ground voltage (earth voltage) are alternately input and the zero level of the measured voltage is automatically calibrated. It is shown in 2.
[0004]
According to this, the voltage to be measured Vm is applied to the amplifier circuit 2 via the input filter circuit 1 composed of the resistor R and the capacitor C. In this case, the input terminal side of the amplifier circuit 2 is alternately turned on / off. A switch circuit 3 having two switches 3a and 3b is provided.
[0005]
That is, one switch 3a is connected to the input filter circuit 1 side, and the other switch 3b is connected to the ground terminal side. When these switches 3a and 3b are alternately turned on and off, the amplifier circuit 2 is covered. The measurement voltage Vm and the ground voltage Ve are input alternately. The voltages Vm and Ve amplified by the amplifier circuit 2 are digitally converted by the next-stage A / D conversion circuit 4 and then applied to the CPU 5 as control means.
[0006]
The CPU 5 periodically outputs a switching signal to the switch circuit 3, and subtracts the ground voltage Ve from the voltage to be measured Vm and outputs it to a display device (not shown). Thereby, the influence of the circuit offset voltage generated from the A / D conversion circuit or the like is removed from the measured value.
[0007]
By the way, in order to increase the reliability of the measured value, the switch circuit 3 is switched and controlled at a high speed. Therefore, a mechanical contact type such as a relay switch is not suitable, and a semiconductor switch such as an FET is actually used. With reference to FIG. 3, the switch circuit 30 which consists of FET as the example is demonstrated.
[0008]
The switch circuit 30 includes two FETs, an N-channel FET 310 and a P-channel FET 320, which are complementarily connected as switch elements. The source terminal of the N-channel FET 310 is connected to the input filter circuit 1 side, and its drain terminal is connected to the non-inverting terminal of the amplifier circuit 2.
[0009]
On the other hand, the source terminal of the P-channel FET 320 is grounded, and its drain terminal is connected to the non-inverting terminal of the amplifier circuit 2 in the same manner as the drain terminal of the N-channel FET 310.
[0010]
Further, between the gates and the sources of the FETs 310 and 320, discharging resistors 312 and 322 are connected for discharging charges stored between the gates and the sources when the FETs 310 and 320 are turned off.
[0011]
In this connection, the gate terminal of the N-channel FET 310 is connected to the switch switching signal output port 501 of the CPU 5 via the first diode 311, and the gate terminal of the P-channel FET 320 is also connected via the second diode 321. It is connected to the switch switching signal output port 501 of the CPU 5.
[0012]
The first diode 311 has an anode on the gate terminal side and a cathode on the switch switching signal output port 501 side, whereas the second diode 321 has a cathode on the gate terminal side and an anode on the switch switching signal output port. 501 side.
[0013]
Here, as shown in FIG. 3, a switch switching signal that alternately repeats H (measurement) and L (calibration) is output from the CPU 5 to the switch switching signal output port 501 (point A). To do.
[0014]
In this example, the measured voltage Vm is in the range of + 2V to −2V, whereas the H voltage is set to + 10V, the L voltage is set to −10V, and the resistance R of the input filter circuit 1 is set. The resistance value is extremely small.
[0015]
First, when the switch switching signal at the point A is “L”, a current flows from the point B on the input filter circuit 1 side to the point A side through the discharging resistor 312 and the first diode 311, and at that time, the discharging resistor 312. Since the gate potential becomes lower than the source potential due to the voltage drop generated in the N-channel FET 310, the N-channel FET 310 is turned off.
[0016]
At this time, on the P channel FET 320 side, the gate potential becomes lower than the source potential and is turned on, whereby the ground voltage (earth voltage) Ve is input from the P channel FET 320 side to the non-inverting input terminal of the amplifier circuit 2.
[0017]
Next, when the switch switching signal at point A turns to “H”, the P channel FET 320 is turned off because the gate potential is higher than the source potential on the P channel FET 320 side.
[0018]
At this time, on the N channel FET 310 side, the flow of current from the B point to the A point side stops, and as a result, the gate potential and the source potential become the same potential, and the N channel FET 310 is turned on. As a result, the measured voltage Vm is input from the input filter circuit 1 side to the non-inverting input terminal of the amplifier circuit 2.
[0019]
In this way, the voltage to be measured Vm and the ground voltage Ve are alternately input to the amplifier circuit 2, and the FET 320 is also used for the switch element on the ground voltage input side, so that the leakage current is suppressed to 1 pA or less. be able to.
[0020]
[Problems to be solved by the invention]
However, since the current flows from the point B through the discharging resistor 312 and the first diode 311 to the point A side when the N-channel FET 310 is turned off, the potential at the point B varies.
[0021]
Therefore, another problem arises that the measurement operation cannot be started until the potential at the point B is stabilized after the N-channel FET 310 is turned on. For reference, voltage waveforms appearing at points A, B, and C are shown in FIG. Point C is the voltage on the input terminal side of the amplifier circuit 2.
[0022]
The potential fluctuation at the point B is because the input filter circuit 1 includes the capacitor C, but this RC filter is indispensable for improving the S / N ratio, and is omitted. Is not preferred.
[0023]
The present invention has been made to solve the above problem, purpose of that is, upon entering the input from the ground voltage to the measurement mode is switched to the measured voltage, the period to stabilize the potential of the input filter circuit side It is an object of the present invention to provide an auto-zero correction circuit having a switch circuit (FET switch) that does not need to be provided.
[0025]
[Means for Solving the Problems]
To achieve the above Symbol purpose, the auto-zero compensation circuit of the present invention, the input switching to be given to the amplifier circuit is switched alternately and the measured voltage a ground voltage inputted through an input filter circuit including a resistor and a capacitor Switch circuit, A / D conversion circuit for digitally converting the output of the amplifier circuit, and switching control of the switch circuit, and subtracting the ground voltage from the measured voltage after the A / D conversion to offset Control means for removing a voltage component, and the switch circuit includes three FETs of two N-channel FETs and one P-channel FET as switch elements, and the two N-channel FETs are connected to each other between their source terminals and Gate terminals are connected, one drain terminal is a predetermined input terminal of the amplifier circuit, and the other drain terminal is the input The first resistor for discharging is connected between the source terminal and the gate terminal, and the P-channel FET is grounded at the source terminal and connected between the source terminal and the gate terminal. Is connected to a second discharge resistor, and has a drain terminal connected to a predetermined input terminal of the amplifier circuit. Each gate terminal on the N-channel FET side has an anode on the gate terminal side. The gate terminal on the P channel FET side is connected to the switch switching signal output port of the control means via a second diode whose cathode is the gate terminal side through one diode, and further the N channel FET A DC power supply of a predetermined voltage is connected to the source side via a third diode whose cathode is the source side. It is characterized in.
[0026]
The two N-channel FETs are the measured voltage input side switch elements and the one P-channel FET is the ground voltage input side switch element. An FET may be used, and the ground voltage input side switch element may be a single N-channel FET.
[0027]
In this case, however, the first and second diodes are connected in opposite directions, and the on / off states of the switching elements due to H and L appearing at the switch switching signal output port are reversed. Become.
[0028]
In the auto-zero correction circuit of the present invention, the DC power supply is for stabilizing the source potential of the measured voltage input side switching element, but in order to prevent the voltage from being superimposed on the measured voltage, the DC power supply Is preferably set to a voltage lower than the voltage to be measured.
[0029]
DETAILED DESCRIPTION OF THE INVENTION
Next, an embodiment of an auto zero correction circuit to which the FET switch of the present invention is applied will be described with reference to FIG. In this embodiment, components that may be regarded as the same as or the same as those of the conventional example described above with reference to FIG. 3 are denoted by the same reference numerals.
[0030]
In this embodiment, the switch circuit is indicated by reference numeral 30A. This switch circuit 30A includes the components of the switch circuit 30 provided in the conventional example described above with reference to FIG. 3. However, in addition to the N-channel FET 310, another N-channel is used as a switch element to be measured voltage input side. An FET 313 is added.
[0031]
That is, the measured voltage input side switching element is composed of two N-channel FETs 310 and 313, and their source terminals are connected to each other, and gate terminals are also connected to each other. One drain terminal is connected to the non-inverting terminal of the amplifier 2, and the other drain terminal is connected to the input filter circuit 1.
[0032]
A discharge resistor 312 is connected between the source terminal and the gate terminal of each of the N-channel FETs 310 and 313, and each of these gate terminals is connected to the switch switching signal output port 501 of the CPU 5 via the first diode 311.
[0033]
A DC voltage source 314 is connected to the source terminals of the N-channel FETs 310 and 313 via a third diode 315. The direction of the third diode 315 is such that its cathode is on the source terminal side and its anode is on the DC voltage source 314 side.
[0034]
The DC voltage source 314 is a power source for stabilizing the source potential when each N-channel FET 310, 313 is in the OFF state, and the voltage Vp is set lower than the voltage to be measured Vm (Vm> Vp).
[0035]
Other configurations such as the switch switching signal output from the P-channel FET 320 on the ground voltage input side and the CPU 5 to the switch switching signal output port 501 (point A) are the same as those in the conventional example.
[0036]
Next, the operation will be described. First, when the switch switching signal of the switch switching signal output port 501 at point A is “L (−10 V)”, the DC voltage source 314 passes through the third diode 315, the discharging resistor 312 and the first diode 311 to A current flows through the point, and the gate potential becomes lower than the source potential due to a voltage drop generated at the discharging resistor 312 at that time, so that both the N-channel FETs 310 and 313 are turned off.
[0037]
At this time, on the P channel FET 320 side, the gate potential becomes lower than the source potential and is turned on, whereby the ground voltage (earth voltage) Ve is input from the P channel FET 320 side to the non-inverting input terminal of the amplifier circuit 2.
[0038]
Next, when the switch switching signal at point A turns to “H (+10 V)”, on the P-channel FET 320 side, the gate potential becomes higher than the source potential, so the P-channel FET 320 is turned off.
[0039]
At this time, on the N channel FETs 310 and 313 side, the flow of current from the DC voltage source 314 to the point A side stops, and as a result, the gate potential and the source potential become the same potential, and both the N channel FETs 310 and 313 are turned on. It becomes.
[0040]
As a result, the measured voltage Vm is input from the input filter circuit 1 side to the non-inverting input terminal of the amplifier circuit 2. In this case, since Vm> Vp, there is no possibility that the voltage Vp of the DC voltage source 314 enters the measurement system.
[0041]
As described above, according to the present invention, by inserting another N-channel FET 313 between the N-channel FET 310 and the input filter circuit 1, when the N-channel FETs 310 and 313 are off, the input filter circuit 1 side No current flows from point B.
[0042]
Therefore, the potential at the point B is stable, and it is not necessary to set a period for stabilizing the potential on the input filter circuit 1 side when the switch switching signal is set to “H” and the measurement mode is entered from the calibration mode.
[0043]
As another embodiment of the present invention, two switch elements on the measured voltage input side may be P-channel FETs, and one switch element on the ground voltage input side may be an N-channel FET.
[0044]
In this case, however, the directions of the first to third diodes in the above embodiment are all reversed, and when the switch switching signal at point A is “H”, the switch element on the measured voltage input side is off. When the switch element on the ground voltage input side is turned on and the switch switching signal at point A is “L”, the switch element on the measured voltage input side is turned on and the switch element on the ground voltage input side is turned off.
[0047]
【The invention's effect】
As described above , according to the present invention, an input switching circuit that alternately switches a measured voltage and a ground voltage that are input via an input filter circuit composed of a resistor and a capacitor and supplies the voltage to the amplifier circuit; An A / D conversion circuit for digitally converting the output of the amplifier circuit; and control means for controlling the switching of the switch circuit by the control means, and from the measured voltage after the A / D conversion to the ground voltage. In the auto-zero correction circuit that subtracts the offset voltage and removes the offset voltage, when the input is switched from the ground voltage to the voltage to be measured and the measurement mode is entered, it is not necessary to set a period for stabilizing the potential on the input filter circuit side.
[Brief description of the drawings]
FIG. 1 is a circuit diagram showing an embodiment of an auto-zero correction circuit including an FET switch according to the present invention.
FIG. 2 is a circuit diagram showing a basic configuration of an auto zero correction circuit.
FIG. 3 is a circuit diagram showing an auto-zero correction circuit having a conventional switch circuit.
FIG. 4 is a waveform diagram for explaining the operation of a conventional switch circuit.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Input filter circuit 2 Amplifying circuit 4 A / D conversion circuit 5 CPU (control means)
501 Switch switching signal output port 30A Switch circuit 310, 313 N-channel FET
311, 315, 321 Diodes 312, 322 Discharge resistor 314 DC power supply

Claims (3)

A switch circuit for switching an input to be supplied to an amplifier circuit by alternately switching a voltage to be measured and a ground voltage input via an input filter circuit composed of a resistor and a capacitor, and an A / D for digitally converting the output of the amplifier circuit Auto-zero correction that includes a conversion circuit and control means, controls the switch circuit by the control means, and subtracts the ground voltage from the measured voltage after the A / D conversion to remove the offset voltage component In the circuit
The switch circuit includes three FETs of two N-channel FETs and one P-channel FET as switch elements,
The two N-channel FETs have source terminals and gate terminals connected to each other, one drain terminal connected to a predetermined input terminal of the amplifier circuit, and the other drain terminal connected to the input filter circuit. A first discharge resistor is connected between the source terminal and the gate terminal,
The P-channel FET has a source terminal grounded, a second resistor for discharge connected between the source terminal and the gate terminal, and a drain terminal connected to a predetermined input terminal of the amplifier circuit,
Each gate terminal on the N channel FET side passes through a first diode whose anode is on the gate terminal side, and the gate terminal on the P channel FET side passes through a second diode whose cathode is on the gate terminal side. Connected to the switch switching signal output port of the control means,
Further, a DC power source having a predetermined voltage is connected to the source side of the N-channel FET via a third diode whose cathode is the source side. A switch circuit for switching an input to be supplied to an amplifier circuit by alternately switching a voltage to be measured and a ground voltage input via an input filter circuit composed of a resistor and a capacitor, and an A / D for digitally converting the output of the amplifier circuit Auto-zero correction that includes a conversion circuit and control means, controls the switch circuit by the control means, and subtracts the ground voltage from the measured voltage after the A / D conversion to remove the offset voltage component In the circuit
The switch circuit includes three FETs of two P-channel FETs and one N-channel FET as switch elements,
The two P-channel FETs have source terminals and gate terminals connected to each other, one drain terminal connected to a predetermined input terminal of the amplifier circuit, and the other drain terminal connected to the input filter circuit. A first discharge resistor is connected between the source terminal and the gate terminal,
The N-channel FET has a source terminal grounded, a second resistor for discharge connected between the source terminal and the gate terminal, and a drain terminal connected to a predetermined input terminal of the amplifier circuit,
Each gate terminal on the P-channel FET side passes through a first diode whose cathode is on the gate terminal side, and the gate terminal on the N-channel FET side passes through a second diode whose anode is on the gate terminal side. Connected to the switch switching signal output port of the control means,
Furthermore, a DC power source having a predetermined voltage is connected to the source side of the P-channel FET via a third diode whose cathode is the source side. Auto-zero compensation circuit according to claim 1 or 2 voltage of the DC power source is set to a voltage lower than the measured voltage.

Images