JP4684627B2 - Operational amplifier driving device, display device and electronic apparatus including the same, and operational amplifier driving method - Google Patents

Description

  The present invention relates to an operational amplifier driving device that supplies a power supply voltage to an operational amplifier that amplifies and outputs an input signal whose potential changes, a display device and an electronic device including the operational amplifier, and an operational amplifier driving method.

  The liquid crystal display device has an advantage that it is thin, lightweight and consumes little power. For this reason, it is widely used in image display devices such as TVs and monitors, OA (Office Automation) devices such as word processors and personal computers, video cameras, digital cameras, mobile phones and other information terminals. Yes.

  As one of these liquid crystal display devices, an active matrix liquid crystal display device having a plurality of pixels arranged in a matrix is known.

  In general, an active matrix liquid crystal display device includes a display unit having a large number of pixels arranged in a matrix, a data signal line driver and a scanning signal line driver for driving each pixel, and a large number of data signal lines and a scanning signal. With a line.

  Each pixel is composed of a switching element and a pixel capacitor, and is arranged in each of the matrix regions defined by the scanning signal lines and the data signal lines intersecting each other. The pixel capacity is composed of a liquid crystal capacity and an auxiliary capacity that is added as necessary. As the switching element, for example, a transistor is used, the gate is connected to the scanning signal line (gate line), the source is connected to the data signal line (source line), and the drain is connected to the pixel capacitor. The other electrode of the pixel capacitor is connected to a common electrode line that is common to all pixels, for example.

  When the scanning signal line is selected by the scanning signal line driver (gate driver), the switching element of the pixel connected to the selected scanning signal line is turned on, and the data signal line driver (source driver) supplies the data signal. The voltage applied to the line is applied to the pixel capacitance. On the other hand, while the scanning signal line selection period ends and the switching element is cut off, the pixel capacitor continues to hold the voltage at the cut-off. Here, the transmittance or reflectance of the liquid crystal changes depending on the voltage applied to the liquid crystal capacitance. Therefore, by selecting a scanning signal line and applying a voltage corresponding to the video signal to the data signal line, the display state of each pixel can be changed in accordance with the video signal. That is, the data signal line driver controls the voltage applied to each pixel by changing the output voltage to each data signal line (each pixel electrode) according to the display data, and an image based on the display data is displayed. Is done.

  A power supply circuit for applying a voltage corresponding to a video signal to a data signal line is disclosed in, for example, Patent Document 1 and Patent Document 2.

  By the way, generally, the data signal line driver is provided with an output buffer circuit (drive circuit, drive buffer circuit), and this output buffer circuit is connected to the data signal line. Also, an operational amplifier (operational amplifier, OPAMP) is often used for the output buffer circuit in order to output a voltage or current of an arbitrary magnitude.

  For example, a voltage follower operational amplifier as shown in FIG. 15 is used as an output buffer circuit of a data signal line driver. This operational amplifier outputs an output voltage equal to the input voltage, and amplifies and outputs the input current. The operational amplifier is supplied with a power supply voltage (drive voltage) having a high level (Hi) side potential of Vu + and a low level (Low) side potential of Vu−. The high level side potential Vu + and the low level side potential Vu− are constant values determined by the output characteristics of the operational amplifier.

  By providing such an operational amplifier, a predetermined amount of current can be supplied to the data signal line even when the pixel capacitance to be charged and the load on the data signal line are large. That is, even when the current input to the operational amplifier is small and the load on the output side is large, the necessary current amount can be obtained by amplifying and outputting the current input by the operational amplifier.

FIG. 16 is an explanatory diagram showing a relationship (output voltage characteristics) between a power supply voltage and an output voltage of a general operational amplifier. As shown in this figure, in general, in an operational amplifier, the output voltage is degraded on the high voltage side and the low voltage side with respect to the voltage range (the range in which the output characteristics are not degraded) A of the actually used output voltage. There is a voltage range (B and C). In other words, in the vicinity of the high-level potential Vu + and the low-level potential Vu− in the voltage range of the power supply voltage supplied to the operational amplifier, the output characteristics deteriorate and a necessary output voltage cannot be obtained. In the case of a voltage follower operational amplifier as shown in FIG. 15, “input voltage = output voltage” is obtained in the voltage range A of FIG. 16, but on both sides (high level side and low level side). In the voltage ranges B and C, “input voltage ≠ output voltage”.
International Publication No. 96/02865 Pamphlet (Release Date: February 1, 1996) Japanese Patent Laid-Open No. 10-104569 (Publication date: April 24, 1998)

  As described above, the range of the output voltage from the operational amplifier depends on the voltage range of the power supply voltage input to the operational amplifier. For this reason, conventionally, a power supply voltage that covers the entire output voltage range is supplied to the operational amplifier.

  For example, when an operational amplifier is used as an output buffer of a data signal line driver of a liquid crystal display device, the input voltage to the operational amplifier changes dynamically (changes along the time axis), but conventionally, the voltage range of the input voltage Supply voltage that covers the whole.

  For this reason, the conventional operational amplifier has a problem of high power consumption. That is, conventionally, even when the input voltage changes, a constant voltage that covers the entire change range of the input voltage is supplied as the driving power supply (power supply voltage) for the operational amplifier. When the difference from the output voltage is large, wasteful power is consumed.

  The present invention has been made in view of the above-described conventional problems, and an object thereof is to reduce power consumption of an operational amplifier and a device including the operational amplifier.

  In order to solve the above-described problem, the operational amplifier circuit driving apparatus of the present invention is supplied with an input signal whose potential changes and supplies a power supply voltage of an operational amplifier that amplifies and outputs the input signal. The operational amplifier driving device is characterized in that a power supply voltage supplied to the operational amplifier is changed in accordance with a change in potential of the input signal. Here, the operational amplifier may amplify the current of the input signal or may amplify the current.

  According to the above configuration, the power supply voltage supplied to the operational amplifier is changed in accordance with the change in the potential of the input signal input to the operational amplifier circuit. As a result, the power consumption of the operational amplifier can be reduced as compared with the conventional case of supplying a power supply voltage that covers the entire output voltage range of the operational amplifier.

  Further, the difference between the high-level side potential and the low-level side potential of the power supply voltage and the potential of the output signal of the operational amplifier is greater than the magnitude necessary for the operational amplifier to obtain predetermined output characteristics, respectively. Thus, it is preferable to change the power supply voltage.

  According to the above configuration, even when the power supply voltage is changed, the difference between the high-level potential and the potential of the output signal of the operational amplifier, and the low-level potential and the potential of the output signal of the operational amplifier. Is set to such a size that the operational amplifier can obtain a predetermined output characteristic. That is, according to the above configuration, the output voltage of the operational amplifier is changed within a range in which the output characteristics of the operational amplifier do not deteriorate. Therefore, it is possible to drive the operational amplifier appropriately without degrading the output characteristics, and to reduce the power consumption of the operational amplifier.

  Further, the high-level potential of the power supply voltage is lower than the potential necessary for the operational amplifier to obtain a predetermined output characteristic with respect to the maximum value of the potential of the output signal of the operational amplifier, and the low level of the power supply voltage It is preferable to change the power supply voltage within a range in which the side potential is equal to or higher than a potential necessary for the operational amplifier to obtain predetermined output characteristics with respect to the minimum value of the potential of the output signal of the operational amplifier.

  Conventional operational amplifier driving devices provide a high level potential and a low level potential of the power supply voltage at constant potentials so that predetermined output characteristics can be obtained over the entire potential change range of the output signal of the operational amplifier. It was. That is, the high-level side potential of the power supply voltage is set to a potential necessary for the operational amplifier to obtain predetermined output characteristics with respect to the maximum value of the potential of the output signal of the operational amplifier, and the low-level side of the power supply voltage The potential is set to a potential necessary for the operational amplifier to obtain a predetermined output characteristic with respect to the minimum value of the potential of the output signal of the operational amplifier.

  On the other hand, according to the above configuration, the power supply voltage supplied to the operational amplifier is made smaller than the power supply voltage supplied to the conventional operational amplifier in accordance with the change in the potential of the output signal of the operational amplifier. To change. Therefore, power consumption can be reduced as compared with the conventional case of supplying a power supply voltage that covers the entire potential change range of the output signal of the operational amplifier.

  Further, both the high level potential and the low level potential of the power supply voltage may be changed. In this case, the power consumption reduction effect can be further increased by appropriately changing the high level side potential and the low level side potential.

  Further, one of the high-level potential and the low-level potential of the power supply voltage may be changed, and the other potential may be set to a constant value. For example, the other potential may be a ground potential. According to the above configuration, the device configuration can be simplified because only one of the high-level potential and the low-level potential of the power supply voltage needs to be changed.

  Further, a voltage generation circuit that generates the power supply voltage may be provided. According to the above configuration, the voltage generation circuit generates the power supply voltage in response to a change in the potential of the input signal to the operational amplifier, and supplies the generated power supply voltage to the operational amplifier. Thereby, a power supply voltage can be changed appropriately.

  Further, the power supply voltage may be changed by selecting any one of a plurality of power supplies having different potentials so as to be switchable.

  According to the above configuration, the power supply voltage of the operational amplifier can be changed with a simple configuration. Note that a combination of the voltage generation circuit and a configuration in which any one of a plurality of power supplies is selectably switched may be used.

  In order to solve the above-described problem, the display device of the present invention receives an input signal whose potential changes, an operational amplifier that amplifies and outputs the input signal, and supplies a power supply voltage of the operational amplifier And any one of the operational amplifier driving devices described above.

  According to the above configuration, it is possible to reduce the power consumption of the operational amplifier as compared to the case of supplying a power supply voltage that covers the entire output voltage range of the operational amplifier as in the prior art. Therefore, power consumption of a display device including the operational amplifier can be reduced.

  The scanning signal lines, the plurality of data signal lines intersecting with the scanning signal lines, and the matrix signal regions defined by the scanning signal lines and the data signal lines are respectively arranged. An active matrix display device comprising a plurality of pixels, a scanning signal line driving circuit for controlling a signal supplied to the scanning signal line, and a data signal line driving circuit for controlling a signal supplied to the data signal line In this case, the signal amplified by the operational amplifier may be supplied to the data signal line.

  In an active matrix display device, the potential of the data signal usually changes in a plurality of stages. Therefore, as in the above configuration, the power supply voltage supplied to the operational amplifier that amplifies the data signal is changed in accordance with the change in the potential of the data signal input to the operational amplifier, thereby reducing the power consumption of the operational amplifier. And a display device with low power consumption can be realized.

  Note that the display device may drive each pixel by a dot sequential driving method. Here, the dot sequential driving method sequentially samples the video signals input to the data signal line driving circuit, and simultaneously connects each pixel connected to the scanning signal line in the selected state via each data signal line. Is a driving method for writing to the

  In such a dot sequential drive type display device, the video signal is usually amplified by an operational amplifier and supplied to each data signal line. Therefore, by changing the power supply voltage supplied to the operational amplifier in accordance with the change in the potential of the video signal input to the operational amplifier, the power consumption of the operational amplifier can be reduced, and a display device with low power consumption can be obtained. realizable.

  Further, the display device may drive each pixel by a source shared driving method. Here, the source shared driving (SSD) method refers to the above-described data from a plurality of video signal lines in one horizontal period of image display (a period in which each pixel connected to one scanning signal line is written). Each video signal input to the signal line drive circuit is divided into a larger number of data signal lines than the video signal lines, and each pixel connected to the selected scanning signal line for each data signal line corresponding to each video signal This is a driving method for writing to the disk.

  Such an SSD display device usually includes an operational amplifier for each video signal line, and amplifies each video signal. Therefore, by changing the power supply voltage supplied to each operational amplifier according to the change in the potential of the video signal input to each operational amplifier, the power consumption of each operational amplifier can be reduced, and the display device with low power consumption Can be realized.

  The display device may drive each pixel by a line sequential driving method. Here, the line-sequential driving method refers to one horizontal scanning period (connected to one scanning signal line after sampling the video signal input from the video signal line to the data signal line driving circuit for all the data signal lines. This is a driving method for simultaneously writing signals for each pixel) connected to the scanning signal line in the selected state. That is, in this driving method, when a write operation is performed on each pixel connected to the selected scan line, sampling of the data signal to each pixel connected to the next scan signal line is performed. Is called.

  Such a line-sequential drive display device includes an operational amplifier for each data signal line, and amplifies a signal supplied to each data signal line. Therefore, by changing the power supply voltage supplied to each operational amplifier according to the change in the potential of the video signal input to each operational amplifier, the power consumption of each operational amplifier can be reduced, and the display device with low power consumption Can be realized.

  The pixels, the scanning signal line drive circuit, and the data signal line drive circuit may be formed on the same substrate. That is, the display device may include a monolithic panel in which each pixel, the scanning signal line driving circuit, and the data signal line driving circuit are formed on the same substrate.

  In this case, each pixel may include a switching element made of continuous crystal grain boundary silicon formed on the substrate. That is, each pixel including a switching element made of continuous grain boundary crystal silicon (CGS), the scanning signal line driving circuit, and the data signal line driving circuit are formed on the same substrate. The display device may include a CGS monolithic panel.

  Further, the power supply voltage control unit may be configured to generate power supply voltage setting data for the operational amplifier based on image data to be displayed, and to output the generated power supply voltage setting data to the drive device for the operational amplifier. Good.

  According to the above configuration, the power supply voltage setting data of the operational amplifier can be generated based on the image data to be displayed. Therefore, the power supply voltage of the operational amplifier can be appropriately controlled, and the power consumption is effectively reduced. it can.

  In this case, a video signal generating means for converting the data of the image to be displayed from digital data to analog data and outputting it to the operational amplifier is provided, and the power supply voltage control unit is based on the digital data of the image to be displayed. The power supply voltage setting data for the operational amplifier may be generated.

  Alternatively, video signal generation means for converting image data to be displayed from digital data to analog data and outputting it to the operational amplifier, and analog-digital conversion for converting the analog data to digital data and outputting the digital data to the power supply voltage control unit And the power supply voltage control unit may generate power supply voltage setting data for the operational amplifier based on digital data input from the analog-digital conversion means.

  In the case of this configuration, the power supply voltage of the operational amplifier can be adjusted including the voltage error generated during the conversion from digital data to analog data (DA conversion). That is, in general, even if the digital data is the same, there is a slight error in the voltage output after the DA conversion. However, according to the above configuration, the power supply voltage is precisely included including the error generated during the DA conversion. Can be controlled. Therefore, by reducing the difference between the power supply voltage of the operational amplifier and the output voltage of the operational amplifier, power consumption can be reduced and the operational amplifier can be driven appropriately.

  In addition, the image signal generation means for converting the data of the image to be displayed from digital data to analog data and output to the operational amplifier, and a voltage calculation circuit including an operational amplifier capable of calculating an analog voltage, the voltage The arithmetic circuit may be configured to generate a power supply voltage setting value for the operational amplifier based on analog data output from the video signal generating means. According to the above configuration, the power supply voltage of the operational amplifier can be controlled with a simple configuration.

  In addition to the above-described configuration, a power supply voltage control unit that generates power supply voltage setting data for the operational amplifier based on the digital data of the image to be displayed may be further provided. According to the above configuration, the operational amplifier drive circuit is configured to use the operational amplifier power supply voltage setting value generated by the voltage operational circuit and the operational amplifier power supply voltage setting data generated by the power supply voltage control unit. Adjustments can be made.

  In order to solve the above problems, an electronic device of the present invention receives an input signal whose potential changes, inputs an operational amplifier that amplifies and outputs the input signal, and supplies a power supply voltage of the operational amplifier And any one of the operational amplifier driving devices described above.

  According to the above configuration, it is possible to reduce the power consumption of the operational amplifier as compared to the case of supplying a power supply voltage that covers the entire output voltage range of the operational amplifier as in the prior art. Therefore, it is possible to reduce the power consumption of the electronic device including the operational amplifier.

  In order to solve the above-described problem, the operational amplifier driving method of the present invention is supplied with an input signal whose potential changes, and supplies a power supply voltage of the operational amplifier that amplifies and outputs the input signal. An operational amplifier driving method is characterized in that a power supply voltage supplied to the operational amplifier is changed in accordance with a change in potential of the input signal.

  According to the above driving method, the power supply voltage supplied to the operational amplifier is changed in accordance with the change in the potential of the input signal input to the operational amplifier circuit. As a result, the power consumption of the operational amplifier can be reduced as compared with the conventional case of supplying a power supply voltage that covers the entire output voltage range of the operational amplifier.

  As described above, the operational amplifier circuit driving apparatus of the present invention changes the power supply voltage supplied to the operational amplifier in accordance with the change in the potential of the input signal to the operational amplifier.

  Therefore, the power consumption of the operational amplifier can be reduced as compared with the conventional case where the power supply voltage covering the entire output voltage range of the operational amplifier is supplied.

  The display device of the present invention and the electronic device of the present invention are provided with an operational amplifier that receives an input signal whose potential changes, amplifies and outputs the input signal, and supplies a power supply voltage of the operational amplifier. And an operational amplifier driving device. Therefore, a display device or an electronic device with low power consumption can be provided.

  According to the driving method of the operational amplifier circuit of the present invention, the power supply voltage supplied to the operational amplifier is changed in accordance with the change in the potential of the input signal to the operational amplifier.

  Therefore, the power consumption of the operational amplifier can be reduced as compared with the conventional case where the power supply voltage covering the entire output voltage range of the operational amplifier is supplied.

  A buffer driving circuit (operational amplifier driving circuit) and a display device according to an embodiment of the present invention will be described with reference to the drawings. FIG. 2 is a block diagram illustrating a schematic configuration of the liquid crystal display device 100 which is the display device according to the present embodiment. As shown in this figure, the buffer drive circuit 54 according to the present embodiment is provided in the liquid crystal display device 100.

(Liquid crystal display device 100)
First, the configuration of the liquid crystal display device 100 will be described. As shown in FIG. 2, the liquid crystal display device 100 includes a control signal generation circuit 1, a data signal generation circuit 2, a gate driver (scanning signal line driving circuit) 4, a source driver (data signal line driving circuit) 5, and a buffer power supply control. The circuit 6 includes n scanning signal lines (gate lines) GL1 to GLn, m data signal lines (source lines) SL1 to SLm, and a large number of pixels PIX. Each pixel PIX is arranged in each of a matrix area defined by the scanning signal lines GL1 to GLn and the data signal lines SL1 to SLm.

  The peripheral circuit including each pixel PIX and the gate driver 4 and the source driver 5 is a monolithic circuit formed monolithically on the same substrate (substrate 3) in order to reduce manufacturing labor and wiring capacity. is there. Further, a transistor TR (see FIG. 5 described later) as a switching element provided in each pixel PIX is made of CGS (Continuous Grain Silicon) formed on the substrate. In other words, the liquid crystal display device 100 includes a CGS monolithic liquid crystal panel (CGS full) in which a gate driver 4 and a source driver 5 and a large number of pixels including transistors made of CGS are formed on the same substrate (substrate 3). Monolithic LCD panel).

  The control signal generation circuit 1 supplies the gate driver 4 and the source driver 5 with various signals necessary for display on each pixel PIX. That is, the control signal generation circuit 1 supplies the gate driver 4 with the clock signal GCK, the start pulse GSP, and the enable signal GEN, and supplies the source driver 5 with the start pulse SP and the clock signal CK.

  The data signal generation circuit 2 generates a video signal DAT corresponding to a video signal (video data) to be displayed on each pixel PIX and supplies it to the source driver 5. That is, the data signal generation circuit 2 generates digital data (video digital data) of a video to be displayed, performs DA (digital analog) conversion, and supplies it to the buffer circuit 54 in the source driver 5. Further, when the digital data for video is determined, the data signal generation circuit 2 outputs the digital data to the buffer power supply driving circuit 6.

  The buffer power supply control circuit 6 calculates the power supply voltage (power supply voltage setting data) of the buffer circuit 53 provided in the source driver 5 based on the video digital data input from the data signal generation circuit 2. The details of the power supply voltage of the buffer circuit 53 will be described later.

  The gate driver 4 sends n scanning signal lines GL1 to GL1 at different timings according to signals (start pulse GSPP, clock signal GCK, enable signal GEN) input from the control signal generation circuit 1. Output to GLn in a timely manner.

  The source driver 5 includes a sampling switch control circuit 51, a sampling circuit 52, a buffer circuit 53, and a buffer driving circuit 54. FIG. 3 is a block diagram showing a schematic configuration of the source driver 5.

  As shown in the figure, the buffer circuit 53 is composed of a voltage follower operational amplifier (operational amplifier) AMP. The video signal DAT output from the data signal generation circuit 2 is input to the positive input terminal + of the operational amplifier AMP. The output signal of the operational amplifier AMP is output to the negative input terminal − of the operational amplifier AMP itself and to each of the sampling switches SW1 to SWm.

  The operational amplifier AMP supplies a signal that is the same voltage as the input voltage (the voltage of the video signal DAT output from the data signal generation circuit 2) and an amplified input current to the sampling circuit 52 (each sampling switch SW1 to SWm). Output. Thereby, even when the load of the pixel PIX and the data signal line SL to be charged is large, a predetermined amount of current can be supplied. That is, even when the input current is small and the load on the output side is large, the input current can be amplified by the operational amplifier AMP and output to obtain a current amount necessary for display.

  The power supply voltage (drive voltage) of the operational amplifier AMP is supplied from the buffer drive circuit 54. That is, the operational amplifier AMP is supplied from the buffer drive circuit 54 with a power supply voltage (drive voltage) having a high level (Hi) side potential of V + and a low level (Low) side potential of V−.

  The buffer drive circuit (op-amp drive circuit) 54 generates a power supply voltage (drive voltage) for the buffer circuit 53 (op-amp AMP). Although details will be described later, the buffer drive circuit 54 changes the drive voltage of the buffer circuit 53 in accordance with voltage setting data (digital data, power supply voltage setting data) input from the buffer power supply control circuit 6.

  The sampling circuit 52 includes m sampling switches SW1 to SWm, and the sampling switches SW1 to SWm are connected to the data signal lines SL1, SL2,. The sampling switches SW1 to SWm are controlled to be turned on / off based on the output signal of the sampling switch control circuit 51.

  The sampling switch control circuit 51 generates timing signals S1 to Sm for sampling the video signal DAT by turning on / off the sampling switches SW1 to SWm based on the clock signal CK and the start pulse SP.

  FIG. 4 shows the relationship between the voltage (input voltage) of the video signal DAT input to the operational amplifier AMP, the timing signal supplied from the sampling switch control circuit 51 to each sampling switch, and the voltage supplied to each data signal line. It is a timing chart which shows.

  As shown in this figure, the sampling switch control circuit 51 sequentially switches the on / off states of the sampling switches SW1 to SWm from the sampling switches SW1 to SWm so that the on periods of each other do not overlap.

  The operational amplifier AMP amplifies the current and outputs it to the sampling switches SW1 to SWm without changing the voltage of the input video signal DAT. Here, the voltage level of the video signal DAT output from the data signal generation circuit 2 is such that the voltage applied to each data signal line SL1, SL2,..., SLm is sequentially changed according to the image data to be displayed. Change dynamically (changes over time). Then, the sampling switch control circuit 51 sequentially switches on / off states of the sampling switches SW1, SW2,..., SWm at a timing according to a change in the voltage level of the video signal DAT.

  As a result, as shown in FIG. 4, voltages corresponding to the voltage (input voltage) of the video signal DAT input to the operational amplifier AMP are charged in the data signal lines SL1 to SLm, respectively. That is, signals output from the operational amplifier AMP and amplified from the current of the video signal DAT are sequentially sampled, and the signals output to the data signal lines SL1 to SLm are sequentially sampled. To SLm. Then, the signals output to the data signal lines SL1 to SLm are written to the pixels PIX connected to the scanning signal lines in the selected state, respectively.

  Each pixel PIX is arranged in each of a matrix area defined by n scanning signal lines GL1 to GLn and m data signal lines SL1 to SLm that intersect each other. Then, the gate driver 4 and the source driver 5 sequentially write signals corresponding to the video signal DAT supplied from the data signal generation circuit 2 to the respective pixels PIX via the scanning signal lines GL1 to GLn and the data signal lines SL1 to SLm. The image is displayed by going on.

  FIG. 5 shows a pixel PIX arranged in a region partitioned by the j-th (j is an integer from 1 to n) scanning signal line GLj and the i-th (i is an integer from 1 to m) data signal line SLi. Yes. As shown in this figure, the pixel PIX includes a transistor (field effect transistor) TR as a switching element and a pixel capacitor Cp. The pixel capacitor Cp includes a liquid crystal capacitor Clc and an auxiliary capacitor Cs that is added as necessary.

  The transistor TR has a gate connected to the scanning signal line GLj, a source connected to the data signal line SLi, and a drain connected to the pixel capacitor Cp (liquid crystal capacitor Clc and auxiliary capacitor Cs). The other electrode of the pixel capacitor Cp is connected to a common electrode line common to all the pixels PIX.

  Therefore, when the scanning signal line GLj is selected, the transistor TR is turned on, and the voltage applied to the data signal line SLi is applied to the pixel capacitor Cp. On the other hand, while the selection period of the scanning signal line GLj ends and the transistor TR is cut off, the pixel capacitor Cp continues to hold the voltage at the cut-off time. Here, the transmittance or reflectance of the liquid crystal varies depending on the voltage applied to the liquid crystal capacitance Clc. Therefore, the display state of the pixel PIX can be changed in accordance with the video signal DAT by selecting the scanning signal line GLj and applying a voltage corresponding to the video signal DAT to the data signal line SLi.

(Buffer drive circuit 54)
Next, the power supply voltage (drive voltage) of the operational amplifier AMP generated by the buffer drive circuit 54 and the buffer drive circuit 54 will be described.

  FIG. 6 is a block diagram showing a schematic configuration of the buffer drive circuit 54. As shown in this figure, the buffer drive circuit 54 includes voltage generation circuit sections (digital analog converter (DAC)) 54a and 54b. The voltage generation circuit unit 54a receives the reference potential Va and voltage setting data (digital data) input from the buffer power supply control circuit 6 via a plurality of voltage setting data lines. The voltage generation circuit 54b receives the reference potential Vb and voltage setting data (digital data) input from the buffer power supply control circuit 6 through a plurality of voltage setting data lines.

  FIG. 7 is a circuit diagram showing a schematic configuration of the voltage generation circuit units 54a and 54b. The voltage generation circuit unit 54a and the voltage generation circuit unit 54b have substantially the same configuration except that the potential of the reference power source to be connected is different. Therefore, here, the voltage generation circuit unit 54a will be described.

  As shown in this figure, the voltage generation circuit unit 54a includes a plurality of switches SWa, SWb, SWc, SWd and resistors R1 to R9.

  The resistors R5, R6, R7, and R8 are connected in series in this order, and one end of the resistor R5 is connected to the ground (GND, ground potential). One end of R8 is connected to the power input terminal of the operational amplifier amp1. One end of the switch SWa is connected to a connection point between the resistors R5 and R6 via the resistor R1, and one end of the switch SWb is connected to a connection point between the resistors R6 and R7 via the resistor R2. One end of the switch SWc is connected to the connection point between the resistor R7 and the resistor R8 via the resistor R3, one end of the switch SWc is connected to the connection point between the resistor R7 and the resistor R8 via the resistor R3, and one end of the switch SWd is connected to the resistor It is connected to a connection point between the resistor R8 and the operational amplifier amp1 via R4. Also, one end of a resistor R9 is connected between the resistor R4 and the power input terminal of the operational amplifier amp1, and the other end of the resistor R9 is connected to the ground (GND).

  The output terminal of the operational amplifier amp1 is connected to the negative input terminal − of the operational amplifier amp1 itself and the power input terminal of the operational amplifier AMP1 provided in the buffer circuit 53.

  In addition, voltage setting data (digital data) is input from the buffer power supply control circuit 6 to each of the switches SWa to SWd via a plurality of voltage setting data lines, so that any one switch is turned on, and the other switches The switch is turned off. Here, the switch to be turned on is connected to the reference potential Va, while the switch to be turned off is connected to the ground (GND). As a result, the combined resistor connected to the turned-on switch is output from the output operational amplifier amp1.

  The voltage setting data is SWa to SWb so as to generate the high-level potential V + of the power supply voltage of the operational amplifier AMP corresponding to the voltage of the video signal DAT output from the data signal generation circuit 2 (output voltage of the operational amplifier AMP). Is supplied from the buffer power supply control circuit 6. Also in the voltage generation circuit unit 54b, a low-level potential V− of the power supply voltage of the operational amplifier AMP is generated in substantially the same manner as the voltage generation circuit unit 54a. Thereby, the power supply voltage of the operational amplifier AMP provided in the buffer circuit 53 is generated according to the voltage of the video signal DAT (output voltage of the operational amplifier AMP).

  FIG. 1 is a diagram showing the relationship between the potential of the output voltage of the buffer circuit 53 (the operational amplifier AMP) and the high-level side potential V + and the low-level side potential V− in the power supply voltage supplied to the operational amplifier AMP. This figure also shows the high-level side potential Vu + and the low-level side potential Vu− when a constant voltage is supplied as the power supply voltage of the operational amplifier as in the prior art.

  As shown in this figure, the buffer drive circuit 54 according to the present embodiment changes the high-level side potential V + in the power supply voltage supplied to the operational amplifier AMP according to the output voltage of the buffer circuit 53. That is, the buffer drive circuit 54 generates the high level side potential V + so that the difference between the high level side potential V + and the output potential of the buffer circuit 53 is always equal to the voltage range B.

  The buffer drive circuit 54 also changes the low-level side potential V− in the power supply voltage supplied to the operational amplifier AMP according to the output voltage of the buffer circuit 53. That is, the buffer drive circuit 54 generates the low level side potential V− so that the difference between the output potential of the buffer circuit 53 and the low level side potential V− is always equal to the voltage range C.

  On the other hand, in the conventional configuration, a constant-level high-level potential Vu + that supplies a voltage higher than the voltage range B to the operational amplifier with respect to the output potential range A of the buffer circuit 53 and a potential smaller than the voltage range C are supplied to the operational amplifier. The high level side potential Vu− was a constant value. That is, a potential that is larger than the maximum value of the output potential of the buffer circuit 53 by the voltage range B is set to a constant high-level potential Vu +, and a potential that is smaller than the minimum value of the output potential of the buffer circuit 53 by the voltage range C is constant. The low level side potential Vu−.

  FIG. 8 shows an output potential of the buffer circuit 53 (the operational amplifier AMP) at a certain moment, power supply voltages (a high-level side potential V + and a low-level side potential V−) supplied to the operational amplifier AMP, and a power supply voltage (FIG. It is a figure which shows the relationship with the high level side electric potential Vu + and the low level side electric potential Vu-).

  As shown in this figure, by changing the power supply voltage supplied to the operational amplifier AMP in accordance with the output potential of the operational amplifier AMP, the conventional high level side potential Vu + and the present high level side potential (output from the buffer drive circuit 54). Difference corresponding to the difference ΔV + from the V + and the low level side potential (low level side potential output from the buffer driving circuit 54) V− and the conventional low level side potential Vu−. The power consumption of the operational amplifier AMP can be reduced by an amount corresponding to the difference ΔV−.

  In the above configuration, both the high-level side potential V + and the low-level side potential V− are changed according to the output voltage of the operational amplifier AMP. However, the present invention is not limited to this, and only one of the potentials is changed. A configuration may be adopted. For example, the voltage generation circuit unit 54b in the buffer drive circuit 54 may be omitted, and the low-level side potential V− of the operational amplifier AMP may be always a constant voltage at the ground (GND) level. In this case, power consumption can be reduced by an amount corresponding to the potential difference ΔV + shown in FIG.

(Power consumption simulation)
Next, the result of the power consumption simulation performed to examine the effect of reducing the power consumption by changing the power supply voltage of the operational amplifier AMP according to the output voltage (or input voltage) of the operational amplifier AMP will be described.

  FIG. 9 is a circuit diagram of a circuit used for this simulation. As shown in this figure, general-purpose operational amplifiers am1 and am2 having the same voltage characteristics were used. And the positive side input terminal + of each operational amplifier am1, am2 was connected to the input voltage source V_in common to both operational amplifiers. Further, the negative input terminal − of each operational amplifier am1, am2 was connected to the output terminal of each operational amplifier am1, am2.

  The output terminal of the operational amplifier am1 was connected to one electrode of the capacitor Ca via the resistor Ra, and the other electrode of the capacitor Ca was connected to the ground. The output terminal of the operational amplifier am2 was connected to one electrode of the capacitor Cb via the resistor Rb, and the other electrode of the capacitor Cb was connected to the ground. The resistor Rb and the capacitor Cb have the same characteristics as the resistor Ra and the capacitor Ca, respectively.

  Further, the low-level power input terminals of the operational amplifiers am1 and am2 are connected to the ground (GND). Then, the high-level power supply input terminal of the operational amplifier am1 was connected to the voltage source V_s1 via the current measuring device V_c. Further, the high-level power supply input terminal of the operational amplifier am2 was connected to the voltage source V_s2 via the current measuring device V_c. The current measuring devices V_c connected to the operational amplifiers am1 and am2 have characteristics common to each other and do not affect the output voltage characteristics of both operational amplifiers.

  FIG. 10A is a timing chart of the input voltage and the power supply voltage in the operational amplifier am1, and FIG. 10B is a timing chart of the input voltage and the power supply voltage in the operational amplifier am2.

  As indicated by solid lines in FIGS. 10A and 10B, the input voltages of the operational amplifiers am1 and am2 are a pulse voltage common to both operational amplifiers.

  Further, as indicated by a broken line in FIG. 10A, the power supply voltage input from the voltage source V_s1 to the operational amplifier am1 is a voltage that is always higher than the input voltage by 1V in accordance with the change of the input voltage (1V to 5V). It is set to be (2V to 6V). On the other hand, as indicated by a broken line in FIG. 10B, the power supply voltage input to the operational amplifier am2 from the voltage source V_s2 is set to a constant voltage (6V) that is 1V higher than the maximum value (5V) of the input voltage. Yes.

  FIG. 11 is a graph showing measurement results of power consumption of the operational amplifiers am1 and am2. That is, it is a graph comparing the average power consumption when the operational amplifier is driven by the driving method according to the present invention and when the operational amplifier is driven by the conventional driving method.

  As shown in the figure, in the conventional driving method, the power consumption is substantially constant at about 4 mW, whereas in the driving method according to the present invention, the power consumption is about 2.5 mW. That is, the power consumption can be reduced by about 38%. In the driving method of the present invention, there is a transition period until power consumption is stabilized in the initial stage of measurement start. This transition period is a short period of 0.1 msec or less, and this transition period. The power consumption was less than that of the conventional driving method.

  From the result of the above power consumption simulation, as in this embodiment, the difference between the power supply voltage and the output voltage is reduced according to the change in the output voltage (or input voltage) of the operational amplifier. It can be seen that the power consumption of the op-amp can be greatly reduced by changing to.

  As described above, the buffer drive circuit (op-amp drive circuit) according to the present embodiment uses the power supply voltage supplied to the operational amplifier as the power supply voltage for obtaining the required output voltage according to the change in the input voltage of the operational amplifier. While ensuring the difference from the output voltage, the difference between the power supply voltage and the output voltage is changed to be small.

  As a result, the operational amplifier can be driven appropriately, and the power consumption can be reduced as compared with the case where the power supply voltage covering the entire output voltage range of the operational amplifier is supplied as in the prior art.

  Of the power supply voltage supplied to the operational amplifier, both the high-level potential V + and the low-level potential V− may be changed with respect to the operational amplifier output potential, or either one may be changed. Also good. For example, one potential may be constant at the ground level.

  In this embodiment, the case where the buffer drive circuit 54 including the voltage generation circuit units 54a and 54b as shown in FIGS. 6 and 7 is used has been described. However, the configuration of the buffer drive circuit is not limited to this. Absent.

  For example, a digital-analog converter circuit (DAC) having a configuration different from that of the voltage generation circuit units 54a and 54b may be used in place of the voltage generation circuit units 54a and 54b.

  In the present embodiment, the configuration in which the output voltages of the voltage generation circuit units 54a and 54b change in four stages has been described. However, the present invention is not limited to this, and the output voltage can be changed in multiple stages or continuously. Also good. For example, the output voltage may be switched in more stages by further providing a switch and a combined resistor connected thereto. Alternatively, the voltage generation circuit units 54a and 54b are not limited to the configuration in which the reference potential is set to one potential (Va, Vb), and any reference potential may be selected from a plurality of reference potentials.

  Further, the present invention is not limited to a configuration using a register-type voltage generation circuit unit that changes an output voltage according to voltage setting data (input data). For example, it exists in the source driver 5 or outside the source driver 5 such as an LSI. A power source selection method in which an appropriate power source is selected from a plurality of power sources having different voltages may be used. In this case, since it is not necessary to convert the voltage in the buffer drive circuit 54, the device configuration can be simplified and the power utilization efficiency can be increased.

  Further, the register method and the power source selection method may be used in combination. For example, as shown in FIG. 12, the output voltage of the buffer drive circuit 54 and the output voltage of the external power supply (outside of the buffer drive circuit 54) may be selected and used.

  The buffer drive circuit 60 shown in this figure includes a buffer drive circuit 54 as a voltage generation circuit, a voltage selection circuit 55, a switch SWh, and a switch SWl. The buffer driving circuit 60 is connected to two types of power sources (external power sources) used outside the source driver 5. The video signal DAT is input from the data signal generation circuit 2 to the voltage selection circuit 55 in the buffer driving circuit 60.

  The output terminal of the switch SWh is connected to the power input terminal on the high level side of the operational amplifier AMP. The input terminal of the switch SWh is selectively connected to either the high-level output terminal of the buffer drive circuit 54 or the input terminal with the higher voltage of the external power supplies.

  The output terminal of the switch SWl is connected to the power input terminal on the low level side of the operational amplifier AMP. Further, the input terminal of the switch SW1 is selectively connected to either the low level output terminal of the buffer drive circuit 54 or the input terminal having the lower voltage of the external power supplies. One of the two types of external power supplies may be a ground (GND, ground potential).

  The voltage selection circuit 55 requires the operational voltage of the operational amplifier AMP (high level side potential V + and low level side potential V−) output from the buffer drive circuit 60 by the operational amplifier AMP in accordance with the voltage of the input video signal DAT. The switch SWh and the switch SWl are switched so as to reduce the difference between the power supply voltage of the operational amplifier AMP and the output voltage while securing the power supply voltage for obtaining the output voltage. Even with such a configuration, the power consumption of the operational amplifier AMP can be reduced.

  In the configuration of FIG. 12, a voltage generation circuit that outputs a plurality of types of constant voltages may be provided instead of the buffer drive circuit 54 used as the voltage generation circuit. That is, a voltage generation circuit that generates a plurality of types of voltages according to the output voltage of the operational amplifier AMP that is assumed in advance may be provided, and an arbitrary output voltage may be selected and used from the output voltage of the voltage generation circuit. .

  In the present embodiment, the configuration in which the buffer power supply control circuit 6 calculates the power supply voltage of the buffer circuit 53 based on the video digital data input from the data signal generation circuit 2 has been described. It is not a thing.

  For example, as shown in FIG. 17, a video signal DAT converted from digital data (video digital data) to analog data by the data signal generation circuit 2 is reconverted to digital data by an AD (analog digital) conversion circuit 7. The power supply voltage (power supply voltage setting data) of the buffer circuit 53 may be calculated based on the digital data input to the buffer power supply control circuit 6 and input from the AD conversion circuit 7.

  This configuration has an advantage that the power supply voltage of the buffer 53 can be adjusted including the voltage error generated during DA conversion. That is, in general, even if the digital data is the same, there is a slight error in the voltage output after the DA conversion. However, according to the above configuration, the power supply voltage is precisely included including the error generated during the DA conversion. Can be controlled. Therefore, the difference between the power supply voltage of the buffer circuit 53 and the actual output voltage can be reduced, and the buffer circuit 53 can be driven appropriately.

  Since the operational amplifier (OPAMP) can calculate an analog voltage, the power supply voltage of the buffer circuit can be changed using this function. For example, as shown in FIG. 18, a video signal DAT (an analog voltage obtained by DA-converting video digital data) output from the data signal generation circuit 2 to the buffer circuit 53 is input to a voltage calculation circuit 8 incorporating an operational amplifier. Then, the power supply voltage (power supply voltage value) of the buffer may be generated by adding or subtracting a predetermined voltage in the voltage generation circuit 8. Here, the predetermined voltage is a difference between the power supply voltage of the buffer circuit 53 and the output voltage necessary for driving the buffer circuit 53 appropriately.

  In this configuration, digital data need not be input to the buffer drive circuit 54. However, as shown in FIG. 19, in order to adjust the buffer driving circuit 54, etc., a buffer power supply control circuit 6 may be provided and digital data may be input. That is, the buffer drive circuit 54 may be adjusted based on the power supply voltage value generated by the voltage calculation circuit 8 and the power supply voltage data generated by the buffer power supply control circuit 6.

  In this embodiment, the peripheral circuit including the gate driver 4 and the source driver 5 and each pixel are formed on the same substrate. However, the present invention is not limited to this. For example, all or part of the control signal generation circuit 1, the data signal generation circuit 2, and the buffer power supply control circuit 6 may be formed on the same substrate as each pixel together with the gate driver 4 and the source driver 5. . When the AD conversion circuit 7 and the voltage calculation circuit 8 are provided, these circuits may be formed on the same substrate as each pixel together with the gate driver 4 and the source driver 5. Alternatively, all or part of the data signal generation circuit 2, the buffer power supply control circuit 6, the AD conversion circuit 7, and the voltage calculation circuit 8 may be provided in the source driver 5.

  Further, the gate driver 4 and the source driver 5 may be formed on a substrate different from the substrate 3 on which each pixel is formed. Further, the buffer drive circuit 54 may be provided outside the source driver 5 or outside the substrate 3.

  In the present embodiment, the dot sequential drive type liquid crystal display device has been described. However, the present invention is not limited to this, and for example, a line sequential drive type liquid crystal display device or an SSD (Source Shared Driving) type liquid crystal display device. The power supply voltage of the buffer circuit (op-amp) may be changed as described in the present embodiment.

  FIG. 13 is a block diagram illustrating a configuration example in the case of changing the power supply voltage of the buffer circuit (op-amp) in the line sequential driving type liquid crystal display device.

  In the line sequential drive system, as shown in this figure, the video signals DAT1, DAT2,... Input to the video signal line are opened horizontally by simultaneously opening the sampling switches SW1, SW2,. A signal for a scanning period (a period for writing to each pixel connected to one scanning signal line) is simultaneously transferred to the next stage, and each data is transmitted via a buffer circuit (operational amplifier AMP) 53 provided for each data signal line. Write to the signal line SL. Then, data is simultaneously written to each pixel connected to the scanning signal line in the selected state. That is, in the line sequential driving method, when a write operation is performed on each pixel connected to the selected scanning signal line, sampling of the data signal to each pixel connected to the next scanning signal line is performed. Is done.

  By changing the power supply voltage of the buffer circuit (op-amp) in such a line-sequential driving type liquid crystal display device according to the input voltage of each operational amplifier, the power consumption of each operational amplifier is the same as in the case of the dot-sequential driving described above. Can be reduced.

  FIG. 14 is a block diagram showing a configuration example in the case of changing the power supply voltage of the buffer circuit (op-amp) in the SSD liquid crystal display device.

  In the SSD system, video signals DAT1, DAT2,... Input from a plurality of video signal lines are distributed to a larger number of data signal lines than video signal lines in one horizontal period of image display. Then, each video signal distributed as described above is written to each pixel connected to the scanning signal line in the selected state for each data signal line corresponding to each video signal. FIG. 14 shows a configuration example in which each video signal is distributed to three data signal lines, but the number of data signal lines for each video signal line is not limited to this.

  In the configuration of FIG. 14, a switch group including switches SWR, SWG, and SWB as one group and a buffer circuit 53 including an operational amplifier AMP are provided in the same number as the number of video signal lines. One video signal line is connected to the positive input terminal of each operational amplifier AMP. Furthermore, the output terminal of each operational amplifier AMP is connected to one of the switch groups.

  The signal SR from the sampling switch control circuit 51 is input to the switch SWR in each switch group, and the signal SG from the sampling switch control circuit 51 is input to the switch SWG in each switch group, and the switch SWB in each switch group. Is input with the signal SB from the sampling switch control circuit 51.

  Further, the switch SWR in each switch group is connected to one of the data signal lines SLR1, SLR2,... Corresponding to the switch group, and the switch SWG in each switch group is connected to the data signal line SLG1,. .. Are connected to one of the SLG2,..., And the switch SWB in each switch group is connected to one of the data signal lines SLB1, SLB2,.

  In this way, in the configuration of FIG. 14, each of the switches SWR, SWG, SWB is regarded as one group, and there is one video signal DAT1, DAT2,. This video signal is input to all the switches SWR, SWG, SWB in the switch group, and as a result, one video signal line is connected to three data signal lines through the switches SWR, SWG, SWB.

  The switches SWR, SWG, SWB are opened by the signals SR, SG, SB output from the sampling switch control circuit 51, and video signals are supplied from the video signal lines to the data signal lines SLR, SLG, SLB. .

  By changing the power supply voltage of the buffer circuit (operational amplifier) in the SSD type liquid crystal display device according to the input voltage of each operational amplifier, each operational amplifier is the same as in the case of the dot sequential drive or line sequential drive system described above. Power consumption can be reduced.

  In the present embodiment, the configuration using a transistor made of CGS as the switching element of each pixel has been described. However, the present invention is not limited to this, and a configuration using different types of switching elements may be used.

  In the present embodiment, the case where the liquid crystal display device 100 includes the operational amplifier driving circuit has been described. However, the present invention is not limited to this. For example, a display device other than a liquid crystal display device such as a plasma display or an organic EL display may be provided.

  In the present embodiment, the configuration for changing the power supply voltage supplied to the operational amplifier of the voltage follower has been described. However, the present invention is not limited to this. For example, in an operational amplifier that amplifies and outputs an input voltage, a difference between the power supply voltage and the output voltage is ensured while ensuring a difference between the power supply voltage and the output voltage to obtain a required output voltage according to a change in the input voltage. By changing the power supply voltage so as to reduce the difference, the operational amplifier can be appropriately driven and the power consumption of the operational amplifier can be reduced.

  The operational amplifier driving circuit of the present invention is not limited to driving an operational amplifier (buffer circuit) provided in a display device, and includes general operational amplifiers to which dynamically changing input voltages are input, or such operational amplifiers. Applicable to all electronic devices.

  The present invention is not limited to the above-described embodiments, and various modifications can be made within the scope shown in the claims. That is, embodiments obtained by combining technical means appropriately modified within the scope of the claims are also included in the technical scope of the present invention.

  The present invention can be applied to general operational amplifiers (operational amplifiers) in which the magnitude of the input voltage changes dynamically, or to electronic devices generally equipped with such operational amplifiers. For example, it is suitable for an operational amplifier used in an output buffer circuit in a data signal line driver of a display device, in which an input signal changes in accordance with image data to be displayed.

It is a figure which shows the relationship between the power supply voltage which an operational amplifier drive circuit concerning one Embodiment of this invention supplies to an operational amplifier, and the output voltage of the operational amplifier. It is a block diagram which shows schematic structure of the display apparatus provided with the operational amplifier drive circuit concerning one Embodiment of this invention. It is a block diagram which shows schematic structure of the source driver in the display apparatus concerning one Embodiment of this invention. 4 is a timing chart showing a relationship among an input voltage input to an operational amplifier, a signal supplied to each sampling switch, and a voltage supplied to each data signal line in the display device according to the embodiment of the present invention. It is a block diagram which shows the structure of each pixel in the display apparatus concerning one Embodiment of this invention. 1 is a block diagram illustrating a schematic configuration of an operational amplifier driving circuit according to an embodiment of the present invention. It is a circuit diagram which shows schematic structure of the voltage generation circuit part with which the operational amplifier drive circuit concerning one Embodiment of this invention is equipped. It is a figure which shows the relationship between the power supply voltage which an operational amplifier drive circuit concerning one Embodiment of this invention supplies to an operational amplifier, and the output voltage of the operational amplifier. It is a circuit diagram of the circuit used by the power consumption simulation performed in one Embodiment of this invention. (A) is a timing chart of the input voltage and power supply voltage of the operational amplifier driven by the driving method of the present invention in the power consumption simulation performed in one embodiment of the present invention, and (b) is in the power consumption simulation. FIG. 6 is a timing chart of an input voltage and a power supply voltage of an operational amplifier driven by a conventional driving method. It is a graph which shows the result of the power consumption simulation performed in one Embodiment of this invention. It is a block diagram which shows the modification of the operational amplifier drive circuit concerning one Embodiment of this invention. 1 is a block diagram illustrating a configuration example when an operational amplifier driving circuit according to an embodiment of the present invention is applied to a line-sequential driving type liquid crystal display device. 1 is a block diagram illustrating a configuration example when an operational amplifier driving circuit according to an embodiment of the present invention is applied to an SSD liquid crystal display device. It is a circuit diagram which shows an example of the conventional operational amplifier. It is a figure which shows the relationship between the power supply voltage and output voltage of the conventional general operational amplifier. It is a block diagram which shows the modification of the structure for producing | generating the power supply voltage setting data of an operational amplifier in the display apparatus concerning one Embodiment of this invention. It is a block diagram which shows the other modification of the structure for producing | generating the power supply voltage setting data of an operational amplifier in the display apparatus concerning one Embodiment of this invention. FIG. 10 is a block diagram showing still another modification of the configuration for generating power supply voltage setting data of an operational amplifier in the display device according to the embodiment of the present invention.

Explanation of symbols

1 control signal generation circuit 2 data signal generation circuit (video signal generation means)
3 Substrate 4 Gate driver 5 Source driver 6 Buffer power supply control circuit (power supply voltage controller)
7 AD conversion circuit (analog / digital conversion means)
8 Voltage Operation Circuit 51 Sampling Switch Control Circuit 52 Sampling Circuit 53 Buffer Circuit 54 Buffer Drive Circuit (Operation Amplifier Drive Circuit)
54a, 54b Voltage generation circuit unit AMP operational amplifier (operational amplifier)
GL Scanning signal line PIX Pixel S Sampling switch SL Data signal line V + High level potential (power supply voltage)
V- Low level side potential (power supply voltage)

Claims (15)

Input an input signal whose potential changes, amplifies the input signal, and outputs an output signal that has the same potential as the input signal and a current amount amplified to a predetermined current amount larger than the current amount of the input signal An operational amplifier driving device for supplying a power supply voltage of the operational amplifier,
A power supply control circuit that generates power supply voltage setting data based on the input signal; and a voltage generation circuit that generates a power supply voltage to be supplied to the operational amplifier based on the power supply voltage setting data.
The power control circuit is
The difference between the high-level potential of the power supply voltage and the potential of the input signal, and the difference between the potential of the input signal and the low-level potential of the power supply voltage are all over the entire change range of the potential of the input signal. The power supply voltage setting data is generated so that the power supply voltage is changed to be constant at the minimum value necessary for the operational amplifier to output the output signal having the same potential as the input signal and the predetermined current amount. And
The voltage generation circuit is
An electrical resistor and a switch arranged in parallel with each other between a first reference potential input line to which a high level side reference potential is input, and the first reference potential input line and the high level side power input terminal of the operational amplifier. Are connected in series, and an electric resistance value between the first reference potential input line and the high-level power supply input terminal of the operational amplifier is the first wiring part. A first voltage generation circuit unit that is different for each;
An electrical resistor and a switch arranged in parallel with each other between a second reference potential input line to which a low level side reference potential is input, and the second reference potential input line and the low level side power input terminal of the operational amplifier. And a plurality of second wiring portions connected in series, and an electric resistance value between the second reference potential input line and the low-level power supply input terminal of the operational amplifier is the second wiring portion. A second voltage generating circuit unit that is different for each,
Driving the operational amplifier, wherein the power supply voltage is generated by controlling the operation of the switch provided in each first wiring section and each second wiring section based on the power supply voltage setting data apparatus. An operational amplifier that receives an input signal whose potential changes, amplifies and outputs the input signal,
A display device comprising the operational amplifier drive device according to claim 1 , which supplies a power supply voltage of the operational amplifier. A plurality of scanning signal lines, a plurality of data signal lines intersecting with each of the scanning signal lines, and a plurality of data lines arranged in each of the matrix-like regions partitioned by the scanning signal lines and the data signal lines. An active matrix display device including a pixel, a scanning signal line driving circuit that controls a signal supplied to the scanning signal line, and a data signal line driving circuit that controls a signal supplied to the data signal line. And
3. The display device according to claim 2 , wherein a signal amplified by the operational amplifier is supplied to each data signal line. The display device according to claim 3 , wherein the pixels are driven by a dot sequential driving method. The display device according to claim 3 , wherein each of the pixels is driven by a source shared driving method. The display device according to claim 3 , wherein each of the pixels is driven by a line sequential driving method. It said each pixel, the scanning signal line drive circuit, and the data signal line drive circuit, a display device according to any one of claims 3 6, characterized in that it is formed on the same substrate . The display device according to claim 7 , wherein each of the pixels includes a switching element made of continuous crystal grain boundary silicon formed on the substrate. A power supply voltage control unit configured to generate power supply voltage setting data for the operational amplifier based on image data to be displayed and to output the generated power supply voltage setting data to a drive device for the operational amplifier; The display device according to any one of claims 3 to 8 . Video signal generating means for converting the image data to be displayed from digital data to analog data and outputting to the operational amplifier,
The display device according to claim 9 , wherein the power supply voltage control unit generates power supply voltage setting data of the operational amplifier based on digital data of the image to be displayed. Video signal generating means for converting image data to be displayed from digital data to analog data and outputting the converted data to the operational amplifier;
Analog-digital conversion means for converting the analog data into digital data and outputting to the power supply voltage control unit,
The display device according to claim 9 , wherein the power supply voltage control unit generates power supply voltage setting data of the operational amplifier based on digital data input from the analog-digital conversion unit. Video signal generating means for converting image data to be displayed from digital data to analog data and outputting the converted data to the operational amplifier;
A voltage calculation circuit including an operational amplifier capable of calculating an analog voltage,
Said voltage calculation circuit, based on the analog data output from the video signal generating means, according to any one of claims 3 to 8, characterized in that to generate a power supply voltage set value of the operational amplifier Display device. The display device according to claim 12 , further comprising a power supply voltage control unit that generates power supply voltage setting data of the operational amplifier based on the digital data of the image to be displayed. An operational amplifier that receives an input signal whose potential changes, amplifies and outputs the input signal,
An electronic apparatus characterized by comprising a drive unit of the operational amplifier according to the power supply voltage of the operational amplifier to Claim 1 supplies. Input an input signal whose potential changes, amplifies the input signal, and outputs an output signal that has the same potential as the input signal and a current amount amplified to a predetermined current amount larger than the current amount of the input signal A method of driving an operational amplifier that supplies a power supply voltage of the operational amplifier.
A power supply voltage setting data generating step for generating power supply voltage setting data based on the input signal; and a power supply voltage generating step for generating a power supply voltage to be supplied to the operational amplifier based on the power supply voltage setting data,
In the power supply voltage setting data generation step, the difference between the high level potential of the power supply voltage and the potential of the input signal, and the difference between the potential of the input signal and the low level potential of the power supply voltage are respectively The operational amplifier is supplied to the operational amplifier so as to be constant at a minimum value necessary for outputting the output signal having the same potential as the input signal and the predetermined current amount over the entire change range of the potential of the input signal. Generate the power supply voltage setting data so as to change the power supply voltage ,
In the voltage generation step,
An electrical resistor and a switch arranged in parallel with each other between a first reference potential input line to which a high level side reference potential is input, and the first reference potential input line and the high level side power input terminal of the operational amplifier. Are connected in series, and an electric resistance value between the first reference potential input line and the high-level power supply input terminal of the operational amplifier is the first wiring part. A first voltage generation circuit unit that is different for each;
An electrical resistor and a switch arranged in parallel with each other between a second reference potential input line to which a low level side reference potential is input, and the second reference potential input line and the low level side power input terminal of the operational amplifier. And a plurality of second wiring portions connected in series, and an electric resistance value between the second reference potential input line and the low-level power supply input terminal of the operational amplifier is the second wiring portion. Using a voltage generation circuit having a second voltage generation circuit unit that is different for each,
Driving the operational amplifier, wherein the power supply voltage is generated by controlling the operation of the switch provided in each first wiring section and each second wiring section based on the power supply voltage setting data Method.

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