JP4679599B2 - Microcomputer system and microcomputer system abnormality determination method - Google Patents

Description

  The present invention relates to a microcomputer system configured by mounting a one-chip microcomputer and a serial / parallel conversion circuit on a printed wiring board, and an abnormality determination method for the microcomputer system.

Conventionally, techniques for extending the number of output ports by serial / parallel conversion of serial data output from a microcomputer using a shift register connected to the outside are disclosed in Patent Documents 1 and 2 and the like. Patent Document 3 discloses a technique for performing serial / parallel conversion in a frame synchronization system for STM-N frame format multiplex transmission data.
Japanese Patent No. 2786732 Japanese Patent Laid-Open No. 4-112224 JP-A-4-207426

By the way, in the microcomputer system adopting the configuration as described above, when an abnormality such as a disconnection occurs in a data transmission path, the transmission of serial data output by the microcomputer is interrupted and cannot be properly converted, and is thus controlled. There is a problem that an abnormality occurs in the control of the device.
However, the techniques disclosed in Patent Documents 1 and 2 are not supposed to deal with such an abnormality at all. Further, Patent Document 3 is a technology related to communication, and it is not assumed that the above-mentioned abnormality is dealt with.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a microcomputer system and a microcomputer system abnormality determination method that can reliably detect that an abnormality has occurred in a serial data transmission path. It is to provide.

In order to achieve the above object, the microcomputer system according to claim 1 is mounted on a printed wiring board, and the mounted circuit components are electrically connected by printed wiring.
A one-chip microcomputer configured to output serial data via an output port;
The serial data output from the microcomputer is received and converted into parallel data of a predetermined number of bits, and the parallel data output control is constituted by a serial / parallel conversion circuit which is performed by a control signal given from the microcomputer. In
In the parallel data output terminal of the serial / parallel converter circuit, a terminal of 1 bit or more from the most significant side is connected to the input port of the microcomputer,
The microcomputer is characterized in that, when the serial data output of a predetermined number of bits is completed, an abnormality is determined if the data value given through the input port does not match the corresponding output data value.

  With this configuration, when serial data output from the microcomputer is not abnormal in the path until it is converted into parallel data in the serial / parallel conversion circuit, the serial data output of a predetermined number of bits is completed. In addition, the data value provided via the microcomputer input port matches the corresponding output data value. Therefore, if the two do not match, it indicates that a failure such as a disconnection has occurred in the above path, and an abnormality can be detected.

Further, the microcomputer system according to claim 2 is configured based on the same premise as in claim 1,
When a plurality of the serial / parallel conversion circuits are mounted, they are connected in series in a daisy chain,
One or more bits of the parallel data output terminal of the circuit arranged on the most significant side among the plurality of serial / parallel conversion circuits is connected to the input port of the microcomputer,
The microcomputer is characterized in that, when the serial data output of a predetermined number of bits is completed, an abnormality is determined if the data value given through the input port does not match the corresponding output data value.

  That is, when a plurality of serial / parallel conversion circuits are connected in a daisy chain, the parallel data output terminal of the circuit arranged on the uppermost side is connected to the input port of the microcomputer to determine abnormality as in claim 1. , Faults such as disconnection occurring in the data serial / para conversion path can be similarly detected.

  According to the microcomputer system of the first aspect, since it is possible to detect a failure such as a disconnection occurring in the serial / para conversion path of the data output from the microcomputer, the reliability of the system can be improved.

  According to the microcomputer system of the second aspect, even when a plurality of serial / parallel conversion circuits are connected in a daisy chain, the serially arranged serial is checked by checking the output of the uppermost circuit. Faults such as disconnection can be efficiently detected including the connection of the / para conversion circuit.

  Hereinafter, an embodiment in which the present invention is applied to a heat pump type washing / drying machine (laundry equipment) will be described with reference to the drawings. First, in FIG. 3, a water tank 2 is elastically supported by a plurality of support devices 3 and arranged in a horizontal state inside the outer box 1. A rotating drum 4 is rotatably disposed in the water tank 2 in the same state as that of the water tank 2. The rotating drum 4 has a large number of dewatering holes 4a (only part of which are shown) serving as ventilation holes on the peripheral side wall and the rear wall, and also functions as a washing tub, a dewatering tub, and a drying chamber. A plurality of baffles 4 b (only one is shown) are provided on the inner peripheral surface of the rotating drum 4.

  Each of the outer box 1, the water tank 2 and the rotating drum 4 has openings 5, 6 and 7 for putting in and out the laundry on the front surface (right side in the figure), and the opening 5 And the opening 6 are connected in a watertight manner by an elastically deformable bellows 8. The opening 5 of the outer box 1 is provided with a door 9 for opening and closing the opening. The rotating drum 4 has a rotating shaft 10 on the back surface, and the rotating shaft 10 is supported by a bearing (not shown) and attached to the outside of the back surface portion of the water tank 2. A drum motor (washing / dehydrating motor) 11 comprising an outer rotor type three-phase brushless DC motor as a motor is driven to rotate.

  A casing 13 is supported on the bottom plate 1a of the outer box 1 via a plurality of support members 12, and a discharge port 13a and a suction port 13b are formed at the upper right end portion and the upper left end portion of the casing 13, respectively. ing. Further, a compressor 15 constituting a heat pump (refrigeration cycle) 14 is installed on the bottom plate 1a. Further, in the casing 13, similarly, a condenser 16 and an evaporator 17 constituting the heat pump 14 are installed in order from the right side to the left side, and a blower fan 18 is disposed at the right end portion. . A dish-shaped water receiving portion 13 c is formed at a portion of the casing 13 located below the evaporator 17.

  In the water tank 2, an intake port 19 is formed in the upper part of the front surface part, and an exhaust port 20 is formed in the lower part of the back surface part. The intake port 19 is connected to the discharge port 13 a of the casing 13 through a linear duct 21 and an extendable connecting duct 22. Further, the exhaust port 20 is connected to the suction port 13 b of the casing 13 via an annular duct 23 and an extendable connecting duct 24. The annular duct 23 is attached to the outside of the back surface of the water tank 2 and is formed concentrically with the drum motor 11. That is, the inlet side of the annular duct 23 is connected to the exhaust port 20, and the outlet side is connected to the suction port 13 b via the connecting duct 24. The casing 13, the connecting duct 22, the linear duct 21, the intake port 19, the exhaust port 20, the annular duct 23, and the connecting duct 14 constitute an air circulation path 25.

  In the outer box 1, a water supply valve 26 composed of a three-way valve is disposed at the upper rear portion thereof, and a detergent feeder 26a is disposed at the upper upper portion thereof. The water supply valve 26 has a water inlet connected to a water faucet via a water supply hose, a first water outlet connected to an upper water inlet of the detergent feeder 26a via a water supply hose 26b for washing, and a second water outlet. The outlet is connected to the lower inlet of the detergent dispenser 26a via the rinsing water supply hose 26c. And the water outlet of the detergent feeder 26a is connected to the water inlet 2a formed in the upper part of the water tank 2 via the water supply hose 26d.

  A drain port 2b is formed at the rear portion of the bottom of the water tank 2, and the drain port 2b is connected to the drain hose 27 via a drain valve 27a. A part of the drain hose 27 is telescopic. And the water receiving part 13c of the casing 13 is connected to the middle part of the drainage hose 27 via the drainage hose 28 and the check valve 28a.

  An operation display panel 29 is provided on the front upper portion of the outer box 1, and the operation display panel 29 is provided with a display and various operation switches (not shown). A control circuit 30 is provided on the back surface of the operation display panel 29. The control circuit 30 is constituted by a one-chip type microcomputer including a CPU, ROM, RAM, A / D converter, serial data output circuit, and the like, and a water supply valve according to the operation of each switch on the operation display panel 29 26, the drum motor 11 and the drain valve 27a are controlled, and washing operation of washing, rinsing and dehydration, and a compressor motor 32 (see FIG. 1) including a three-phase brushless DC motor for driving the drum motor 11 and the compressor 15 are controlled. The dry operation is executed. The operation display panel 29 displays the progress of the washing operation.

  FIG. 1 is a block diagram of a microcomputer system showing peripheral circuits and the like controlled by the control circuit 30. The control circuit 30 drives the drum motor 11 by outputting a six-phase PWM signal to the inverter circuit 31 based on the position signal output from the position sensor attached to the drum motor 11. Further, the inverter circuit 31 supplies various detection signals including a current detection signal for performing vector control and an overcurrent detection signal to the control circuit 30.

  Further, the control circuit 30 drives the compressor motor 32 by outputting a six-phase PWM signal to the inverter circuit 33 that drives the compressor motor 32. Further, the inverter circuit 33 supplies various detection signals including a current detection signal and an overcurrent detection signal for performing vector control to the control circuit 30.

  The plurality of thermistors 34 detect the temperature of each part and output a detection signal to the control circuit 30. The detection targets are the temperatures of the inlet and outlet of the condenser (condenser) 16 and the evaporator (evaporator) 17, the temperature of the discharge pipe (for detecting the refrigerant temperature), the outside air temperature and the inlet and drum of the circulating air to the drum 4 The temperature at the outlet from 4 (for detecting the end of drying).

  The door switch 35 outputs a signal indicating the open / closed state of the door 9 to the control circuit 30 (a dangerous state is prevented when the door 9 is opened, such as during a dehydrating operation). The pulse detection circuit 36 outputs the frequency (50/60 Hz) extracted from the commercial AC power source to the control circuit 30 as an AC pulse in order to obtain a drive timing such as triac. The nonvolatile memory 37 is, for example, an EEPROM or FRAM (registered trademark), and the control circuit 30 performs two-wire serial communication with these to read and write data. The nonvolatile memory 37 stores, for example, device operation history to be used for failure analysis, or stores data for correcting device variations during manufacturing.

  The forward acceleration sensor 38 and the backward acceleration sensor 39 detect the acceleration when the drum 4 vibrates during driving, and output the acceleration in the forward direction and the backward acceleration of the water tank 2 to the control circuit 30. The control circuit 30 Based on these detection signals, the unbalanced state of the laundry is detected. The fan motor 40 for drying operation drives the blower fan 18 in accordance with the operation command and the rotational speed command. The lint filter presence / absence detection circuit 41 detects whether a filter for removing lint or the like disposed in the air circulation path 25 is set at a predetermined position, and sends a signal corresponding to the presence / absence of the filter to the control circuit 30. Output. The water level sensor 42 of the drain water tank outputs a water level detection signal during drainage to the control circuit 30. Serial communication is also performed between the control circuit 30 and the operation display panel 29 described above.

  The power factor correction circuit 43 includes a so-called partial switching boost chopper circuit that is arranged on the input side of a full-wave rectifier circuit in a power circuit section (not shown) so that the current waveform of the power circuit approaches a sine wave. In addition, the switching operation is performed according to the drive pulse given with the zero cross point of the current waveform as a reference. As a result, harmonic suppression and boosting of the power source are performed to improve power efficiency. The input current detection circuit 44 outputs a voltage corresponding to the input current in order to protect when the input of the inverter circuit 33 on the compressor 15 side becomes excessive.

  The control circuit 30 supplies CLOCK, STROBE, DATA, and OUTPUT_ENABLE signals to the 8-bit serial / parallel (hereinafter referred to as S / P) conversion IC 45. The S / P conversion IC 46 is provided with each signal except the above-mentioned DATA. That is, the control circuit 30 outputs serial data DATA to the S / P conversion IC 45 in synchronization with the serial clock signal CLOCK to convert it into parallel data. An output terminal Qs' of the S / P conversion IC 45 is connected to the serial data input terminal of the S / P conversion IC 46, and the S / P conversion ICs 45 and 46 are connected in a daisy chain state.

The control circuit 30 outputs 16-bit serial data to the S / P conversion ICs 45 and 46 and converts it into parallel data, thereby controlling each unit using the lower 12 bits. The 8-bit output terminals Q8 to Q1 of the S / P conversion IC 45 are assigned to the following control, for example. These are selected so as not to cause a problem even if the control is performed at a relatively low speed.
Q8: Door lock 47, Q7: Drain valve 27a, Q6: Unit cooling fan 48,
Q5: Drain pump 49, Q4-Q1: Refrigerant flow rate adjusting valve stepping motor 50 (X +, X-, Y +, Y-)
The door lock 47 locks / unlocks the door 9 and controls the lock by the output terminal Q8, and controls the opening and closing of the drain valve 27a by the output terminal Q7. The unit cooling fan 48 blows and cools a circuit board or the like on which the control circuit 30 is mounted, and performs drive control by an output terminal Q6. Further, a rotation speed signal is output to the control circuit 30 from the unit cooling fan 48 side. The drain pump 49 is a pump that discharges the condensed water during the drying operation, and performs drive control by the output terminal Q5. The refrigerant flow rate adjusting valve stepping motor 50 determines the opening degree of the refrigerant flow rate adjusting valve that circulates in the heat cycle, and performs ON / OFF control of switching elements constituting a circuit for driving the motor 50 by output terminals Q4 to Q1. Do.

Of the output terminals of the S / P conversion IC 45, the lower 4 bits Q4 to Q1 are assigned to the following control, for example.
Q4: cleaning liquid circulation pump 51, Q3: bath water valve 52, Q2: softer valve 53,
Q1: Water supply valve 26
The cleaning liquid circulation pump 51 is a pump that circulates the cleaning liquid in the water tank 2 during the washing operation, and performs drive control thereof by the output terminal Q4. The bath water valve 52 is a valve that supplies the bath water pumped up by the bath water pump into the water tank 2 and performs opening / closing control by the output terminal Q3. The softer valve 53 is a valve for supplying the soft finish into the water tank 2 and performs opening / closing control by the output terminal Q2. Moreover, opening / closing control of the water supply valve 26 is performed by the output terminal Q1. The output terminals Q6 and Q5 are not used, and the most significant 2-bit output terminals Q8 and Q7 are connected to the input port of the control circuit 30. Operations related to these will be described later.

FIG. 2 shows the internal configuration of the S / P conversion ICs 45 and 46. This is a well-known one and includes a shift register 54, a data latch unit 55, a gate unit 56, and a three-state output unit 57. The shift register 54 includes nine DQ flip-flops connected in series, and the data latch unit 55 includes eight data latches that latch output data on the lower 8-bit side of the shift register 54. .
The gate unit 56 includes eight sets of NAND gates 56a and NOR gates 56b for enabling and controlling the output data of the data latch unit 55. The three-state output unit 57 is connected in series between the power supply VDD and the ground. There are eight sets of P-channel MOSFETs 57P and N-channel MOSFETs 57N that are connected and whose gates are connected to the NAND gate 56a and the NOR gate 56b, respectively.

Serial data output from the control circuit 30 is given to the input terminal DATA of the S / P conversion IC 46, and the data is sequentially transferred inside the shift register 54 by the serial clock CLOCK. The output terminal Q of the DQ flip-flop arranged at the final stage of the shift register 54 is an external output terminal Qs ′, and the output terminal Qs ′ of the S / P conversion IC 45 is the input terminal of the S / P conversion IC 46. Connected to DATA.
The signal STROBE output from the control circuit 30 is provided as a latch timing signal for the data latch unit 55, and the signal OUTPUT_ENABLE is provided as an output control signal for the gate unit 56. When the output enable signal OUTPUT_ENABLE is at a low level, the output state of the three-state output unit 57 is high impedance.

  Each circuit component and element constituting the circuit shown in FIG. 1 are mounted on a circuit board, and electrical connection of each part is performed by a printed wiring pattern such as a copper foil. In the above configuration, the control circuit 30 and the S / P conversion ICs 45 and 46 constitute a microcomputer system 58.

  Next, the operation of the present embodiment will be described with reference to FIGS. FIG. 4 is a flowchart for explaining the contents of the processing by the control circuit 30 (mainly the CPU) in relation to the gist of the present invention. When the process is started after the power is turned on, the control circuit 30 performs a process of initializing the state of internal registers, memories, output ports and the like (step S1). Then, initial value data is serially transmitted to the S / P conversion ICs 45 and 46, and the parallel output terminals Q8 to Q1 of those ICs 45 and 46 are initialized (step S2).

  FIG. 5 is a timing chart showing the initialization state in step S2. When the control circuit 30 transmits 16-bit data “0” in synchronization with the serial clock CLOCK, the control circuit 30 outputs the signal STROBE and latches the data “0” in the data latch unit 48 in the S / P conversion ICs 45 and 46. Let Then, the signal OUTPUT_ENABLE is activated (high level), and a low level is output from each of the output terminals Q8 to Q1 of the S / P conversion ICs 45 and 46. In the following, the cycle (main loop) for setting the output state of the S / P conversion ICs 45 and 46 is 1 msec, and the signal STROBE is output every 1 msec. Further, the signal OUTPUT_ENABLE is maintained in the active state thereafter.

  Refer to FIG. 4 again. The control circuit 30 waits for the set period of 1 msec to elapse (step S3), and when 1 msec elapses (YES), performs various operation processes (step S4). “Operation processing” here means that when the output state of the S / P conversion ICs 45 and 46 needs to be changed, 16-bit data corresponding to the new output state is set in the serial signal output circuit and transmitted. It is a process to make.

  In subsequent step S5, the control circuit 30 reads the data values of the output terminals Q8 and Q7 of the S / P conversion IC 46 (IC2 in the figure) (values set in the previous processing) with reference to the input port. Then, it is determined whether or not the data value coincides with the data value set and transmitted by itself (step S6). If the two match (YES), there is no abnormality in the data transmission path for serial / parallel conversion. In that case, the signal STROBE is activated, and the output states of the S / P conversion ICs 45 and 46 (IC1 and IC2) are updated (including the case where the same data is output again) (step S7). Then, the process returns to step S3.

  FIG. 6 is a diagram corresponding to FIG. 5 when the output state of the S / P conversion ICs 45 and 46 is set in the normal operation executed following the process of step S2. For example, when the fifth bit output terminal Q5 of the S / P conversion IC 45 is set to the high level and the drain pump 49 is turned on, the 12th bit data from the head of the corresponding 16-bit serial data is set to the high level. Further, the output terminals Q8 and Q7 of the S / P conversion IC 46 (IC2 in the figure) are used for abnormality detection as described above. Therefore, for example, if the above 2 bits are output as “high, low” in a certain cycle, they are output as “low, high” in the next cycle in a pattern that is alternately inverted. As a result, the pattern shown in FIG. 7 is obtained by referring to the output state of the 2 bits per 1 msec.

In this case, even if the data changes of the output terminals Q8 and Q7 are viewed individually (in time series or in series), the data value alternately changes “high, low” every 1 msec, and the output terminals Q8, Q7, Even if the data change of Q7 is viewed in parallel, adjacent data values alternately change “high, low” every 1 msec.
Since the control circuit 30 basically outputs the signal STROBE every 1 msec, when the drain pump 49 is kept on, the output terminal Q5 of the S / P conversion IC 45 is set to the high level every cycle. Set to.

  Refer to FIG. 4 again. On the other hand, if they do not match in step S6, there is a possibility that an abnormality such as a disconnection has occurred in the data transmission path for serial / parallel conversion. Therefore, the number of times of mismatching is counted (step S8), and when the mismatching state reaches 5 consecutive times (step S9: YES), the occurrence of abnormality is confirmed and error display is performed on the operation display panel 29 (step S9). S10). Then, the signal OUTPUT_ENABLE is made inactive, and data output by the S / P conversion ICs 45 and 46 is stopped (step S11). Furthermore, when the washing operation or the drying operation is executed at that time (step S12: YES), the operation is stopped (step S13).

  As described above, according to this embodiment, the 2-bit terminals Q8 and Q7 from the most significant side of the output terminal of the S / P conversion IC 46 are connected to the input port of the control circuit 30, and the CPU of the control circuit 30 When the 16-bit serial data output is completed by the serial data output circuit, if the data value given through the input port does not match the corresponding output data value, an abnormality is determined.

  That is, since the control circuit 30 and the S / P conversion ICs 45 and 46 are connected by a printed wiring pattern, disconnection is likely to occur due to a defect such as peeling of a soldered portion. This parallel conversion data cannot be output normally. When a plurality of S / P conversion ICs 45 and 46 are connected in a daisy chain, the probability of occurrence of disconnection or the like becomes higher. Therefore, by checking the output of the S / P conversion IC 46 on the uppermost side as in this embodiment, the occurrence of a failure such as a disconnection including the connection in the middle of the data conversion path is efficiently detected as an abnormality. Therefore, the reliability of the washing / drying machine, which is a product to which the microcomputer system 51 or the microcomputer system 58 is applied, can be improved.

  The control circuit 30 changes the output data value corresponding to the data value given through the input port alternately between high and low at every set period. That is, when a disconnection occurs in the data conversion path, the data value is fixed. Therefore, the abnormality detection can be reliably performed by alternately inverting the data value to be determined. Furthermore, since the determination target is 2 bits and the output data value is changed so as to be inverted even in the relationship between adjacent bits, when the output terminals Q8 and Q7 are short-circuited by, for example, a solder bridge, the data of both Since they have the same value, even when a short circuit occurs, it can be detected as an abnormality.

  In addition, the control circuit 30 determines an abnormality when a state in which the data value given via the input port does not match the corresponding output data value continues for a predetermined period (continuous 5 times). It is possible to prevent erroneous determination when an abnormality is temporarily detected due to the influence of noise. Further, when the abnormality is determined, the outputs of the S / P conversion ICs 45 and 46 are disabled, so that it is possible to prevent the output from being continued in the abnormal state. For example, in the control of the stepping motor 50, if an abnormal output state is fixed, the coil of the motor 50 may generate heat abnormally, but it is possible to avoid the occurrence of such a state. Furthermore, when the washing operation and the drying operation are performed when an abnormality is determined, the operation is stopped, so that safety is improved.

The present invention is not limited to the embodiments described above and illustrated in the drawings, and the following modifications or expansions are possible.
The parallel data output setting cycle is not limited to 1 ms, and may be changed as appropriate.
For example, the output terminals Q6 and Q5 may be set as the determination target without being limited to the determination of the two bits from the most significant side in the output terminal of the S / P conversion IC 46. Further, 3 bits or more, or only 1 bit may be determined.
Only one S / P conversion IC 45 may be used, or three or more S / P conversion ICs may be used.
The S / P conversion IC is not limited to the 8-bit configuration, and may be, for example, a 4-bit, 12-bit, or 16-bit configuration (not limited to a multiple of 4).

It is not always necessary to invert the output pattern of the data to be determined alternately.
The number of continuous counts in step S9 for determining an abnormality is not limited to five, and may be changed as appropriate. In addition, the abnormality is not necessarily determined by a continuous count of a plurality of times, and the abnormality may be determined by a single determination result.
The output terminal to be determined is not necessarily limited to a terminal dedicated to abnormality determination that is not necessarily used in normal control. For example, the abnormality determination may be performed only once in the initial process, and thereafter, the determination target output terminal may be used in normal control.
The rotation axis of the drum 4 does not necessarily have to be horizontal, and the drum 4 may be arranged at an elevation angle of several tens to several tens of degrees.
The present invention is not limited to the washing and drying machine, and can be widely applied to any electronic device that uses the same microcomputer system.

The block diagram which is one Example of this invention and shows centering on the structure of a microcomputer system The figure which shows the internal structure of serial / parallel conversion IC Longitudinal side view of washer / dryer Flow chart showing processing contents by control circuit Timing chart showing the state of initialization in step S2 of FIG. Timing chart corresponding to processing after step S4 in FIG. Timing chart showing a state in which the data values of the output terminals Q8 and Q7 change every set cycle

Explanation of symbols

  In the drawing, 30 is a control circuit (microcomputer), 45 and 46 are serial / parallel conversion ICs (serial / parallel conversion circuit), and 58 is a microcomputer system.

Claims (12)

It is mounted on a printed wiring board, and the circuit components to be mounted are electrically connected by printed wiring.
A one-chip microcomputer configured to output serial data via an output port;
The serial data output from the microcomputer is received and converted into parallel data of a predetermined number of bits, and the parallel data output control is constituted by a serial / parallel conversion circuit which is performed by a control signal given from the microcomputer. In the microcomputer system
In the parallel data output terminal of the serial / parallel converter circuit, a terminal of 1 bit or more from the most significant side is connected to the input port of the microcomputer,
The microcomputer determines abnormality when the data value given through the input port does not match the corresponding output data value when the serial data output of a predetermined number of bits is completed. system. It is mounted on a printed wiring board, and the circuit components to be mounted are electrically connected by printed wiring.
A one-chip microcomputer configured to output serial data via an output port;
The serial data output from the microcomputer is received and converted into parallel data of a predetermined number of bits, and the parallel data output control is constituted by a serial / parallel conversion circuit which is performed by a control signal given from the microcomputer. In the microcomputer system
When a plurality of the serial / parallel conversion circuits are mounted, they are connected in series in a daisy chain,
One or more bits of the parallel data output terminal of the circuit arranged on the most significant side among the plurality of serial / parallel conversion circuits is connected to the input port of the microcomputer,
The microcomputer determines abnormality when the data value given through the input port does not match the corresponding output data value when the serial data output of a predetermined number of bits is completed. system.   3. The parallel data output terminal of the serial / parallel conversion circuit arranged on the most significant side is connected to one or more bits from the most significant side to the input port of the microcomputer. Microcomputer system.   4. The microcomputer system according to claim 1, wherein the microcomputer changes an output data value corresponding to a data value given through the input port alternately between high and low.   5. The microcomputer according to claim 1, wherein when the data given through the input port is a plurality of bits, the output data values of adjacent bits are changed so as to be inverted from each other. A microcomputer system according to 1.   6. The microcomputer according to claim 1, wherein the microcomputer determines an abnormality when a state in which a data value given via the input port does not match a corresponding output data value continues for a predetermined period. A microcomputer system according to any one of the above. An abnormality determination method applied to a microcomputer system in which a microcomputer and a serial / parallel conversion circuit are mounted on a printed wiring board and electrically connected between them by printed wiring,
When the serial / parallel conversion circuit receives serial data output from the microcomputer and converts it into parallel data of a predetermined number of bits, the parallel data output terminal of the serial / parallel conversion circuit starts from the most significant side. A terminal of 1 bit or more is connected in advance to the input port of the microcomputer,
When the microcomputer completes outputting serial data of a predetermined number of bits, an abnormality is determined if the data value given through the input port does not match the corresponding output data value Anomaly judgment method. An abnormality determination method applied to a microcomputer system in which a microcomputer and a serial / parallel conversion circuit are mounted on a printed wiring board and electrically connected between them by printed wiring,
When multiple serial / parallel conversion circuits are mounted, connect them in series in a daisy chain,
In the case where serial data output from the microcomputer is received and converted into parallel data of a predetermined number of bits, a parallel data output terminal of a circuit arranged on the most significant side among the plurality of serial / parallel conversion circuits A terminal of 1 bit or more is connected in advance to the input port of the microcomputer,
When the microcomputer completes outputting serial data of a predetermined number of bits, an abnormality is determined if the data value given through the input port does not match the corresponding output data value Anomaly judgment method.   9. The parallel data output terminal of the serial / parallel conversion circuit arranged on the most significant side is connected to a terminal of 1 bit or more from the most significant side to an input port of the microcomputer. An abnormality determination method for a microcomputer system.   10. An abnormality determination of a microcomputer system according to claim 7, wherein an output data value corresponding to a data value given through an input port of the microcomputer is changed alternately between high and low. Method.   11. The data according to any one of claims 7 to 10, wherein when data given through an input port of the microcomputer is a plurality of bits, output data values of adjacent bits are changed so as to invert each other. Method for judging abnormality of microcomputer system.   The abnormality is determined when a state in which a data value given through an input port of the microcomputer does not match a corresponding output data value continues for a predetermined period. An abnormality determination method for a microcomputer system as described in 1.

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