JP4677492B2 - 無線装置の受信機および併合adcフィルタ回路 - Google Patents
無線装置の受信機および併合adcフィルタ回路 Download PDFInfo
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- JP4677492B2 JP4677492B2 JP2008543624A JP2008543624A JP4677492B2 JP 4677492 B2 JP4677492 B2 JP 4677492B2 JP 2008543624 A JP2008543624 A JP 2008543624A JP 2008543624 A JP2008543624 A JP 2008543624A JP 4677492 B2 JP4677492 B2 JP 4677492B2
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
- H04B1/30—Circuits for homodyne or synchrodyne receivers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/0003—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain
- H04B1/0028—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain wherein the AD/DA conversion occurs at baseband stage
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/0003—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain
- H04B1/0028—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain wherein the AD/DA conversion occurs at baseband stage
- H04B1/0032—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain wherein the AD/DA conversion occurs at baseband stage with analogue quadrature frequency conversion to and from the baseband
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- Compression, Expansion, Code Conversion, And Decoders (AREA)
- Circuits Of Receivers In General (AREA)
Description
Claims (12)
- RF入力信号を受信する無線装置の受信機であって、
前記RF入力信号をベースバンド信号に変換する入力ステージと、
前記ベースバンド信号を受信して対応するデジタル信号を生成するADC回路であって、前記対応するデジタル信号を生成する前に、前記ベースバンド信号にローパスフィルタリングを実行するADC回路と、を備え、
前記ADC回路は、
前記ベースバンド信号を受信するローパスフィルタステージであって、フィルタ処理された入力信号を提供するために前記ベースバンド信号のダイナミックレンジを低減するローパスフィルタステージと、
前記フィルタ処理された入力信号を前記対応するデジタル信号に変換するアナログ・デジタル変換ステージと、を含み、
前記アナログ・デジタル変換ステージおよび前記ローパスフィルタステージが同一の相互コンダクタンスセルの相互接続を含み、前記同一の相互コンダクタンスセルのそれぞれが同一のCMOSインバータを有する、
ことを特徴とする無線装置の受信機。 - 前記対応するデジタル信号のローパスフィルタリングを実行し、且つフィルタ処理されたデジタル信号に利得係数をデジタル処理で適用するデジタル処理回路をさらに含むことを特徴とする請求項1に記載の無線装置の受信機。
- 前記入力ステージおよび前記ADC回路は、アナログ領域で動作することを特徴とする請求項1に記載の無線装置の受信機。
- 前記デジタル処理回路は、デジタル領域で動作することを特徴とする請求項2に記載の無線装置の受信機。
- 前記入力ステージは、
前記RF入力信号を受信して、所定量の利得を有する中間入力信号を生成する低雑音増幅器と、
前記中間入力信号を受信して、前記中間入力信号をベースバンド周波数にダウンコンバートするミキサ回路と、
を含むことを特徴とする請求項1に記載の無線装置の受信機。 - 前記アナログ・デジタル変換ステージは、シングルビットフィードバックを有するデルタ−シグマアナログ・デジタル変換器を含むことを特徴とする請求項1に記載の無線装置の受信機。
- 前記ローパスフィルタステージは、2次フィルタとして構成されるとを特徴とする請求項1に記載の無線装置の受信機。
- 1つの相互コンダクタンスセルをモニタし、且つ前記ローパスフィルタステージと前記アナログ・デジタル変換ステージの両方をチューニングするモニタ回路をさらに含むことを特徴とする請求項1に記載の無線装置の受信機。
- ベースバンド信号を受信するローパスフィルタステージであって、フィルタ処理された入力信号を生成するために前記ベースバンド信号のダイナミックレンジを低減するローパスフィルタステージと、
前記フィルタ処理された入力信号を対応するデジタル信号に変換するアナログ・デジタル変換ステージと、
を備え、
前記アナログ・デジタル変換ステージおよび前記ローパスフィルタステージは、同一の相互コンダクタンスセルの相互接続で構成され、前記同一の相互コンダクタンスセルのそれぞれが同一のCMOSインバータを有する、
ことを特徴とする併合ADCフィルタ回路。 - 前記アナログ・デジタル変換ステージは、デルタ−シグマアナログ・デジタル変換コアを含むことを特徴とする請求項9に記載の併合ADCフィルタ回路。
- 前記デルタ−シグマアナログ・デジタル変換コアは、シングルビットフィードバック用に構成されていることを特徴とする請求項10に記載の併合ADCフィルタ回路。
- 1つの相互コンダクタンスセルをモニタし、且つ前記ローパスフィルタステージと前記アナログ・デジタル変換ステージの両方をチューニングするモニタ回路をさらに含むことを特徴とする請求項9に記載の併合ADCフィルタ回路。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/297,336 US7242334B2 (en) | 2005-12-09 | 2005-12-09 | Wireless receiver circuit with merged ADC and filter |
PCT/CA2006/002003 WO2007065269A1 (en) | 2005-12-09 | 2006-12-11 | A wireless receiver circuit with merged adc and filter |
Publications (2)
Publication Number | Publication Date |
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JP2009518900A JP2009518900A (ja) | 2009-05-07 |
JP4677492B2 true JP4677492B2 (ja) | 2011-04-27 |
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JP2008543624A Active JP4677492B2 (ja) | 2005-12-09 | 2006-12-11 | 無線装置の受信機および併合adcフィルタ回路 |
Country Status (4)
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US (1) | US7242334B2 (ja) |
EP (1) | EP1994640B1 (ja) |
JP (1) | JP4677492B2 (ja) |
WO (1) | WO2007065269A1 (ja) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
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CN1625063A (zh) * | 2003-12-05 | 2005-06-08 | 皇家飞利浦电子股份有限公司 | 带通采样接收机及其采样方法 |
CN101322315B (zh) * | 2005-12-05 | 2012-03-28 | Nxp股份有限公司 | 具有最优内置滤波功能的前馈∑-△模/数转换器 |
JP2007214800A (ja) * | 2006-02-08 | 2007-08-23 | Nec Electronics Corp | 複素フィルタ回路 |
JP4181188B2 (ja) * | 2006-06-28 | 2008-11-12 | 株式会社東芝 | A/d変換器、信号処理装置、受信装置 |
US7782237B2 (en) * | 2008-06-13 | 2010-08-24 | The Board Of Trustees Of The Leland Stanford Junior University | Semiconductor sensor circuit arrangement |
WO2014106034A1 (en) * | 2012-12-27 | 2014-07-03 | The Regents Of The University Of California | Method for data compression and time-bandwidth product engineering |
CN112511133B (zh) * | 2020-11-30 | 2022-09-27 | 哈尔滨工程大学 | 一种基于船体结构监测数据分析的滤波器参数设置方法 |
CN115314057B (zh) * | 2022-10-08 | 2022-12-23 | 深圳捷扬微电子有限公司 | 一种基于反相器技术的模拟基带电路 |
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2005
- 2005-12-09 US US11/297,336 patent/US7242334B2/en active Active
-
2006
- 2006-12-11 EP EP06840438A patent/EP1994640B1/en not_active Not-in-force
- 2006-12-11 JP JP2008543624A patent/JP4677492B2/ja active Active
- 2006-12-11 WO PCT/CA2006/002003 patent/WO2007065269A1/en active Application Filing
Patent Citations (3)
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JPH10505479A (ja) * | 1996-01-17 | 1998-05-26 | エイチイー・ホールディングス・インコーポレーテッド・ドゥーイング・ビジネス・アズ・ヒューズ・エレクトロニクス | ダイナミックな同調可能な連続時間のGm−Cアーキテクチャを有するデルタシグマ(ΔΣ)変調器 |
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Also Published As
Publication number | Publication date |
---|---|
EP1994640A1 (en) | 2008-11-26 |
JP2009518900A (ja) | 2009-05-07 |
US7242334B2 (en) | 2007-07-10 |
WO2007065269A1 (en) | 2007-06-14 |
US20070132623A1 (en) | 2007-06-14 |
EP1994640A4 (en) | 2009-03-04 |
EP1994640B1 (en) | 2013-03-13 |
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