JP4667231B2 - Signal detection circuit - Google Patents

Description

  The present invention relates to a signal detection circuit for detecting a high-frequency signal input from an antenna or the like in a wireless communication apparatus or the like.

  Conventionally, as a technique related to a signal detection circuit for detecting a high-frequency signal, for example, there is a technique described in the following documents.

Japanese Patent No. 2561023 Japanese Patent No. 2605827 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. SC-22, NO. 3, JUNE 1987, page 335 “A CMOS Chopper Amplifier”

  Patent Document 1 describes a technique of a high-frequency signal level detection circuit and a high-frequency signal level detection method for detecting the level of a high-frequency signal by detecting with a semiconductor diode.

  Patent Document 2 discloses a mobile object identification responder that reflects and absorbs a microwave band signal radiated from an interrogator, causes the interrogator to receive the reflected microwave band signal, and reads the information using the interrogator. The technology is described.

  As described above, Patent Documents 1 and 2 disclose circuits that convert a high-frequency signal input from an antenna or the like into a DC signal by a rectifying means such as a diode and output it as a detection result.

  Non-Patent Document 1 discloses a circuit of a chopper amplifier (chopper amplifier) as means for amplifying the output of the rectifying means with low noise.

  In the conventional techniques of Patent Documents 1 and 2, when the high-frequency signal input from the antenna is a small signal such as 0.1 mV or less, the output DC signal rectified by the diode is also a small signal of several hundred μV or less. Not applicable as detection result output. For this reason, it is common to arrange a high-frequency amplifier circuit before the rectifier circuit, or arrange a DC amplifier circuit after the rectifier circuit. However, the high frequency amplifier circuit generally has a problem that it consumes a large amount of power supply current. Further, the DC amplifier circuit has a problem that it is difficult to realize stable high gain amplification due to flicker noise (also referred to as 1 / f noise) or offset of the amplifying element.

  On the other hand, in a DC amplification circuit, a chopper amplifier as in Non-Patent Document 1 is used as an amplifier as means for removing the influence of 1 / f noise and offset of the amplification element. However, the noise of the amplifier itself can be removed. In other words, it is impossible to remove noise and offset components generated at the input portion of the antenna and the rectifier circuit portion.

  In any case, there has been nothing that can achieve both high frequency signal detection sensitivity (for example, 0.1 mV) and low power supply current consumption (for example, 10 μA or less).

A signal detection circuit according to a first aspect of the present invention includes a tuning circuit that outputs a signal in which a resonance state changes according to on / off of a pulse signal and that interrupts an input high-frequency signal, and rectifies an output signal of the tuning circuit. A rectifier circuit that outputs a low-frequency signal, an amplifier circuit that amplifies the output signal of the rectifier circuit, a filter that passes only a predetermined frequency band with respect to the output signal of the amplifier circuit, the pulse signal, and the filter And an integration circuit for integrating the output signal of the multiplication circuit and outputting a detection signal corresponding to the level of the input high-frequency signal.
A signal detection circuit according to a second aspect of the present invention includes a tuning circuit that outputs a signal in which a resonance state changes according to ON / OFF of a pulse signal and that interrupts an input high-frequency signal, and rectifies an output signal of the tuning circuit. A rectifier circuit that outputs a low-frequency signal, a filter that passes only a predetermined frequency band with respect to the output signal of the rectifier circuit, an amplifier circuit that amplifies the output signal of the filter, the pulse signal, and the amplifier circuit And an integration circuit for integrating the output signal of the multiplication circuit and outputting a detection signal corresponding to the level of the input high-frequency signal.
A signal detection circuit according to a third aspect of the present invention is the signal detection circuit according to the first or second aspect, wherein the tuning circuit changes the resonance state using a MOS capacitor whose capacitance value is changed by the pulse signal. It is characterized by that.
A signal detection circuit according to a fourth aspect of the present invention is the signal detection circuit according to any one of the first to third aspects, wherein the tuning circuit has three or more resonance states.
A signal detection circuit according to a fifth aspect of the present invention is a signal detection circuit mounted on a wireless communication device including either or both of a transmission circuit and a reception circuit connected to an antenna terminal via a switching unit. A change-over switch connected to the antenna terminal and intermittently outputting an input high-frequency signal input from the antenna terminal in accordance with ON / OFF of a pulse signal; and an input signal of the change-over switch to input a frequency. A tuning circuit to be selected; a rectification circuit that rectifies an output signal of the tuning circuit to output a low-frequency signal; an amplification circuit that amplifies the output signal of the rectification circuit; A filter that passes only the frequency band, a multiplication circuit that multiplies the pulse signal and the output signal of the filter, and an output signal of the multiplication circuit that integrates Characterized in that it has an integrating circuit for outputting a detection signal corresponding to the level of the force RF signal.
A signal detection circuit according to a sixth aspect of the present invention is a signal detection circuit mounted on a wireless communication apparatus including either or both of a transmission circuit and a reception circuit connected to an antenna terminal via a switching unit. A change-over switch connected to the antenna terminal and intermittently outputting an input high-frequency signal input from the antenna terminal in accordance with ON / OFF of a pulse signal; and an input signal of the change-over switch to input a frequency. A tuning circuit to be selected; a rectifying circuit that rectifies an output signal of the tuning circuit to output a low-frequency signal; a filter that passes only a predetermined frequency band with respect to the output signal of the rectifying circuit; and an output of the filter An amplification circuit for amplifying a signal; a multiplication circuit for multiplying the pulse signal by an output signal of the amplification circuit; and integrating an output signal of the multiplication circuit, Characterized in that it has an integrating circuit for outputting a detection signal corresponding to the level of the force RF signal.
A signal detection circuit according to a seventh aspect of the present invention is the signal detection circuit according to any one of the first to sixth aspects, further comprising an input means for switching and inputting the pulse signal to the filter. And
The signal detection circuit according to an eighth aspect of the present invention is the signal detection circuit according to any one of the first to seventh aspects, wherein a switched capacitor filter is provided instead of the multiplication circuit and the integration circuit, and the switched capacitor The pulse signal is used as a capacitor switching clock of the filter.

According to the first and second aspects of the invention, the input high-frequency signal is intermittently turned on / off in response to the on / off of the pulse signal in the tuning circuit, and after rectification, amplification, and filtering (or after rectification, filtering, and amplification). Since the detection signal is obtained by multiplying with the pulse signal, low-frequency noise (1 / f noise) and offset generated from each of the tuning circuit, the rectifier circuit, and the amplifier circuit can be removed. An extremely small high-frequency signal level can be detected. Since the resonance state of the tuning circuit changes according to the on / off state of the pulse signal, when a broadband high-frequency signal component other than the desired input high-frequency signal is input, the pulse signal is turned on / off. There is also an effect that there is no generation of a rectified output signal and no erroneous detection of the signal. As a whole circuit, the function can be realized with low power consumption. Furthermore, all circuit elements can be constituted by MOS transistors, resistors, capacitors, and inductors, so that an integrated circuit can be easily formed.

According to the invention of claim 3, since the MOS capacitor is used to change the resonance state of the tuning circuit, the function can be realized by one element, and the circuit can be configured with a small size.

  According to the invention of claim 4, the tuning circuit is provided with a plurality of resonance states of 3 or more, and is controlled in cooperation with the pulse signal applied to the tuning circuit and the multiplication circuit. If there is a disturbing signal that should not be detected in addition to the high-frequency signal, this can prevent a false detection or a problem that cannot be detected when it should be detected. This can cope with a case where there are a plurality of frequencies of a desired high-frequency signal to be detected. Furthermore, it can correct | amend when the resonance state has shifted | deviated by the fluctuation | variation and dispersion | variation of a circuit element.

  According to the fifth and sixth aspects of the invention, in a wireless communication apparatus including a transmission circuit or a reception circuit, the function of the signal detection circuit can be realized with the addition of a small number of circuits in the case of a device configuration that requires an antenna changeover switch. can do.

  According to the seventh aspect of the present invention, since the input means is provided, a pulse signal having a constant amplitude can be used as a reference signal for adjusting the frequency of the filter.

  According to the eighth aspect of the invention, since the switched capacitor filter is provided, the functions of the bandpass filter, the multiplication circuit, and the integration circuit can be realized. Furthermore, since the filter characteristics of the switched capacitor filter are determined by the capacitance ratio and the switch speed, the filter frequency accuracy can be easily increased particularly when realized as an integrated circuit.

The signal detection circuit includes: a pulse generation circuit that generates a pulse signal; a tuning circuit that outputs a signal in which a resonance state changes according to on / off of the pulse signal and that interrupts an input high-frequency signal; and an output of the tuning circuit A rectifier circuit that rectifies a signal and outputs a low-frequency signal; an amplifier circuit that amplifies the output signal of the rectifier circuit; a filter that passes only a predetermined frequency band with respect to the output signal of the amplifier circuit; and the pulse A multiplication circuit that multiplies the signal and the output signal of the filter, and an integration circuit that integrates the output signal of the multiplication circuit and outputs a detection signal corresponding to the level of the input high-frequency signal.

(Configuration of Example 1)
FIG. 1 is a circuit diagram of a signal detection circuit showing Embodiment 1 of the present invention.

  This signal detection circuit includes a power supply terminal VD, an input terminal IN, an output terminal OUT, and a pulse generation circuit 1 that generates a pulse signal S1. A tuning circuit 10 is connected to the power supply terminal VD, the input terminal IN, and the output terminal of the pulse generation circuit 1, and an inverting amplifier circuit 30 is connected to the output terminal of the tuning circuit 10 via the rectifier circuit 20, Further, a filter 40 composed of a biquad band-pass filter circuit is connected to the output terminal of the amplifier circuit 30. The output terminal of the filter 40 and the output terminal of the pulse generation circuit 1 are connected to the first and second input terminals N50a and N50b of the multiplication circuit 50, respectively. The integration circuit 60 is connected to the output terminal of the multiplication circuit 50. Via the output terminal OUT.

  The tuning circuit 10 is a circuit that selects the frequency of the high-frequency signal input from the input terminal IN, and includes, for example, a 0.1 pF capacitor 11, an inductor 12 of nH, and a MOS capacitor 13. The inductor 12 and the capacitor 13 are connected in series between the power supply terminal VD and the first input terminal N10a, and the first input terminal N10a is connected to the input terminal IN. A connection point between the capacitor 11 and the inductor 12 is connected to the second input terminal N10b via the MOS capacitor 13, and the second input terminal N10b is connected to the output terminal of the pulse generation circuit 1.

  The rectifier circuit 20 is a circuit that rectifies the output signal of the tuning circuit 10, and includes, for example, a MOS transistor 21, a 400KΩ resistor 22, and a 10PF capacitor 23. The MOS transistor 21 has a gate connected to the connection point of the inductor 12 and the capacitor 13, a drain connected to the power supply terminal VD, and a source connected to the ground GND via the resistor 22. The capacitor 23 is connected in parallel with the resistor 22.

  The amplifier circuit 30 is a circuit that inputs the output signal of the rectifier circuit 20 via the DC blocking capacitor 24 and inverts and amplifies the input signal. For example, the amplifier circuit 30 includes an input resistor 31 of 10 KΩ, an operational amplifier (hereinafter referred to as “op-amp”). .) 32 and a feedback resistor 33 of 1 MΩ. The input resistor 31 has one electrode connected to the source of the MOS transistor 21 via the DC blocking capacitor 24 and the other electrode connected to the inverting input terminal of the operational amplifier 32. The non-inverting input terminal of the operational amplifier 32 is connected to the ground GND, and the inverting input terminal of the operational amplifier 32 is connected to the output terminal via the feedback resistor 33.

  The filter 40 has a band-pass characteristic that allows a signal in a predetermined band (for example, around 16 KHz) of the output signal of the amplifier circuit 30 to pass therethrough. 4, 42-2, 20 pF feedback capacitors 43, 48, 2 MΩ feedback resistors 44, and 480 KΩ feedback resistors 46, 49. The input resistor 41 has one electrode connected to the output terminal of the operational amplifier 32 via the DC blocking capacitor 34 and the other electrode connected to the inverting input terminal of the operational amplifier 42-1.

  An input resistor 45, an inverting input terminal of the operational amplifier 42-2, an input resistor 47, and an inverting input terminal of the operational amplifier 42-3 are connected in series to the output terminal of the operational amplifier 42-1. The non-inverting input terminals of the operational amplifiers 42-1 to 42-3 at each stage are connected to the ground GND. A feedback capacitor 43 and a feedback resistor 44 are connected in parallel between the inverting input terminal and the output terminal of the operational amplifier 42-1, and the feedback resistor 46 is also connected between the inverting input terminal and the output terminal of the operational amplifier 42-2. Further, a feedback capacitor 48 is also connected between the inverting input terminal and the output terminal of the operational amplifier 42-3.

  The multiplication circuit 50 is a circuit that multiplies the output signal of the output terminal of the filter 40 and the pulse signal S 1, and includes a MOS transistor 51. In the MOS transistor 51, the drain-side first input terminal N50a is connected to the output terminal of the operational amplifier 42-2, and the gate-side second input terminal N50b is connected to the output terminal of the pulse generating circuit 1.

The integration circuit 60 is a circuit that integrates the output signal of the multiplication circuit 50 and outputs the integration result as a detection signal to the output terminal OUT. The integration circuit 60 includes, for example, a 1 MΩ resistor 61 and a 50 pF capacitor 62. The resistor 61 has one electrode connected to the source of the MOS transistor 51 and the other electrode connected to the ground GND via the capacitor 62 and to the output terminal OUT.

(Operation of Example 1)
The frequency of the high frequency signal input from the input terminal IN is selected in the tuning circuit 10.

  2A and 2B are explanatory diagrams of the tuning circuit 10 in FIG. 1, in which FIG. 2A is an example of an equivalent circuit, and FIG. 2B is an example of the frequency characteristic of the output voltage. Show.

  In the equivalent circuit of FIG. 2, for example, a high frequency signal source 14 having an output impedance of 50Ω is provided on the input side, and 0.1 pF capacitors 11, 2 nH inductor 12, and inductor 12 of this high frequency signal source 14 are connected to the output terminal. A 2Ω resistor 12a corresponding to a loss such as a winding resistance, a 0.3 pF capacitor 13A, and an output terminal N10c of the tuning circuit 10 are connected. The capacitor 13A equivalently shows the sum of the capacitance of the MOS capacitor 13, the parasitic capacitance of the tuning circuit 10, and the parasitic capacitance of the rectifier circuit 20 connected to the next stage. The resonance frequency is 1 / (2π√ (LC)). With this circuit constant, a voltage amplitude can be selectively obtained for a high frequency signal of 5.8 GHz.

  By changing the voltage of the input terminal N10b connected to the MOS capacitor 13 in the tuning circuit 10, the capacitance of the MOS capacitor 13 is changed, the resonance frequency is shifted, and the output voltage of the tuning circuit 10 is changed. it can. For example, when the pulse signal S1 from the pulse generation circuit 1 is at “H” level, the capacitance is small, and if it is designed to resonate at 5.8 GHz in this state, when it is at “L” level, it is static. Since the capacitance increases and the capacitance component in parallel with the tuning circuit 10 increases, the resonance frequency shifts in a lower direction, so that the output voltage of the tuning circuit 10 for 5.8 GHz decreases.

  FIGS. 3A and 3B are operation waveform diagrams of the rectifier circuit 20. FIG. 3A is an input signal waveform (a high-frequency signal waveform having an amplitude change) of the rectifier circuit 20, and FIG. Indicates the output signal waveform of the rectifier circuit 20. An output signal waveform is obtained by shifting the envelope waveform connecting the peaks of the input signal waveform by the gate-source voltage of the MOS transistor 21 connected in the source follower.

  In the rectifier circuit 20, the source-follower-connected MOS transistor 21 operates with a bias current of about several μA, rectifies a high-frequency signal (for example, 5.8 GHz) by half-wave, and converts a direct current component proportional to the amplitude to the capacitor 23. To charge. The output voltage of the rectifier circuit 20 is amplified by the amplifier 30.

FIG. 4 is a circuit diagram showing another configuration example of the inverting amplifier circuit 30 in FIG.
Although FIG. 1 shows a configuration example of the inverting amplifier circuit 30 constituted by the operational amplifier 32, the inverting amplifier circuit 30A as shown in FIG. 4 can also be applied. The inverting amplifier circuit 30A is composed of a CMOS inverter 35 comprising a series circuit of a P-channel MOS transistor (hereinafter referred to as “PMOS”) 35a and an N-channel MOS transistor (hereinafter referred to as “NMOS”) 35b. . The source of the PMOS 35a is connected to the power supply terminal VD via the constant current source 36. The inverting amplifier circuit 30A having such a configuration can sufficiently operate even with a power supply current of about 1 μA.

  Although a DC blocking capacitor 24 is provided between the rectifier circuit 20 and the amplifier circuit 30 in FIG. 1, direct coupling may be possible depending on bias conditions and offset voltage conditions. The output voltage of the amplifier circuit 30 is input to the filter 40.

  The filter 40 is composed of a biquad band-pass filter circuit using three operational amplifiers 42-1 to 42-3, but a configuration using three inverting amplifier circuits 30A as shown in FIG. Such a circuit is applicable and can operate sufficiently even with a power supply current of about 1 μA. Although a DC blocking capacitor 34 is provided between the amplifier circuit 30 and the filter 40, direct coupling may be possible depending on bias conditions and offset voltage conditions.

FIG. 5 is a frequency characteristic diagram of the constant filter 40 shown in FIG.
The filter 40 has, for example, a bandpass characteristic having a pass band near 16 KHz, so that the output voltage of the amplifier circuit 30 in this band is passed to the multiplier circuit 50. The MOS transistor 51 in the multiplication circuit 50 is turned on / off by the pulse signal S1, and is turned on when the pulse signal S1 is at “H” level. The output of the multiplication circuit 50 = the input of the multiplication circuit 50, and the pulse signal S1. When the signal is at the “L” level, it is turned off and the output of the multiplication circuit 50 becomes zero, realizing the multiplication operation. The integration circuit 60 smoothes the 16 KHz fluctuation component of the output of the multiplication circuit 50 and outputs a detection signal corresponding to the level of the high-frequency signal from the output terminal OUT.

6A to 6G are signal waveform diagrams of each circuit portion in FIG.
When a high-frequency signal (for example, a signal of 5.8 GHz) applied to the input terminal IN is intermittent (for example, a frequency of about 1 kHz) as shown in FIG. 6A, detection is performed as shown in FIG. The output is shown.

  A high-frequency signal is input from the input terminal IN, a desired frequency component is selected in the tuning circuit 10, and converted into a low-speed signal proportional to the high-frequency amplitude in the rectifier circuit 20. The pulse generation circuit 1 generates a pulse signal S1 having a relatively low frequency as shown in FIG. That is, a pulse signal S1 having a frequency sufficiently lower than the input high-frequency signal and sufficiently higher than the signal detection speed, for example, 16 KHz is generated. The pulse signal S1 periodically changes the resonance state of the tuning circuit 10 by controlling the MOS capacitor 13 in the tuning circuit 10, and an intermittent high frequency signal is output as the output of the tuning circuit 10 as shown in FIG. obtain.

  This high frequency signal is converted by the rectifier circuit 20 into a signal as shown in FIG. This signal is amplified by the amplifier circuit 30, the noise component and the offset component are removed by the filter 40, and converted into a signal as shown in FIG. Here, the filter 40 passes the vicinity of the frequency of the pulse signal S1 (for example, 16 KHz), and attenuates the low band, the direct current component, and the high band component. For this reason, the output of the filter 40 (FIG. 6E) is an AC component having a frequency spectrum only in the vicinity of 16 KHz. The filter 40 removes noise and offset generated by the tuning circuit 10, the rectifier circuit 20, and the amplifier circuit 30.

  In the multiplication circuit 50, by multiplying the filter output (FIG. 6 (e)) and the pulse signal (FIG. 6 (b)), it can be converted into a signal containing a DC component as shown in FIG. 6 (f). By passing through the integration circuit 60, a detection output can be obtained as shown in FIG.

  FIG. 7 is a diagram illustrating an example of a frequency distribution of a noise spectrum generated by the tuning circuit 10, the rectifier circuit 20, and the amplifier circuit 30 in the signal detection circuit of FIG.

  Of the noise generated from active elements such as transistors, the 1 / f noise component suddenly increases in the low frequency range and frequencies below 10 KHz to 1000 KHz, and becomes an interference such as low-speed fluctuations. Make detection difficult. The tuning circuit 10 and the rectifier circuit 20 are mainly composed of inactive elements such as a coil (12), a capacitor (13, 23), and a diode, so that noise and the like are not generated. Are affected by low-frequency noise and offset from active elements included in power supply circuits, bias circuits, switch control circuits, and the like.

  In FIG. 6, even if noise in the low frequency range (DC to about 10 kHz) is mixed in the tuning circuit 10 and the rectifier circuit 20 and the noise waveform is superimposed on the waveform in FIG. The frequency component attenuates, and only the originally required 16 KHz amplitude component can be extracted.

(Effect of Example 1)
According to the first embodiment, in the tuning circuit 10, the input high-frequency signal is intermittently turned on / off according to the on / off of the pulse signal S1, and the detection signal is obtained by multiplying the pulse signal S1 after rectification, amplification, and filtering. Therefore, the following effects (1) to (9) are obtained.

  (1) Low-frequency noise (1 / f noise) and offset generated from the tuning circuit 10, the rectifier circuit 20, and the amplifier circuit 30 can be removed.

  (2) Although it is known that the low-frequency noise and offset of the amplifier are removed by the chopper amplifier technique as in Non-Patent Document 1, in the first embodiment, noise generated in the tuning circuit 10 and the rectifier circuit 20 The removal effect can be obtained.

  (3) In the tuning circuit 10 and the rectifier circuit 20, low-frequency noise and offset of about 100 μV are generated by connecting active elements such as a peripheral bias circuit and a control circuit, and this is generated by the amplifier circuit 30. By removing together with the low frequency noise and the offset, the low frequency noise and the offset voltage can be reduced to several μV or less, and there is an effect that an extremely small high frequency signal level can be detected.

  (4) Since the resonance state of the tuning circuit 10 is changed by the pulse signal S1, when a broadband high-frequency signal component other than a desired input high-frequency signal is input, the pulse signal S1 is turned on / off. There is also an effect that there is no generation of a rectified output signal and no erroneous detection of the signal.

  (5) The circuit elements constituting the first embodiment are the tuning circuit 10 and the rectifier circuit 20 that consume almost no power supply current, the amplifier circuit 30 and the filter 40 that can operate with a power supply current of about 10 μA, and a low frequency. The function is realized with a small power supply current consumption as a whole.

  (6) In a circuit in which 1 / f noise is remarkably distributed up to around several hundreds KHz, selecting the frequency of the pulse signal S1 of the pulse generation circuit 1 faster than 16 KHz is effective for noise suppression. However, since the operation speed of the circuit increases and the power consumption increases, the frequency of the pulse signal S1 may be appropriately selected according to the required specifications.

  (7) All circuit elements can be composed of MOS transistors, resistors, capacitors, and inductors, and can be easily integrated.

  (8) Since the MOS capacitor 13 composed of a MOS transistor is used to switch the resonance state of the tuning circuit 10, the function can be realized with one element, and the circuit can be configured with a small size.

  (9) The power supply currents of the operational amplifiers 32, 42-1 to 42-3 constituting the amplifier circuit 30 and the filter 40 can each be about 1 μA to achieve sufficient characteristics, and the circuit as a whole can be operated with power savings of about 10 μA. is there.

(Configuration of Example 2)
FIG. 8 is a circuit diagram of a signal detection circuit showing the second embodiment of the present invention. Elements common to those in FIG. 1 showing the first embodiment are denoted by common reference numerals.

  In the signal detection circuit of the second embodiment, a tuning circuit 10A having a different configuration is provided instead of the tuning circuit 10 of the first embodiment, and other circuit configurations are the same as those of the first embodiment.

The tuning circuit 10A of the second embodiment is configured as a resonance circuit including an inductor 16 and a capacitor 17 connected to an input terminal IN via a capacitor 15. Further, a plurality of (for example, four) capacitors 17-1 to 17-4 connected in parallel to the resonance circuit, and connection switching means (for example, a changeover switch) 18 for the capacitors 17-1 to 17-4. -1 to 18-4 and a control circuit 19 for controlling switching of the changeover switches 18-1 to 18-4.

(Operation of Example 2)
In the signal detection circuit according to the second embodiment, the resonance state or the resonance frequency of the tuning circuit 10A is obtained by the plurality of capacitors 17-1 to 17-4 and the changeover switches 18-1 to 18-4 in the tuning circuit 10A. Multiple states can be switched.

FIG. 9 is a diagram illustrating an example of frequency characteristics of the resonance circuit in FIG.
The five frequency characteristics (a) to (e) shown in FIG. 9 can be obtained according to the states of the changeover switches 18-1 to 18-4 of the capacitors 17-1 to 17-4 in the tuning circuit 10A. .
Fig. 9 (a); Four switches are on, maximum capacitor Fig. 9 (b); Three switches are on Fig. 9 (c); Two switches are on Fig. 9 (d); One switch Is on Fig. 9 (e); 4 switches are off and capacitor is minimum

  For example, when the frequency of a desired high-frequency signal to be detected is near the peak of the characteristic shown in FIG. 9B, three switches are provided only when the pulse signal S1 of the pulse generation circuit 1 is at "H" level. The control circuit 19 operates so that is turned on. When the pulse signal S1 is at the “L” level, control is performed to any of the states shown in FIGS. 9A, 9C, 9D, and 9E. At this time, the switching may be performed in a certain order or may be switched randomly.

  Further, when the frequency of the desired high-frequency signal is near the peak of the characteristic of FIG. 9C, the two switches are turned on only when the pulse signal S1 of the pulse generation circuit 1 is at "H" level. The operation may be performed by the control circuit 19.

(Effect of Example 2)
According to the second embodiment, the tuning circuit 10A is provided with a plurality of resonance states and controlled in cooperation with the pulse signal S1 applied to the tuning circuit 10A and the multiplication circuit 50. There exists an effect like (3).

  (1) When there is a disturbing signal that should not be detected in addition to the desired high-frequency signal to be detected, this can prevent a malfunction that cannot be detected when it should be detected.

  (2) It can cope with a case where there are a plurality of frequencies of a desired high-frequency signal to be detected.

  (3) Correction can be made when the resonance state is shifted due to fluctuations or variations in circuit elements.

(Another configuration example of the tuning circuit 10A)
FIG. 10 is a circuit diagram of a main part showing another configuration example of the tuning circuit 10A in FIG.
Although the tuning circuit 10A of FIG. 8 shows the plurality of capacitors 17-1 to 17-4, the present invention is not limited to this. For example, the inductor 16-1, the resistor 17-7, or a combination thereof may be switched by the changeover switches 18-5 to 18-7, or the control voltage VS applied to the variable capacitance element 17-6 may be changed. 8 may be used for switching.

(Configuration of Example 3)
FIG. 11 is a circuit diagram of a main part of a wireless communication apparatus equipped with a signal detection circuit showing Embodiment 3 of the present invention. Elements common to those shown in FIG. It is attached.

  In FIG. 11, a configuration example suitable for a case where a signal detection circuit is used as a part of a wireless communication apparatus including one or both of a transmission circuit and a reception circuit is shown. The signal detection circuit according to the third embodiment is basically the same as that according to the first embodiment, and a transmission / reception antenna terminal AT is connected to the input terminal IN side via an antenna switching means 70. The antenna switching means 70 includes a switch 71 for connecting / blocking the antenna terminal AT and the transmission circuit 74, a switch 72 for connecting / blocking the antenna terminal AT and the reception circuit 75, and the antenna terminal AT and signal detection. And a change-over switch 73 for connecting / disconnecting the tuning circuit 10 in the circuit.

The transmission / reception switching switches 71 and 72 are turned on / off by a control signal (not shown) or the like or by a pulse signal S1 from the pulse generation circuit 1. The changeover switch 73 for the signal detection circuit is controlled to be turned on / off by the pulse signal S1 from the pulse generation circuit 1. In Figure 1 of the first embodiment and switches the electrostatic capacitance of the MOS capacitor 13 in the tuning circuit 10 by the pulse signal S1. On the other hand, in the third embodiment, the function similar to the first embodiment is realized by switching the input side of the tuning circuit 10 by the changeover switch 73 without switching the inside of the tuning circuit 10 by the pulse signal S1. Yes.

  As an application of the signal detection circuit of the third embodiment, for example, in order to reduce the power consumption of the wireless communication device, the reception circuit 75 is turned off during reception standby, and a weak high-frequency signal from the antenna terminal AT is used. Is received by the signal detection circuit, and the reception circuit 75 is turned on based on the detection result.

(Operation of Example 3)
In the first embodiment , the capacitance of the MOS capacitor 13 in the tuning circuit 10 is switched by the pulse signal S1 from the pulse generating circuit 1 so as to obtain the fluctuation or intermittentness of the high frequency signal. 3 is performed by operating the changeover switch 73.

  The operation method of the switch 73 is such that when the pulse signal S1 is at “H” level, the changeover switch 73 is turned on so that the high frequency signal is conducted to the tuning circuit 10 and is not conducted when it is at “L” level. I do. For this purpose, the switch 71 to the transmission circuit 74 is turned off, the switch 72 to the reception circuit 75 is turned off, and the switch 73 to the tuning circuit 10 is turned on / off corresponding to the pulse signal S1.

  As another operation method, the switch 73 to the tuning circuit 10 is turned on, and either or both of the switch 71 to the transmission circuit 74 and the switch 72 to the reception circuit 75 are set to the “H” level. By turning off when the signal is “L” and turning on when “L”, the impedance of the transmission circuit 74 or the reception circuit 75 is connected to the antenna terminal AT, so that the resonance state can be changed.

(Effect of Example 3)
The third embodiment has the following effects (1) and (2).

  (1) In a wireless communication device including the transmission circuit 74 or the reception circuit 75, in the case of a device configuration that requires an antenna changeover switch, the function of the signal detection circuit can be realized with the addition of a small number of circuits.

  (2) Although the reception circuit 75 of the wireless communication apparatus has a signal detection function, generally, since the reception circuit 75 requires a power supply current of several tens of mA or more, it is an alternative to the signal detection circuit of the third embodiment. It cannot be. Therefore, if the signal detection circuit of the third embodiment is mounted on a wireless communication device, a beneficial effect can be exhibited.

(Configuration of Example 4)
FIG. 12 is a circuit diagram of a signal detection circuit showing the fourth embodiment of the present invention. Elements common to those in FIG. 1 showing the first embodiment are denoted by common reference numerals.

  In the signal detection circuit of the fourth embodiment, a changeover switch 76 that is switched by a control signal or the like is provided between the amplifier circuit 30 and the filter 40 of the first embodiment, and the pulse signal S1 from the pulse generation circuit 1 is directly (or After appropriate level shift / amplitude adjustment, the signal is input to the filter 40. Other configurations are the same as those of the first embodiment.

(Operation of Example 4)
If the changeover switch 76 is connected to the amplifier circuit 30 side by a control signal or the like, the same operation as in the first embodiment can be performed. If the changeover switch 76 is connected to the pulse generation circuit 1 side, a pulse signal S1 having a constant amplitude from the pulse generation circuit 1 is input to the filter 40. As a result, a DC voltage proportional to the amplitude of the pulse signal S1 passed through the filter 40 can be obtained at the output of the integrating circuit 50.

(Effect of Example 4)
According to the fourth embodiment, since the changeover switch 76 is provided, the following effects (1) to (3) are obtained.

  (1) Since the passing frequency of the filter 40 changes due to fluctuations and fluctuations in circuit constants such as resistors and capacitors, adjustment is necessary when these fluctuations cannot be ignored. By switching the changeover switch 76 to the pulse generation circuit 1 side, the pulse signal S1 having a constant amplitude can be used as a reference signal for adjusting the frequency of the filter 40.

  (2) Specifically, the output voltage of the integration circuit 60 is monitored while changing the constants (resistance value, capacitance value) of the filter 40 in a state where the changeover switch 76 is switched to the pulse generation circuit 1 side. Thus, the peak of the pass band of the filter 40 can be matched with the pulse frequency.

  (3) In the signal detection circuit of the fourth embodiment, it is desirable to match the frequency of the pulse signal S1 of the pulse generation circuit 1 or the passage of the filter 40, and the configuration of the fourth embodiment reduces the number of additional circuits. Easy adjustment means can be provided.

(Configuration of Example 5)
FIG. 13 is a circuit diagram of a signal detection circuit showing the fifth embodiment of the present invention. Elements common to those in FIG. 1 showing the first embodiment are denoted by common reference numerals.

  In the signal detection circuit according to the fourth embodiment, a switched capacitor filter 80 is provided instead of the multiplication circuit 50 and the integration circuit 60 according to the first embodiment. Other configurations are the same as those of the first embodiment.

  The switched capacitor filter 80 includes two-stage operational amplifiers 81-1 and 81-2, capacitors 82-1 to 82-5, and switches 83-1 to 83-6 for switching connection between the capacitors 82-1 to 82-5. It consists of and. For example, the capacitances C1 and C2 of the capacitors 82-1 and 82-2 are 5 pF, the capacitance C5 of the capacitor 82-5 is 2.5 pF, and the capacitances C3 and C4 of the capacitors 82-3 and 82-4 are 80 pF. ON / OFF of the switches 83-1 to 83-6 is controlled by the pulse signal S 1 from the pulse generation circuit 1.

  The output terminal of the filter 40 is connected to the inverting input terminal of the operational amplifier 81-1 through the switch 83-1, the capacitor 82-1, and the switch 83-2. A feedback capacitor 82-3 is connected between the inverting input terminal and the output terminal of the operational amplifier 81-1, and a series circuit of a switch 83-3, a capacitor 82-5, and a switch 83-4 is connected. . The output terminal of the operational amplifier 81-1 is connected to the inverting input terminal of the operational amplifier 81-2 via the switch 83-5, the capacitor 82-2, and the switch 83-6. A feedback capacitor 82-4 is connected between the inverting input terminal and the output terminal of the operational amplifier 81-2. The non-inverting input terminals of the operational amplifiers 81-1 and 81-2 are connected to the ground GND. One electrode of the switches 83-1, 83-3 to 83-6 is connected to the ground GND. One electrode of the switch 83-2 is connected to the output terminal OUT.

  The switched capacitor filter 80 is configured as a biquad low-pass filter. When the frequency of the pulse signal S1 at which the switches 83-1 to 83-6 operate is fsHz, the cutoff frequency fc is

When C3 = C4, the Q value of filter 80 is

It is. When the frequency of the pulse signal S1 for operating the switches 83-1 to 83-6 is 16 KHz with the capacitor value in FIG. 13, the cutoff frequency fc is

Thus, it has a low-pass filter characteristic of about 160 Hz.

(Operation of Example 5)
FIG. 14 is a diagram showing the frequency characteristics of the switched capacitor filter 80 in FIG.

  The switched capacitor filter 80 is originally designed as a 160 Hz low-pass filter, but has a sampling operation using a 16 KHz clock (pulse signal S1), and therefore a +/− 160 Hz signal centered on a frequency that is a natural number multiple of 16 KHz. Has the same output characteristics as near 160 Hz.

  In the configuration of FIG. 13, the characteristics of a bandpass filter near 16 KHz are obtained by sufficiently attenuating near 160 Hz and 32 KHz or more by the filter 40 in the next stage of the amplifier circuit 30 and then connecting to the switched capacitor filter 80. Conversion to a low-frequency signal can be realized. As a result, a detection signal waveform can be obtained without using the multiplication circuit 50 and the integration circuit 60 of the first embodiment, having a frequency conversion function to a frequency component of 160 Hz or less while having a narrow band characteristic around 16 KHz.

(Effect of Example 5)
According to the fifth embodiment, there are the following effects (1) and (2).

  (1) The switched capacitor filter 80 can realize the functions of a bandpass filter, a multiplier circuit, and an integration circuit. Since the switched capacitor filter 80 has a filter characteristic determined by the capacitance ratio and the switch speed, the filter frequency accuracy can be easily increased particularly when realized as an integrated circuit.

  (2) Although the filter 40 for removing components of 160 Hz or less and components of 32 KHz or more is necessary in the previous stage of the switched capacitor filter 80, it can be configured as a filter having a relatively wide band and not requiring accuracy.

  In addition, this invention is not limited to the said Examples 1-5, A various deformation | transformation and utilization form are possible. Examples of such modifications and usage forms include the following (a) to (i).

  (A) FIGS. 1 and 8 show a configuration in which the coupling capacitors 11 and 15 to the antenna terminal AT are connected to the parallel resonance circuit including the inductors 12 and 16 and the capacitors 13 and 17 as the tuning circuits 10 and 10A. Other various tuning circuits or matching circuits can be similarly applied. Examples include a T-type matching circuit, a pi-type matching circuit, and a matching circuit using a mutual inductor.

  (B) Although the tuning circuits 10 and 10A using the inductors 12 and 16 are shown, a filter or the like using a piezoelectric element may be used.

  (C) FIGS. 1 and 8 show a method of changing or switching the capacitors 13, 17-1 to 17-4 as means for changing the resonance state of the tuning circuits 10 and 10A by the pulse signal S1. In addition to the method using the variable capacitance diode 17-6, the method for switching the tap of the inductor 16, the method for changing the Q value of the resonance circuit by connecting the resistor 17-7, the method for switching a plurality of inductors, the mutual inductor Various circuit configurations can be applied, such as a method using a variable resistor and a method of changing a Q value of a resonance circuit by connecting a variable resistor.

  When switching a plurality of capacitors 17-1 to 17-4 as shown in FIG. 8, capacitors having a power-of-two ratio of 1, 2, 4, 8, 16,. It is also possible to do this.

  (D) In FIG. 1, FIG. 8, FIG. 11, FIG. 12, FIG. 13, the connection order of the amplifier circuit 30 and the filter 40 may be reversed, or one or a plurality of amplifier circuits and filters are connected in cascade. Also good.

  (E) In FIG. 1, the multiplication circuit 50 using the switching MOS transistor 51 is shown. However, a multiplication circuit having linearity may be used, or a double-wave rectification circuit using a plurality of switches or the like may be used.

  (F) The action of the pulse signal S1 on the tuning circuits 10 and 10A is to change or intermittently change the level of the high-frequency signal with the period of the pulse signal S1, so that in addition to the method shown in the embodiment, from the input terminal IN A method of inserting an attenuation circuit somewhere in the high-frequency signal path leading to the rectifier circuit 20, a method of changing the rectification efficiency of the rectifier circuit 20, and the input impedance of the transmitter circuit 74 or the receiver circuit 75 connected in parallel to the antenna terminal AT It is also possible to change the method.

  (G) In FIG. 1, FIG. 8, FIG. 11, and FIG. 12, it is also possible to place a comparator or the like on the output side of the integrating circuit 60 and extract the output as a digital signal.

  (H) In FIG. 1, the MOS transistors 21 and 51 may be bipolar transistors or GaAs transistors.

  (I) In FIGS. 1 and 13, the amplifier circuit 30, the filter 40, and the switched capacitor filter 80 may use various circuit systems such as a differential amplifier in addition to the operational amplifier.

1 is a circuit diagram of a signal detection circuit showing a first embodiment of the present invention. It is explanatory drawing of the tuning circuit 10 in FIG. It is an operation | movement waveform diagram of the rectifier circuit 20 in FIG. FIG. 6 is a circuit diagram showing another configuration example of the inverting amplifier circuit 30 in FIG. 1. It is a frequency characteristic figure of the filter 40 in FIG. FIG. 2 is a signal waveform diagram of each circuit portion in FIG. 1. 2 is a diagram illustrating an example of a frequency distribution of a noise spectrum generated by a tuning circuit 10, a rectifier circuit 20, and an amplifier circuit 30 in the signal detection circuit of FIG. It is a circuit diagram of the signal detection circuit which shows Example 2 of this invention. It is a figure which shows the example of the frequency characteristic of the resonance circuit in FIG. FIG. 10 is a circuit diagram of a main part showing another configuration example of the tuning circuit 10A in FIG. It is a circuit diagram of the principal part of the radio | wireless communication apparatus carrying the signal detection circuit which shows Example 3 of this invention. It is a circuit diagram of the signal detection circuit which shows Example 4 of this invention. It is a circuit diagram of the signal detection circuit which shows Example 5 of this invention. It is a figure which shows the frequency characteristic of the switched capacitor filter 80 in FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Pulse generation circuit 10,10A Tuning circuit 20 Rectifier circuit 30 Amplifier circuit 40 Filter 50 Multiplication circuit 60 Integration circuit 70 Antenna switching means 71-73,76 Changeover switch 74 Transmission circuit 75 Reception circuit 80 Switched capacitor filter

Claims (8)

A tuning circuit that outputs a signal in which a resonance state changes according to on / off of a pulse signal and an input high-frequency signal is intermittent ;
A rectifying circuit that rectifies the output signal of the tuning circuit and outputs a low-frequency signal ;
An amplifier circuit for amplifying the output signal of the rectifier circuit;
A filter that passes only a predetermined frequency band with respect to the output signal of the amplifier circuit;
A multiplication circuit for multiplying the pulse signal and the output signal of the filter;
An integration circuit for integrating the output signal of the multiplication circuit and outputting a detection signal corresponding to the level of the input high-frequency signal;
A signal detection circuit comprising: A tuning circuit that outputs a signal in which a resonance state changes according to on / off of a pulse signal and an input high-frequency signal is intermittent ;
A rectifying circuit that rectifies the output signal of the tuning circuit and outputs a low-frequency signal ;
A filter that passes only a predetermined frequency band with respect to the output signal of the rectifier circuit;
An amplifier circuit for amplifying the output signal of the filter;
A multiplication circuit for multiplying the pulse signal by the output signal of the amplification circuit;
An integration circuit for integrating the output signal of the multiplication circuit and outputting a detection signal corresponding to the level of the input high-frequency signal;
A signal detection circuit comprising: 3. The signal detection circuit according to claim 1, wherein the tuning circuit is configured to change the resonance state by using a MOS capacitor whose capacitance value is changed by the pulse signal. The signal detection circuit according to claim 1, wherein the tuning circuit has three or more resonance states . A signal detection circuit mounted on a wireless communication device including either or both of a transmission circuit and a reception circuit connected to an antenna terminal via a switching unit,
A changeover switch that is connected to the antenna terminal and intermittently outputs an input high-frequency signal input from the antenna terminal in accordance with on / off of a pulse signal;
A tuning circuit that inputs an output signal of the changeover switch and selects a frequency;
A rectifying circuit that rectifies the output signal of the tuning circuit and outputs a low-frequency signal ;
An amplifier circuit for amplifying the output signal of the rectifier circuit;
A filter that passes only a predetermined frequency band with respect to the output signal of the amplifier circuit;
A multiplication circuit for multiplying the pulse signal and the output signal of the filter;
An integration circuit for integrating the output signal of the multiplication circuit and outputting a detection signal corresponding to the level of the input high-frequency signal;
A signal detection circuit comprising: A signal detection circuit mounted on a wireless communication device including either or both of a transmission circuit and a reception circuit connected to an antenna terminal via a switching unit,
A changeover switch that is connected to the antenna terminal and intermittently outputs an input high-frequency signal input from the antenna terminal in accordance with on / off of a pulse signal;
A tuning circuit that inputs an output signal of the changeover switch and selects a frequency;
A rectifying circuit that rectifies the output signal of the tuning circuit and outputs a low-frequency signal ;
A filter that passes only a predetermined frequency band with respect to the output signal of the rectifier circuit;
An amplifier circuit for amplifying the output signal of the filter;
A multiplication circuit for multiplying the pulse signal by the output signal of the amplification circuit;
An integration circuit for integrating the output signal of the multiplication circuit and outputting a detection signal corresponding to the level of the input high-frequency signal;
A signal detection circuit comprising: In the signal detection circuit according to any one of claims 1 to 6,
An input means for switching and inputting the pulse signal to the filter is provided. In the signal detection circuit according to any one of claims 1 to 7,
A signal detection circuit comprising a switched capacitor filter instead of the multiplication circuit and the integration circuit, and using the pulse signal as a capacitor switching clock of the switched capacitor filter.

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