CN103634023B - Pulse reply circuit and method that a kind of high accuracy and wide cut adapt to - Google Patents

Pulse reply circuit and method that a kind of high accuracy and wide cut adapt to Download PDF

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Publication number
CN103634023B
CN103634023B CN201310611965.XA CN201310611965A CN103634023B CN 103634023 B CN103634023 B CN 103634023B CN 201310611965 A CN201310611965 A CN 201310611965A CN 103634023 B CN103634023 B CN 103634023B
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China
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signal
circuit
signals
high accuracy
wide cut
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CN201310611965.XA
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Chinese (zh)
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CN103634023A (en
Inventor
董建涛
缪国峰
刘磊
宋志刚
薛沛祥
李墩泰
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CLP Kesiyi Technology Co Ltd
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CETC 41 Institute
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Abstract

The invention provides pulse reply circuit and method that a kind of high accuracy and wide cut adapt to, wherein circuit is that the request signal of Gauss or cos/cos2 pulse adjusts finishing circuit to enter after power splitter by signal, be divided into two paths of signals, the first via is carried out the amplification of signal by signal amplifier, high-resolution digital delay is realized by high-resolution digital delaying circuit in the second tunnel, two paths of signals is the passive low ventilating filter through connecting respectively, after filtering interference signals, produce the high-precision triggering signal of replying thereby enter comparator; Described signal conditioning circuit, described signal amplifier and described comparator are also connected with described discrete power and described low-dropout regulator respectively, to avoid the noise crosstalk interference of power supply. Adopt such scheme, realized high anti-noise processing, by the processing of LPF, power supply and the isolation of the hollow out of circuit board, improve greatly the environmental suitability of equipment, also avoid distorted signal to disturb simultaneously, effective guarantee of triggering precision is provided.

Description

Pulse reply circuit and method that a kind of high accuracy and wide cut adapt to
Technical field
The invention belongs to technical field of measurement and test, the arteries and veins that in particular a kind of high accuracy and wide cut adapt toRush answering circuit and method.
Background technology
Pulse reply technology is widely used in the distance test of navigator, commonly VOR, towerThe equipment such as health and precise distance measurement, in relevant fields such as airborne, surface beacon, simulator and testsWidely apply. The pulse signal form of this patent mainly refers to Gaussian pulse and cos/cos2 pulse.
Complex electromagnetic environment has been the normality of modern war, is very easy to cause signal to happen suddenly in time domainOn crisscross on changeable, spatial domain, energy, height distributes, and therefore designs one and can resist various noisesSignal disturbs, and can to adapt to wide level amplitude circuits for triggering be very important. At present a lot of fieldsNavigation Equipment all fail to adapt to timely the complex electromagnetic environment under modernized war condition, particularlyShoran Simulator design is especially backward, and modern war has harshness to the amplitude of electromagnetic environment signalRequirement, can not meet the demand for development of equipment.
Therefore, there is defect in prior art, needs to improve.
Summary of the invention
Technical problem to be solved by this invention is for the deficiencies in the prior art, and a kind of high accuracy is providedPulse reply circuit and method with wide cut adaptation.
Technical scheme of the present invention is as follows:
The pulse reply circuit that high accuracy and wide cut adapt to, wherein, comprise signal conditioning circuit,Discrete power, low-dropout regulator, power splitter, signal amplifier, high-resolution digital delay circuit,Passive low ventilating filter, comparator and PCB hollow out spacer assembly; The inquiry of Gauss or cos/cos2 pulseAsk signal adjusts finishing circuit to enter after power splitter by signal, is divided into two paths of signals, and the first via is by letterNumber amplifier carries out the amplification of signal, and high score is realized by high-resolution digital delaying circuit in the second tunnelDistinguish the digital delay of rate, two paths of signals is respectively through the passive low ventilating filter of series connection, and filtering interfering is believedAfter number, produce the high-precision triggering signal of replying thereby enter comparator; Described comparator around passes throughThe interference of PCB hollow out spacer assembly isolation outer signals; Described signal conditioning circuit, described signal amplifyDevice and described comparator are also connected with described discrete power and described low-dropout regulator respectively, to keep awayThe noise crosstalk interference of power-free.
The pulse reply circuit that described high accuracy and wide cut adapt to, wherein, described high-resolution digitalDelay circuit is set to the precise time that predetermined conditioning signal postpones.
The pulse reply circuit that described high accuracy and wide cut adapt to, wherein, described predetermined adjusting letterThe precise time of number development is for to carry out signal after digital high-speed quantification, after the delay of 20ns at least,The digital-to-analogue of carrying out signal transforms rear transmission.
The pulse reply circuit that described high accuracy and wide cut adapt to, wherein, described two paths of signals is etc.The two paths of signals of the phases such as width.
The pulse reply method that high accuracy and wide cut adapt to, wherein, comprises the following steps:
Step 1: the request signal of Gauss or cos/cos2 pulse enters merit by signal conditioning circuit and dividesAfter device, be divided into two paths of signals, the first via is carried out the amplification of signal by signal amplifier 12, the second tunnelRealize high-resolution digital delay by high-resolution digital delaying circuit, two paths of signals is warp respectivelyCross the passive low ventilating filter of series connection, after filtering interference signals, produce high accuracy thereby enter comparatorReply triggering signal;
Step 2: described comparator is around by the interference of PCB hollow out spacer assembly isolation outer signals;Described signal conditioning circuit, described signal amplifier and described comparator also respectively with described discrete powerAnd described low-dropout regulator is connected, to avoid the noise crosstalk interference of power supply.
The pulse reply method that described high accuracy and wide cut adapt to, wherein, described high-resolution numberThe performing step of word delay circuit is: according to different pulse lengths, the time that delay circuit is set is arteries and veinsRush the half of time.
The pulse reply method that described high accuracy and wide cut adapt to, wherein, described passive LPFDevice is two, and the bandwidth of passive low ventilating filter described in synchronous interaction; When the signal of two-way enters nothingAfter the low pass filter of source, filter out signal parasitic in two paths of signals, only retain the specific letter needingNumber.
Adopt such scheme, realized high-resolution digital delay, can be minimum precision 20ns'sPostpone, support to control arbitrarily, and existing technology is difficult to be accurate to 20ns. The present invention has realized highAnti-noise processing, by the isolation of the processing of LPF, power supply and the hollow out of circuit board, greatlyThe environmental suitability of raising equipment also avoids distorted signal to disturb simultaneously, and the effective of triggering precision is providedEnsure. In addition, the triggering that the present invention divides two-way relatively to realize wide cut by merit, and fixed level triggers difficultyTo adapt to the variation of different capacity.
Brief description of the drawings
Fig. 1 is the structural representation of the pulse reply of high accuracy of the present invention and wide cut adaptation.
Detailed description of the invention
Below in conjunction with the drawings and specific embodiments, the present invention is described in detail.
Embodiment 1
As shown in Figure 1, the pulse reply that high accuracy and wide cut adapt to comprises discrete power 10, signal conditionCircuit 14, power splitter 15, high-resolution digital delay circuit 16, passive low ventilating filter 17, ratioCompared with device 20 and pcb board hollow out spacer assembly 21. The request signal of Gauss or cos/cos2 pulse, entersEnter power splitter 15, be divided into two paths of signals, the signal amplifier 12 of leading up to carries out the amplification of signal, anotherThe high-resolution digital delay 16 of leading up to is realized high-resolution digital delay, and two paths of signals dividesDo not pass through passive low ventilating filter 13,17, after filtering interference signals, enter the comparator of strict isolation20, thus the high-precision triggering signal of replying produced. Different circuit section power supply is independently, adoptsDifferent discrete powers, as 10,18, they all directly access by general supply single-point, inPower supply is not shared with other any circuit in way, and to responsive circuit such as 12,20 through low voltage differencesVoltage-stablizer 11,19 carried out filtering noise again, avoids the noise crosstalk interference of power supply, comparator 20 weeksEnclose by the interference of hollow out PCB21 isolation outer signals, improved greatly the stable of comparison circuit 20Property, and high-resolution digital delay can be realized accurate calibration.
The type of pulse can be selected, conventionally only between Gaussian pulse and cos/cos2 pulse, selects,High-resolution digital delay circuit 16 is along with pulse pattern is synchronously adjusted, in the time selecting Gaussian pulse, and oneRoad signal needs accurately to postpone 3us; In the time selecting cos/cos2 pulse, need accurately to postpone 0.8us; SeparatelyOne road signal amplifies twice, and two-way enters after passive filter 13,17, also by the type difference of signal,The passive filter of synchronous change different bandwidth, realizes the noiseless comparison of high accuracy of signal, generationReply the transmitting trigger condition that triggers left and right answer signal.
Under this technical scheme, need to adopt high-precision clock source, and sample rate is 100MSa/sADC and DAC, postpone mainly among FPGA, realize, the internal work clock of FPGA operates in surelyFixed 200MHz, and need the strict hard wired logic of controlling FPGA inside, ensure accurately FPGA'sInternal latency, in addition, the outside interference of having avoided thoroughly power supply and space, can be very easilyControl and trigger.
Embodiment 2
On the basis of above-described embodiment, further, the pulse that provides a kind of high accuracy and wide cut to adapt toAnswering circuit, wherein, comprise signal conditioning circuit, discrete power, low-dropout regulator, power splitter,Signal amplifier, high-resolution digital delay circuit, passive low ventilating filter, comparator and PCB engraveEmpty spacer assembly; The request signal of Gauss or cos/cos2 pulse enters merit by signal conditioning circuit and dividesAfter device, be divided into two paths of signals, the first via is carried out the amplification of signal by signal amplifier 12, the second tunnelRealize high-resolution digital delay by high-resolution digital delaying circuit, two paths of signals is warp respectivelyCross the passive low ventilating filter of series connection, after filtering interference signals, produce high accuracy thereby enter comparatorReply triggering signal; Described comparator passes through PCB hollow out spacer assembly isolation outer signals aroundDisturb; Described signal conditioning circuit, described signal amplifier and described comparator also respectively with described pointVertical power supply and described low-dropout regulator are connected, to avoid the noise crosstalk interference of power supply.
Described high-resolution digital delay circuit is set to the precise time that predetermined conditioning signal postpones.
The precise time that described predetermined conditioning signal postpones is for to carry out signal after digital high-speed quantification,After the delay of 20ns at least, after transforming, the digital-to-analogue of carrying out signal sends.
Described two paths of signals is the two paths of signals of the phases such as constant amplitude.
A kind of pulse reply method that the present invention also provides high accuracy and wide cut to adapt to, comprises the following steps:
Step 1: the request signal of Gauss or cos/cos2 pulse adjusts finishing circuit to enter merit by signalDivide after device, be divided into two paths of signals, the first via is carried out the amplification of signal, second by signal amplifier 12High-resolution digital delay is realized by high-resolution digital delaying circuit in road, and two paths of signals respectivelyThrough the passive low ventilating filter of series connection, after filtering interference signals, produce high-precision thereby enter comparatorDegree reply triggering signal;
Step 2: described comparator is around by the interference of PCB hollow out spacer assembly isolation outer signals;Described signal conditioning circuit, described signal amplifier and described comparator also respectively with described discrete powerAnd described low-dropout regulator is connected, to avoid the noise crosstalk interference of power supply.
In above-mentioned steps, the performing step of described high-resolution digital delaying circuit is: according to differencePulse length, the half that the time that delay circuit is set is the burst length. If the arteries and veins of 6us time spanPunching, need arrange and postpone 3us, is the half of burst length length; Counting clock in FPGA inside is200MHz, a clock is 0.5us, therefore 600x0.5us=3us needs to postpone 600 clocksCycle; In like manner, if postpone 0.8us, the cycle needing is 160.
In above-mentioned steps, described passive low ventilating filter is two, and passive low pass described in synchronous interactionThe bandwidth of wave filter; When the signal of two-way enters after passive low ventilating filter, filter out at two paths of signalsIn, parasitic signal, only retains the signal specific needing. The passive LPF of different signal demandsThe bandwidth of device is different, and carries out the band of low pass filter according to the bandwidth of plate level introducing interfering signalWide design. Under normal circumstances, the cycle is the Gaussian pulse signal of 0.6us, need to design 500kHz'sLPF bandwidth.
Adopt such scheme, realized high-resolution digital delay, can be minimum precision 20ns'sPostpone, support to control arbitrarily, and existing technology is difficult to be accurate to 20ns. The present invention has realized highAnti-noise processing, by the isolation of the processing of LPF, power supply and the hollow out of circuit board, greatlyThe environmental suitability of raising equipment also avoids distorted signal to disturb simultaneously, and the effective of triggering precision is providedEnsure. In addition, the triggering that the present invention divides two-way relatively to realize wide cut by merit, and fixed level triggers difficultyTo adapt to the variation of different capacity.
Should be understood that, for those of ordinary skills, can be according to the above description in additionImprove or conversion, and all these improvement and conversion all should belong to the protection of claims of the present inventionScope.

Claims (7)

1. the pulse reply circuit that high accuracy and wide cut adapt to, is characterized in that, comprises signalModulate circuit, discrete power, low-dropout regulator, power splitter, signal amplifier, heightResolution digital delay circuit, passive low ventilating filter, comparator and the isolation of PCB hollow outDevice; The request signal of Gauss or cos/cos2 pulse adjusts finishing circuit to enter by signalAfter power splitter, be divided into two paths of signals, the first via is carried out putting of signal by signal amplifierGreatly, the second tunnel is realized high-resolution numeral by high-resolution digital delaying circuit and is prolongedLate, two paths of signals is the passive low ventilating filter through connecting respectively, after filtering interference signals,Thereby enter comparator and produce the high-precision triggering signal of replying; Described comparator is logical aroundCross the interference of PCB hollow out spacer assembly isolation outer signals; Described signal conditioning circuit,Described signal amplifier and described comparator also respectively with described discrete power and described low pressurePoor voltage-stablizer is connected, to avoid the noise crosstalk interference of power supply.
2. the pulse reply circuit that high accuracy as claimed in claim 1 and wide cut adapt to, its featureBe, described high-resolution digital delay circuit is set to predetermined conditioning signal developmentPrecise time.
3. the pulse reply circuit that high accuracy as claimed in claim 2 and wide cut adapt to, its featureBe, the precise time of described predetermined conditioning signal development is high for signal being carried out to numeralAfter speed quantizes, after the delay of 20ns at least, after transforming, the digital-to-analogue of carrying out signal sends.
4. the pulse reply circuit that high accuracy as claimed in claim 1 and wide cut adapt to, its featureBe the two paths of signals of the phase such as described two paths of signals is constant amplitude.
5. the pulse reply method that high accuracy and wide cut adapt to, is characterized in that, comprises followingStep:
Step 1: the request signal of Gauss or cos/cos2 pulse adjusts finishing circuit to enter by signalEnter after power splitter, be divided into two paths of signals, the first via is by signal amplifier 12Carry out the amplification of signal, the second tunnel is real by high-resolution digital delaying circuitExisting high-resolution digital delay, two paths of signals is passive low through what connect respectivelyBandpass filter, after filtering interference signals, produces high accuracy thereby enter comparatorReply triggering signal;
Step 2: described comparator is around by PCB hollow out spacer assembly isolation outer signalsDisturb; Described signal conditioning circuit, described signal amplifier and described comparatorAlso be connected with discrete power and low-dropout regulator respectively, to avoid power supplyNoise crosstalk interference.
6. the pulse reply method that high accuracy as claimed in claim 5 and wide cut adapt to, its featureBe, the performing step of described high-resolution digital delaying circuit is: according to different arteries and veinsRush length, the half that the time that delay circuit is set is the burst length.
7. the pulse reply method that high accuracy as claimed in claim 5 and wide cut adapt to, its featureBe, described passive low ventilating filter is two, and passive low pass filtered described in synchronous interactionThe bandwidth of ripple device; When the signal of two-way enters after passive low ventilating filter, filter out twoThe signal of parasitism in the signal of road, only retains the signal specific needing.
CN201310611965.XA 2013-11-26 2013-11-26 Pulse reply circuit and method that a kind of high accuracy and wide cut adapt to Expired - Fee Related CN103634023B (en)

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EP3026816B1 (en) * 2014-11-26 2017-11-15 Nxp B.V. A low-pass filter
CN104714207B (en) * 2014-12-10 2017-04-12 中国电子科技集团公司第二十研究所 Tacan beacon simulator ranging response probability implementation method
CN106679694B (en) * 2015-12-20 2019-12-03 中国电子科技集团公司第二十研究所 The air-air response Time delay measurement Precision calibration device and method of tacan beacon simulator

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1090446A (en) * 1992-09-18 1994-08-03 冲电气工业株式会社 Adaptive equalization receiver and maximum likelihood series are calculated receiver
JP2007174367A (en) * 2005-12-22 2007-07-05 Oki Electric Ind Co Ltd Signal detection circuit
CN202940804U (en) * 2012-11-29 2013-05-15 南京璇星科技发展有限公司 Missile-borne coherent multi-station triggering working pulse transponder

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3874145B2 (en) * 1998-06-10 2007-01-31 ソニー株式会社 Modulation circuit, transmission device, and transmission circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1090446A (en) * 1992-09-18 1994-08-03 冲电气工业株式会社 Adaptive equalization receiver and maximum likelihood series are calculated receiver
JP2007174367A (en) * 2005-12-22 2007-07-05 Oki Electric Ind Co Ltd Signal detection circuit
CN202940804U (en) * 2012-11-29 2013-05-15 南京璇星科技发展有限公司 Missile-borne coherent multi-station triggering working pulse transponder

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