JP4660124B2 - Thin film transistor manufacturing method - Google Patents

Description

The present invention relates to a method for manufacturing a thin film transistor .

Conventionally, an amorphous silicon film has been widely used for a channel layer (active layer) of an active matrix liquid crystal TFT (Thin Film Transistor).
The mobility of the amorphous silicon film is as small as approximately 1 cm ² / (V · s), and the wiring line width cannot be reduced in order to ensure the required ON / OFF characteristics of the TFT element. Therefore, low-temperature polysilicon TFTs using low-temperature polysilicon with higher crystallinity and higher mobility have been developed in place of amorphous silicon as next-generation liquid crystal TFTs that require high-definition, high-brightness, high-speed response, etc. It has been introduced into small liquid crystal devices and the like.

  In order to promote crystallization of low-temperature polysilicon and improve mobility, a treatment such as annealing using an excimer laser device is performed. Since the distance between the source and the drain of the TFT element (approximately several μm) and the size of the crystal grain of the low temperature polysilicon (approximately 1 μm) are close to each other, the density of the crystal grain boundary between the source electrode and the drain electrode tends to vary. . For this reason, when low-temperature polysilicon is used, it is difficult to produce a TFT element having uniform operating characteristics in a plane, and therefore the yield is low. Also, a manufacturing device such as an excimer laser device is expensive, and the manufacturing cost is higher than that of low-temperature polysilicon. For this reason, at present, the investment effect on the low-temperature polysilicon TFT is small.

  On the other hand, an attempt has been made on a laboratory scale to produce a TFT element using a semiconductor material other than the above-described amorphous silicon and low-temperature polysilicon. Zinc oxide (ZnO) has recently attracted attention because it has advantages such as a wide energy level interval (band gap), high mobility, and crystallization even at room temperature.

The zinc oxide film can be formed, for example, by a method such as molecular beam epitaxy or metalorganic vapor phase epitaxy. Conventionally, deposition of zinc oxide has been performed on a sapphire substrate or a plastic substrate, but excitation by a laser is necessary, and it is not suitable for deposition on a large-area substrate. Therefore, this film formation method has low productivity and cannot be applied to industrial film formation. A magnetron sputtering method is known as a method for forming a zinc oxide film on a large-area substrate (see, for example, Patent Document 1).
JP-A-9-87833

  In the magnetron sputtering method, a semiconductor film can be formed on a 4-inch glass substrate, and a film with a larger area is being studied using a large target. In a ZnO-TFT that is being developed, a ZnO active layer having a thickness of about 1000 mm or less is formed using a magnetron sputtering method.

However, the deposition of the ZnO thin film by the magnetron sputtering method has a problem that the deposition rate is as small as about 20 Å / min. Furthermore, since the substrate is exposed to plasma, there is a problem that the gate insulating film formed on the substrate is damaged. For example, P.I. F. Carcia et al., Mat. Res. Soc. Symp. In a ZnO-TFT device in which an active layer is formed on a vol. 1769 (2003) by a conventional magnetron sputtering method, since the plasma damages the gate insulating film and the active layer itself, the mobility is about 5 cm ² / (V · s). Disclose to

An object of this invention is to provide the manufacturing method of the thin-film transistor which has a high-speed response characteristic.

In order to achieve the above object, a method of manufacturing a thin film transistor according to the first aspect of the present invention includes:
A method of manufacturing a thin film transistor using zinc oxide as a semiconductor layer,
By depositing on the gate electrode or the semiconductor layer while reacting with reactive gas the metal particles produced by sputtering of the facing target each composed of another metal of Group II, Group III or Group IV, Forming a gate insulating film;
It is characterized by that.

In order to achieve the above object, a method of manufacturing a thin film transistor according to the second aspect of the present invention includes:
A method of manufacturing a thin film transistor using zinc oxide as a semiconductor layer,
A gate insulating film is formed by depositing on the gate electrode or the semiconductor layer while reacting a reactive gas with particles generated by sputtering of an opposing target, one containing Ti and the other containing Si.
It is characterized by that.

The reactive gas is O ₂ Gas or N ₂ It is desirable to include gas.

In order to achieve the above object, a method of manufacturing a thin film transistor according to the third aspect of the present invention includes:
A method of manufacturing a thin film transistor using zinc oxide as a semiconductor layer,
Metal particles produced by sputtering of an opposing target, one containing Ti and the other containing Al, are N ₂ A gate insulating film is formed by depositing on the gate electrode or the semiconductor layer while reacting with a gas.
It is characterized by that.

In order to achieve the above object, a method of manufacturing a thin film transistor according to the fourth aspect of the present invention includes:
A method of manufacturing a thin film transistor using zinc oxide as a semiconductor layer,
Sputtering using an opposing target, one containing ZnO and the other containing Mg, is at least N ₂ A gate insulating film made of a (ZnMgO / ZnO: N) x stacked film is formed on the gate electrode or the semiconductor layer by supplying the gas.
It is characterized by that.

In order to achieve the above object, a method of manufacturing a thin film transistor according to the fifth aspect of the present invention includes:
A method of manufacturing a thin film transistor using zinc oxide as a semiconductor layer,
Sputtering is performed using a counter target that includes ZnMgO on one side and ZnO: N on the other side, thereby forming a gate insulating film made of a (ZnMgO / ZnO: N) x stacked film on the gate electrode or the semiconductor layer. Film
It is characterized by that.

In order to achieve the above object, a method of manufacturing a thin film transistor according to the sixth aspect of the present invention includes:
Prepare a substrate on which a gate electrode is formed,
Forming a gate insulating film on the substrate;
The gate insulation is performed on a substrate spaced from the plasma while oxidizing zinc particles generated by sputtering with a plasma formed between a pair of targets that are arranged oppositely and at least one of which is made of zinc. A method of manufacturing a thin film transistor in which a zinc oxide semiconductor film is formed by depositing so as to correspond to the gate electrode through a film,
The metal particles generated by sputtering of the pair of targets each composed of another metal of Group II, Group III, or Group IV are reacted with a reactive gas, and the oxide or nitride is deposited to deposit the oxide or nitride. Forming a gate insulating film;
It is characterized by that.

In order to achieve the above object, a method of manufacturing a thin film transistor according to the seventh aspect of the present invention includes:
Prepare a substrate on which a channel layer composed of a zinc oxide thin film is formed,
The metal particles produced by sputtering of the opposing target, each composed of another Group II, Group III, or Group IV metal, react with a reactive gas while depositing the oxide or nitride on the substrate. And forming a gate insulating film for insulating the channel layer,
A gate electrode is disposed at a position corresponding to the channel layer via the gate insulating film;
It is characterized by that.

According to the present invention, a method for manufacturing a thin film transistor having a high-speed response characteristic can be provided.

  A TFT element on which a transparent conductive film according to an embodiment of the present invention is formed and a method for forming the transparent conductive film will be described below with reference to the drawings.

FIGS. 1A and 1B are an enlarged plan view and an enlarged sectional view showing the structure of a TFT element according to an embodiment of the present invention, respectively.
As shown, PECVD (Plasma Enhanced Chemical Vapor Deposition) is formed on a commercially available glass substrate 10 so as to cover a gate electrode 11 made of metal such as Al formed by EB (Electron Beam) vapor deposition through a metal mask. ), A gate insulating film 12 made of a silicon nitride film or the like formed at an ambient temperature of 250 ° C. is formed. On this gate insulating film, as will be described later, zinc oxide (ZnO) having a thickness of about 1000 mm at a film formation rate of about 60 mm / min through a metal mask by reactive DC magnetron sputtering of a counter target method. ) A channel layer (active layer) 13 is formed. The source / drain electrodes 14 facing each other through the ZnO active layer 13 are formed by EB vapor deposition of a metal such as Al through a metal mask, whereby the bottom gate structure ZnO-TFT device 1 is manufactured. Here, the SD electrode interval L is 100 μm, and the SD electrode width W is 1.5 mm.

FIG. 2 shows an example of ON / OFF characteristics of the TFT element 1 measured using a semiconductor parameter analyzer. The ON / OFF ratio when a voltage of 10 V was applied between the SD electrodes was 3 × 10 ⁷ or more. As shown in the figure, when the gate voltage Vg is not applied (Vg = 0V), the OFF current between the SD electrodes is 5 × 10 ⁻¹⁵ A or less of the detection sensitivity of the measuring instrument. The ON current between the SD electrodes when a gate voltage of 10 V was applied (Vg = 10 V) was 4 × 10 ⁻⁸ A.

FIG. 3 shows a hysteresis curve of the ON / OFF characteristic of the TFT element shown in FIG. As shown in the figure, in the repeated measurement, the OFF current between the SD electrodes was approximately 5 × 10 ⁻¹³ A, and the ON current between the SD electrodes was 8 × 10 ⁻⁷ A.

  FIG. 4 shows an example of the diffraction spectrum of the ZnO active layer 13 of the TFT element 1 measured using XRD (X-ray Diffraction). As shown in the figure, this ZnO active layer 13 has crystallinity represented by a peak intensity of 1555.6 cps in the c-axis (002) direction and a full width at half maximum (FWHM) of 0.44.

Next, a method for forming a ZnO active layer will be briefly described with reference to FIG.
One set (two in the embodiment) of target A and target B made of the same high-purity Zn is arranged in the ground shield 121 arranged opposite to each other.
An upper portion of the film formation chamber 124 is formed by plasma generated between the targets A and B facing each other by the action of the formed electromagnetic field by applying a negative voltage to the electrode plate 123 on which the permanent magnet 122 is disposed by the DC power source 128. The argon gas introduced from is excited, and the A and B targets are sputtered with the excited argon ions.
At this time, oxygen gas is supplied at a predetermined flow rate from the gas supply line to the vicinity of the substrate 125 mounted on the mounting table 126 on the lower side in the film formation chamber 124, and near the surface of the substrate 125. Then, the sputtered Zn particles are reacted to deposit a ZnO film having a predetermined thickness on the SiN gate insulating film.
Here, the substrate 125 is placed at a position vertically separated from the plasma generated by application of the RF power source 129 during film formation, and is not substantially affected by the plasma.
Further, oxygen gas is supplied to the lower part of the film formation chamber 124 in which the substrate 125 is arranged, in contrast to the argon gas supplied to the upper part of the film formation chamber 124 in which the earth shield 121 is arranged. The argon gas is secured in the upper part of the film formation chamber 124, and the oxygen gas supplied in the vicinity of the substrate 125 stays in the lower part of the film formation chamber 124. The plasma generated in the upper part of the deposition chamber 124 is confined in the upper part of the deposition chamber 124 and is not generated in the lower part of the deposition chamber 124. Accordingly, the plasma generated between the opposing targets A and B excites the argon gas, but does not excite the oxygen gas near the substrate 125.
The glass substrate can be rotated by a driving device (not shown), but is stationary during the ZnO film formation, no bias voltage is applied, and the substrate temperature is room temperature.
Therefore, the heater 127 provided below the mounting table 126 is not used, or is heated so that the glass substrate reaches room temperature.

In the reactive DC magnetron sputtering of the opposed target method, the plasma is formed between the opposed targets A and B above the substrate and does not directly act on the substrate 125. Therefore, the ZnO active layer damages the gate electrode and the gate insulating film. Formed without.
Returning to FIG. 1, in the ZnO active layer 13, carriers induced by the voltage applied to the gate electrode 11 move between the SD electrodes. The ZnO active layer 13 with good crystallinity showing the preferential orientation in the c-axis (002) direction maintains the carrier mobility relatively high. Therefore, the TFT element 1 has a relatively high ON / OFF current ratio even when the gate electrode and the channel layer are thinned, and responds to switching at high speed.

Hereinafter, the characteristics and film formation conditions of the ZnO active layer and the laminated insulating film according to the embodiment of the present invention will be described in more detail using examples.
Example 1
As shown in FIG. 6, a glass substrate 10 equivalent to Corning # 1737 on which the gate electrode 11 and the gate insulating film 12 are formed is placed in a film formation chamber 124 of the facing target type sputtering apparatus shown in FIG. A pair of targets A and B made of Zn were disposed, and a ZnO active layer having a thickness of about 1000 mm was formed under the film forming conditions shown in Table 1. Next, the source / drain electrodes 14 separated on the channel region of the ZnO active layer shown in FIG. 1 were formed by EB evaporation of Al through a metal mask.
(Deposition conditions)

  The diffraction spectrum of this ZnO film and the ZnO film formed in Comparative Example 1 was measured using XRD. FIG. 7 shows both diffraction spectra. The ZnO film of Example 1 has approximately 6 times the peak intensity in the (002) direction as compared with the ZnO film of Comparative Example 1, and its half-value width (FWHM) is also smaller than that of the ZnO film of Comparative Example 1. .

  A part of the formed ZnO film was damaged, its cross section was exposed, and SEM observation was performed from an oblique angle of 45 degrees. FIG. 8 shows an SEM observation image of the surface. The surface of the area indicated by the dotted line is smooth. In addition, grains of 20 nm or less were observed in that region. No damage on the substrate surface was observed.

(Example 2)
Except that 5N purity Ti and 5N purity Si were used as opposing targets and the substrate temperature was set to 70 ° C., the conditions described in Table 1 were set, and (TiOx) was formed on the glass substrate on which the Al gate electrode was formed. / SiOy) z laminated film was formed as a gate insulating film. As shown in Table 2, according to SEM observation, the (TiOx / SiOy) z laminated film had a smooth surface. Next, in the same manner as in Example 1, a ZnO active layer and an SD electrode were sequentially formed, and the TFT element shown in FIG. 1 was obtained.
(SEM observation results of various laminated films formed)

(Example 3)
In the same manner as in Example 2 except that N ₂ gas was supplied instead of O ₂ gas, the flow rate was 50 sccm, and the substrate temperature was 150 ° C. (TiNx) on the glass substrate on which the Al gate electrode was formed. / SiNy) z laminated film was formed. As shown in Table 2, according to SEM observation, the (TiNx / SiNy) z laminated film had a smooth surface. Next, in the same manner as in Example 1, a ZnO active layer and an SD electrode were sequentially formed, and the TFT element shown in FIG. 1 was obtained.

Example 4
A glass on which an Al gate electrode is formed in the same manner as in Example 3 except that 5N purity Al is used as an opposing target instead of 5N purity Si used in Example 3 and the substrate temperature is 100 ° C. A (TiNx / AlNy) z laminated film was formed on the substrate. As shown in Table 2, according to SEM observation, the (TiNx / AlNy) z laminated film had a smooth surface. Next, in the same manner as in Example 1, a ZnO active layer and an SD electrode were sequentially formed, and the TFT element shown in FIG. 1 was obtained.

(Example 5)
An Al gate electrode is formed in the same manner as in Example 1 except that intrinsic-ZnO and 5N purity Mg are used as an opposing target, the flow rate of O ₂ gas is zero, and N ₂ gas is supplied at a flow rate of 25 sccm. A (ZnMgO / ZnO: N) x laminated film was formed on the glass substrate. As shown in Table 2, according to SEM observation, the (ZnMgO / ZnO: N) x laminated film had a smooth surface. Next, in the same manner as in Example 1, a ZnO active layer and an SD electrode were sequentially formed, and the TFT element shown in FIG. 1 was obtained.

(Example 6)
A zinc oxide and magnesium co-oxide (ZnMgO) and nitrogen coordinated zinc oxide (ZnO: N) were used as the counter target, and the flow rate of N ₂ was set to zero. Then, a (ZnMgO / ZnO: N) x laminated film was formed on the glass substrate on which the Al gate electrode was formed. According to SEM observation, the (ZnMgO / ZnO: N) x laminated film had a smooth surface. Next, in the same manner as in Example 1, a ZnO active layer and an SD electrode were sequentially formed, and the TFT element shown in FIG. 1 was obtained.

(Example 7)
Two sheets with an Al gate electrode and a SiN gate insulating film formed under the same film forming conditions as in Example 1 except that a 5N purity metal zinc target having a major axis of 300 mm in cross section was used. A ZnO film was formed on the 4-inch glass substrate. The average thickness of the formed ZnO film was about 1000 mm, and the in-plane variation of the film thickness of each substrate was about 10% or less.

(Comparative Example 1)
Using a well-known high-frequency magnetron sputtering apparatus in which the substrate to be processed is placed facing the target, under the film forming conditions shown in Table 3, approximately 1000 mm on the glass substrate on which the Al gate electrode and the SiN gate insulating film are formed. A ZnO film having a thickness of 1 mm was formed.
(Deposition conditions by high frequency magnetron sputtering)
As shown in FIG. 7, the ZnO film of Comparative Example 1 had a peak intensity of 247.1 cps in the (002) direction, and its half-value width (FWHM) was 0.51.
In the same manner as in Example 1, the SEM observation of the ZnO film was performed. FIG. 9 shows an SEM observation image of the surface. The surface of the film was rougher than that of Example 1, and approximately 50 nm grains were observed on the surface.

  As described above, according to the embodiment of the present invention, since the ZnO active layer is formed using the reactive sputtering method of the counter target method, in the bottom gate structure ZnO-TFT device, the gate electrode and the gate insulating film are formed. A ZnO active layer can be formed without plasma damage.

  In the TFT element having the bottom gate structure (inverted stagger structure) created under the conditions shown in Comparative Example 1, damage to the gate insulating film is observed, and the operation of the TFT element decreases in mobility, increases in OFF current, etc. Undesirable results were obtained.

This is considered to be caused by the fact that the substrate to be processed is facing the target.
By depositing a ZnO thin film on the substrate to be processed using a counter-target magnetron sputtering method in which the position of the substrate to be processed is shifted from the axial direction of the target (off-axis), Plasma damage was greatly reduced.

  Moreover, according to said embodiment, a ZnO active layer can be formed, without heating a board | substrate. At this time, the sample temperature of the ZnO active layer is approximately 70 ° C. or less.

Furthermore, according to the above-described embodiment, a high film formation rate of about 150 Å / min or more can be realized.
In the formation of the ZnO thin film by the high frequency magnetron sputtering method using the conventional high resistance zinc oxide target, the film forming rate was about 20 Å / min. A ZnO thin film can be formed at a high deposition rate of about 150 Å / min or higher by the reactive DC magnetron sputtering method in which oxygen gas is introduced using the above-described high-purity conductive metal zinc target.

  According to the above embodiment, the crystallinity of the ZnO film is improved as compared with the conventional high-frequency magnetron sputtering.

The present invention is not limited to the above embodiment, and its application, modification, and the like are arbitrary.
In the above embodiment, it has been described that a ZnO active layer is formed on a TFT element having a gate to obtain a TFT element having a bottom gate structure. However, the gate electrode may be formed after forming the ZnO active layer. For example, as shown in FIG. 10, a ZnO active layer 22 having a thickness of about 1000 mm is formed on a glass substrate 21 by reactive DC magnetron sputtering using a counter target method. A source / drain electrode 23, a gate insulating film 24, and a gate electrode 25 are sequentially formed on the ZnO active layer 22 to obtain a TFT element 20 having a top gate structure.
In this case, when forming the gate insulating film 24, the ZnO active layer 22 is annealed at the processing temperature. Therefore, the crystallinity of the ZnO active layer 22 is further improved, and as a result, the mobility is also increased.

  In the above embodiment, it has been described that the opposing SD electrodes are formed so as to sandwich the ZnO active layer formed so as to correspond to the Al gate electrode. However, as shown in FIG. 11A, the SD electrodes 14 facing each other are formed on the ZnO active layer 13 formed on the gate insulating film 12 so that the entire lower surface thereof is in contact with the ZnO active layer 13. May be.

In the above embodiment, the n ⁺ region is not particularly described, but it is desirable to form the n ⁺ region in order to improve the ON current characteristics of the TFT element.
As shown in FIG. 11- (b), on the ZnO active layer 13 formed on the gate insulating film 12, a counter magnet DC sputtering method is used, for example, with indium and zinc as targets or gallium. It is preferable to form the transparent conductive film (zinc oxide film) 15 having a low resistance as an n ⁺ region by reactive sputtering using oxygen gas with zinc as a target. In this case, an n-type zinc oxide film is formed by magnetron sputtering in the same manner as in Example 1 using a pair of targets made of the same material such as indium-zinc oxide (InZnO) or gallium-zinc oxide (GaZnO). It can also be formed. Note that as the n ⁺ region, a ZnO co-oxide with another metal such as AlZnO or ZnO: F or a ZnO oxide film in which a non-metal atom is coordinated can be used.
It is also possible to form a p-type zinc oxide semiconductor film by a reactive DC magnetron sputtering method using a counter target. In this case, N ₂ gas is supplied using a counter-target type DC magnetron sputtering apparatus with a plurality of targets made of the same material including zinc oxide as a main material and donors such as Ga, In, and Al. By doing so, a P-type zinc oxide semiconductor containing a donor and N can be formed.

In the above embodiment, it has been described that the substrate temperature is set to room temperature. However, in order to improve the crystallinity of the ZnO thin film, unreacted Zn particles deposited on the substrate, a reactive gas such as O _{2, and the} like In order to promote the reactivity of the above and to improve the deposition rate of the ZnO thin film, the surface of the substrate may be heated by a heater or the like to raise the temperature.

  In the above embodiment, the application of the bias voltage to the glass substrate has not been particularly described. However, in order to further improve the crystallinity of the ZnO film, a bias voltage (electric field) of DC, pulse, or high frequency voltage may be applied. In this case, by controlling the bias voltage, even if the voltage applied to the electrode plate is relatively small, the kinetic energy of the ion component is controlled on the surface of the glass substrate, and the incident energy is equivalent to that of conventional high-frequency magnetron sputtering. It becomes possible to deposit the sputtered particles. On the other hand, in the formation of the ZnO film by the conventional method, a self-bias voltage cannot be applied to the substrate in order to minimize plasma damage. Therefore, the ion energy of the sputtered particles having a high kinetic energy component cannot be controlled.

  In the above-described embodiment, it has been described that film formation can be performed simultaneously on two stationary 4-inch substrates to be processed with in-plane uniformity within 10%. Further, by sequentially rotating the glass substrate during film formation, film formation with a width of 300 mm can be continuously performed. In addition, by using a target whose major axis of the cross section is larger than 300 mm, a film having a width of 300 mm or more can be formed. Thus, a ZnO film having a larger area can be formed simultaneously by moving the glass substrate and changing the target size.

  In the above embodiment, it has been described that oxygen gas or the like is introduced at the time of film formation, but activated oxygen, ozone, atomic oxygen, oxygen radicals, or the like are introduced in order to improve the film formation speed and reactivity. May be.

  In the above embodiment, the voltage is applied to the electrode plate from the constant current DC power source. However, the voltage may be applied to the electrode plate using a pulse power source or a high frequency power source. In this case, the pulse power source includes a pulse tuning circuit, and the high frequency power source includes a predetermined matching device such as a matching box.

  In the above embodiment, it has been described that the gate insulating film made of silicon nitride is formed at a processing temperature of 250 ° C. by PE-CVD. However, ICP (inductive coupled plasma) -CVD in which a high-frequency electric field component is also used. Thus, for example, the gate insulating film may be formed at a processing temperature of 150 ° C. or lower.

In the above embodiment, it has been described that the gate insulating film is formed by PE-CVD, but the gate insulating film is not limited to the silicon nitride film. A (TiOx / SiOy) z laminated film, a (TiNx / SiNy) z laminated film, and a (ZnMgO / ZnO: N) x laminated film so as to cover the gate electrode 32 formed on the glass substrate 31 by the sputtering of the counter target method. The TFT element 30 shown in FIG. 12 may be manufactured by forming the gate insulating film 33 made of any one of a film and the like. In this case, the TFT element 30 is obtained by forming the ZnO active layer 34 and the SD electrode 35 on the gate insulating film 33 made of the laminated film.
In the embodiment, it has been described that the insulating film is formed by sputtering a set of targets composed of the metal target or a set of targets composed of the oxide or nitride of the metal. However, the insulating film can also be formed by sputtering a set of targets, one of which is a metal target and the other is a metal oxide or metal nitride.

In the above embodiment, it has been described that the TFT element 1 is configured on the glass substrate 10. However, since the gate insulating film can be formed at a processing temperature of 150 ° C. or lower and the ZnO active layer can be formed at room temperature, the TFT element can be formed on a plastic substrate.
The element formed on the plastic substrate is not limited to a TFT, and may be a thin film transistor such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) or a MESFET (Metal-Semiconductor Field Effect Transistor).

It is a schematic diagram which shows the structure of the TFT element which concerns on embodiment of this invention. (A) is an enlarged plan view. (B) is an enlarged sectional view. It is a measurement chart which shows the example of the ON / OFF characteristic of the TFT element of FIG. 1 measured using the semiconductor parameter analyzer. It is a measurement chart which shows another example of the ON / OFF characteristic of the TFT element of FIG. 1 measured using the semiconductor parameter analyzer. It is a schematic diagram which shows the example of the diffraction spectrum of the ZnO active layer measured by XRD. It is a schematic diagram which shows schematic structure of the magnetron sputtering apparatus of the opposing target system which concerns on embodiment of this invention. It is a schematic diagram which shows the TFT element in which the bottom gate structure which concerns on embodiment of this invention was formed. (A) is a top view. (B) is sectional drawing. 6 is a schematic diagram showing an example of a diffraction spectrum measured by XRD of a ZnO active layer formed in Example 1 and Comparative Example 1. FIG. 3 is a SEM image showing the film surface of the ZnO active layer formed in Example 1. FIG. 3 is an SEM image showing a film surface of a ZnO active layer of Comparative Example 1. It is a schematic diagram which shows another structure of a TFT element. (A) is a schematic diagram which shows the other structure of a TFT element. (B) is a schematic diagram showing a schematic structure of a TFT element in which an n ⁺ region is formed. It is a schematic diagram which shows the structure of the TFT element which has another gate structure.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 TFT element 10 Glass substrate 11 Al gate electrode 12 SiN gate insulating film 13 ZnO active layer 14 Source / drain electrode 20 TFT element 21 Glass substrate 22 ZnO active layer 23 Source / drain electrode 24 SiN gate insulating film 25 Al gate electrode 30 TFT Element 31 Substrate 32 Al gate electrode 33 Gate insulating film 34 ZnO active layer 35 Source / drain electrode

Claims (8)

A method of manufacturing a thin film transistor using zinc oxide as a semiconductor layer,
By depositing on the gate electrode or the semiconductor layer while reacting with reactive gas the metal particles produced by sputtering of the facing target each composed of another metal of Group II, Group III or Group IV, Forming a gate insulating film;
A method for manufacturing a thin film transistor. A method of manufacturing a thin film transistor using zinc oxide as a semiconductor layer,
A gate insulating film is formed by depositing on the gate electrode or the semiconductor layer while reacting a reactive gas with particles generated by sputtering of an opposing target, one containing Ti and the other containing Si.
A method for manufacturing a thin film transistor.   The reactive gas is O ₂ Gas or N ₂ Including gas,
The method for producing a thin film transistor according to claim 2. A method of manufacturing a thin film transistor using zinc oxide as a semiconductor layer,
Metal particles produced by sputtering of an opposing target, one containing Ti and the other containing Al, are N ₂ A gate insulating film is formed by depositing on the gate electrode or the semiconductor layer while reacting with a gas.
A method for manufacturing a thin film transistor. A method of manufacturing a thin film transistor using zinc oxide as a semiconductor layer,
Sputtering using an opposing target, one containing ZnO and the other containing Mg, is at least N ₂ A gate insulating film made of a (ZnMgO / ZnO: N) x stacked film is formed on the gate electrode or the semiconductor layer by supplying the gas.
A method for manufacturing a thin film transistor. A method of manufacturing a thin film transistor using zinc oxide as a semiconductor layer,
Sputtering is performed using a counter target that includes ZnMgO on one side and ZnO: N on the other side, thereby forming a gate insulating film made of a (ZnMgO / ZnO: N) x stacked film on the gate electrode or the semiconductor layer. Film
A method for manufacturing a thin film transistor. Prepare a substrate on which a gate electrode is formed,
  Forming a gate insulating film on the substrate;
The gate insulation is performed on a substrate spaced from the plasma while oxidizing zinc particles generated by sputtering with a plasma formed between a pair of targets that are arranged oppositely and at least one of which is made of zinc. A method of manufacturing a thin film transistor in which a zinc oxide semiconductor film is formed by depositing so as to correspond to the gate electrode through a film,
The metal particles generated by sputtering of the pair of targets each composed of another metal of Group II, Group III, or Group IV are reacted with a reactive gas, and the oxide or nitride is deposited to deposit the oxide or nitride. Forming a gate insulating film;
A method for manufacturing a thin film transistor. Prepare a substrate on which a channel layer composed of a zinc oxide thin film is formed,
The metal particles produced by sputtering of the opposing target, each composed of another Group II, Group III, or Group IV metal, react with a reactive gas while depositing the oxide or nitride on the substrate. And forming a gate insulating film for insulating the channel layer,
A gate electrode is disposed at a position corresponding to the channel layer via the gate insulating film;
A method for manufacturing a thin film transistor.