JP4654865B2 - Electronic component mounting method - Google Patents

Electronic component mounting method Download PDF

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Publication number
JP4654865B2
JP4654865B2 JP2005288107A JP2005288107A JP4654865B2 JP 4654865 B2 JP4654865 B2 JP 4654865B2 JP 2005288107 A JP2005288107 A JP 2005288107A JP 2005288107 A JP2005288107 A JP 2005288107A JP 4654865 B2 JP4654865 B2 JP 4654865B2
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JP
Japan
Prior art keywords
electronic component
solder
bump
thermosetting resin
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Application number
JP2005288107A
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Japanese (ja)
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JP2007103449A (en
Inventor
忠彦 境
秀喜 永福
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Priority to JP2005288107A priority Critical patent/JP4654865B2/en
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to KR1020077017344A priority patent/KR101196722B1/en
Priority to CNA200680005056XA priority patent/CN101120441A/en
Priority to PCT/JP2006/319403 priority patent/WO2007043355A1/en
Priority to EP06810809A priority patent/EP1929514A1/en
Priority to US11/816,177 priority patent/US7793413B2/en
Priority to TW095136239A priority patent/TW200721930A/en
Publication of JP2007103449A publication Critical patent/JP2007103449A/en
Application granted granted Critical
Publication of JP4654865B2 publication Critical patent/JP4654865B2/en
Active legal-status Critical Current
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0133—Ternary Alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954—Other details of electrical connections
    • H05K2201/10977—Encapsulated connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/0475—Molten solder just before placing the component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1189—Pressing leads, bumps or a die through an insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • H05K3/323—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives by applying an anisotropic conductive adhesive layer over an array of pads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof
    • H05K3/3485—Applying solder paste, slurry or powder
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)

Description

本発明は、金バンプが設けられた電子部品を基板に実装する電子部品実装方法に関するものである。   The present invention relates to an electronic component mounting method for mounting an electronic component provided with gold bumps on a substrate.

電子部品を基板に実装する方法として、電子部品に設けられたバンプを基板に形成された接合端子に接合する形態が広く用いられており、バンプの材質としては導電性に優れ酸化による表面劣化のない金が多用されている。金を材質とするバンプを接合端子に接合する方法としては、従来より、熱硬化性樹脂中に導電粒子を混入した異方性導電剤が知られている。この方法では、電子部品の搭載に先立って接合端子を覆って予め異方性導電剤を塗布しておき、電子部品実装動作に際しバンプを接合端子に押圧しながら加熱する。これにより、バンプと接合端子とを導電粒子を介して電気的に導通させるとともに、硬化した熱硬化性樹脂によって電子部品本体と基板とを接着する。   As a method for mounting an electronic component on a substrate, a form in which bumps provided on the electronic component are bonded to bonding terminals formed on the substrate is widely used, and the material of the bump is excellent in conductivity and surface deterioration due to oxidation. No gold is heavily used. As a method for bonding a bump made of gold to a bonding terminal, an anisotropic conductive agent in which conductive particles are mixed in a thermosetting resin is conventionally known. In this method, an anisotropic conductive agent is applied in advance so as to cover the joining terminal prior to mounting the electronic component, and heating is performed while pressing the bump against the joining terminal during the electronic component mounting operation. Thus, the bump and the junction terminal are electrically connected through the conductive particles, and the electronic component main body and the substrate are bonded by the cured thermosetting resin.

この異方性導電剤を用いる方法は、電気的な導通と電子部品本体の基板への接着とを同時に行うことができると言う利点を有するものの、良好な導通を確保し低接続抵抗を実現するためには、バンプと接合端子との接触状態を全てのバンプについて均一に保つことが求められる。このため異方性導電剤を用いた部品実装においては、高度の搭載精度を備えた実装設備を必要としており、簡便な方法で金のバンプが設けられた電子部品を高品質で実装可能な方法が求められていた。   Although the method using this anisotropic conductive agent has the advantage that electrical conduction and adhesion of the electronic component body to the substrate can be performed simultaneously, good conduction is ensured and low connection resistance is realized. Therefore, it is required to keep the contact state between the bumps and the junction terminals uniform for all the bumps. For this reason, component mounting using an anisotropic conductive agent requires mounting equipment with a high degree of mounting accuracy, and a method that enables high-quality mounting of electronic components provided with gold bumps by a simple method. Was demanded.

そしてこのような要望を満たすことを目的として、異方性導電剤に含有される導電粒子を半田粒子に置き換えた構成のものを用いる方法が各種提案されている（例えば特許文献１〜４参照）。これらの特許文献例においては、樹脂に半田粒子を混入したシート状の異方性導電剤を用い、電子部品実装動作においてバンプと接続端子との間に介在した半田粒子を溶融させることにより、良好な導通性を確保するようにしている。
特開平８−１８６１５６号公報 特開平１０−１１２４７３号公報 特開平１１−４０６４号公報 特開平１１−１７６８７９号公報 For the purpose of satisfying such a demand, various methods using a configuration in which the conductive particles contained in the anisotropic conductive agent are replaced with solder particles have been proposed (see, for example, Patent Documents 1 to 4). . In these patent document examples, a sheet-like anisotropic conductive agent in which solder particles are mixed into a resin is used, and solder particles interposed between bumps and connection terminals are melted in an electronic component mounting operation. To ensure proper continuity.
JP-A-8-186156 JP-A-10-112473 Japanese Patent Laid-Open No. 11-4064 Japanese Patent Laid-Open No. 11-176879

しかしながら、上述の各例に示す方法において、半田粒子を構成する半田材質として近年多用されている錫（Ｓｎ）系の半田を用いる場合には、以下に説明するようなカーゲンダルボイドに起因する強度劣化が生じるという問題がある。すなわち、金（Ａｕ）を材質とするバンプと接合端子とを半田を介在させて接合する接合界面近傍においては、時間の経過とともにＡｕ中へのＳｎの拡散が進行する。このとき異方性導電剤を用いる半田接合では、含有される半田粒子の量は通常の半田接合と比較して少ないため、半田接合部とバンプ中のＳｎの濃度差は大きくなりやすく、結果として半田接合部からバンプ中へのＳｎの拡散が促進されることとなる。この結果、半田接合部においてＳｎが拡散した部分に微小なボイドが発生し、接合強度を大きく低下させる要因となっていた。   However, in the methods shown in the above-described examples, when tin (Sn) -based solder that has been widely used in recent years is used as the solder material constituting the solder particles, it is caused by a cardendal void as described below. There is a problem that strength deterioration occurs. That is, in the vicinity of the bonding interface where the bump made of gold (Au) and the bonding terminal are bonded via the solder, the diffusion of Sn into Au proceeds with time. At this time, in solder bonding using an anisotropic conductive agent, the amount of solder particles contained is small compared to normal solder bonding, so that the difference in the concentration of Sn in the solder bonding portion and the bump tends to increase. The diffusion of Sn from the solder joint portion into the bump is promoted. As a result, a minute void is generated in a portion where Sn is diffused in the solder joint portion, which is a factor for greatly reducing the joint strength.

そこで本発明は、金のバンプを半田接合する電子部品実装において、カーゲンダルボイドに起因する強度劣化を防止することができる電子部品実装方法を提供することを目的とする。   Therefore, an object of the present invention is to provide an electronic component mounting method capable of preventing strength deterioration due to cardendal voids in electronic component mounting in which gold bumps are soldered.

本発明の電子部品実装方法は、電子部品に設けられた金バンプを基板に形成された接合端子に錫または錫系の半田を用いて接合するとともに、前記電子部品と基板とを熱硬化性樹脂によって接着することによりこの電子部品を基板に実装する電子部品実装方法であって、前記半田を粒子状にした半田粒子を含む熱硬化性樹脂を前記基板の表面の前記接合端子を包含する範囲に塗布する樹脂塗布工程と、加熱機能を有する保持ヘッドによって前記電子部品を保持した状態で、前記金バンプと前記接合端子との位置合わせを行う位置合わせ工程と、前記保持ヘッドによる前記電子部品の加熱を行いながらこの保持ヘッドを下降させて前記金バンプを前記接合端子に接合するバンプ接合工程と、前記熱硬化性樹脂を熱硬化させて前記電子部品を前記基板に接着する樹脂硬化工程とを含み、前記バンプ接合工程において、前記塗布された熱硬化性樹脂を電子部品の下面によって外側へ向かって流動させて、前記熱硬化性樹脂中に含有された前記半田粒子を前記保持ヘッドによって前記半田の融点よりも高温に加熱された前記金バンプの側面に接触させるとともに、前記半田粒子の一部を前記金バンプと前記接合端子との間に挟み込んだ状態で溶融させる。 The electronic component mounting method according to the present invention is a method in which a gold bump provided on an electronic component is bonded to a bonding terminal formed on the substrate using tin or a tin-based solder, and the electronic component and the substrate are bonded together with a thermosetting resin. An electronic component mounting method for mounting this electronic component on a substrate by bonding with a thermosetting resin containing solder particles in the form of particles of solder in a range including the joining terminals on the surface of the substrate A resin coating step of coating, a positioning step of positioning the gold bump and the joining terminal in a state where the electronic component is held by a holding head having a heating function, and heating of the electronic component by the holding head The holding head is lowered while performing a bump bonding step for bonding the gold bump to the bonding terminal, and the thermosetting resin is thermally cured so that the electronic component is A resin curing step that adheres to a plate, and in the bump bonding step, the applied thermosetting resin is caused to flow outward by the lower surface of the electronic component, and is contained in the thermosetting resin. the solder particles together into contact with the side surface of the gold bump heated to a temperature higher than the melting point of solder by the holding head, sandwiching a portion of the solder particles between the junction terminal and the gold bump state Melt with.

本発明によれば、塗布された熱硬化性樹脂を電子部品の下面によって外側へ向かって流動させて、熱硬化性樹脂中に含有された半田粒子を半田粒子の融点よりも高温に加熱された金バンプの側面に接触させるとともに、半田粒子の一部を金バンプと接合端子との間に挟み込んだ状態で溶融させることにより、金バンプ中への外部からのＳｎの拡散を促進させて金バンプ中のＳｎ濃度を上昇させることができ、半田接合部から金バンプへのＳｎの拡散を抑え、カーゲンダルボイドの発生を抑制することができる。 According to the present invention, the applied thermosetting resin is caused to flow outward by the lower surface of the electronic component, and the solder particles contained in the thermosetting resin are heated to a temperature higher than the melting point of the solder particles. with contacting the side surface of the gold bumps, by melting in a state sandwiched between a portion of the gold bumps and the junction terminal of the solder particles, to promote the diffusion of Sn from the outside to the gold bumps in by Kim The Sn concentration in the bump can be increased, the Sn diffusion from the solder joint to the gold bump can be suppressed, and the generation of cardendal voids can be suppressed.

次に本発明の実施の形態を図面を参照して説明する。図１，図２、図３は本発明の一実施の形態の電子部品実装方法の工程説明図である。この電子部品実装方法は、電子部品に設けられた金バンプを、基板に形成された接合端子に錫または錫系の半田を用いて接合するとともに、電子部品と基板とを熱硬化性樹脂によって接着することにより、この電子部品を基板に実装するものである。   Next, embodiments of the present invention will be described with reference to the drawings. 1, 2, and 3 are process explanatory views of an electronic component mounting method according to an embodiment of the present invention. In this electronic component mounting method, a gold bump provided on an electronic component is bonded to a bonding terminal formed on the substrate using tin or tin-based solder, and the electronic component and the substrate are bonded by a thermosetting resin. Thus, the electronic component is mounted on the substrate.

図１（ａ）において、基板１の表面には、接合端子としての電極２が形成されている。基板１の表面において電極２を包含する範囲には、図１（ｂ）に示すように、半田を粒子状にした半田粒子（図３（ａ）に示す半田粒子４参照）を含む熱硬化性樹脂３が塗布される（樹脂塗布工程）。ここで半田粒子４に用いられる半田は、錫（Ｓｎ）および銀（Ａｇ）を含むＳｎ−Ａｇ系半田、錫（Ｓｎ）、銀（Ａｇ）および銅（Ｃｕ）を含むＳｎ−Ａｇ−ＣＵ系半田、錫（Ｓｎ）およびビスマス（Ｂｉ）を含むＳｎ−Ｂｉ系半田のいずれかが用いられる。   In FIG. 1A, an electrode 2 as a junction terminal is formed on the surface of a substrate 1. As shown in FIG. 1B, the range including the electrode 2 on the surface of the substrate 1 includes thermosetting including solder particles (see solder particles 4 shown in FIG. 3A). Resin 3 is applied (resin application step). The solder used for the solder particles 4 is Sn-Ag solder including tin (Sn) and silver (Ag), Sn-Ag-CU based including tin (Sn), silver (Ag), and copper (Cu). Any of Sn, Bi-based solder containing solder, tin (Sn) and bismuth (Bi) is used.

次いで樹脂塗布後の基板１には、電子部品６が搭載される。図１（ｃ）に示すように、電子部品６の下面に形成された電極６ａには、下部に凸部５ａを有する形状の金バンプ５が設けられている。電子部品６は加熱機能を有する保持ツール７よって吸着保持され、基板１への搭載に先だって電子部品６の加熱が開始される。そして電子部品６を保持した保持ツール７は電子部品６の加熱を行いながら基板１の上方へ移動し、金バンプ５と電極２との位置合わせを行う（位置合わせ工程）。   Next, the electronic component 6 is mounted on the substrate 1 after the resin application. As shown in FIG. 1C, the electrode 6a formed on the lower surface of the electronic component 6 is provided with a gold bump 5 having a shape having a convex portion 5a at the lower portion. The electronic component 6 is sucked and held by a holding tool 7 having a heating function, and heating of the electronic component 6 is started prior to mounting on the substrate 1. The holding tool 7 holding the electronic component 6 moves to above the substrate 1 while heating the electronic component 6 and aligns the gold bump 5 and the electrode 2 (alignment process).

この後電子部品６の加熱が進行して、金バンプ５の温度が熱硬化性樹脂３に含有される半田粒子４の融点よりも高温になったならば、電子部品６の着地動作が開始される。すなわち保持ツール７による電子部品６の加熱を行いながら、保持ヘッド７を下降させて金バンプ５を電極２に接合する（バンプ接合工程）。このとき、電子部品６の下降により、まず図２（ａ）に示すように、基板１の表面に塗布された熱硬化性樹脂３を外側に向かって
押し広げながら、金バンプ５の凸部５ａを電極２に着地させる。そしてこの後、保持ツール７による電子部品６の押圧と加熱を継続することにより、図２（ｂ）に示すように、凸部５ａが幾分押しつぶされた形で金バンプ５が電極２に接合されるとともに、熱硬化性樹脂３を熱硬化させて電子部品６を基板１に接着する（樹脂硬化工程）。 Thereafter, when the heating of the electronic component 6 proceeds and the temperature of the gold bump 5 becomes higher than the melting point of the solder particles 4 contained in the thermosetting resin 3, the landing operation of the electronic component 6 is started. The That is, while the electronic component 6 is heated by the holding tool 7, the holding head 7 is lowered to bond the gold bump 5 to the electrode 2 (bump bonding step). At this time, as the electronic component 6 descends, first, as shown in FIG. 2A, the thermosetting resin 3 applied to the surface of the substrate 1 is spread outwardly while the convex portion 5a of the gold bump 5 is spread. Is landed on the electrode 2. Then, by continuing to press and heat the electronic component 6 with the holding tool 7, the gold bump 5 is joined to the electrode 2 in a form in which the convex portion 5a is somewhat crushed as shown in FIG. At the same time, the thermosetting resin 3 is thermoset to bond the electronic component 6 to the substrate 1 (resin curing step).

図３は、上述のバンプ接合工程における熱硬化性樹脂３の挙動を示している。電子部品６を基板１に対して下降させる過程においては、まず金バンプ５が凸部５ａから熱硬化性樹脂３に埋入し、その後電子部品６の下面が熱硬化性樹脂３を押し下げることによって熱硬化性樹脂３は内側から外側へ押し拡げられ、これにより、熱硬化性樹脂３は含有した半田粒子４とともに外側（矢印ａ方向）へ向かって流動する。   FIG. 3 shows the behavior of the thermosetting resin 3 in the above-described bump bonding step. In the process of lowering the electronic component 6 relative to the substrate 1, first, the gold bump 5 is embedded in the thermosetting resin 3 from the convex portion 5 a, and then the lower surface of the electronic component 6 pushes down the thermosetting resin 3. The thermosetting resin 3 is expanded from the inside to the outside, whereby the thermosetting resin 3 flows toward the outside (in the direction of arrow a) together with the contained solder particles 4.

そしてこの状態でさらに電子部品６を下降させると、図３（ｂ）に示すように、熱硬化性樹脂３中の半田粒子４は一部が金バンプ５の側面に接触し、また一部は金バンプ５の下面と電極２との間に挟み込まれる。そしてこれらの半田粒子４はいずれも予め半田粒子４の融点よりも高温に加熱された金バンプ５に接触することによって溶融する。ここで、金バンプ５の側面に接触して溶融した半田粒子４からは、半田粒子４の成分であるＳｎが金バンプ５のＡｕ中に拡散する。また金バンプ５と電極２との間で溶融した半田粒子４は、後に冷却固化することにより、金バンプ５を電極２に接合する役割を果たす。 And further lowering the electronic component 6 in this state, as shown in FIG. 3 (b), some solder particles 4 of the thermosetting resin 3 is in contact with the side surface of the gold bumps 5, and in part It is sandwiched between the lower surface of the gold bump 5 and the electrode 2. All of the solder particles 4 are melted by contacting the gold bumps 5 that have been heated to a temperature higher than the melting point of the solder particles 4 in advance. Here, Sn, which is a component of the solder particles 4, diffuses into the Au of the gold bumps 5 from the solder particles 4 that have melted in contact with the side surfaces of the gold bumps 5. The solder particles 4 melted between the gold bump 5 and the electrode 2 serve to join the gold bump 5 to the electrode 2 by cooling and solidifying later.

すなわち、本実施の形態に示す電子部品実装方法では、上述のバンプ接合工程において、塗布された熱硬化性樹脂３を電子部品６の下面によって外側へ向かって流動させて、熱硬化性樹脂３中に含有された半田粒子４を保持ヘッド７によって半田の融点よりも高温に加熱された金バンプ５の側面に接触させるとともに、半田粒子４の一部を金バンプ５と電極２との間に挟み込んだ状態で溶融させるようにしている。   That is, in the electronic component mounting method shown in the present embodiment, in the above-described bump bonding step, the applied thermosetting resin 3 is caused to flow outward by the lower surface of the electronic component 6, so that the thermosetting resin 3 The solder particles 4 contained in the solder are brought into contact with the side surface of the gold bump 5 heated to a temperature higher than the melting point of the solder by the holding head 7, and a part of the solder particle 4 is sandwiched between the gold bump 5 and the electrode 2. It is made to melt in the state.

金バンプ５を錫（Ｓｎ）系の半田によって電極２接合するに際し、上述のような電子部品実装方法を採用することにより、以下に示すような優れた効果を得る。すなわち、電子部品６の電極２への接合に錫系の半田を用いる場合には、カーゲンダルボイドに起因する強度劣化が生じるという問題がある。すなわち、金（Ａｕ）を材質とするバンプと電極とを半田を介在させて接合する接合界面近傍においては、半田接合部からＡｕ中へＳｎが拡散することによって微小なボイドが発生しやすく、接合強度を低下させる要因となっていた。   When the gold bump 5 is joined to the electrode 2 with tin (Sn) solder, the following excellent effects can be obtained by adopting the electronic component mounting method as described above. That is, when a tin-based solder is used for joining the electronic component 6 to the electrode 2, there is a problem in that strength deterioration due to cardendal voids occurs. That is, in the vicinity of the bonding interface where the bump made of gold (Au) and the electrode are bonded through the solder, Sn is diffused from the solder bonding portion into Au, so that a minute void is likely to be generated. It was a factor that lowered the strength.

これに対し、本実施の形態に示す電子部品実装方法においては、熱硬化性樹脂３中の半田粒子４を流動させて加熱された金バンプ５の側面に接触させ、これらの半田粒子４を金バンプ５の表面で溶融させるようにしている。これにより、金バンプ５には外部から内部に向かって半田粒子４中のＳｎが拡散し、金バンプ５中のＳｎ濃度が上昇する。このことは、金バンプ５内部のＳｎ濃度と、金バンプ５と電極２との接合界面近傍におけるＳｎ濃度との濃度差が縮小することを意味している。   On the other hand, in the electronic component mounting method shown in the present embodiment, the solder particles 4 in the thermosetting resin 3 are caused to flow and contact the side surfaces of the heated gold bumps 5 so that the solder particles 4 are made of gold. The surface of the bump 5 is melted. As a result, Sn in the solder particles 4 diffuses into the gold bump 5 from the outside to the inside, and the Sn concentration in the gold bump 5 increases. This means that the concentration difference between the Sn concentration inside the gold bump 5 and the Sn concentration in the vicinity of the bonding interface between the gold bump 5 and the electrode 2 is reduced.

したがって、金バンプ５と電極２との接合界面に存在する半田粒子４から金バンプ５の内部へのＳｎの拡散が抑えられ、Ｓｎの拡散によってカーゲンダルボイドが発生することに起因する接合強度の低下を抑制することができる。このとき、金バンプ５を熱硬化性樹脂３に接触させる前に金バンプ５の温度を半田粒子４の融点よりも高温に加熱することにより、金バンプ５に接触した半田粒子４は速やかに溶融し、外部からの金バンプ５中へのＳｎの拡散を促進させることができる。 Therefore, the diffusion of Sn from the solder particles 4 existing at the bonding interface between the gold bump 5 and the electrode 2 to the inside of the gold bump 5 is suppressed, and the bonding strength caused by the generation of a cardinal dull void by the diffusion of Sn. Can be suppressed. At this time, by bringing the temperature of the gold bump 5 to a temperature higher than the melting point of the solder particle 4 before bringing the gold bump 5 into contact with the thermosetting resin 3, the solder particle 4 in contact with the gold bump 5 is rapidly melted. In addition, the diffusion of Sn into the gold bump 5 from the outside can be promoted.

本発明の電子部品実装方法は、半田接合部から金バンプへのＳｎの拡散を抑えて、カーゲンダルボイドの発生を抑制することができるという効果を有し、金バンプを基板に形成
された接合端子に錫または錫系の半田を用いて接合する用途に利用可能である。 The electronic component mounting method of the present invention has the effect of suppressing the diffusion of Sn from the solder joint portion to the gold bump, thereby suppressing the generation of cardendal voids, and the gold bump is formed on the substrate. The present invention can be used for applications that use tin or tin-based solder for joining terminals.

本発明の一実施の形態の電子部品実装方法の工程説明図Process explanatory drawing of the electronic component mounting method of one embodiment of this invention 本発明の一実施の形態の電子部品実装方法の工程説明図Process explanatory drawing of the electronic component mounting method of one embodiment of this invention 本発明の一実施の形態の電子部品実装方法の工程説明図Process explanatory drawing of the electronic component mounting method of one embodiment of this invention

符号の説明Explanation of symbols

１ 基板
２ 電極（接合端子）
３ 熱硬化性樹脂
４ 半田粒子
５ 金バンプ
６ 電子部品
７ 保持ツール 1 Substrate 2 Electrode (Junction terminal)
3 Thermosetting resin 4 Solder particles 5 Gold bump 6 Electronic component 7 Holding tool

Claims (3)

電子部品に設けられた金バンプを基板に形成された接合端子に錫または錫系の半田を用いて接合するとともに、前記電子部品と基板とを熱硬化性樹脂によって接着することによりこの電子部品を基板に実装する電子部品実装方法であって、
前記半田を粒子状にした半田粒子を含む熱硬化性樹脂を前記基板の表面の前記接合端子を包含する範囲に塗布する樹脂塗布工程と、加熱機能を有する保持ヘッドによって前記電子部品を保持した状態で、前記金バンプと前記接合端子との位置合わせを行う位置合わせ工程と、前記保持ヘッドによる前記電子部品の加熱を行いながらこの保持ヘッドを下降させて前記金バンプを前記接合端子に接合するバンプ接合工程と、前記熱硬化性樹脂を熱硬化させて前記電子部品を前記基板に接着する樹脂硬化工程とを含み、
前記バンプ接合工程において、前記塗布された熱硬化性樹脂を電子部品の下面によって外側へ向かって流動させて、前記熱硬化性樹脂中に含有された前記半田粒子を前記保持ヘッドによって前記半田の融点よりも高温に加熱された前記金バンプの側面に接触させるとともに、前記半田粒子の一部を前記金バンプと前記接合端子との間に挟み込んだ状態で溶融させることを特徴とする電子部品実装方法。 A gold bump provided on the electronic component is bonded to a bonding terminal formed on the substrate using tin or a tin-based solder, and the electronic component and the substrate are bonded by a thermosetting resin. An electronic component mounting method for mounting on a substrate,
A state in which the electronic component is held by a resin coating process in which a thermosetting resin containing solder particles in the form of particles of solder is applied to a range including the joining terminals on the surface of the substrate, and a holding head having a heating function Then, an alignment step for aligning the gold bump and the bonding terminal, and a bump for bonding the gold bump to the bonding terminal by lowering the holding head while heating the electronic component by the holding head A bonding step, and a resin curing step of thermosetting the thermosetting resin to adhere the electronic component to the substrate,
In the bump bonding step, the applied thermosetting resin is caused to flow outward by the lower surface of the electronic component, and the solder particles contained in the thermosetting resin are melted by the holding head by the holding head. an electronic component mounting, characterized in that with contacting the side surface of the gold bump is heated to a high temperature to melt the part of the solder particles in a state sandwiched between the junction terminal and the gold bumps than Method. 前記半田は、錫（Ｓｎ）および銀（Ａｇ）を含むＳｎ−Ａｇ系半田、錫（Ｓｎ）、銀（Ａｇ）および銅（Ｃｕ）を含むＳｎ−Ａｇ−ＣＵ系半田、錫（Ｓｎ）およびビスマス（Ｂｉ）を含むＳｎ−Ｂｉ系半田のいずれかであることを特徴とする請求項１記載の電子部品実装方法。   The solder includes Sn—Ag solder containing tin (Sn) and silver (Ag), Sn—Ag—CU solder containing tin (Sn), silver (Ag) and copper (Cu), tin (Sn) and The electronic component mounting method according to claim 1, wherein the electronic component mounting method is any one of Sn—Bi solder containing bismuth (Bi). 前記金バンプを前記熱硬化性樹脂に接触させる前に、前記金バンプの温度を前記半田の融点よりも高温に加熱することを特徴とする請求項１または２のいずれかに記載の電子部品実装方法。   3. The electronic component mounting according to claim 1, wherein the temperature of the gold bump is heated to a temperature higher than the melting point of the solder before the gold bump is brought into contact with the thermosetting resin. Method.
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