JP4649638B2 - 散熱片の半導体パッケージ構造 - Google Patents
散熱片の半導体パッケージ構造 Download PDFInfo
- Publication number
- JP4649638B2 JP4649638B2 JP2008076808A JP2008076808A JP4649638B2 JP 4649638 B2 JP4649638 B2 JP 4649638B2 JP 2008076808 A JP2008076808 A JP 2008076808A JP 2008076808 A JP2008076808 A JP 2008076808A JP 4649638 B2 JP4649638 B2 JP 4649638B2
- Authority
- JP
- Japan
- Prior art keywords
- heat dissipation
- package structure
- substrate
- semiconductor package
- dissipation piece
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Description
20、120 チップ
30、130 散熱片
32 露出部
34 内接部
40 パッケージ樹脂
112 穿孔
114 上表面
116 下表面
118 ウィンドウ
132 支承部
134 突出部
140 パッケージゲル体
150、152 リード線
160 導電球
Claims (7)
- 散熱片を有する半導体パッケージ構造であって、
チップキャリア領域を有し、複数の穿孔がチップキャリア領域周辺に環繞設置される基板と、
前記チップキャリア領域に設置され、前記基板と電気的に接続するチップと、
前記チップ上方に設置され、前記穿孔により、上表面から前記基板の下表面に延伸する複数の支承部を有する散熱片と、
前記チップと一部の基板、及び、前記散熱片を被覆するパッケージゲルと、
からなることを特徴とする散熱片を有する半導体パッケージ構造。 - 前記基板上の前記穿孔数量は、前記散熱片の前記支承部の数量以上であることを特徴とする請求項1に記載の散熱片を有する半導体パッケージ構造。
- 前記基板上は、更に、ウィンドウを前記チップキャリア領域内に設置することを特徴とする請求項1に記載の散熱片を有する半導体パッケージ構造。
- 前記ウィンドウを穿過すると共に、前記チップと前記基板の下表面に電気的に接続する複数のリード線をさらに備えることを特徴とする請求項3に記載の散熱片を有する半導体パッケージ構造。
- 更に、少なくとも一つの突出部を前記支承部の表面に突出し、前記突出部は前記支承部と一角度を形成することを特徴とする請求項1に記載の散熱片を有する半導体パッケージ構造。
- 更に、粗雑面を前記散熱片表面上に形成することを特徴とする請求項1に記載の散熱片を有する半導体パッケージ構造。
- 更に、複数の導電球を露出した前記基板の下表面に設置することを特徴とする請求項1に記載の散熱片を有する半導体パッケージ構造。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008076808A JP4649638B2 (ja) | 2008-03-24 | 2008-03-24 | 散熱片の半導体パッケージ構造 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008076808A JP4649638B2 (ja) | 2008-03-24 | 2008-03-24 | 散熱片の半導体パッケージ構造 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009231637A JP2009231637A (ja) | 2009-10-08 |
JP4649638B2 true JP4649638B2 (ja) | 2011-03-16 |
Family
ID=41246690
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008076808A Expired - Fee Related JP4649638B2 (ja) | 2008-03-24 | 2008-03-24 | 散熱片の半導体パッケージ構造 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4649638B2 (ja) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000031355A (ja) * | 1998-07-07 | 2000-01-28 | Nec Corp | 半導体装置及びその製造方法 |
-
2008
- 2008-03-24 JP JP2008076808A patent/JP4649638B2/ja not_active Expired - Fee Related
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000031355A (ja) * | 1998-07-07 | 2000-01-28 | Nec Corp | 半導体装置及びその製造方法 |
Also Published As
Publication number | Publication date |
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JP2009231637A (ja) | 2009-10-08 |
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