JP4648953B2 - Lead frame manufacturing method - Google Patents

Lead frame manufacturing method Download PDF

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JP4648953B2
JP4648953B2 JP2008024154A JP2008024154A JP4648953B2 JP 4648953 B2 JP4648953 B2 JP 4648953B2 JP 2008024154 A JP2008024154 A JP 2008024154A JP 2008024154 A JP2008024154 A JP 2008024154A JP 4648953 B2 JP4648953 B2 JP 4648953B2
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plating
lead frame
width direction
thickness
passing
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JP2008113048A (en
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大悟 山浦
和夫 立原
茂晴 田中
克広 岩垂
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Sumitomo Metal Mining Co Ltd
Mitsui High Tech Inc
Furukawa Precision Engineering Co Ltd
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Sumitomo Metal Mining Co Ltd
Mitsui High Tech Inc
Furukawa Precision Engineering Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Description

本発明は、電気めっきまたは無電解めっきラインを通板し、その表面にPdめっきを施した半導体装置用のリードフレームの製造方法に関する。   The present invention relates to a method for manufacturing a lead frame for a semiconductor device in which an electroplating or electroless plating line is passed and Pd plating is applied to the surface thereof.

半導体装置用のリードフレームとして、例えば、特公昭63−49382号公報、特許第2746840号公報に記載されているように、半導体素子を搭載するためのダイボンディング性、及び半導体素子とリードとのワイヤーボンディング性と、リードフレームそのものの耐食性等を確保し、めっき処理やめっき層そのものを環境に優しいPdめっきとしたものがある。   As a lead frame for a semiconductor device, for example, as described in Japanese Patent Publication No. 63-49382 and Japanese Patent No. 2746840, die bonding property for mounting a semiconductor element, and wire between the semiconductor element and the lead There are some which have bonding properties, corrosion resistance of the lead frame itself, and the like, and the plating process and the plating layer itself are made of environmentally friendly Pd plating.

かかるPdめっきは、耐食性や生産性を高めるために、Cuのような帯状金属板からプレスまたはエッチングによりリードフレームを単列あるいは複数列に形成してNiを下地めっき後、Pdめっきラインを通板する方式、または、短冊状に配列した所定長さのリードフレームをめっきラインに通板して、通板したリードフレームの全幅にわたって、例えば25nm以上の厚みに均一なPdめっき層を形成するものである。   In this Pd plating, in order to improve corrosion resistance and productivity, a lead frame is formed in a single row or a plurality of rows by pressing or etching from a band-shaped metal plate such as Cu, Ni is underplated, and a Pd plating line is passed through. Or a lead frame of a predetermined length arranged in a strip shape is passed through a plating line to form a uniform Pd plating layer with a thickness of, for example, 25 nm or more over the entire width of the lead frame passed through. is there.

ところが、電気めっきラインにおいては、通電によって析出したPd核が通板の幅方向の両端に集中する傾向があり、そのため、通板したリードフレームの幅方向両端部にめっき層が必要以上に形成され、その中間部のめっき層が部分的に薄くなる傾向がある。このような傾向は無電解めっきラインでも発生する。   However, in the electroplating line, the Pd nuclei deposited by energization tend to concentrate at both ends in the width direction of the threading plate, and therefore, an unnecessarily plated layer is formed at both ends in the width direction of the threaded lead frame. The intermediate plating layer tends to be partially thinned. Such a tendency also occurs in the electroless plating line.

この通板したリードフレームの幅端部への集中析出は、Pdが無駄となるばかりではなく、幅方向のPdめっき層の厚みの不均一性をもたらし、半田濡れ性に害を及ぼすことにもなり、例えば0.02μm厚以下の極薄めっきを施す場合には、幅方向中間部のPdめっき層の厚みが場所によって不足して、組立て作業時の半田濡れ性が劣化し、ワイヤーボンディング不良、あるいはボンディングの信頼性を低下させる恐れがある。   This concentrated precipitation at the width end of the lead frame that has been passed through not only wastes Pd, but also causes non-uniformity in the thickness of the Pd plating layer in the width direction, which also affects solder wettability. For example, when applying ultra-thin plating with a thickness of 0.02 μm or less, the thickness of the Pd plating layer in the middle in the width direction is insufficient depending on the location, solder wettability during assembly work is deteriorated, wire bonding failure, Or, there is a risk of lowering the reliability of bonding.

本発明において解決すべき課題は、電気めっきまたは無電解めっきラインを通板することによってPdめっきを施したリードフレームにおいて、Pdのめっきが極薄めっきであっても幅方向の中間部において均一な厚みのPdめっきを得ることにある。   The problem to be solved in the present invention is that, in a lead frame subjected to Pd plating by passing through an electroplating or electroless plating line, even if the Pd plating is extremely thin plating, it is uniform in the intermediate portion in the width direction. The purpose is to obtain a Pd plating having a thickness.

本発明は、電気めっきもしくは無電解めっきラインを通板しPdめっきを施したリードフレームを製造するに当たって、通板したリードフレームの幅方向の幅方向両端部において、析出Pdをなくすか、または、極く少なくすることによって、幅方向の中間部におけるPdめっきの厚みの均一性化を図ったものである。   The present invention eliminates the precipitation Pd at both ends in the width direction of the lead frame that passed through the electroplating or electroless plating line and produced the lead frame subjected to Pd plating, or By making it extremely small, the thickness of the Pd plating at the intermediate portion in the width direction is made uniform.

このリードフレームの幅方向の両端部におけるPdめっきの厚みを、幅方向の中間部の厚みの25%以下とすることによって、幅方向中間部のPdめっき厚みを25nm程度の極薄としても、リードフレームの幅方向の中間部には均一な厚みのPdめっきを、不良箇所が生じることなく得ることができ、Pdの析出量を少なくし、コスト低減に寄与する。   Even if the Pd plating thickness in the width direction intermediate portion is made as thin as about 25 nm by setting the thickness of the Pd plating at both ends in the width direction of the lead frame to 25% or less of the thickness of the intermediate portion in the width direction, the lead Pd plating with a uniform thickness can be obtained at the intermediate part in the width direction of the frame without causing defective portions, and the amount of deposited Pd is reduced, contributing to cost reduction.

この幅方向の両端部における析出Pd量をなくすか、または、極く少なくしたリードフレームを得るためには、電気めっきもしくは無電解めっきラインの両端部にエッジマスクを設けるか、リードフレームそのものにマスクを付けて通板するか、リードフレームを幅方向に立てて、めっき液中を通る下方側の端部はエッジマスクを通し、上方側の端部はめっき液上面から出して通板する等の手段を採用する。   In order to eliminate the amount of deposited Pd at both ends in the width direction or to obtain a lead frame with a very small amount, an edge mask is provided at both ends of the electroplating or electroless plating line, or the lead frame itself is masked. Or the lead frame is placed in the width direction, the lower end passing through the plating solution is passed through the edge mask, the upper end is passed through the plating solution upper surface, etc. Adopt means.

この幅方向の両端部は、半導体装置に組立てる際のガイドレール部に相当する幅とすることができる。この両端部は、半導体装置として機能しないので何等の支障を生じることにはならない。   Both end portions in the width direction can have a width corresponding to a guide rail portion when assembling the semiconductor device. Since both end portions do not function as a semiconductor device, no trouble is caused.

1.幅方向中間部のPdめっき厚みは、極薄であってもばらつきは少なく、めっき不良箇所が生じることなく均一にめっきされる。 1. The Pd plating thickness at the intermediate portion in the width direction has little variation even if it is extremely thin, and the plating is performed uniformly without causing defective plating.

2.リードフレームの幅方向の両端部のPdめっき層をなくすか、または、極く少なくしたことにより、不都合は生じることはなく、Pd重量の少なくとも5%の節減によりコストが低減する。 2. By eliminating or reducing the Pd plating layers at both ends in the width direction of the lead frame, there is no inconvenience, and the cost is reduced by saving at least 5% of the Pd weight.

3.Pd表面にAuめっきを施す際は、同様のマスクをすることで、Auの節減により、コストが低減する。 3. When Au plating is applied to the Pd surface, the same mask is used to reduce costs by saving Au.

以下、リードフレームを連続して電気めっきラインに適用した実施例によって本発明の実施の形態を説明する。   Hereinafter, embodiments of the present invention will be described by examples in which lead frames are continuously applied to an electroplating line.

図1は、本発明に係る通板用のリードフレーム1の形態を示すもので、本発明に係る通板用のリードフレーム1は、均一な厚みのPdめっきを施すパッド2、リード3、ダムバー4、セクションバー5を含む中間部を有し、その幅方向の両端部6にはPdのめっきは殆ど施されないようにするものである。   FIG. 1 shows a form of a lead plate 1 for threading plates according to the present invention. The lead frame 1 for threading plates according to the present invention includes a pad 2, a lead 3, and a dam bar on which Pd plating with a uniform thickness is applied. 4. An intermediate portion including a section bar 5 is provided, and Pd plating is hardly applied to both end portions 6 in the width direction.

図2は、図1に示す通板用のリードフレーム1に、連続的にPdによる電気めっきを施すためのめっきラインを示す。このめっきラインは、通板用リードフレーム1を洗浄し、活性化のための前処理槽Aと、Pdめっきを施すためのPdめっき槽Bと、めっき処理後の通板を後洗浄するための後処理槽Cが連続して配置されている。通板用のリードフレーム1を前処理槽Aから、めっき槽B、さらに、後処理槽Cを通板する過程で、めっき槽B内に、例えば塩化アンミンパラジウムからなるめっき液中を通し、めっき電極Dに通電することによって、通板用のリードフレーム1の両端部を除く中間部にPdめっきを施す。両端部へのPdめっきは、Pdめっき槽Bの通板用のリードフレーム1の両端部に相当する位置にエッジマスクEを配置し、リードフレーム1の両端部をエッジマスクE内を通過させることによってPdめっきを施すことが防止される。   FIG. 2 shows a plating line for continuously performing electroplating with Pd on the lead plate 1 for threading shown in FIG. This plating line is for cleaning the lead plate 1 for passing plates, and for pre-cleaning the pretreatment bath A for activation, the Pd plating bath B for applying Pd plating, and the passing plates after plating treatment. The post-treatment tank C is continuously arranged. In the process of passing the lead frame 1 for passing plates from the pretreatment tank A to the plating tank B and further to the post-treatment tank C, the plating tank B is passed through a plating solution made of, for example, ammonium chloride, and plated. By energizing the electrode D, Pd plating is applied to an intermediate portion excluding both end portions of the lead frame 1 for passing plates. For Pd plating on both ends, an edge mask E is disposed at positions corresponding to both ends of the lead frame 1 for passing the plate in the Pd plating tank B, and both ends of the lead frame 1 are passed through the edge mask E. Prevents Pd plating.

図3は、このエッジマスクEを通板側からみた状態を示す。このエッジマスクEは、通板用のリードフレーム1の両端縁を塩ビ材からなるU字形のマスク材E1と、テフロン(登録商標)からなる、すり疵防止のためのスリップ材E2から構成されている。そして、スリップ材E2と、リードフレーム1の両端部6は、密着もしくはすり疵防止に最低限度のスキ間が開いている。通板用のリードフレーム1のエッジマスクEによって覆われる両端部6は、めっき後のリードフレームが、半導体素子を搭載するダイボンディング等の半導体装置の組立て作業において、連続作業のためのガイド部の幅に相当する長さである。   FIG. 3 shows the edge mask E as viewed from the plate side. This edge mask E is composed of a U-shaped mask material E1 made of a vinyl chloride material and a slip material E2 made of Teflon (registered trademark) for preventing scouring at both ends of the lead frame 1 for passing plates. Yes. The slip material E2 and the both end portions 6 of the lead frame 1 have a minimum gap between them to prevent adhesion or slipping. Both end portions 6 covered by the edge mask E of the lead frame 1 for passing plates are used as guide parts for continuous work in assembly work of semiconductor devices such as die bonding on which the lead frame after plating is mounted with semiconductor elements. It is the length corresponding to the width.

このめっきラインによって、図1に示す例えばリードフレームのパッド2、リード3、ダムバー4を含む中間部の長さが約30mmで、その幅方向のエッジマスクEによって覆われる両端部5の一方の端部の幅が2mmの通板用リードフレーム1において、両端部のPdめっき厚みが0.01μm、中間部のPdめっき厚み0.05μmのPdめっきを施したリードフレームの中間部におけるPdめっきの厚みのばらつきは、±0.01μmに過ぎなかった。この均一なPdめっきを施し、400℃で30秒間加熱したリードフレームの中間部における半田として、Sn−37Pbを用い、半田の温度235℃で、浸漬深さ2mm、フラックスとして不活性R−タイプの半田濡れ性テストでは、ゼロクロスタイム0.5秒以下であった。これに対して、端部も中間部と同様の厚みでPdめっきを施した比較例においては、中間部のめっきの厚みのばらつきは、±0.03μmであって、半田濡れ性テストも良くなかった。   With this plating line, the length of the intermediate portion including, for example, the lead frame pad 2, lead 3, and dam bar 4 shown in FIG. 1 is about 30 mm, and one end of both end portions 5 covered by the edge mask E in the width direction. Pb plating thickness in the intermediate part of the lead frame subjected to Pd plating with a Pd plating thickness of 0.01 μm at both ends and a Pd plating thickness of 0.05 μm at the middle part in the lead plate 1 for passing plate having a width of 2 mm The variation was only ± 0.01 μm. Sn-37Pb was used as the solder in the middle part of the lead frame that had been subjected to this uniform Pd plating and heated at 400 ° C. for 30 seconds, the soldering temperature was 235 ° C., the immersion depth was 2 mm, and the flux was an inert R-type. In the solder wettability test, the zero cross time was 0.5 seconds or less. On the other hand, in the comparative example in which the end portion was subjected to Pd plating with the same thickness as the intermediate portion, the variation in the plating thickness of the intermediate portion was ± 0.03 μm, and the solder wettability test was not good. It was.

この実施例ではPdめっきについて述べたが、Pd合金めっき、例えばPd−Ni合金めっき、Pd−Co合金めっき、Pd−Cu合金めっき等にも同様に適用できる。また、Pdめっきの下地メッキとしてNiめっきだけでなく、Ni合金めっきが適用できる。   In this embodiment, Pd plating has been described. However, Pd alloy plating, for example, Pd—Ni alloy plating, Pd—Co alloy plating, Pd—Cu alloy plating, and the like can be similarly applied. Further, not only Ni plating but also Ni alloy plating can be applied as the base plating for Pd plating.

さらに、前記PdめっきやPd合金めっきを施した後に、Auめっきをその上に施すこともできる。   Further, after the Pd plating or Pd alloy plating is performed, Au plating can be applied thereon.

本発明のリードフレームを製造するのに使用される通板用リードフレームを示す。It shows the lead frame through a plate used to make the lead frame of the present invention. 本発明のリードフレームを製造するのに使用される電気めっきラインを示す。1 shows an electroplating line used to manufacture the lead frame of the present invention. 本発明のリードフレームの両端部のPdめっき量を低減するのに使用されるエッジマスクを示す。The edge mask used for reducing the Pd plating amount of the both ends of the lead frame of this invention is shown. 本発明のリードフレームそのものにマスクを付けて通板する方法を示す。The method of attaching a mask to the lead frame itself of the present invention and passing it through is shown. 本発明のリードフレーム上端部をめっき液面から出して通板する方法を示す。The method of taking out the upper end part of the lead frame of the present invention from the plating solution surface and passing it through is shown.

符号の説明Explanation of symbols

1 通板用リードフレーム 2 パッド
3 リード 4 ダムバー 5 セクションバー
6 幅方向の両端部
A 前処理槽 B めっき槽 C 後処理槽
D めっき電極
E エッジマスク
E1 マスク材 E2 スリップ材
F マスク
G めっき液上面
H リードフレーム上端面
Lead frame 2 pad 3 leads 4 dam bars 5 section bar 6 the width direction of the both end portions A pretreatment tank B plating tank C aftertreatment bath D plating electrode for 1 copy plate
E Edge mask
E1 Mask material E2 Slip material F Mask G Plating solution upper surface H Lead frame upper surface

Claims (3)

Pdめっき槽の通板用のリードフレームの両端部に相当する位置にエッジマスクを配置し、リードフレームの両端部をエッジマスク内を通過させるめっきラインを通板するか、
リードフレームの両端のみにエッジマスクを取り付け付けてめっきラインを通板するか、
または、
リードフレームを幅方向に立てて、めっき液中を通る下方側の端部はエッジマスクを通し、上方側の端部はめっき液上面から出して通板する手段の中の何れかの手段によって、
電気めっきまたは無電解めっきラインを通板し、幅方向の中間部には均一な厚みにPdめっきを施し、
且つ、
幅方向の両端部には、Pdめっきを中間部より薄く施すか、または、Pdめっきを施さない半導体装置用のリードフレームの製造方法。
An edge mask is arranged at a position corresponding to both ends of a lead frame for passing a Pd plating tank, and a plating line passing through the edge mask through both ends of the lead frame is passed,
Attach an edge mask only to both ends of the lead frame and pass through the plating line,
Or
With the lead frame standing in the width direction, the lower end passing through the plating solution is passed through the edge mask, and the upper end is taken out of the plating solution upper surface by any means of the plate passing through,
Pass through the electroplating or electroless plating line, apply Pd plating to the middle part in the width direction to a uniform thickness,
and,
A method of manufacturing a lead frame for a semiconductor device in which Pd plating is applied to both ends in the width direction to be thinner than an intermediate portion or Pd plating is not applied.
前記リードフレームの幅方向の両端部は、リードフレームを使用して半導体装置を組立てる際のガイドレール部に相当する部分とする請求項1記載のリードフレームの製造方法。 The lead frame manufacturing method according to claim 1, wherein both end portions in the width direction of the lead frame are portions corresponding to guide rail portions when a semiconductor device is assembled using the lead frame. Pdめっき厚みを、前記リードフレームの幅方向の両端部において、中間部の厚みの25%以下とする請求項1記載のリードフレームの製造方法。 The lead frame manufacturing method according to claim 1 , wherein the Pd plating thickness is 25% or less of the thickness of the intermediate portion at both ends in the width direction of the lead frame.
JP2008024154A 2008-02-04 2008-02-04 Lead frame manufacturing method Expired - Lifetime JP4648953B2 (en)

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JP5978587B2 (en) * 2011-10-13 2016-08-24 日立化成株式会社 Semiconductor package and manufacturing method thereof
JP5876351B2 (en) 2012-03-29 2016-03-02 三菱製紙株式会社 Light transmissive electrode

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03237750A (en) * 1990-02-15 1991-10-23 Hitachi Cable Ltd Lead frame for semiconductor integrated circuit
JP2000058730A (en) * 1998-08-04 2000-02-25 Sony Corp Lead frame and manufacture thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03237750A (en) * 1990-02-15 1991-10-23 Hitachi Cable Ltd Lead frame for semiconductor integrated circuit
JP2000058730A (en) * 1998-08-04 2000-02-25 Sony Corp Lead frame and manufacture thereof

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