JP4631409B2 - Semiconductor switch circuit - Google Patents

Description

  The present invention relates to a series-parallel connection circuit in which a plurality of voltage-driven semiconductor elements (also simply referred to as elements) are connected in series, a series-parallel connection circuit in which a plurality of circuits are connected in parallel, and a voltage applicable for turning on / off each element. The present invention relates to a semiconductor switch circuit including a gate drive circuit for supplying a gate signal to a gate terminal of a drive type semiconductor element, and more particularly to a semiconductor switch circuit capable of adjusting a switching timing for simultaneously turning on and off a plurality of elements.

  In order to increase the capacity of the power conversion device, when elements are connected in series and parallel, overvoltage and overcurrent may occur in a specific element due to variations in switching timing of each element. Specifically, in the case of series connection, a voltage is applied only to an element that has been turned off (or turned on later than other elements), and if the switching timing difference is large, an overvoltage occurs and the element is destroyed. There is a possibility. Further, in the case of parallel connection, current concentrates only on an element that is turned on (or turned off later than other elements), and an overcurrent is generated. Thus, when the elements are connected in series and in parallel, a means for equalizing voltage sharing and current sharing is required.

FIG. 5 shows an example disclosed in Patent Document 1, for example.
This circuit includes IGBTs (insulated gate bipolar transistors) Q1, Q2 (upper arm) and Q3, Q4 (lower arm), gate drive circuits GDU1 to GDU4 of Q1 to Q4, a DC power supply Ed, and the like. In order to balance the voltage sharing of each element in series, a snubber circuit including a capacitor C, a diode D, and a resistor R is added in parallel with each element.

6 shows the turn-off operation waveforms when the element characteristics of Q1 and Q2 shown in FIG. 5 vary. FIG. 6A shows the case where there is no snubber circuit, and FIG. 6B shows the case where there is a snubber circuit. Show.
That is, if there is variation in the switching timing as described above, an imbalance occurs in the voltage sharing of each IGBT, and in the illustrated example, a voltage is applied only to Q1, but by adding a snubber circuit, The voltage change rate (dv / dt) during switching is reduced as shown in FIG. 6B to suppress voltage imbalance. This dv / dt depends on the capacitor capacity of the snubber circuit, and the effect of reducing the voltage imbalance can be increased as the dv / dt is increased.

As a system other than the above, there is a system in which the gate lines of the respective elements are magnetically coupled to each other as shown in Patent Documents 2 and 3.
FIG. 7 shows a circuit for one arm in which a plurality of IGBTs are connected in parallel. The gate drive circuits GDU1 to GDUn of each element and the gate lines connecting the gate terminals of the elements Q1 to Qn are connected to each other by the magnetic circuits MC1 to MCn. This is an example of magnetic coupling.

Japanese Patent Laid-Open No. 04-125071 JP 2002-204578 A JP 2004-096829 A

When using devices connected in series-parallel, the device voltage imbalance can be reduced by connecting a snubber circuit in parallel with the device as described above, but in order to increase the allowable device switching time difference. In this case, the capacitance of the capacitor to be added must be increased. As a result, there arises a problem that the circuit is enlarged and the loss is increased.
As described in Patent Documents 2 and 3, in which the gate lines of the elements are magnetically coupled to each other, variation in switching timing can be suppressed. ) Is required in large numbers, and the problem is that the circuit becomes larger.

  Accordingly, an object of the present invention is to suppress variation in switching timing of a plurality of voltage-driven semiconductor elements connected in series and parallel without increasing the number of components and increasing the circuit size.

In order to solve such a problem, in the invention of claim 1, a series-parallel connection circuit of voltage-driven semiconductor elements in which a series connection circuit in which a plurality of voltage-driven semiconductor elements are connected in series is connected in parallel to each other; In a semiconductor switch circuit comprising a gate drive circuit for supplying a gate signal to a gate terminal of a corresponding voltage drive semiconductor element in order to turn on and off each voltage drive semiconductor element,
In the series connection circuit, a gate line connecting the gate drive circuit of each stage and the gate terminal of the voltage driven semiconductor element is magnetically coupled to each other, and any one of the series connection circuits is voltage driven between the series connection circuits. The gate lines of the type semiconductor device are magnetically coupled to each other.

In the first aspect of the invention, instead of the gate line, an emitter line connecting the gate drive circuit and the emitter terminal of the voltage drive type semiconductor element can be magnetically coupled to each other (invention of claim 2), or In addition to the gate line, the emitter line connecting the gate drive circuit and the emitter terminal of the voltage-driven semiconductor element can also be magnetically coupled to each other (invention of claim 3).
In the inventions of the first to third aspects, the magnetic circuit that magnetically couples any one of the voltage-driven semiconductor elements of each of the series connection circuits may have the same number of windings as the number of parallel connections. (Invention of Claim 4).

  According to the present invention, a plurality of voltage-driven semiconductor elements connected in series are connected in series by magnetically coupling at least one of a gate line or an emitter line connecting the gate driving circuit and the element of each stage to each other. Between the circuits, at least one of the gate line or emitter line of any one of the series-connected circuits is magnetically coupled to each other, so variation in the switching timing of the elements is suppressed by a small number of parts and a simplified circuit. Benefits that can be achieved.

FIG. 1 is a circuit configuration diagram showing a first embodiment of the present invention, and FIG. 2 is an explanatory diagram for explaining magnetic coupling.
FIG. 1 shows a configuration for one arm in which three IGBTs are connected in series and two in parallel, and includes IGBTs (Q11 to Q23), gate drive circuits GDU11 to GDU23, and magnetic circuits MCx and MC11 to MC23.

  Specifically, as shown in FIG. 2, the magnetic circuits MCx, MC11 to MC23 have a configuration in which two element gate lines for magnetic coupling are wound around the same magnetic body MG at a turns ratio of 1: 1. When the gate currents Ig1 and Ig2 are equal (Ig1 = Ig2), the magnetic fluxes Φ1 and Φ2 generated by the gate current are set to | Φ1 | = | Φ2 |. It is trying to become.

  As a result, when the switching timings of the two elements are the same, Φ1 and Φ2 are opposite in polarity at the same level, so they cancel each other and do not magnetically couple. On the other hand, when a timing difference occurs, for example, when Q1 is turned off (or turned on) first, that is, when Ig1 flows before Ig2, Φ1 ≠ Φ2, so that | Φ1-Φ2 A magnetic flux of | is generated and magnetically coupled.

  At this time, inductances L1 and L2 are equivalently generated in the respective gate lines, and these have characteristics proportional to | Φ1−Φ2 |. That is, L1 and L2 increase as the difference between Ig1 and Ig2 increases. Further, since the impedance of the gate line increases as L1 and L2 increase, Ig1 and Ig2 do not flow easily. With this operation, the impedance of the gate line automatically changes according to the difference between Ig1 and Ig2, and the operation is performed so that Ig1 and Ig2 match.

  In the series circuit 1 composed of the IGBT (Q11 to Q13) and the gate drive circuits GDU11 to GDU13 in FIG. Therefore, the switching timings of the three series elements are matched, and the applied voltages can be balanced.

  Further, between the series circuit 1 and the series circuit 2 including the IGBTs (Q21 to Q23) and the gate drive circuits GDU11 to GDU23, only the gate lines of the IGBTs Q11 and Q21 are magnetically coupled by the magnetic circuit MCx. For this reason, the switching timings of the IGBTs Q11 and Q21 are the same, and since the elements of the series circuit 2 are magnetically coupled in the same manner as the series circuit 1, the switching timings of all six elements in three series and two parallels are consequently equal. In addition, the current balance of the parallel connection circuit can be made uniform. In FIG. 1, Q11 and Q21, which are first-stage IGBTs connected in series, are magnetically coupled. However, magnetic coupling between series circuits connected in parallel may be performed by any one of the series elements. It is the same.

FIG. 3 shows a second embodiment of the present invention.
This shows a circuit example for one arm in which three IGBTs are connected in series and three in parallel. When the parallel number is 3 or more, it is possible to extend the circuit of FIG. 1 to magnetically couple the IGBTs Q11 and Q21 and Q21 and Q31 between the parallel connections to each other, but the same as the parallel number n as shown in FIG. By magnetically coupling by the magnetic circuit MCx of the n-order winding, a plurality of parallel connections can be magnetically coupled by one magnetic circuit, and the circuit can be simplified.

FIG. 4 shows a third embodiment of the present invention.
This is based on the fact that the current values flowing in the gate line and the emitter line of the element are the same, and the switching timing of the element is matched by magnetically coupling the emitter line instead of the gate line. The circuit operation and the like are exactly the same as those of the gate line shown in FIG. If this concept is expanded, it is possible to magnetically couple both the gate line and the emitter line, and the same effect as described above can be obtained.

The block diagram which shows 1st Embodiment of this invention Explanatory diagram for explaining magnetic coupling The block diagram which shows 2nd Embodiment of this invention The block diagram which shows 3rd Embodiment of this invention Configuration diagram showing a conventional example disclosed in Patent Document 1 Waveform diagram for explaining the operation of FIG. Configuration diagram showing a conventional example disclosed in Patent Documents 2 and 3

Explanation of symbols

Q11 to Q33 ... IGBT (insulated gate bipolar transistor), GDU11 to GDU33 ... gate drive circuit, MCx, MC11 to MC32 ... magnetic circuit, MG ... magnetic material.

Claims (4)

A series-parallel connection circuit of voltage-driven semiconductor elements in which a plurality of series-connected circuits in which a plurality of voltage-driven semiconductor elements are connected in series are connected in parallel, and a voltage applicable for turning on / off each voltage-driven semiconductor element In a semiconductor switch circuit comprising a gate drive circuit for supplying a gate signal to a gate terminal of a drive type semiconductor element,
In the series connection circuit, a gate line connecting the gate drive circuit of each stage and the gate terminal of the voltage driven semiconductor element is magnetically coupled to each other, and any one of the series connection circuits is voltage driven between the series connection circuits. Switch circuit characterized in that the gate lines of the semiconductor device are magnetically coupled to each other.   2. The semiconductor switch circuit according to claim 1, wherein, instead of the gate line, an emitter line connecting the gate drive circuit and the emitter terminal of the voltage-driven semiconductor element is magnetically coupled to each other.   2. The semiconductor switch circuit according to claim 1, wherein, in addition to the gate line, an emitter line connecting the gate drive circuit and the emitter terminal of the voltage-driven semiconductor element is also magnetically coupled to each other. The magnetic circuit that magnetically couples any one of the voltage-driven semiconductor elements of each of the series connection circuits has the same number of windings as the number of parallel connections. Semiconductor switch circuit.

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