JP4621368B2 - データ・リンクとのインターフェースを制御するコントローラと方法 - Google Patents

データ・リンクとのインターフェースを制御するコントローラと方法 Download PDF

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Publication number
JP4621368B2
JP4621368B2 JP2001048005A JP2001048005A JP4621368B2 JP 4621368 B2 JP4621368 B2 JP 4621368B2 JP 2001048005 A JP2001048005 A JP 2001048005A JP 2001048005 A JP2001048005 A JP 2001048005A JP 4621368 B2 JP4621368 B2 JP 4621368B2
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data
controller
slot
buffer
control
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JP2001048005A
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Japanese (ja)
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JP2001298494A5 (enExample
JP2001298494A (ja
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フランシス ミシェル デビッド
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エイアールエム リミテッド
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13103—Memory
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13107—Control equipment for a part of the connection, distributed control, co-processing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13291—Frequency division multiplexing, FDM
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13292—Time division multiplexing, TDM
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13332—Broadband, CATV, dynamic bandwidth allocation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13392—Channels assigned according to rules

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Information Transfer Systems (AREA)
  • Communication Control (AREA)
JP2001048005A 2000-02-24 2001-02-23 データ・リンクとのインターフェースを制御するコントローラと方法 Expired - Fee Related JP4621368B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB0004416.4 2000-02-24
GB0004416A GB2359703B (en) 2000-02-24 2000-02-24 A controller and method for controlling interfacing to a data link

Publications (3)

Publication Number Publication Date
JP2001298494A JP2001298494A (ja) 2001-10-26
JP2001298494A5 JP2001298494A5 (enExample) 2007-12-06
JP4621368B2 true JP4621368B2 (ja) 2011-01-26

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JP2001048005A Expired - Fee Related JP4621368B2 (ja) 2000-02-24 2001-02-23 データ・リンクとのインターフェースを制御するコントローラと方法

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Country Link
US (1) US7016370B2 (enExample)
JP (1) JP4621368B2 (enExample)
GB (1) GB2359703B (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002054601A1 (en) 2000-12-29 2002-07-11 Morphics Technology, Inc. Channel codec processor configurable for multiple wireless communications standards
US7277420B2 (en) * 2002-02-12 2007-10-02 Broadcom Corporation Temporal alignment of codec data with wireless local area network RF slots
DE10219357B4 (de) * 2002-04-30 2004-03-11 Advanced Micro Devices, Inc., Sunnyvale Verbesserter Datentransfer in Audiocodeccontrollern
US7124208B2 (en) * 2003-04-17 2006-10-17 Intel Corporation Method and apparatus for enumerating devices on a link
JP2008517561A (ja) * 2004-10-18 2008-05-22 アビオム、インク． データ配信用のパケットベースのシステムおよび方法
US20060083259A1 (en) * 2004-10-18 2006-04-20 Metcalf Thomas D Packet-based systems and methods for distributing data
US7526526B2 (en) * 2005-10-06 2009-04-28 Aviom, Inc. System and method for transferring data
US20070104332A1 (en) * 2005-10-18 2007-05-10 Clemens Robert P System and method for automatic plug detection
CN102257811B (zh) * 2008-12-25 2013-03-20 中兴通讯股份有限公司 移动终端多媒体广播驱动接口及实现方法
CN105404607B (zh) * 2015-11-20 2018-02-13 英业达科技有限公司 通用串行输入输出的数据传输方法

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2323000A (en) * 1939-10-10 1943-06-29 Auwarter Max Guide for molten silicates
JPH01302457A (ja) * 1988-05-30 1989-12-06 Nec Corp データ転送方式
IE922760A1 (en) * 1992-10-21 1994-05-04 Digital Equipment Internat Ltd DS-O Loop-back detection on a DS-1 line
US5574944A (en) * 1993-12-15 1996-11-12 Convex Computer Corporation System for accessing distributed memory by breaking each accepted access request into series of instructions by using sets of parameters defined as logical channel context
GB2323000B (en) * 1994-04-15 1998-11-04 Vlsi Technology Inc Serial interface circuit
US5960211A (en) * 1995-12-15 1999-09-28 Hughes Aircraft Data formatting method and apparatus for a data processing array
US6044225A (en) * 1996-03-13 2000-03-28 Diamond Multimedia Systems, Inc. Multiple parallel digital data stream channel controller
US5822553A (en) * 1996-03-13 1998-10-13 Diamond Multimedia Systems, Inc. Multiple parallel digital data stream channel controller architecture
JPH1084391A (ja) * 1996-09-09 1998-03-31 Hitachi Ltd データ転送装置
US5889480A (en) * 1996-10-18 1999-03-30 Samsung Electronics Co., Ltd. Full duplex serial codec interface with DMA
US5974480A (en) * 1996-10-18 1999-10-26 Samsung Electronics Co., Ltd. DMA controller which receives size data for each DMA channel
US6259957B1 (en) * 1997-04-04 2001-07-10 Cirrus Logic, Inc. Circuits and methods for implementing audio Codecs and systems using the same
JPH117422A (ja) * 1997-06-13 1999-01-12 Nippon Telegr & Teleph Corp <Ntt> メモリ搭載型の高速通信インタフェースボードとデータの送受信方法
US5928342A (en) * 1997-07-02 1999-07-27 Creative Technology Ltd. Audio effects processor integrated on a single chip with a multiport memory onto which multiple asynchronous digital sound samples can be concurrently loaded
US6226758B1 (en) * 1997-09-30 2001-05-01 Cirrus Logic, Inc. Sample rate conversion of non-audio AES data channels
US6269103B1 (en) * 1997-10-06 2001-07-31 Agere Systems Guardian Corp. High speed data interface using TDM serial bus
US6230219B1 (en) * 1997-11-10 2001-05-08 International Business Machines Corporation High performance multichannel DMA controller for a PCI host bridge with a built-in cache
JPH11305868A (ja) * 1998-04-16 1999-11-05 Yamaha Corp デジタル信号処理装置およびコンピュータシステム
US6404780B1 (en) * 1998-12-23 2002-06-11 Agere Systems Guardian Corp. Synchronizing data transfer protocol across high voltage interface
US6629001B1 (en) * 1999-09-15 2003-09-30 Intel Corporation Configurable controller for audio channels
US6529975B1 (en) * 1999-11-02 2003-03-04 Conexant Systems, Inc. Method and apparatus for addressing and controlling exspansion devices through an AC-link and a codec
US6434633B1 (en) * 1999-11-02 2002-08-13 Conexant Systems, Inc. Method and apparatus for facilitating AC-link communications between a controller and a slow peripheral of a codec

Also Published As

Publication number Publication date
GB2359703B (en) 2004-04-07
US7016370B2 (en) 2006-03-21
GB0004416D0 (en) 2000-04-12
US20010022787A1 (en) 2001-09-20
JP2001298494A (ja) 2001-10-26
GB2359703A (en) 2001-08-29

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