JP4594186B2 - Power IC protection device - Google Patents

Description

The present invention relates to power I C protection device for driving a motor.

  For example, in a gaming machine such as a slot machine, a predetermined number of medals are paid out to a tray through a payout opening according to a winning mode (see, for example, Patent Document 1). In the gaming machine described in Patent Document 1, medals accommodated in a hopper are paid out one by one by rotational driving of a motor. In such a gaming machine, a medal may become jammed during driving of the motor and the motor may be locked. Further, for example, an improper act of inserting a foreign object from the payout opening may cause a short circuit between the output terminal of the motor and the ground. On the other hand, for driving a motor, a power IC in which a power semiconductor is integrated is generally used. Therefore, it is necessary to protect the power IC from overcurrent caused by lock or short circuit. Various proposals have been made for devices for protecting motor-driven power ICs from overcurrent (see, for example, Patent Documents 2 and 3).

JP 2002-143391 A (FIG. 4) Japanese Patent Laid-Open No. 3-60214 (FIG. 2) JP-A-4-335560 (FIG. 2)

  The overcurrent caused by the short circuit is larger than the overcurrent caused by the lock, and the current level increases rapidly. However, although the devices described in the above-mentioned conventional patent documents 2 and 3 can sufficiently cope with an overcurrent caused by a lock, they protect the power IC against an overcurrent caused by a short circuit. It was not enough.

The present invention has been made in view of the above problems, and an object thereof is to provide a power I C protection device can reliably protect the power IC for driving the motor against over-current caused by a short

To achieve the above object, the present invention power I C protection device according to the pair of output terminals connected to the motor, and the power input terminal connected to a power supply circuit for generating a drive power of the motor A protective input terminal, and when the input signal of the protective input terminal is at a permitted level, the power input from the power supply circuit to the power input terminal is output to the output terminal from the output terminal. Power supply to the motor is enabled to drive the motor, and when the input signal is at a prohibited level, a power IC configured to prevent power supply from the output terminal to the motor is protected. A power IC protection device configured to detect a current detection resistor connected between the power supply circuit and the power input terminal, and a current flowing through the current detection resistor. A short-circuit detection circuit that detects whether a short circuit has occurred between the output terminal and the ground or between the output terminals while the data is being driven. A protection circuit that waits for a delay time and latches the input signal at the protection input terminal of the power IC to the inhibition level if the detection of the short circuit by the short circuit detection circuit continues after the delay time has elapsed. The short-circuit detection circuit is connected to the power supply circuit side of the current detection resistor, generates a short-circuit reference voltage for detecting the short-circuit, and the power of the current detection resistor When comparing the input voltage from the input terminal side with the short-circuit reference voltage, the output signal from the output terminal is set to a normal level when the input voltage is normal, and when the input voltage is the short circuit A comparator circuit for setting a fault level, and when the output signal of the short circuit level is output from the comparator circuit, the protection circuit outputs the input signal of the protection input terminal before the predetermined delay time elapses. On the other hand, when the normal level output signal is output from the comparison circuit, the short circuit protection circuit that switches the input signal of the protection input terminal to the permission level and the output terminal of the comparison circuit are switched to the prohibition level. Connected between the integration circuit charged or discharged by the output signal of the short-circuit level and the input terminal of the comparison circuit to which the input voltage is input, and the voltage of the integration circuit reaches a predetermined level. Then, the voltage of the input terminal of the comparison circuit is made higher or lower than the reference voltage for short-circuiting to thereby change the output signal from the output terminal of the comparison circuit. And a latch circuit for latching the short-circuit level, said predetermined delay time, the voltage of the integration circuit by an output signal of the short-circuit level from the output terminal of the comparator circuit is a time to reach the predetermined level (Claim 1).

The power IC protection device according to the present invention is further connected to the integration circuit, and when a predetermined return command signal is generated, the latch is released from the latch circuit by discharging or charging the integration circuit. comprising a release circuit, said power IC, the return command signal is configured to drive the motor to be generated, is detected before Symbol the short-circuited by the short-circuit detecting circuit during release of the latch by the latch release circuit lever, the input signal of the protective input terminal of the power IC is characterized in that is returned to the disable level by the protection circuit (claim 2).

The power IC protection device according to the present invention further includes a lock detection circuit that detects whether or not the motor is locked while the motor is being driven, and the lock detection circuit detects the lock by the predetermined delay. continuing longer predetermined time than the time, is characterized in that a lock delay protection circuit that latches an input signal of the protective input terminal of the power IC to the disable level (claim 3).

According to the first aspect of the present invention, the input voltage based on the current flowing through the current detection resistor connected between the power supply circuit and the power input terminal by the short circuit detection circuit and the short-circuit reference voltage for the reference voltage generation circuit. Are compared with each other by the comparison circuit, and whether or not the input voltage is short-circuited is detected based on the current flowing through the current detection resistor, so that an overcurrent due to the short-circuit can be reliably detected. That is, for example, in a configuration in which a current detection resistor is connected between the ground terminal of the power IC and the ground, when the output terminal of the power IC and the ground are directly short-circuited by, for example, a metal foreign object, The detection resistor is bypassed and the output terminal directly flows to the ground. Therefore, in this case, even if the current flowing through the current detection resistor is monitored, a short circuit cannot be detected. On the other hand, in the first aspect of the invention, power is supplied to the motor by supplying power input from the power supply circuit to the power input terminal of the power IC via the current detection resistor from the output terminal of the power IC to the motor. Done by supplying. Therefore, even when the output terminal of the power IC and the ground are directly short-circuited by, for example, a foreign substance, an overcurrent due to the short-circuit always flows through the current detection resistor, so that the short-circuit can be reliably detected.

Then, when you are normal current flows through the current detecting resistor, the output signal from the output terminal of the comparator circuit of the short-circuit detecting circuit is in a normal level, the output signal of the normal level is output from the comparator circuit Then, the input signal of the input terminal for protection of the power IC is set to the permission level by the short circuit protection circuit, and the state in which power can be supplied from the power IC to the motor is continued. On the other hand, when the short-circuit occurs, on the basis of the detection output signal from the output terminal of the comparator circuit Ru is shorted level. When the output signal of the short-circuit level from the comparator circuit is output, is the input signal is in the disable level power supply is not possible state from the power IC to the motor of the protection input terminal by short-circuit protection circuit Power supply stops. When the power supply from the power IC to the motor is stopped, since the overcurrent due to a short circuit does not flow to the current detection resistor, the output signal from the output terminal of the comparator circuit is restored to normal levels. This restoration, the output signal of a normal level from the comparator circuit is outputted, return to the input signal is in the permission level ready for power supply from the power IC to the motor of the protection input terminal by short-circuit protection circuit Then, power supply to the motor is resumed. At this time, if the short circuit continues, the power supply from the power IC to the motor is again stopped based on the detection . As described above, when the short circuit continues, the power supply to the motor is repeatedly stopped and restarted. Meanwhile, the output signal of the short-circuit level from the output terminal of the comparator circuit is outputted, the integration circuit of the connected protection circuit to an output terminal of the comparator circuit is charged or discharged by the output signal of the short-circuit level of the comparator circuit The Then, a short circuit occurs, the charging or discharging of the integrating circuit stop and restart are repeated supply of power from the power IC to the motor is intermittently performed by its continuation, of the integration circuit by the charge or discharge The voltage gradually increases or decreases. Then, the voltage of the integrator circuit is reached to a predetermined level, waiting Then a predetermined delay time, the output signal from the comparator circuit is latched to the short-circuit level by the latch circuit of the protection circuit. Thus, the output signal from the comparator circuit is latched to the short level, is switched to the input signal is prohibited level of protection for the input terminals of the power IC with short-circuit protection circuit, thereafter continuously outputting power IC becomes impossible power supply from the terminal to the motor, it is possible to reliably protect the power IC from shorting.

Moreover, when an overcurrent due to a short circuit is detected, the power supply to the motor is repeatedly stopped and restarted as described above, and the short circuit current is intermittently flowed by the short circuit protection circuit so that the voltage of the integration circuit is increased. It gradually rises or falls, and after the voltage of the integration circuit reaches a predetermined level and waits for a predetermined delay time, the input signal of the power IC protection input terminal is switched to the prohibited level and the motor from the output terminal of the power IC is switched to the motor. Compared to the configuration in which the short circuit current is continuously supplied to increase or decrease the voltage of the integration circuit when an overcurrent due to a short circuit is detected. Thus, the predetermined delay time can be set to a large value. Accordingly, there is an advantage that the power supply to the motor can be restarted immediately even if the short circuit protection circuit malfunctions due to the influence of instantaneous noise such as static electricity. Further, when the voltage of the integration circuit reaches a predetermined level, a latch circuit is formed that latches the signal from the comparison circuit to the short-circuit level by making the voltage to the input terminal of the comparison circuit higher or lower than the short-circuit reference voltage. The latch circuit can be disposed between the integration circuit and the comparison circuit. Incidentally, when the output signal from the comparison circuit Ru is latched in a short circuit level, will be charging or discharging of the integrating circuit is continuously performed, the voltage of the integrating circuit is continued the state reaches a predetermined level The

Next, according to the invention of claim 2, when the return command signal is generated, the voltage of the integration circuit is discharged or charged by the latch release circuit connected to the integration circuit, so that the voltage reaches a predetermined level. When the output signal from the comparison circuit by the latch circuit is released from the short-circuit level, the latch is released. This latch release eliminates the influence of the latch circuit on the input voltage to the input terminal of the comparison circuit. If the short circuit is resolved at this time , the current is not flowing through the current detection resistor. The output signal of the circuit becomes a normal level, and the input signal at the protection input terminal of the power IC returns to the permission level. Further, since the power IC is configured to drive the motor when the return command signal is generated, power is supplied to the motor from the output terminal of the power IC. At this time, if eliminated short circuit, the input signal of the protection input terminal as described above is returned to authorization levels, Ru power is supplied to the motor by a successful operation. On the other hand, if the short circuit continues when the latch is released, the input signal of the power IC protection input terminal is returned to the prohibited level by the protection circuit , and power cannot be supplied from the power IC output terminal to the motor again. The motor stops operating. Thus, according to the present invention, only by performing a generation operation of the return command signal, such as performing operator such as switch operation, whether short circuit during release of the latch is still followed by easily determine power The IC can be protected from a short circuit .

According to the invention of claim 3 , the lock detection circuit detects whether or not the motor is locked during driving of the motor, and when the detection of the lock continues for a predetermined time longer than the predetermined delay gap , Since the input signal of the input terminal for protection of the power IC is latched at the prohibited level by the lock delay protection circuit, the power IC can be protected against an overcurrent due to the motor locking in addition to the short circuit. At this time, the protection by the latch of the protection circuit operates before the latch of the lock delay protection circuit.

  FIG. 1 is a perspective view showing an external appearance of a slot machine provided with an embodiment of a power IC protection device according to the present invention, and FIG. 2 is a right side view showing an internal configuration of a main part of the slot machine. The slot machine 1 is configured as shown in FIGS. 1 and 2, for example. That is, in the slot machine 1, the front surface of the housing 3 is closed by the front panel 5 so as to be freely opened and closed, and the operation plate 7 is disposed at a substantially central height position of the front panel 5. A front plate 9 is disposed above the front plate 9.

  The front plate 9 is provided with a horizontally long display window 11. Inside the display window 11, a reel unit 43 including left, middle, and right reels 13L, 13M, and 13R each having a plurality of symbols displayed on its peripheral surface is disposed. The 13M and 13R symbols are set so as to be looked at in the upper, middle and lower stages. Further, the operation panel 7 has a bet switch 15 for instructing the insertion of one medal from the credit medals stored inside, and the maximum number of medals per game (for example, three) from the credit medals. A maximum bet switch 17 for instructing the rotation, a lever-shaped start switch 19 for starting the rotation of each reel, and the left, middle and right for stopping the rotation of the left, middle and right reels 13L, 13M and 13R, respectively. Stop switches 21L, 21M, and 21R, a settlement switch 23 for paying out credit medals, and a medal slot 25 are provided.

  In addition, a liquid crystal display 27 for displaying a moving image or the like is provided in the approximate center above the front plate 9, and various winning symbols are displayed immediately above the liquid crystal display 27. An explanation panel 29 is provided, and speakers 31L and 31R are provided on the left and right sides of the liquid crystal display 27 and the explanation panel 29, respectively, for performing effects by music. A central lamp portion 33M is disposed on the upper side of the explanation panel 29 and the speakers 31L and 31R, and left and right lamp portions 33L and 33R are disposed on the left and right sides thereof. Each lamp unit 33M, 33L, 33R is provided with a light source such as a light emitting diode. These lamp portions 33M, 33L, and 33R are integrally formed, and constitute an upper lamp portion 33 for performing effects such as notifying a player of winning and winning.

  In addition, a lower panel 35 on which a decorative image or the like is displayed is provided below the operation panel 7. A lower lamp unit in which a plurality of light sources are arranged in, for example, two rows on the left and right sides of the lower panel 35. 37L and 37R are provided. Further, below the lower panel 35, a medal payout opening 39 is provided at a substantially central position of the housing 3 in the left-right direction, and a medal receiver 41 for receiving a medal paid out from the payout opening 39 is provided. . A hopper unit 45 for discharging medals to the payout opening 39 is disposed below the reel unit 43 inside the housing 3.

  In addition, a medal selector 47 for determining whether or not the medal is a regular medal is disposed immediately inside the medal slot 25. Then, when the medal inserted into the medal slot 25 is determined as a regular medal by the medal selector 47, it falls into the hopper tank 451 of the hopper unit 45. On the other hand, a medal that has not been determined to be a regular medal by the medal selector 47, a maximum number of credit medals stored (for example, 50) and a maximum number of coins to be inserted per game (for example, 3) even if the medal is determined to be a regular medal The medals inserted in excess of the total number are discharged from the payout opening 39 to the medal receiver 41 by the medal selector 47.

  In FIG. 2, a power supply box 48 is disposed on the back side of the hopper unit 45 (left side of the hopper unit 45 when viewed from the front of the housing 3). The power supply box 48 is provided with a power switch (not shown) for turning on the power of the slot machine 1, and is provided with a reverse rotation switch 49, and a reverse rotation LED 50 is provided inside the reverse rotation switch 49. The reverse switch 49 and the reverse LED 50 will be described later.

  FIG. 3 is a perspective view of the hopper unit with the hopper tank removed. The hopper unit 45 is provided with a disc 454 that has through-insertion portions 452 (six in this embodiment) into which the medals 51 in the hopper tank 451 are inserted, and is configured to be capable of normal rotation and reverse rotation around the rotation shaft 453. , A medal kicker 455 urged by an urging member (not shown), and a hopper motor 57 (FIG. 4) whose drive shaft is connected to a rotation shaft 453. Further, in the vicinity of the medal kicker 455, a medal discharge passage 458 is formed by the lead plate 456 and the guide wall 457, and this medal discharge passage 458 communicates with the payout port 39 of the housing 3. Then, when the disk 454 rotates normally (in the clockwise direction in FIG. 3) by driving the hopper motor 57 (FIG. 4), the medal 51 inserted into the insertion portion 452 is applied to the urging force of the urging member. On the other hand, the medal kicker 455 is pushed and guided by a guide pin (not shown) to gradually come out of the insertion portion 452. When the medal 51 is completely removed from the insertion portion 452, the medal kicker 455 is vigorously returned to the original position by the urging force of the urging member, whereby the medal 51 passes through the medal discharge passage 458 toward the payout port 39. It will be played.

  FIG. 4 is a block diagram showing an electrical configuration of the slot machine 1. The insertion sensor 52 is provided in the vicinity of the medal insertion slot 25 inside the housing 3 and detects the inserted medals one by one. The payout sensor 53 is provided at the exit of the hopper unit 45 and detects medals paid out to the payout outlet 39 one by one. The left / middle / right position sensors 55L, 55M, and 55R are for detecting the rotational positions of the left / middle / right reels 13L, 13M, and 13R, respectively. For example, the left / middle / right reels 13L, 13M, and 13R Each of the provided photointerrupters detects the protruding portion. When the left, middle, and right reels 13L, 13M, and 13R rotate, the protruding portion is detected every round and the detection signal is output to the main control board 63. The hopper motor 57 rotates the disk 454 of the hopper unit 45 to pay out the medal 51 toward the payout port 39. The motor control board 59 is a board on which a control circuit for controlling the driving of the hopper motor 57 is mounted. The circuit configuration of the motor control board 59 will be described later. In this embodiment, each of the reels 13L, 13M, and 13R is rotationally driven by, for example, a stepping motor.

  Further, in the slot machine 1, a main control board 63 on which a main CPU 61 that controls a game is mounted and a sub control board 73 on which a sub CPU 71 that controls an effect related to the game is mounted are provided separately. ing. The RAM 65 of the main control board 63 temporarily stores data, and the ROM 67 stores a game machine program including preset data. The main CPU 61 controls the game by operating in accordance with the game machine program. Further, the main CPU 61 sends data related to the game to the sub CPU 71 as effect control data. The memory 75 of the sub-control board 73 includes a RAM unit that temporarily stores data and a ROM unit that stores a program for rendering. The sub CPU 71 controls the effect related to the game by operating according to the effect program based on the effect control data from the main CPU 61. For example, the sub CPU 71 displays a moving image on the liquid crystal display 27, generates music from the speakers 31L and 31R, or generates music from the speakers 31L and 31R according to an effect pattern set in advance corresponding to the progress of the game or the lottery result. The light sources of the lamp unit 33 and the lower lamp units 37L and 37R are blinked simultaneously or individually.

  The game includes a normal game that is a general game and a special game (bonus game) that is a game advantageous to the player over the normal game. Briefly explaining the normal game, in this slot machine 1, the insertion sensor 52 detects the insertion of a medal from the medal insertion slot 25, or the bet switch 15 or the maximum bet switch 17 is operated to input a credit medal. If there is, the game is started. Then, when the start switch 19 is operated after the game is started, first, a random number lottery is performed to determine whether or not the game is won, and rotation of all three reels 13L, 13M, and 13R starts almost simultaneously. Thereafter, when one of the three stop switches 21L, 21M, and 21R is operated, rotation of the reels 13L, 13M, and 13R corresponding to the stop switches 21L, 21M, and 21R is stopped. When all the three stop switches 21L, 21M, and 21R have been operated, the rotation of all three reels 13L, 13M, and 13R is stopped. At this time, when a predetermined symbol stops at a predetermined position, a prize is won, and a predetermined number of medals are paid out to the player by the hopper unit 45, or a predetermined profit such as replay is given to the player. The Instead of paying out medals, credit medals may be stored inside.

  FIG. 5 is a block diagram showing functional blocks of the control circuit of the hopper motor 57, and FIGS. 6A and 6B are circuit diagrams showing the main parts of a specific circuit example of FIG. FIG. 6A shows the circuit in the almost left half of FIG. 5, FIG. 6B shows the circuit in the almost right half of FIG. 5 including a part of FIG. 6A, and FIGS. 6A and 6B show the entire circuit. Yes.

  The power IC 81 is a driver IC that drives the hopper motor 57, and includes motor output terminals OUT1 and OUT2, a power input terminal VS, a protection input terminal ST, and control input terminals IN1 and IN2. The motor output terminal OUT 1 is connected to the positive terminal of the hopper motor 57, and the motor output terminal OUT 2 is connected to the negative terminal of the hopper motor 57. The power input terminal VS is connected to the motor power supply circuit VDD via the current detection resistor R1. The protective input terminal ST is pulled up via a resistor R13. The control input terminal IN1 is pulled up via a resistor R23, and the control input terminal IN2 is pulled up via a resistor R22. Further, the control input terminal IN1 is further connected to the reverse rotation switch 49, and the control input terminal IN2 is further connected to the output terminal of the main CPU 61. The motor power supply circuit VDD generates electric power for driving the hopper motor 57, and outputs a voltage Vdd (for example, DC26V in this embodiment). The low-voltage power supply circuit VCC generates power for driving each circuit element and outputs a voltage Vcc (for example, DC 7 V in this embodiment).

  When the low-level forward signal is input from the main CPU 61 to the control input terminal IN2, the power IC 81 outputs the input power from the motor power supply circuit VDD to the power input terminal VS to the motor output terminal OUT1. In addition, the motor output terminal OUT2 is connected to the ground line, and the hopper motor 57 is rotated forward. The power IC 81 outputs the input power from the motor power supply circuit VDD to the motor output terminal OUT2 and the motor output terminal OUT1 when the reverse rotation switch 49 is pressed and the control input terminal IN1 is set to the low level. Is connected to the ground line and has a function of reversing the hopper motor 57.

  Further, the power IC 81 can supply power from the motor output terminals OUT1 and OUT2 to the hopper motor 57 when the input signal Vst of the protection input terminal ST is at a high level (corresponding to the “permission level” in the present invention). On the other hand, when the input signal Vst at the protection input terminal ST is at a low level (corresponding to the “prohibition level” of the present invention), it is impossible to supply power from the motor output terminals OUT1 and OUT2 to the hopper motor 57. It is configured. Thus, in this embodiment, the motor power supply circuit VDD corresponds to the “power supply circuit” of the present invention, and the motor output terminals OUT1 and OUT2 correspond to the “output terminals of the power IC” of the present invention.

  The lock detection circuit 83, the lock delay protection circuit 85, the short circuit detection circuit 91, the short circuit protection circuit 93, the short circuit protection delay circuit 95, and the latch release circuit 97 are input signals to the protection input terminal ST based on the current flowing through the current detection resistor R1. The power IC 81 is protected by controlling the level of Vst. For example, when electric power is being supplied from the motor output terminal OUT1 of the power IC 81 to the hopper motor 57, that is, during normal rotation of the disk 454, if the medal 51 is jammed and the disk 454 cannot be rotated, the hopper motor 57 is locked. As a result, overcurrent flows. Further, during the forward rotation of the disk 454, for example, when an illegal act of inserting a foreign object from the discharge port 39 is performed and the positive terminal and the negative terminal of the hopper motor 57 are short-circuited by the foreign object, an overcurrent due to the short circuit flows. . Therefore, in this embodiment, the power IC 81 is protected from an overcurrent caused by a lock or a short circuit by the circuits 83, 85, 91, 93, 95, and 97.

  First, an overview of the function of each circuit block will be described with reference to FIG. The lock detection circuit 83 detects the lock of the hopper motor 57. Further, when the lock detection circuit 83 detects the lock, the lock delay protection circuit 85 stops the operation by switching the input signal Vst of the protection input terminal ST of the power IC 81 to a low level after delaying for a predetermined time. Is to protect. The short circuit detection circuit 91 detects a short circuit between the positive terminal and the negative terminal of the hopper motor 57. The short circuit protection circuit 93 protects the power IC 81 by stopping the operation of the power IC 81 when the short circuit detection circuit 91 detects a short circuit. The short circuit protection delay circuit 95 latches protection by the short circuit protection circuit 93 after a predetermined time when the short circuit continues. The latch release circuit 97 releases the protection of the latched power IC 81.

  Next, a specific circuit configuration example will be described with reference to FIGS. 6A and 6B. In the lock detection circuit 83, the output voltage Vdd of the motor power supply circuit VDD is divided by resistors R2 and R3 to generate a lock detection reference voltage Va, which is input to the non-inverting input terminal of the comparator IC1. In the short circuit detection circuit 91, the output voltage Vdd of the motor power supply circuit VDD is divided by resistors R4 and R5 to generate a short circuit detection reference voltage Vb, which is input to the non-inverting input terminal of the comparator IC2. The current detection resistor R1 connected between the motor power supply circuit VDD and the power input terminal VS of the power IC 81 is a low resistance for converting the current flowing from the motor power supply circuit VDD to the power IC 81 into the current detection voltage Vc. is there. That is, as the current flowing through the current detection resistor R1 increases, the voltage drop at the current detection resistor R1 increases, and thereby the current detection voltage Vc decreases. In the lock detection circuit 83, the current detection voltage Vc is input as the input voltage Vc1 to the inverting input terminal of the comparator IC1, and in the short circuit detection circuit 91, the current detection voltage Vc is input as the input voltage Vc2 via the resistor R6. The signal is input to the inverting input terminal.

  The comparator IC1 of the lock detection circuit 83 compares the lock detection reference voltage Va and the input voltage Vc1 (in this circuit example, Vc1 = Vc). When the output signal Vs1 is Va ≦ Vc1, the comparator IC1 is at a low level. When> Vc1, the high level is set. The comparator IC2 of the short-circuit detection circuit 91 compares the short-circuit detection reference voltage Vb with the input voltage Vc2. The output signal Vs2 is low when Vb ≦ Vc2, and high when Vb> Vc2. And In this embodiment, for example, the lock detection reference voltage Va (resistance values of the resistors R2 and R3) is set so that Va> Vc1 when the current flowing through the current detection resistor R1 exceeds 2.3 A, and the current detection resistor R1 The short-circuiting detection reference voltage Vb (resistance values of the resistors R4 and R5) is set so that Vb> Vc2 when the current flowing through 4A exceeds 4A.

  Further, since the protection input terminal ST of the power IC 81 is pulled up to the voltage Vcc of the power supply circuit VCC via the resistor R13, the input signal Vst of the protection input terminal ST is at a high level. Therefore, when a normal rotation signal is input from the main CPU 61 to the control input terminal IN2 of the power IC 81, the power IC 81 connects the motor output terminal OUT2 to the ground and power from the motor output terminal OUT1 to the hopper motor 57. Supply is started, and thereby the hopper motor 57 starts normal rotation.

  In a normal state in which a steady current flows through the current detection resistor R1, that is, Va ≦ Vc1, the output signal Vs1 of the comparator IC1 is at a low level. Therefore, the gate current of the thyristor Q1 of the lock delay protection circuit 85 does not flow, and the thyristor Q1 is turned off. As a result, the field effect transistor (hereinafter simply referred to as “transistor”) Q2 is off, and the transistor Q3 is off. Similarly, the output signal Vs2 of the comparator IC2 is at a low level. Therefore, the transistor Q7 of the short circuit protection circuit 93 is turned off because the gate voltage thereof is at a low level. Since the transistors Q3 and Q7 are both turned off in this way, the input signal Vst at the protection input terminal ST of the power IC 81 pulled up to the voltage Vcc of the power supply circuit VCC via the resistor R13 is at the high level. As a result, the power IC 81 is continuously operable. Thus, in this embodiment, the motor power supply circuit VDD and the resistors R4 and R5 constitute the “reference voltage generation circuit” of the present invention. The comparator IC2 corresponds to the “comparison circuit” of the present invention.

  Next, with reference to FIGS. 6A, 6B, 7, and 8, the operation of each circuit when the hopper motor 57 is locked during operation will be described. FIG. 7 is a timing chart showing the transition of the voltage signal level of each part when the hopper motor 57 is locked, and FIG. 8 is a timing chart showing the transition of the voltage signal level of each part when releasing the lock protection.

  First, in the normal state, as described above, since the lock detection reference voltage Va and the input voltage Vc1 are Va ≦ Vc1, the output signal Vs1 of the comparator IC1 is at a low level. The gate voltage Vd of the thyristor Q1 and the gate voltage Ve for turning on the thyristor Q1 are Vd <Ve. Further, the input signal Vst of the protection input terminal ST of the power IC 81 is at a high level. At this time, since the gate of the transistor Q8 is pulled up to the voltage Vcc of the low-voltage power supply circuit VCC via the resistor R23, the transistor Q8 is turned on. Accordingly, since the gate of the transistor Q4 is at a low level, the transistor Q4 is turned off.

  Then, for example, when the medal 51 is clogged with the disk 454 and the hopper motor 57 is locked at the time t1 (FIG. 7) and an overcurrent exceeding 2.3 A flows through the current detection resistor R1, Va> Vc1 is satisfied, and the comparator IC1 Output signal Vs1 is switched from the low level to the high level. As a result, the capacitor C1 is charged and the gate voltage Vd of the thyristor Q1 gradually increases. When Vd> Ve at time t2, the thyristor Q1 is turned on. This turns on transistor Q2 and turns on transistor Q3. When the transistor Q3 is turned on, the input signal Vst of the protection input terminal ST is switched to a low level, and the power IC 81 stops its operation.

  Since the current stops flowing through the current detection resistor R1 due to the operation stop of the power IC 81, the condition returns to Va ≦ Vc1, thereby returning the output signal Vs1 of the comparator IC1 to the low level. Since the charge of the capacitor C1 is gradually discharged through the resistor R10, the gate voltage Vd of the thyristor Q1 gradually decreases, but the thyristor Q1 is not turned off even when the gate voltage Vd decreases, so that the protective input terminal The ST input signal Vst is latched at the low level, and the operation stop state of the power IC 81 continues. Further, when the input signal Vst of the protection input terminal ST is latched at a low level, the reverse rotation LED 50 is turned on.

  When an abnormality is detected when the hopper motor 57 is stopped halfway and the front panel 5 of the housing 3 is opened, the fact that the power IC 81 is in an operation stop state is notified by turning on the reverse rotation LED 50. When the reverse switch 49 of the power supply box 48 is pushed at time t3 and the control input terminal IN1 is set to the low level, the gate voltage of the transistor Q8 is set to the low level, and the transistor Q8 is turned off. As a result, the gate of the transistor Q4 is pulled up to the voltage Vcc of the low-voltage power supply circuit VCC via the resistor R20, so that the transistor Q4 is turned on and the gate voltage Vd of the thyristor Q1 is lowered to the ground level. As a result, the thyristor Q1 is turned off, the transistor Q2 is turned off, the transistor Q3 is turned off, and the input signal Vst of the protection input terminal ST returns to the high level. As a result, the power IC 81 returns to the operable state, and the control input terminal IN1 is set to the low level by turning on the reverse rotation switch 49. Therefore, the power IC 81 connects the motor output terminal OUT1 to the ground and the motor input terminal IN1. Electric power is supplied from the output terminal OUT2 to the negative terminal of the hopper motor 57, and the hopper motor 57 (disk 454) is reversed. As a result, the medal 51 jammed in the disk 454 can be removed.

  In FIG. 7, the delay time T1 from the time t1 when the hopper motor 57 is locked and Va> Vc1 to the time t2 when the thyristor Q1 is turned on is the hopper motor 57 and the power even if the overcurrent due to the lock continues to flow. The value is set such that the IC 81 does not deteriorate. This delay time T1 is determined by the time constant of an integrating circuit composed of resistors R8, R9, R10 and a capacitor C1. However, when the hopper motor 57 is started, the inrush current may temporarily exceed 2.3A. Therefore, the delay time T1 is set to a value that is longer than the duration of the inrush current and as short as possible. In this embodiment, the delay time T1 is set to be about T1≈100 msec, for example. In FIG. 7, for convenience of explanation, the input voltage Vc1 of the comparator IC1 is shown to drop vertically when locked.

  Next, referring to FIGS. 6A, 6B, and 9, during operation of the hopper motor 57, the positive terminal of the hopper motor 57 or the motor output terminal OUT1 of the power IC 81 and the negative terminal, the motor output terminal OUT2 or The operation of each circuit when a short circuit occurs with the ground will be described. FIG. 9 is a timing chart showing the transition of the voltage signal level of each part when the short circuit occurs.

  First, in the normal state, as described above, when the short-circuit detection reference voltage Vb and the input voltage Vc2 are compared, Vb ≦ Vc2, the output signal Vs2 of the comparator IC2 is low level (“normal level” of the present invention). Is equivalent). Since the gate of the transistor Q6 of the short circuit protection delay circuit 95 is connected to the output terminal of the comparator IC2 via the diode D1 and the resistor R15, the threshold voltage Vth of the transistor Q6 and the gate voltage Vf of the transistor Q6 are In comparison, Vf <Vth and the transistor Q6 is off. At this time, since the gate of the transistor Q8 is pulled up to the voltage Vcc of the low-voltage power supply circuit VCC via the resistor R23, the transistor Q8 is turned on. Therefore, since the gate of the transistor Q5 is at a low level, the transistor Q5 is turned off.

  Then, for example, when the positive terminal (motor output terminal OUT1) and the negative terminal (motor output terminal OUT2) of the hopper motor 57 are short-circuited at time t5 (FIG. 9), the current flowing through the current detection resistor R1 increases and the comparator When the input voltage Vc2 of IC2 decreases and the current flowing through the current detection resistor R1 exceeds 4A and Vb> Vc2, the output signal Vs2 of the comparator IC2 is changed from the low level to the high level (corresponding to the “short circuit level” of the present invention). Switch to. As a result, the gate voltage of the transistor Q7 is switched from the low level to the high level and the transistor Q7 is turned on. As a result, the input signal Vst at the protection input terminal ST of the power IC 81 is switched to the low level, and the power IC 81 operates. To stop.

  When the supply of power to the hopper motor 57 is stopped by stopping the operation of the power IC 81, the current does not flow to the current detection resistor R1, so the input voltage Vc2 of the comparator IC2 rises. When Vb ≦ Vc2, the output signal Vs2 of the comparator IC2 is low. Return to level. Then, the transistor Q7 is turned off, the input signal Vst at the protection input terminal ST of the power IC 81 returns to the high level, and the power IC 81 returns to the operable state. Here, since the control input terminal IN <b> 2 is set to the low level by the normal rotation signal from the main CPU 61, the power IC 81 resumes the power supply to the hopper motor 57. However, since the short-circuit state between the positive terminal and the negative terminal of the hopper motor 57 continues, an overcurrent exceeding 4 A flows through the current detection resistor R1, and the power IC 81 stops operating again.

  Thus, when the power IC 81 repeats the operation stop and the operation restart, the capacitor C2 is charged while the output signal Vs2 of the comparator IC2 is at the high level, and the gate voltage Vf of the transistor Q6 gradually increases. When Vf> Vth at time t6, the transistor Q6 is turned on. As a result, the inverting input terminal of the comparator IC2 is pulled down to the ground via the resistor R14, so that Vb> Vc2 is latched and the output signal Vs2 of the comparator IC2 is latched to the high level. As a result, the transistor Q7 is latched on and the capacitor C2 continues to be charged, so that the transistor Q6 is latched on. Since the transistor Q7 is latched on, the input signal Vst of the protection input terminal ST is latched at the low level, and the power IC 81 is latched in the operation stopped state. Further, the reverse rotation LED 50 repeats blinking while the power IC 81 repeats operation stop and operation restart, and remains lit when the power IC 81 is latched in the operation stop state.

  In FIG. 9, the time T2 from the time t5 when the positive terminal and the negative terminal of the hopper motor 57 are short-circuited until the time when the input signal Vst of the protection input terminal ST becomes low level and the power IC 81 first stops operating is In this embodiment, for example, a very short value of about 1.5 μsec is set. This is realized by using a comparator having high-speed response performance formed in an integrated circuit as the comparator IC2.

  Further, the delay time T3 from the time t5 when the power IC 81 is short-circuited to the time t6 when the power IC 81 is latched in the operation stop state is set to a value that does not cause the power IC 81 to deteriorate even if an overcurrent due to the short circuit flows intermittently. ing. This delay time T3 is determined by the time constant of the integrating circuit composed of the resistor R15 and the capacitor C2. Therefore, in this embodiment, for example, the hopper motor 57 is turned on and off by a short circuit approximately 30 times, so that T3≈100 μsec is set. When the current flowing through the current detection resistor R1 exceeds 4A, the lock detection circuit 83 and the lock delay protection circuit 85 also operate as described with reference to FIG. However, since T1 >> T3, the short-circuit protection circuit 93 and the short-circuit protection delay circuit 95 operate first. Thus, in this embodiment, the integrating circuit composed of the capacitor C2 and the resistor R15 corresponds to the “integrating circuit” of the present invention, and the transistor Q6 corresponds to the “latch circuit” of the present invention. Further, the short circuit protection circuit 93 and the short circuit protection delay circuit 95 constitute a “protection circuit” of the present invention.

  Next, with reference to FIG. 6A, FIG. 6B, FIG. 10, and FIG. 11, the operation of each circuit when releasing short-circuit protection will be described. FIG. 10 is a timing chart showing the transition of the voltage signal level of each part when the short circuit is eliminated when the short circuit protection is released, and FIG. 11 is the transition of the voltage signal level of each part when the short circuit continues when the short circuit protection is released. It is a timing chart which shows.

  When an abnormality is detected when the hopper motor 57 is stopped halfway and the front panel 5 of the housing 3 is opened, the fact that the power IC 81 is in an operation stop state is notified by turning on the reverse rotation LED 50. At this stage, it is unknown whether the abnormality is due to a lock or a short circuit. For example, when the reverse rotation switch 49 of the power supply box 48 is pushed at time t7 (FIG. 10) and the control input terminal IN1 is set to the low level, the gate of the transistor Q8 is set to the low level and the transistor Q8 is turned off. . As a result, the gate of the transistor Q5 is pulled up to the output voltage Vcc of the low-voltage power supply circuit VCC via the resistor R20, so that the transistor Q5 is turned on. As a result, the charge of the capacitor C2 is discharged through the parallel circuit of the resistor R17 and the capacitor C3, the gate voltage Vf of the transistor Q6 decreases, and the transistor Q6 is turned off when Vf <Vth. Therefore, the latch of the inverting input terminal of the comparator IC2 is released, and Vb ≦ Vc2 is returned, and the output signal Vs2 of the comparator IC2 returns to the low level, whereby the input signal Vst of the protection input terminal ST of the power IC 81 becomes the high level. The power IC 81 returns to the operable state. In addition, the lit reverse LED 50 is turned off. The power IC 81 connects the motor output terminal OUT1 to the ground and supplies power from the motor output terminal OUT2 to the negative terminal of the hopper motor 57 to reverse the hopper motor 57.

  Here, when the short circuit is eliminated when the reverse rotation switch 49 is turned on, as shown in FIG. 10, Vb ≦ Vc2 is maintained, so that the output signal Vs2 of the comparator IC2 is held at the low level, and the transistor Q6 Remains off, so that the power IC 81 can be operated. The reverse rotation of the hopper motor 57 continues until the reverse rotation switch 49 is turned off.

  On the other hand, if the short circuit continues when the reverse rotation switch 49 is on, when the power IC 81 returns to the operable state and the hopper motor 57 starts reverse rotation, an overcurrent exceeding 4 A again flows through the current detection resistor R1. As a result, as shown in FIG. 11, as in the case of FIG. 9, the power IC 81 repeatedly stops and restarts operation, the capacitor C2 is charged, and the gate voltage Vf of the transistor Q6 gradually increases. When Vf> Vth, the transistor Q6 is turned on, and Vb> Vc2 is held, whereby the power IC 81 is latched again in the operation stop state.

  According to the setting of the circuit constants described in FIG. 9 (that is, the on / off state of the hopper motor 57 due to the short circuit is repeated about 30 times and T3≈100 μsec), the operation stop and the operation restart of the power IC 81 in FIG. Thus, the delay time T4 from the time t8 when the reverse rotation switch 49 is turned on to the time t9 when the power IC 81 is latched in the operation stop state is about T4≈400 μsec. Thus, in this embodiment, the ON operation of the reverse rotation switch 49 corresponds to “generation of a return command signal” of the present invention.

  As described above, according to this embodiment, during driving of the hopper motor 57 by the power IC 81, the positive terminal of the hopper motor 57 (the motor output terminal OUT1 of the power IC 81) and the negative terminal (the motor output terminal of the power IC 81). When a short circuit with OUT2 (ie, ground) is detected, the system waits for a delay time T3. If the short circuit continues after the delay time T3, the input signal at the protective input terminal ST of the power IC 81 is set to a low level. It is latched. As a result, power supply from the motor output terminal OUT1 to the hopper motor 57 becomes impossible and an overcurrent due to a short circuit does not flow, so that the power IC 81 can be protected.

  Further, according to this embodiment, since the short circuit is detected based on the current flowing through the current detection resistor R1 connected between the motor power supply circuit VDD and the power input terminal VS of the power IC 81, the short circuit is detected. The overcurrent due to can be reliably detected. That is, for example, in a configuration in which a current detection resistor is connected between the ground terminal GND of the power IC 81 and the ground, when the motor output terminal OUT1 and the ground are directly short-circuited by, for example, a metal foreign object, an excess due to the short-circuit is caused. The current flows directly from the motor output terminal OUT1 to the ground, bypassing the current detection resistor. Therefore, in this case, even if the current flowing through the current detection resistor connected between the ground terminal GND and the ground is monitored, a short circuit cannot be detected. On the other hand, in this embodiment, the hopper motor 57 is supplied with electric power from the motor power supply circuit VDD via the current detection resistor R1 to the electric power input terminal VS of the power IC 81, and the motor output terminal OUT1. To the hopper motor 57. Therefore, even when the motor output terminal OUT1 and the ground are directly short-circuited by, for example, a foreign substance, an overcurrent due to the short-circuit always flows to the current detection resistor R1, so that the short-circuit can be reliably detected.

  Further, according to this embodiment, when the overcurrent flowing through the current detection resistor R1 exceeds 4 A and Vb> Vc2 using the comparator IC2 having high-speed response performance, the protection input terminal ST of the protection input terminal ST is reached in a very short time T2. The input signal Vst is set to a low level to make the power IC 81 inoperable. The power supply to the hopper motor 57 is repeatedly stopped and restarted, and after the delay time T3 until the gate voltage Vf of the transistor Q6 becomes Vf> Vth, the power IC 81 is latched in an inoperable state. Yes. That is, the short-circuit current flows intermittently. Therefore, since the average value of the overcurrent is lowered, the delay time T3 can be set to a larger value than when the short-circuit current continuously flows. Thereby, the time constant of the integrating circuit composed of the resistor R15 and the capacitor C2 can be set with a margin.

  Further, according to this embodiment, when the reverse rotation switch 49 is turned on after the hopper motor 57 is stopped, the transistor Q5 of the latch release circuit 97 is turned on, and the charging voltage of the capacitor C2 is changed from the capacitor C3 and the resistor R17. As a result, the charging voltage Vf becomes Vf <Vth, the transistor Q6 is turned off, and the latch of the output signal Vs2 from the comparator IC2 to the high level is released. For this reason, coupled with the fact that no current flows through the current detection resistor R1, the output signal Vs2 of the comparator IC2 becomes low level, and the input signal Vst of the protection input terminal ST of the power IC 81 becomes high level. On the other hand, when the reverse rotation switch 49 is turned on and the control input terminal IN1 is set to the low level, electric power is supplied from the motor output terminal OUT2 of the power IC 81 to the negative terminal of the hopper motor 57 to reversely rotate the hopper motor 57. Let At this time, if the short circuit still continues, the input signal Vst of the protection input terminal ST of the power IC 81 is returned to the low level, and the reverse operation of the hopper motor 57 is stopped. As described above, according to this embodiment, it is easily determined whether or not the short-circuit between the positive terminal and the negative terminal of the hopper motor 57 still continues only by the operator performing an operation of turning on the reverse switch 49. can do.

  Further, according to this embodiment, it is detected whether or not the lock detection circuit 83 is locked while the hopper motor 57 is being driven, and when the lock continues for a predetermined time, the thyristor Q1 is turned on and the input terminal for protection of the power IC 81 Since the ST input signal Vst is latched at a low level, the power IC 81 can be protected against an overcurrent caused by the lock of the hopper motor 57 caused by the medal 51 clogging the disk 454 or the like.

  The present invention is not limited to the above-described embodiment, and various modifications other than those described above can be made without departing from the spirit of the present invention. For example, the specific circuit configuration is not limited to that shown in FIGS. 6A and 6B. Hereinafter, modifications of the circuit configuration will be described.

  12A and 12B are circuit diagrams showing the circuit configuration of the first modification. In addition, the same code | symbol is attached | subjected to what fulfill | performs the same function as the said embodiment (FIG. 6A, 6B), and it demonstrates centering around difference. In the first modification, the lock detection circuit 83 and the lock delay protection circuit 85 have the same configuration as the above embodiment. In the short circuit detection circuit 91, the input signal of the comparator IC2 is opposite to that of the above embodiment, the short circuit detection reference voltage Vb is input to the inverting input terminal of the comparator IC2, and the input voltage Vc2 is non-inverted of the comparator IC2. Input to the input terminal. In the short-circuit protection delay circuit 95, contrary to the above embodiment, the integration circuit is charged in a normal state. When the short circuit occurs, the integration circuit is discharged, and when the voltage of the integration circuit falls below a predetermined level, the short-circuit protection circuit 93 is latched.

  In the short-circuit detection circuit 91 of this first modification, the comparator IC2 compares the short-circuit detection reference voltage Vb with the input voltage Vc2, and sets the output signal Vs2 to the low level when Vc2 ≦ Vb, and when Vc2> Vb. High level. In this modification, for example, the short-circuit detection reference voltage Vb (resistance values of the resistors R4 and R5) is set so that Vc2 ≦ Vb when the current flowing through the current detection resistor R1 becomes 4 A or more.

  In addition, since the protection input terminal ST of the power IC 81 is pulled up to the voltage Vcc of the power supply circuit VCC via the resistor R13, the input signal Vst of the protection input terminal ST is at a high level and can operate. It has become. Therefore, when a normal rotation signal is input from the main CPU 61 to the control input terminal IN2 of the power IC 81, the power IC 81 connects the motor output terminal OUT2 to the ground and power from the motor output terminal OUT1 to the hopper motor 57. Supply is started, and thereby the hopper motor 57 starts normal rotation.

  When the steady state current is flowing through the current detection resistor R1, that is, when Vc2> Vb, the output signal Vs2 of the comparator IC2 is at a high level (corresponding to the “normal level” in the present invention). Therefore, the transistor Q11 of the short-circuit protection circuit 93 is turned off, and thereby the transistor Q7 is also turned off. Since both the transistors Q3 and Q7 are off, the input signal Vst at the protection input terminal ST of the power IC 81 pulled up to the voltage Vcc of the power supply circuit VCC via the resistor R13 is held at a high level. As a result, the power IC 81 is continuously operable.

  On the other hand, in the short circuit protection delay circuit 95, the charging voltage Vf of the capacitor C2 is input to the non-inverting input terminal of the comparator IC3, and the divided voltage Vg of the voltage Vcc of the power supply circuit VCC by the resistors R31 and R32 is the inverting input terminal of the comparator IC3. Has been entered. The comparator IC3 compares the divided voltage Vg with the charging voltage Vf, and sets the output signal Vs3 to a low level when Vf ≦ Vg and to a high level when Vf> Vg. When not operating, since Vc2> Vb, the output signal Vs2 of the comparator IC2 is at a high level, the capacitor C2 is charged and Vf> Vg, and the output signal Vs3 of the comparator IC3 is high. Level, and Vc2> Vb is maintained. In the normal state after the start of operation, since the output signal Vs2 of the comparator IC2 is at a high level, the charging of the capacitor C2 is maintained and Vf> Vg, and the output signal Vs3 of the comparator IC3 is at a high level. Vc2> Vb is maintained.

  Next, in FIGS. 12A and 12B, during the operation of the hopper motor 57, a short circuit occurs between the positive terminal of the hopper motor 57 or the motor output terminal OUT1 of the power IC 81 and the negative terminal, the motor output terminal OUT2 or the ground. The operation of each circuit when this occurs will be described.

  First, in the normal state, as described above, since Vb <Vc2, the output signal Vs2 of the comparator IC2 is at a high level (corresponding to the “normal level” in the present invention). In the short circuit protection delay circuit 95, since the capacitor C2 is charged, the output signal Vs3 of the comparator IC3 is at a high level. In the latch release circuit 97, since the gate of the transistor Q12 is pulled up through the resistor R23, the transistor Q12 is turned off.

  When the short circuit occurs, the current flowing through the current detection resistor R1 increases and the input voltage Vc2 of the comparator IC2 decreases. When the current flowing through the current detection resistor R1 exceeds 4A and Vb ≧ Vc2, the comparator IC2 Output signal Vs2 is switched from the high level to the low level (corresponding to the “short circuit level” of the present invention). As a result, since the transistor Q11 is turned on, the transistor Q7 is turned on, whereby the input signal Vst of the protection input terminal ST of the power IC 81 is switched to the low level, and the power IC 81 stops its operation. Further, when the output signal Vs2 of the comparator IC2 becomes low level, the charge of the capacitor C2 is discharged through the resistors R15 and R16, and the charging voltage Vf decreases. Further, when the transistor Q11 is turned on, a current is supplied from the power supply circuit VCC, and the reverse LED 50 is turned on.

  When the power supply to the hopper motor 57 is stopped by stopping the operation of the power IC 81, the current does not flow to the current detection resistor R1, so the input voltage Vc2 of the comparator IC2 rises. When Vb <Vc2, the output signal Vs2 of the comparator IC2 is high. Return to level. Then, since the transistor Q11 returns to the off state, the transistor Q7 returns to the off state, the input signal Vst at the protection input terminal ST of the power IC 81 returns to the high level, and the power IC 81 returns to the operable state. Here, since the control input terminal IN <b> 2 is set to the low level by the normal rotation signal from the main CPU 61, the power IC 81 resumes the power supply to the hopper motor 57. However, since the short circuit between the positive terminal and the negative terminal of the hopper motor 57 continues, an overcurrent of 4 A or more flows through the current detection resistor R1, the power IC 81 stops operating again, and the charging voltage Vf becomes descend.

  As described above, when the power IC 81 repeatedly stops and restarts the operation, the capacitor C2 is discharged while the output signal Vs2 of the comparator IC2 is at the low level, and the charging voltage Vf of the capacitor C2 gradually decreases. When Vf ≦ Vg, the output signal Vs3 of the comparator IC3 (corresponding to the “latch circuit” of the present invention) is switched to a low level. As a result, the non-inverting input terminal of the comparator IC2 becomes low level, so that Vb ≧ Vc2, and the output signal Vs2 of the comparator IC2 is latched at low level. As a result, the transistor Q11 is latched on, the transistor Q7 is latched on, and the capacitor C2 continues to be discharged, so that the output signal Vs3 of the comparator IC3 is latched at a low level. Since the transistor Q7 is latched on, the input signal Vst of the protection input terminal ST is latched at the low level, and the power IC 81 is latched in the operation stopped state. Further, the reverse rotation LED 50 repeats blinking while the power IC 81 repeats operation stop and operation restart, and remains lit when the transistor Q11 is latched on.

  Next, in FIG. 12A and FIG. 12B, the operation of each circuit when releasing the short-circuit protection will be described. When an abnormality is detected when the hopper motor 57 is stopped halfway and the front panel 5 of the housing 3 is opened, the fact that the power IC 81 is in an operation stop state is notified by turning on the reverse rotation LED 50. At this stage, it is unknown whether the abnormality is due to a lock or a short circuit. When the reverse switch 49 of the power supply box 48 is pushed and the control input terminal IN1 is set to the low level, the gate of the transistor Q12 is set to the low level and the transistor Q12 is turned on. As a result, the capacitor C2 is charged from the transistor Q12 through the parallel circuit of the resistor R17 and the capacitor C3 by the output voltage Vcc of the low-voltage power supply circuit VCC, and the charging voltage Vf of the capacitor C2 rises. When Vf> Vg, the comparator IC3 Output signal Vs3 becomes high level. Therefore, the latch of the non-inverting input terminal of the comparator IC2 is released, and Vb <Vc2 is restored, the output signal Vs2 of the comparator IC2 returns to high level, the transistor Q11 returns to off, and the transistor Q7 returns to off. As a result, the input signal Vst at the protection input terminal ST of the power IC 81 is switched to the high level, and the power IC 81 returns to the operable state. The reverse LED 50 is turned off by turning off the transistor Q11. The power IC 81 connects the motor output terminal OUT1 to the ground and supplies power from the motor output terminal OUT2 to the negative terminal of the hopper motor 57 to reverse the hopper motor 57.

  Here, when the short circuit is eliminated when the reverse rotation switch 49 is turned on, Vb <Vc2 is maintained, so that the output signal Vs2 of the comparator IC2 is held at a high level and the transistor Q7 remains off. The operable state of the power IC 81 is maintained. The reverse rotation of the hopper motor 57 continues until the reverse rotation switch 49 is turned off.

  On the other hand, if the short circuit continues when the reverse rotation switch 49 is turned on, when the power IC 81 returns to the operable state and the hopper motor 57 starts reverse rotation, an overcurrent of 4 A or more flows again in the current detection resistor R1. As a result, similarly to the above embodiment, the power IC 81 repeatedly stops and restarts operation, the capacitor C2 is discharged, and the charging voltage Vf of the capacitor C2 gradually decreases. When Vf <Vg, the output signal Vs3 of the comparator IC3 becomes a low level, and Vb ≧ Vc2 is held, whereby the power IC 81 is latched again in the operation stop state.

  13A and 13B are circuit diagrams showing a specific circuit configuration of the second modification. In addition, the same code | symbol is attached | subjected to what fulfill | performs the same function as the said embodiment (FIG. 6A, 6B), and it demonstrates centering around difference. In the second modification, the lock detection circuit 83 and the latch release circuit 97 have the same configuration as in the above embodiment. The lock delay protection circuit 85 has the same configuration as that of the above embodiment except that the resistor R13 and the transistor Q3 are omitted. The protection input terminal ST of the power IC 81 is a connection point between the transistor Q2 and the resistor R12. It is connected to the. In the short circuit detection circuit 91, as in the first modification, the input signal of the comparator IC2 is opposite to that of the above embodiment, and the short circuit detection reference voltage Vb is input to the inverting input terminal of the comparator IC2. The voltage Vc2 is input to the non-inverting input terminal of the comparator IC2. The short-circuit protection delay circuit 95 has the same configuration as that of the above embodiment except that the anode of the diode D1 is connected to the protection input terminal ST of the power IC 81 via the resistor R33.

  In the power IC 81 of the second modification, the relationship between the level of the input signal Vst at the protection input terminal ST and the operable state is opposite to that in the above embodiment. That is, the power IC 81 can supply power from the motor output terminals OUT1 and OUT2 to the hopper motor 57 when the input signal Vst of the protection input terminal ST is at a low level (corresponding to the “permission level” of the present invention). On the other hand, when the input signal Vst at the protective input terminal ST is at a high level (corresponding to the “prohibited level” in the present invention), it is impossible to supply power from the motor output terminals OUT1 and OUT2 to the hopper motor 57. Only the point which is comprised is different from the said embodiment.

  In the short-circuit detection circuit 91 according to the second modification, the comparator IC2 compares the short-circuit detection reference voltage Vb with the input voltage Vc2, and sets the output signal Vs2 to the low level when Vc2 ≦ Vb, and when Vc2> Vb. High level. In the second modification, for example, the short-circuit detection reference voltage Vb (resistance values of the resistors R4 and R5) is set so that Vc2 ≦ Vb when the current flowing through the current detection resistor R1 is 4 A or more.

  Further, since the protection input terminal ST of the power IC 81 is pulled down to the ground via the resistor R12, the input signal Vst of the protection input terminal ST is at a low level, and the power IC 81 is in an operable state. It has become. Therefore, when a normal rotation signal is input from the main CPU 61 to the control input terminal IN2 of the power IC 81, the power IC 81 connects the motor output terminal OUT2 to the ground and power from the motor output terminal OUT1 to the hopper motor 57. Supply is started, and thereby the hopper motor 57 starts normal rotation.

  When the steady state current is flowing through the current detection resistor R1, that is, when Vc2> Vb, the output signal Vs2 of the comparator IC2 is at a high level (corresponding to the “normal level” in the present invention). Therefore, since the transistor Q13 of the short-circuit protection circuit 93 is turned off, the input signal Vst of the protection input terminal ST of the power IC 81 that is pulled down to the ground via the resistor R12 is held at a low level. The IC 81 is continuously operable. On the other hand, in the short circuit protection delay circuit 95, the anode of the diode D1 is connected to the protection input terminal ST via the resistor R33, so that the charging voltage of the capacitor C2 (gate voltage of the transistor Q6) Vf is low in the normal state. Stay on level.

  When the hopper motor 57 is locked, the thyristor Q1 is turned on, and the transistor Q2 is turned on, the level of the input signal Vst at the protection input terminal ST of the power IC 81 rises to the voltage Vcc of the power supply circuit VCC, The power IC 81 stops operating.

  Next, in FIGS. 13A and 13B, during operation of the hopper motor 57, a short circuit is made between the positive terminal of the hopper motor 57 or the motor output terminal OUT1 of the power IC 81 and the negative terminal, the motor output terminal OUT2 or the ground. The operation of each circuit when this occurs will be described.

  When the short circuit occurs, the current flowing through the current detection resistor R1 increases and the input voltage Vc2 of the comparator IC2 decreases, and when the current flowing through the current detection resistor R1 exceeds 4A and Vb ≧ Vc2, the output of the comparator IC2 The signal Vs2 is switched from the high level to the low level (corresponding to the “short circuit level” of the present invention). As a result, since the transistor Q13 of the short circuit protection circuit 93 is turned on, the input signal Vst of the protection input terminal ST of the power IC 81 is switched to a high level, and the power IC 81 stops its operation. Further, when the transistor Q13 is turned on, the capacitor C2 is charged via the resistor R33, the diode D1, and the resistor R15, so that the gate voltage Vf of the transistor Q6 increases. Further, when the transistor Q13 is turned on, a current is supplied from the power supply circuit VCC, and the reverse rotation LED 50 is turned on.

  When the power supply to the hopper motor 57 is stopped by stopping the operation of the power IC 81, the current does not flow to the current detection resistor R1, so the input voltage Vc2 of the comparator IC2 rises. When Vb <Vc2, the output signal Vs2 of the comparator IC2 is high. Return to level. Then, since the transistor Q13 of the short circuit protection circuit 93 is turned off, the input signal Vst at the protection input terminal ST of the power IC 81 returns to the low level, and the power IC 81 returns to the operable state. Here, since the control input terminal IN <b> 2 is set to the low level by the normal rotation signal from the main CPU 61, the power IC 81 resumes the power supply to the hopper motor 57. However, since the short-circuit state continues, an overcurrent of 4 A or more flows through the current detection resistor R1, and the power IC 81 stops operating again.

  As described above, when the power IC 81 repeatedly stops and restarts operation, the capacitor C2 is charged while the transistor Q13 of the short-circuit protection circuit 93 is on, and the gate voltage Vf of the transistor Q6 gradually increases. It operates similarly to the embodiment. That is, when Vf> Vth, the transistor Q6 (corresponding to the “latch circuit” of the present invention) is turned on, and the output signal Vs2 of the comparator IC2 is latched at a low level. As a result, since the transistor Q13 is latched on, the input signal Vst of the protection input terminal ST is latched at a high level, and the power IC 81 is latched in the operation stop state. Further, the reverse rotation LED 50 repeats blinking while the power IC 81 repeats operation stop and operation restart, and remains lit when the transistor Q13 is latched on.

  13A and 13B, regarding the operation of each circuit when releasing short circuit protection, the latch release circuit 97 has the same configuration as that of the above embodiment, and the short circuit protection delay circuit 95 is also connected to the anode of the diode D1. Since the configuration other than the above is the same as that of the above embodiment, it operates in the same manner as the above embodiment.

  14A and 14B are circuit diagrams showing a specific circuit configuration of the third modification. In addition, the same code | symbol is attached | subjected to what performs the same function as the said embodiment (FIG. 6A, 6B), the said 1st modification (FIG. 12A, 12B), and the said 2nd modification (FIG. 13A, 13B), and it differs. The explanation will focus on the points. In the third modification, the lock detection circuit 83 has the same configuration as that of the above-described embodiment (FIGS. 6A and 6B), and the short-circuit detection circuit 91, the short-circuit protection delay circuit 95, and the latch release circuit 97 are the same as the first modification (FIG. 12A, 12B), and the lock delay protection circuit 85 and the short circuit protection circuit 93 have the same configuration as that of the second modification (FIGS. 13A, 13B).

  In the power IC 81 according to the third modification, the relationship between the level of the input signal Vst at the protection input terminal ST and the operable state is reversed from that in the above embodiment. That is, in the power IC 81 of the third modification, as in the second modification, when the input signal Vst of the protection input terminal ST is at a low level (corresponding to the “permission level” of the present invention), the motor output terminal While it is possible to supply power from OUT1 and OUT2 to the hopper motor 57, when the input signal Vst of the protection input terminal ST is at a high level (corresponding to the “prohibited level” of the present invention), the motor output terminals OUT1 and OUT2 The only difference from the above embodiment is that the power supply to the hopper motor 57 is impossible.

  When the steady state current is flowing through the current detection resistor R1, that is, when Vc2> Vb, the output signal Vs2 of the comparator IC2 is at a high level (corresponding to the “normal level” in the present invention). Therefore, since the transistor Q13 of the short-circuit protection circuit 93 is turned off, the input signal Vst of the protection input terminal ST of the power IC 81 that is pulled down to the ground via the resistor R12 is held at a low level. The IC 81 is continuously operable. In the short circuit protection delay circuit 95, since the capacitor C2 is charged by the high level output signal Vs2, the output signal Vs3 of the comparator IC3 is at the high level because Vg <Vf. In the latch release circuit 97, since the gate of the transistor Q12 is pulled up through the resistor R23, the transistor Q12 is turned off.

  In this state, when the hopper motor 57 is locked, the thyristor Q1 is turned on, and the transistor Q2 is turned on, the level of the input signal Vst at the protection input terminal ST of the power IC 81 rises to the voltage Vcc of the power supply circuit VCC. The power IC 81 stops operating.

  Further, when a short circuit occurs between the positive terminal of the hopper motor 57 or the motor output terminal OUT1 and the negative terminal, the motor output terminal OUT2 or the ground, and Vb ≧ Vc2, the output signal Vs2 of the comparator IC2 is changed from the high level. It switches to a low level (corresponding to the “short circuit level” of the present invention). As a result, since the transistor Q13 of the short circuit protection circuit 93 is turned on, the input signal Vst of the protection input terminal ST of the power IC 81 is switched to a high level, and the power IC 81 stops its operation. Further, when the output signal Vs2 of the comparator IC2 becomes low level, the charge of the capacitor C2 is discharged through the resistors R15 and R16, and the charging voltage Vf decreases. When the transistor Q13 is turned on, a current is supplied from the power supply circuit VCC, and the reverse LED 50 is lit.

  When the power supply to the hopper motor 57 is stopped by stopping the operation of the power IC 81, the current does not flow to the current detection resistor R1, so the input voltage Vc2 of the comparator IC2 rises. When Vb <Vc2, the output signal Vs2 of the comparator IC2 is high. Return to level. Then, since the transistor Q13 of the short circuit protection circuit 93 is turned off, the input signal Vst at the protection input terminal ST of the power IC 81 returns to the low level, and the power IC 81 returns to the operable state. Here, since the control input terminal IN <b> 2 is set to the low level by the normal rotation signal from the main CPU 61, the power IC 81 resumes the power supply to the hopper motor 57. However, since the short-circuit state continues, an overcurrent of 4 A or more flows through the current detection resistor R1, and the power IC 81 stops operating again.

  As described above, when the power IC 81 repeatedly stops and restarts the operation, the capacitor C2 is discharged while the output signal Vs2 of the comparator IC2 is at the low level, and the charging voltage Vf of the capacitor C2 gradually decreases. When Vf <Vg, the output signal Vs3 of the comparator IC3 (corresponding to the “latch circuit” of the present invention) is switched to a low level. As a result, the non-inverting input terminal of the comparator IC2 becomes low level, so that Vb ≧ Vc2, and the output signal Vs2 of the comparator IC2 is latched at low level. As a result, the transistor Q13 is latched on, and the discharge of the capacitor C2 continues, so that the output signal Vs3 of the comparator IC3 is latched at a low level. Since the transistor Q13 is latched on, the input signal Vst of the protection input terminal ST is latched at a high level, and the power IC 81 is latched in the operation stop state. Further, the reverse rotation LED 50 repeats blinking while the power IC 81 repeats operation stop and operation restart, and remains lit when the transistor Q13 is latched on.

  14A and 14B, the short circuit protection delay circuit 95 and the latch release circuit 97 have the same configuration as that of the first modification (FIGS. 12A and 12B) with respect to the behavior of each circuit when the short circuit protection is canceled. Therefore, the operation is the same as in the first modified embodiment.

  15A and 15B are circuit diagrams showing a specific circuit configuration of the fourth modification. In addition, the same code | symbol is attached | subjected to what fulfill | performs the same function as the said embodiment (FIG. 6A, 6B), and it demonstrates centering around difference. In the fourth modification, the lock detection circuit 83, the short circuit detection circuit 91, the short circuit protection delay circuit 95, and the latch release circuit 97 have the same configuration as the above embodiment (FIGS. 6A and 6B). The lock delay protection circuit 85 has the same configuration as that of the above embodiment except that the resistor R13 and the transistor Q3 are omitted. The protection input terminal ST of the power IC 81 is a connection point between the transistor Q2 and the resistor R12. It is connected to the.

  In the power IC 81 according to the fourth modification, the relationship between the level of the input signal Vst at the protection input terminal ST and the operable state is reversed from that in the above embodiment. That is, in the power IC 81 of the fourth modification, the input signal Vst of the protection input terminal ST is at a low level (corresponding to the “permission level” of the present invention), as in the second modification (FIGS. 13A and 13B). In this case, power can be supplied from the motor output terminals OUT1 and OUT2 to the hopper motor 57. On the other hand, when the input signal Vst of the protection input terminal ST is at a high level (corresponding to the "prohibited level" in the present invention) The only difference is that the power supply from the output terminals OUT1, OUT2 to the hopper motor 57 is impossible.

  Since the protection input terminal ST of the power IC 81 is pulled down to the ground via the resistor R12, the input signal Vst of the protection input terminal ST is at a low level, and the power IC 81 is in an operable state. Yes. Therefore, when a normal rotation signal is input from the main CPU 61 to the control input terminal IN2 of the power IC 81, the power IC 81 connects the motor output terminal OUT2 to the ground and power from the motor output terminal OUT1 to the hopper motor 57. Supply is started, and thereby the hopper motor 57 starts normal rotation.

  When the steady state current flows through the current detection resistor R1, that is, when Vc2 ≧ Vb, the output signal Vs2 of the comparator IC2 is at a low level (corresponding to the “normal level” in the present invention). Accordingly, since the transistor Q15 of the short-circuit protection circuit 93 is turned off and thereby the transistor Q14 is turned off, the input signal of the protection input terminal ST of the power IC 81 that is pulled down to the ground via the resistor R12. Vst is held at a low level, and the power IC 81 is continuously operable.

  In this state, when the hopper motor 57 is locked, the thyristor Q1 is turned on, and the transistor Q2 is turned on, the level of the input signal Vst at the protection input terminal ST of the power IC 81 rises to the voltage Vcc of the power supply circuit VCC. The power IC 81 stops operating.

  Further, when a short circuit occurs between the positive terminal of the hopper motor 57 or the motor output terminal OUT1 and the negative terminal, the motor output terminal OUT2 or the ground, and Vb> Vc2, the output signal Vs2 of the comparator IC2 is changed from the low level. It switches to a high level (corresponding to the “short circuit level” of the present invention). As a result, the transistor Q15 of the short-circuit protection circuit 93 is turned on, thereby turning on the transistor Q14. Therefore, the input signal Vst at the protection input terminal ST of the power IC 81 is pulled up to the power supply circuit VCC and switched to the high level. Instead, the power IC 81 stops operating. Further, when the transistor Q15 is turned on, a current is supplied from the power supply circuit VCC, and the reverse LED 50 is turned on.

  Hereinafter, the operation in which the power IC 81 is latched in the operation stop state after the power IC 81 repeats the operation stop and the operation restart, and the operation when the reverse rotation switch 49 is pressed and the latch is released are the same as in the above embodiment. Done.

As described above, according to the first to fourth modifications,
The relationship between the short-circuit detection reference voltage Vb and the input voltage Vc2 of the comparator IC2 of the short-circuit detection circuit 91 and the inverting input terminal and the non-inverting input terminal;
The short circuit protection circuit 93 is latched by charging or discharging the integration circuit of the short circuit protection delay circuit 95;
Only one or more of the relationship between the level of the input signal Vst at the protection input terminal ST of the power IC 81 and the operable state of the power IC 81 is different from the above-described embodiment, and any modification is possible. The same effect as the above embodiment can be obtained.

  Further, for example, in the above-described embodiment and each modification, the power supply to the hopper motor 57 is repeatedly stopped and restarted by the short circuit protection circuit 93, and the power supply to the hopper motor 57 is stopped after a predetermined delay time has elapsed. However, the present invention is not limited to this. For example, similarly to the lock delay protection circuit 85, the input signal Vst at the protection input terminal ST of the power IC 81 may be latched to the prohibited level after a predetermined time has elapsed since the detection of the short circuit. However, in this case, since an overcurrent due to a short circuit flows continuously, the predetermined time until the latch is set to a value smaller than the delay time (T3 in the above embodiment) of the above embodiment and each modified embodiment. Must be set.

Appearance of a slot machine provided with an embodiment of the power I C protection device according to the present invention is a perspective view showing a. It is a right side view showing the internal configuration of the main part of the slot machine. It is a perspective view of a hopper unit in the state where a hopper tank was removed. FIG. 3 is a block diagram showing an electrical configuration of the slot machine. It is a block diagram which shows the functional block of the control circuit of a hopper motor. FIG. 6 is a circuit diagram illustrating a main part of a specific circuit example of FIG. 5. FIG. 6 is a circuit diagram illustrating a main part of a specific circuit example of FIG. 5. It is a timing chart which shows transition of the voltage signal level of each part when a hopper motor locks. It is a timing chart which shows transition of the voltage signal level of each part when releasing lock protection. It is a timing chart which shows transition of the voltage signal level of each part when the positive terminal and negative terminal of a hopper motor short-circuit. It is a timing chart which shows transition of the voltage signal level of each part when a short circuit is canceled at the time of cancellation of short circuit protection. It is a timing chart which shows transition of the voltage signal level of each part when a short circuit continues at the time of cancellation of short circuit protection. It is a circuit diagram which shows the 1st modification. It is a circuit diagram which shows the 1st modification. It is a circuit diagram which shows a 2nd modification. It is a circuit diagram which shows a 2nd modification. It is a circuit diagram which shows a 3rd modification. It is a circuit diagram which shows a 3rd modification. It is a circuit diagram which shows a 4th modification. It is a circuit diagram which shows a 4th modification.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Slot machine, 45 ... Hopper unit, 49 ... Reverse switch, 57 ... Hopper motor, 59 ... Motor control board, 81 ... Power IC, 83 ... Lock detection circuit, 85 ... Lock delay protection circuit, 91 ... Short circuit detection circuit, 93 ... Short circuit protection circuit, 95 ... Short circuit protection delay circuit, 97 ... Latch release circuit, C2 ... Capacitor (integration circuit), IC2 ... Comparator (comparison circuit), IC3 ... Comparator (latch circuit), OUT1, OUT2 ... Motor output Terminal (output terminal), Q6 ... Transistor (latch circuit), R1 ... Current detection resistor, R4, R5 ... Resistor (reference voltage generation circuit), R15 ... Resistor (integration circuit), ST ... Input terminal for protection, VDD ... Motor Power supply circuit (power supply circuit, reference voltage generation circuit)

Claims (3)

A pair of output terminals connected to the motor;
A power input terminal connected to a power supply circuit for generating driving power of the motor;
With protective input terminals,
Electric power can be supplied from the output terminal to the motor by the time the input signal is permitted level of the protection input terminal for outputting a power input from the power supply circuit to the input terminal for the power to the output terminal the motor is driven I Do,
Wherein when the input signal is disabled level a power IC protection device to protect the power IC with power supply being configured to be the impossible to the motor from the output terminal,
A current detection resistor connected between the power supply circuit and the power input terminal;
Based on the current flowing through the current detection resistor, a short-circuit detection circuit that detects whether a short circuit has occurred between the output terminal and the ground or between the output terminals during driving of the motor by the power IC;
When the short circuit is detected by the short circuit detection circuit, it waits for a predetermined delay time. If the short circuit detection circuit continues to detect the short circuit after the delay time has elapsed, the protection for the power IC is performed. A protection circuit for latching the input signal of the input terminal to the prohibited level ,
The short circuit detection circuit is:
A reference voltage generating circuit that is connected to the power supply circuit side of the current detection resistor and generates a short-circuit reference voltage for detecting the short circuit;
The input voltage from the power input terminal side of the current detection resistor and the short-circuit reference voltage are compared, and the output signal from the output terminal is set to a normal level when the input voltage is normal, and the input voltage Has a comparison circuit to make the short circuit level when the short circuit,
The protection circuit is
When the output signal of the short circuit level is output from the comparison circuit, the input signal of the protection input terminal is switched to the prohibited level before the predetermined delay time elapses, while the output of the normal level is output from the comparison circuit. A short-circuit protection circuit that switches the input signal of the protection input terminal to the permission level when a signal is output;
An integration circuit connected to the output terminal of the comparison circuit and charged or discharged by the output signal of the short circuit level;
Connected between the integration circuit and the input terminal of the comparison circuit to which the input voltage is input, and when the voltage of the integration circuit reaches a predetermined level, the voltage of the input terminal of the comparison circuit is reduced to the short-circuit reference voltage. A latch circuit that latches the output signal from the output terminal of the comparison circuit to the short-circuit level by making it higher or lower than
The predetermined delay time is
Power I C protection and wherein the voltage of said integration circuit by an output signal of the short-circuit level from the output terminal of the comparator circuit is a time to reach the predetermined level. A latch release circuit connected to the integration circuit and releasing the latch by the latch circuit by discharging or charging the integration circuit when a predetermined return command signal is generated;
The power IC is configured to drive the motor when the return command signal is generated,
If the short circuit is detected by the short circuit detection circuit when the latch is released by the latch release circuit, the input signal to the protection input terminal of the power IC is returned to the prohibited level by the protection circuit. power I C protection device of claim 1,. A lock detection circuit for detecting whether or not the motor is locked during driving of the motor;
A lock delay protection circuit that latches an input signal at the protection input terminal of the power IC at the prohibited level when the lock detection by the lock detection circuit continues for a predetermined time longer than the predetermined delay time. power I C protection device according to claim 1 or 2, characterized in.

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