JP4556484B2 - Data transfer device - Google Patents

Description

The present invention is a data transferred between devices with different operating frequencies are stored a plurality of the storage areas divided into banks in units of banks, to a data transfer apparatus for transferring data.

  In general, in a computer system, various data are transferred between a plurality of devices constituting the computer system.

  Since many of these devices operate based on clock signals having different operating frequencies, the data sending speed and the data receiving speed differ from one device to another.

  Therefore, in such a computer system, by providing a data transfer device that functions as a buffer between the data sending side device and the data receiving side device, the data sending speed and the data receiving speed are different. Even so, it was possible to transfer data smoothly.

  This data transfer apparatus is composed of a FIFO (First In First Out) storage unit that temporarily stores data sent from a data transmission side device, and a FIFO control unit that controls the FIFO storage unit.

  Then, the data transfer device temporarily holds the data transmitted based on the operating frequency of the device on the data sending side by writing it in the FIFO storage unit, and then stores this data on the basis of the operating frequency of the device on the data receiving side. Thus, data is transferred between a plurality of devices having different operating frequencies.

  In such a data transfer device, if data is read from a storage area in which data writing has not been completed in the FIFO storage unit, the device on the data receiving side may receive erroneous data.

  In addition, if new data is written in an area where data reading has not been completed, the new data is overwritten on the data to be received by the data receiving device. Could receive incorrect data.

In order to prevent the occurrence of such problems, the data transfer device can divide the storage area of the FIFO storage unit into multiple banks and complete the data writing for each divided bank to read the data. Or a bank in which a flag indicating whether data can be read is set by setting a flag indicating whether data reading is completed and new data can be written Data is read from only the data, and data is written and exchanged only in a bank in which a flag indicating a state in which data can be written is set.
(For example, see Patent Document 1.)
Special Table 2001-521246

  However, in the data transfer method by the conventional data transfer device, the storage area of the FIFO storage unit is divided into a plurality of banks, and each bank can read data, or data can be written. Since a flag indicating whether it is possible is set and data is exchanged while referring to this flag, there is a risk of reading wrong data when reading data depending on how the storage area is divided. there were.

  In other words, when the storage area is divided, if the storage area is divided into multiple banks based on the unit processing data amount processed by the device with the lower operating frequency, the amount of data that can be written to this one bank Is smaller than the unit processing data amount processed by the device with the higher operating frequency, so when writing data to the bank with the device with the higher operating frequency, all data to be written cannot be written. There was a case.

  In such a case, when reading data from this bank, the data receiving device receives wrong data, which may cause the computer system to malfunction.

Therefore, in the present invention according to claim 1, data transmitted from the data transmission side device based on the clock signal of the first frequency is temporarily stored in a storage area divided into a plurality of banks, and the data is transmitted more than the first frequency. A data transfer apparatus comprising a bank control unit for receiving data stored in the storage area by a data receiving apparatus receiving data based on a clock signal having a low second frequency, wherein the storage area is defined as the data receiving apparatus. A storage area capable of storing a data amount that is at least n times the unit processing data amount ( where n is a value obtained by dividing the first frequency by the second frequency) is divided into one bank, and the bank control unit When there is a data transfer request from the sending-side device, the number of banks that can be stored among the banks in the storage area can store the data requested for transfer. If the number of banks is equal to or greater than the minimum number of banks, data is transmitted from the data transmission side device and the data requested for transfer is sequentially stored in the storage area. Without transmitting data from the device, when the number of banks exceeds the minimum number, the data is transmitted from the data transmission side device and sequentially stored in the storage area, and the data requested to be transferred is stored in the storage area. When all of the banks are stored, even if there is a bank in which data less than the storable data amount is stored among the plurality of banks, the final reception permission signal for permitting reading of the bank is Data to be transmitted to the data receiving device, read out from the plurality of banks in response to a request from the data receiving device, and transmitted to the data receiving device And a transfer device.

Further, in the present invention according to claim 2, in the data transfer device according to claim 1, the bank control unit includes a write pointer indicating a bank address for storing the data when storing the data in the storage area. A write pointer control means for controlling, a read pointer control means for controlling a write pointer indicating a bank address from which the data is read when data is read from the storage area, and a bank to which the write pointer and the read pointer currently point Based on the address, the number of banks that can be continuously stored is detected, and the number of banks that can be stored is further determined whether or not the number of banks that can be stored is equal to or greater than the minimum number of banks; When storing the data of the minimum number of banks transmitted from the data transmission side device in the storage area, A final reception permission signal generating means for outputting the final reception permission signal to the data receiving side device, and the write pointer control means outputs the data of the minimum number of banks transmitted from the data transmission side device. If there is a bank in which data less than the amount of data is stored when stored in the storage area, a readable flag is forcibly set in the bank, and the final reception permission signal is set based on the readable flag. The data is transmitted to the receiving device so that the data in the bank can be received by the data receiving device.

  The present invention has the following effects.

  In the present invention, the storage area can be optimally divided into a plurality of banks in accordance with the operating frequencies of a plurality of devices that exchange data, so that reliable data transfer is performed between a plurality of devices having different operating frequencies. Therefore, it is possible to prevent the malfunction of the computer system. Further, even if data that causes problems when divided and stored, the data can be reliably stored in the bank, so that reliable data transfer can be performed. Furthermore, normally, when reading data from the storage area, data can be stored in one bank while only reading from the bank that stores the amount of data that can be stored in one bank. When reading data that is not an integral multiple of a large amount of data, the bank that lastly stored the data may store this data even if less than the amount of data that can be stored in one bank is stored. The data can be read when the process is completed.

  A data transfer apparatus according to the present invention includes a storage area that is divided into a plurality of banks that temporarily store data transferred between a plurality of apparatuses having different operating frequencies, and a bank control unit that stores data in units of banks in the storage area And functions as a buffer device between a device for sending data and a device for receiving data from this device.

  In particular, this storage area operates at a low operating frequency with a device that operates based on a high operating frequency, in which the ratio of the amount of data that can be stored in each bank and the unit processing data amount of the device with a low operating frequency is The frequency is set to be larger than the ratio of the operating frequency with the device on the side to be divided into a plurality of banks.

  In other words, if the high operating frequency is N times the low operating frequency, the amount of data that can be stored in one bank is N times the amount of unit processing data processed by the device operating at the low operating frequency. The storage area is virtually divided into a plurality of banks by setting the amount of data as described above.

  By setting the amount of data that can be stored in one bank in this way, it is possible to write all the data to be written when writing data to the bank from a device with a higher operating frequency. Occurrence of operation can be prevented beforehand.

  In addition, when the bank control unit continuously stores data for a plurality of banks in the storage area, the bank control unit detects that the number of banks corresponding to the data for the plurality of banks is in a state where data can be stored. It has a storable bank number detecting means.

  When the bank control unit receives a signal for continuously storing data for a plurality of banks in the bank from the device on the data sending side, the storable bank number detecting means All data to be stored by the device on the data sending side is suspended until it is detected that the number of banks corresponding to the amount of data to be stored is ready to store data. Is stored in a state where data can be stored, a storable signal is transmitted to the device on the data transmission side.

  The apparatus on the data sending side is configured to continuously store data for a plurality of banks in the storage area only after receiving this storable signal.

  Therefore, even when data that causes a problem in the system is stored when divided and stored, this data can be reliably stored in the bank in a continuous state.

  In addition, when storing less than the amount of data that can be stored in one bank, the bank control unit detects that the storage of this data has been completed, and receives the final reception for permitting the reading of this data. It has a final reception permission signal generating means for generating a permission signal and outputting it to a device for receiving data.

  Therefore, normally, when reading data from the storage area, it is possible to store data in one bank while reading data only from the bank that stores the amount of data that can be stored in one bank. When reading data that is not an integral multiple of the correct amount of data, the bank that last stored the data may store this data even if less than the amount of data that can be stored in one bank is stored. The data can be read when the process is completed.

  Hereinafter, a data transfer apparatus according to the present invention will be specifically described with reference to the drawings.

  As shown in FIG. 1, the data transfer device 1 includes a data transmission side device (hereinafter referred to as “transmission block 2”) and a data reception side device (hereinafter referred to as “transmission block 2”) operating based on clock signals having different frequencies. , Referred to as “Receiving block 3”), the FIFO (First In First Out) storage unit 4 that temporarily stores data to be transferred to and from the FIFO storage unit 4 and the storage of data in the FIFO storage unit 4 The FIFO control unit 5 is configured to control the reading of data in units of banks.

  As described above, the FIFO storage unit 4 functions as a buffer between the transmission block 2 and the reception block 3.

  In this embodiment, the frequency of the clock signal that operates the transmission block 2 and the reception block 3 is referred to as an operating frequency. Here, the transmission block 2 operates at an operating frequency that is 2.5 times the operating frequency of the receiving block 3. It will be described as being.

  The FIFO storage unit 4 has a structure in which a plurality of storage elements such as SRAM (Static Random Access Memory) and FF (Flip-Flop) are assembled. One storage element stores 1-bit data. It is possible.

  The FIFO storage unit 4 defines several bits of data as one word, and stores data and reads data in units of words.

  Further, the FIFO storage unit 4 sets a storage area capable of storing data having a number of words equal to an integer value larger than a quotient obtained by dividing a high operating frequency by a low operating frequency as one bank, I am trying to divide it.

  In particular, in the present embodiment, the FIFO storage unit 4 defines 16-bit data, which is the unit processing data amount processed by the reception block 3, as one word.

  Here, since the operating frequency of the transmission block 2 is 2.5 times the operating frequency of the receiving block 3, as shown in FIG. 2 (a), it is 2.5 times the one-word data processing amount of the receiving block 3. With the above data amount, the FIFO storage unit 4 is divided into 24 banks of 4 words each by setting the storage area capable of storing 4 words of data to be 1 bank.

  That is, the FIFO storage unit 4 includes 24 banks that store 4 words of data for each bank, and the FIFO storage unit 4 as a whole can store 96 words of data.

  Each bank is given a bank address from address 0 to address 23, and the FIFO control unit 5 controls the storage of data in the FIFO storage unit 4 and the reading of data from the FIFO storage unit 4. By virtually moving WP (Write Pointer) indicating the bank address during data storage and RP (Read Pointer) indicating the bank address during data reading, data is stored and read out in units of banks. I have to.

  At this time, the FIFO controller 5 increments WP by 1 when the storage of data in one bank is completed, and increments RP by 1 when reading of data from one bank is completed.

  Then, in increments after the WP and RP reach the final address 23, a virtual ring-shaped storage area is formed as shown in FIG. Like to do.

  In addition, when data storage to one bank is completed, a read enable flag is set to indicate that this bank is ready to read data, and similarly, data read from one bank is performed. Is completed, the data storage state of each bank is managed by setting a storable flag indicating that this bank is in a state where data can be stored.

  As shown in FIG. 1, the FIFO control unit 5 includes a WP control unit 6 that controls the WP, an RP control unit 7 that controls the RP, and a memory that detects the number of banks that can store data. Receivable bank number detection means 8, readable bank number detection means 9 for detecting the number of banks in which data can be read, and receiving that transmission block 2 has completed storing data in FIFO storage unit 4 Final reception permission signal generating means 10 for notifying the block 3, RP asynchronous transfer means 11 for synchronizing the operating frequency of the RP being moved based on the operating frequency on the receiving block 3 side with the operating frequency on the transmitting block 2 side, WP asynchronous transfer means 12 is provided for synchronizing the operating frequency of the WP being moved based on the operating frequency on the transmission block 2 side with the operating frequency on the receiving block 3 side.

  The data transfer method for transferring data from the transmission block 2 to the reception block 3 by the data transfer device 1 configured as described above is stored in the FIFO storage unit 4 and processing for storing the data in the FIFO storage unit 4. This will be described separately in the process of reading out the data.

  In the present embodiment, a case where data for 2.5 banks is transferred from the transmission block 2 to the reception block 3 will be described as an example.

  In the process of storing data in the FIFO storage unit 4, first, a transfer request signal for transferring data for 2.5 banks from the transmission block 2 is input to the FIFO control unit 5 (step S1).

  Then, the bank address of the WP currently pointed to by the WP control means 6 is detected and input to the storable bank number detection means 8 (step S2).

  Next, the bank address of the RP currently pointed out by the RP control means 7 is detected and input to the storable bank number detection means 8 (step S3).

  At this time, since the RP moves based on the operating frequency on the receiving block 3 side, the RP asynchronous transfer means 11 synchronizes the operating frequency of the RP with the operating frequency on the transmitting block 2 side, and then the RP currently pointed to The bank address is input to the storable bank number detecting means 8.

  Next, the storable bank number detecting means 8 continuously sets the storable flag based on the bank address currently pointed to by WP and RP that are both moving based on the operating frequency on the transmission block 2 side. The number of standing banks is compared with the number of banks necessary for the transmission block 2 to transfer data (step S4).

  At this time, as shown in FIG. 4 (a), if the number of banks for which the storable flag is continuously set is 2, all the data for 2.5 banks transferred by the transmission block 2 are continuously stored. Since this cannot be done, the process moves to step S2.

  On the other hand, as shown in FIG. 4 (b), when the number of banks for which the storable flag is continuously set is 3, all the data for 2.5 banks transferred by the transmission block 2 are continuously stored. Therefore, a storable signal is output to the transmission block 2, and after the transmission block 2 receives this storable signal, the data is stored in the bank in which the storable flag is set (step S5).

  Next, when the transmission block 2 stores data for 2.5 banks in the bank in which the storable flag is set, the transmission block 2 inputs a storage completion signal to the final reception permission signal generation means 10 and the WP control means 6.

  Here, when receiving the storage completion signal, the final reception permission signal generation means 10 outputs the final reception permission signal to the reception block 3 and ends the process of storing the data in the FIFO storage unit 4 (step S6).

  At this time, since the storage completion signal is synchronized with the operating frequency of the transmission block 2, the final reception permission signal is received after being synchronized with the operating frequency of the reception block 3 by the final reception permission signal generating means 10. Input to block 3.

  In addition, the bank where data was last stored is in a state where data for 0.5 bank is stored, but when the WP control means 6 receives the storage completion signal, the data for 0.5 bank is stored. A readable flag is forcibly set in the bank.

  Next, a process of reading data stored in the FIFO storage unit 4 will be described.

  First, the bank address of the RP currently pointed out by the RP control means 7 is detected and input to the readable bank number detection means 9 (step S7).

  Next, the bank address of the WP currently pointed to by the WP control means 6 is detected and input to the readable bank number detection means 9 (step S8).

  At this time, since the WP moves based on the operating frequency on the side of the transmission block 2, the WP asynchronous transfer means 12 synchronizes the operating frequency of the WP with the operating frequency on the side of the receiving block 3, and then the WP currently pointed to The bank address is input to the readable bank number detecting means 9.

  Here, it is determined whether or not the FIFO storage unit 4 has output a final reception permission signal to the reception block 3 (step S9).

  At this time, if the FIFO control unit 5 determines that the final reception permission signal has been output to the reception block 3, the process proceeds to step S11 to read data from the bank at the bank address currently pointed to by the RP. Do.

  On the other hand, when the FIFO control unit 5 determines in step S9 that the final reception permission signal has not been output to the reception block 3, the readable bank number detection means 9 is based on the operating frequency on the reception block 3 side. Based on the bank address currently pointed to by the moving WP and RP, respectively, the number of banks for which the readable flag is continuously set and the number of banks necessary for transferring data to the receiving block 3 are determined. Compare (step S10).

  At this time, as shown in FIG. 6 (a), when the number of banks that are continuously readable is 2, the receiving block 3 can continuously read all the data for 2.5 banks. Since this is not possible, the process proceeds to step S8.

  On the other hand, as shown in Fig. 6 (b), when the number of banks that have consecutively readable flags is 3, all the data for 2.5 banks to be transferred to the receiving block 3 are read continuously. Therefore, data is read from the bank in which this readable flag is set (step S11).

  Next, when the reception block 3 reads 2.5 banks of data from the bank in which the read enable flag is set, a process of reading the data stored in the FIFO storage unit 4 by inputting a read completion signal to the RP control means 7 And the transfer of data from the transmission block 2 to the reception block 3 is terminated (step S12).

  As described above, in the data transfer device 1 according to the present invention, the ratio between the data amount that can be stored in each bank and the unit data amount processed by the reception block 3 having a low operating frequency is a transmission that operates based on the high operating frequency. Since it is divided into multiple banks so as to be larger than the ratio of the operating frequency of block 2 and receiving block 3 operating at a low operating frequency, it should be stored when storing data from transmitting block 2 to the bank All data can be stored, and reliable data transfer can be performed between the transmission block 2 and the reception block 3 having different operating frequencies.

  In addition, the data storage state of each bank can be clearly recognized by the storable flag and readable flag, and the data is stored only in the bank where the storable flag is set, and the bank where the readable flag is set Data is read from only from.

  As a result, it is possible to reliably prevent data storage and data reading from being performed simultaneously on one bank, so that data storage from the FIFO storage unit 4 and data storage from the FIFO storage unit 4 are prevented. Reading can be performed reliably.

  Furthermore, when the number of banks corresponding to the data to be stored in the FIFO storage unit 4 is in a state where data can be stored, all the data is stored in the bank in the storage state and the FIFO storage unit When the number of banks corresponding to the data read from 4 becomes ready to read data, all the data is read from the bank that is ready to read.

  Therefore, even when transferring data that causes the system to malfunction if divided and stored, this data can be stored in the FIFO storage unit 4 in a continuous state, and this data can be kept continuous. Since the data can be read from the FIFO storage unit 4 in a state in which the data is stored, reliable data transfer can be performed.

It is a block diagram which shows the data transfer apparatus which concerns on this invention. It is explanatory drawing which shows a FIFO memory | storage part. It is a flowchart which shows the process which memorize | stores data in a FIFO memory | storage part. It is explanatory drawing which shows the data accumulation state of each bank in the process which memorize | stores data in a FIFO memory | storage part. It is a flowchart which shows the process which reads the data memorize | stored in the FIFO memory | storage part. It is explanatory drawing which shows the data accumulation state of each bank in the process which reads the data memorize | stored in the FIFO memory | storage part.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Data transfer apparatus 2 Transmission block 3 Reception block 4 FIFO memory | storage part 5 FIFO control part 6 WP control means 7 RP control means 8 Storable bank number detection means 9 Readable bank number detection means 10 Final reception permission signal generation means 11 RP asynchronous Transfer means 12 WP asynchronous transfer means

Claims (2)

Data transmitted from the data transmission side device based on the first frequency clock signal is temporarily stored in a storage area divided into a plurality of banks, and the data is transmitted based on the second frequency clock signal lower than the first frequency. In a data transfer device comprising a bank control unit for receiving data stored in the storage area by a data receiving device that receives
The storage area is divided into one bank as a storage area capable of storing a data amount equal to or greater than n ( n is a value obtained by dividing the first frequency by the second frequency) times the unit processing data amount of the data receiving device. And
The bank control unit
When there is a data transfer request from the data sending side device, the number of banks that can be stored among the banks of the storage area is equal to or greater than the minimum number of banks that can store the data requested to be transferred. For example, data is transmitted from the data transmission side device, and the data requested for transfer is sequentially stored in the storage area. On the other hand, if the number of banks is less than the minimum number, the data transmission side device does not transmit data. , When the number of banks is equal to or greater than the minimum number of banks, the data is transmitted from the data transmission side device and sequentially stored in the storage area,
When all the requested data is stored in a plurality of banks in the storage area, even if there is a bank in which data less than the storable data amount is stored among the plurality of banks, the bank A data transfer device that transmits a final reception permission signal permitting reading of data to the data receiving side device, reads data from the plurality of banks in response to a request from the data receiving side device, and transmits the data to the data receiving side device . The bank control unit
A write pointer control means for controlling a write pointer indicating a bank address for storing the data when storing the data in the storage area;
A read pointer control means for controlling a write pointer indicating a bank address from which the data is read when reading data from the storage area;
Whether the number of banks that can be continuously stored is detected based on the bank address currently pointed to by the write pointer and the read pointer, and the number of banks that can be stored is equal to or greater than the minimum number of banks Storable bank number detecting means for determining whether or not,
A final reception permission signal generating means for outputting the final reception permission signal to the data receiving side device when the data of the minimum number of banks transmitted from the data sending side device is stored in the storage area; ,
When the write pointer control means stores the data of the minimum number of banks transmitted from the data transmission side device in the storage area, if there is a bank in which data less than the data amount is stored, The readable flag is forcibly set, and the final reception permission signal is transmitted to the data receiving device based on the readable flag so that the data of the bank can be received by the data receiving device. The data transfer device described in 1.

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