JP4552569B2 - Constant voltage power circuit - Google Patents

Description

  The present invention relates to a constant voltage power supply circuit having a protection function against overcurrent.

FIG. 9 is a diagram illustrating an example of a configuration of a general constant voltage power supply circuit.
The constant voltage power supply circuit shown in FIG. 9 includes a differential amplifier A1, a p-channel MOS output transistor Qout, resistors Z1 and Z2, and a reference voltage source BR1.

The output transistor Qout is connected between the input terminal Tin of the voltage Vin and the output terminal Tout of the voltage Vout.
The resistors Z1 and Z2 are connected in series between the output terminal Tout and the ground GND, and divide the output voltage Vout.
The differential amplifier A1 amplifies the difference between the reference voltage Vref generated by the reference voltage source BR1 and the divided voltage VZ by the resistors Z1 and Z2, and inputs the amplified difference voltage to the gate of the output transistor Qout.
A load L and an output capacitor Co are connected in parallel between the terminal Tout and the ground GND.

  When the output voltage Vout varies due to the variation of the load L2, this voltage variation is fed back to the differential amplifier A1. When the difference between the divided voltage VZ and the reference voltage Vref increases due to voltage fluctuation, this voltage difference is amplified in the differential amplifier A1, and the on-resistance of the output transistor Qout changes. The on-resistance of the output transistor Qout is controlled so that the difference between the divided voltage VZ and the reference voltage Vref is small.

When the gain of the error amplifier A1 is sufficiently large, the gate voltage of the output transistor Qout is controlled so that the divided voltage VZ is substantially equal to the reference voltage Vref.
The relationship between the output voltage Vout and the reference voltage Vref is expressed by the following equation.

  Vout = Vref × {(r1 + r2) / r2} (1)

  In Equation (1), “r1” represents the resistance value of the resistor Z1, and “r2” represents the resistance value of the resistor Z2.

  Further, the power loss Pout in the output transistor Qout is expressed by the following equation.

  Pout = (Vin−Vout) × Iout (2)

FIG. 10 is a diagram showing an example of the characteristics of output current Iout−output voltage Vout in this general constant voltage power supply circuit.
The current value Is1 is the maximum standard current value of the constant voltage power supply circuit. When the output current Iout reaches a certain current value Il1 larger than the current value Is1, the output voltage Vout drops almost linearly as the output current Iout increases. When the output voltage Vout is almost zero, that is, when the output is short-circuited, a short circuit occurs. A current value It1 flows. This short circuit current value It1 is the maximum value of the output current Iout.

  In general, the short-circuit current value It1 is a large value that is several times larger than the maximum standard current value Is1 of the constant voltage power supply circuit. Therefore, the load on the output transistor, wiring, and output load in the constant voltage power supply circuit is extremely high. Become bigger.

  In order to prevent such a situation, an overcurrent protection circuit is generally provided in the constant voltage power supply circuit. The overcurrent protection circuit limits the output current by forcibly lowering the output voltage when the output current exceeds a certain value.

  The overcurrent protection circuit is roughly divided into two types, a drooping type and a U-shaped (fallback type).

FIG. 11 is a diagram illustrating an example of a characteristic of output current Iout−output voltage Vout in the drooping-type overcurrent protection circuit.
In the drooping type overcurrent protection circuit, a certain current value Il2 larger than the maximum standard current value Is2 is set as the maximum output current value, and the output current Iout is limited by this value, and the output voltage Vout is maintained while maintaining the maximum output current value Il2. Is lowered vertically. Accordingly, the short-circuit current value It2 is equal to the maximum output current value Il2.

  In the drooping type overcurrent protection circuit, the maximum output current value Il2 continues to flow as a short-circuit current even if the output voltage is zero. In general, the maximum output current value Il2 needs to be at least twice the maximum standard current value Is2 in consideration of the margin from the load variation characteristic during normal operation.

  From the equation (2), the power loss Pout of the output transistor when the overcurrent protection function works in the drooping overcurrent protection circuit and the output voltage becomes zero is expressed as the following equation.

  Pout = (Vin-0) × Il2 (3)

  As described above, the drooping overcurrent protection circuit has the largest loss at the time of a short circuit, and thus is effective for protecting the load element, but has a problem that the burden on the output transistor is large.

  On the other hand, in the F-shaped overcurrent protection circuit, unlike the characteristic that the output voltage Vout droops while maintaining the maximum output current value Il2, when the overcurrent protection function starts operating, the output current together with the output voltage Becomes smaller. The short-circuit current value that flows when the output voltage becomes zero can be made sufficiently smaller than the maximum value of the output current. Therefore, not only the load but also the load on the output transistor can be reduced.

  Patent Document 1 below describes a constant voltage power supply circuit that realizes such a U-shaped overcurrent protection.

JP 2002-169618 A

  The constant voltage power supply circuit described in Patent Document 1 compares a voltage corresponding to an output current generated in an output current detection circuit with a detection result voltage output from the output voltage detection circuit by a voltage type comparator. The control signal input to the output transistor is controlled by the output of the comparator. As a result, a U-shaped characteristic that reduces the output current as the output voltage decreases is realized.

  By the way, the overcurrent protection circuit needs to be always operated in preparation for an overload state or an output short circuit. Therefore, in the constant voltage power supply circuit of Patent Document 1, it is necessary to always operate a voltage-type comparator that compares the output current and the detected value of the output voltage even when there is no load. Therefore, power is constantly consumed in this voltage type comparator, which is an obstacle to reducing the power consumption of the electronic device.

  In portable electronic devices such as mobile phones, mobile personal computers, personal digital assistants (PDAs), digital still cameras, video cameras, and portable audio devices, there are particularly strict requirements for low power consumption. In particular, it is desired to reduce the power in the incidental overcurrent protection function that is not related to the original constant voltage output function as much as possible.

Furthermore, in the constant voltage power supply circuit described in Patent Document 1, a mirror current proportional to the output current is taken out from the current monitoring transistor that constitutes the output transistor and the current mirror circuit, and this is passed through a resistor and converted into a voltage. Thus, a detection voltage proportional to the output current is obtained. In the output voltage detection circuit, a detection voltage proportional to the output voltage is obtained by a resistance voltage dividing circuit.
Therefore, when the set value of the output voltage can be arbitrarily changed, the operating point for overcurrent detection changes according to the output voltage. That is, when the output voltage is increased, the current value at which the overcurrent detection operation is started also increases. Therefore, there is a problem that the load on the load and the output transistor increases as the output voltage increases.

  The present invention has been made in view of such circumstances, and an object thereof is to provide a constant voltage power supply circuit capable of realizing a U-shaped (fallback) overcurrent protection characteristic with less power consumption.

In order to achieve the above object, a constant voltage power supply circuit according to the present invention includes a voltage / current control circuit that controls an output voltage and a first output current output to a load in accordance with an input control signal, and the load When the first voltage is connected between the wire supplied, and an output voltage detection circuit for outputting a detection voltage to detect the output voltage, said the wiring and the first node that the first voltage is supplied A first transistor of a first variable current source connected between and controlled to flow a current according to the first output current; a wiring to which a second voltage is supplied; and the first node And a second transistor of a second variable current source that is controlled so that a second output current corresponding to the output voltage detected by the output voltage detection circuit flows , and the second transistor Between the wiring to which the voltage of 1 is supplied and the first node Is connected, a third transistor of a fixed current source fixed voltage third output current of the constant is supplied to the input terminal is controlled to flow, the voltage detected by the output voltage detecting circuit and the reference voltage A control signal generation circuit that outputs a control signal corresponding to a difference voltage between the detection voltage detected by the output voltage detection circuit and the reference voltage; and the output voltage detection is performed by increasing the first output current. When the second output current increases due to the detection voltage detected by the circuit, and the sum of the increased second output current and the fixed current approaches the current value of the first variable current source, the second output current increases. The voltage between the output terminals of the second and third transistors increases, and the voltage at the first node exceeds the predetermined threshold voltage between the first voltage and the second voltage. it approaches the first voltage, the control signal generator Start the adjustment of the output the control signal from the road, and an output current limiting circuit for adjusting the control signal as the first output current is limited in accordance with the voltage of the excess from the threshold voltage Have.
Preferably, the voltage / current control circuit may include an output transistor for controlling the output current in accordance with the control signal. In this case, the present invention may include a first current mirror circuit including the first transistor that causes a mirror current of a current flowing through the output transistor to flow through the first transistor.

The operation of the present invention will be described.
When the output current is sufficiently small, the first transistor is compared with a combined current of a current corresponding to the output voltage that should flow through the second transistor and a constant current that should flow through the third transistor. The current corresponding to the output current that should flow is reduced. Therefore, the first transistor operates in a saturation region, and the second transistor and the third transistor operate in a non-saturation region. In this case, the voltage of the first node is close to the second voltage, and is not in a state of exceeding the threshold voltage and approaching the first voltage. No adjustment is made.
On the other hand, when the output current increases and the combined current and the current that should flow through the first transistor approximate, the second transistor and the third transistor also start to operate in the saturation region. As a result, the voltage across the second transistor and the voltage across the third transistor increase, and the voltage at the first node changes in a direction exceeding the threshold voltage. Then, when the voltage at the first node exceeds the threshold voltage, the control of the control signal by the output current limiting circuit starts, the output current is limited, and the output voltage starts to decrease.
When the output voltage decreases, the current of the second transistor is controlled to decrease accordingly, and the voltage across the second transistor increases. As a result, the voltage of the first node further changes in the direction of exceeding the threshold voltage and approaching the first voltage, and the control signal is set so that the output current is further reduced in the output current limiting circuit. Adjusted.
When the output current is reduced, the output voltage is decreased. Therefore, feedback control is performed so that the output current and the output voltage are further reduced by the same operation as described above.
When the output voltage becomes close to zero, a constant current flowing through the third transistor flows through the first transistor, and the two transistors operate in a saturation region. For this reason, the output current is limited to a level corresponding to a constant current flowing through the third transistor.
As described above, according to the present invention, the F-shaped (fallback type) characteristic that reduces the output current as the output voltage decreases in the overcurrent protection operation is realized.
The power consumed in the circuit related to the overcurrent protection operation is always determined only by the current set for the first transistor. Therefore, when the output current is reduced, the current flowing through the first transistor is reduced, and the power consumed by the circuit related to the overcurrent protection operation is also reduced. For example, when the output current is zero, the power consumed by the circuit related to the overcurrent protection operation can be made almost zero.

The present invention includes a current source that outputs a constant current, and a transistor pair that is commonly connected to the current source and that controls a ratio of a current that is shunted according to a difference between the output voltage and a reference voltage. And a control signal generation circuit that generates the control signal adjusted so that the output voltage approaches the reference voltage in accordance with a difference in current flowing through each transistor of the transistor pair. In this case, the second transistor may be controlled so that a current corresponding to a current flowing through one transistor of the transistor pair flows.
Preferably, the control signal generation circuit supplies a mirror current of a current flowing through one transistor of the transistor pair and a mirror current of a current flowing through the other transistor of the transistor pair to a common second node, respectively. Two current mirror circuits to output may be included, and the control signal may be output from the second node. In this case, the second transistor may be included in one of the two current mirror circuits of the control signal generation circuit, or a mirror current of a current flowing through one transistor of the transistor pair may flow.

According to the above configuration, the difference between the output voltage and the reference voltage changes according to the change in the output voltage, and the ratio of the current that is shunted from the current source to each transistor in the transistor pair changes. Therefore, by controlling the second transistor so that a current according to the current flowing through one transistor of the transistor pair flows, the second transistor is controlled so that a current according to the output voltage flows. Can do.
On the other hand, in the control signal generation circuit, the control signal is adjusted so that the output voltage approaches the reference voltage according to the difference between the currents flowing through the transistors of the transistor pair. Control is performed so as to approach a predetermined current difference when the output voltage matches the reference voltage. That is, the current flowing through one transistor of the transistor pair is controlled to approach a predetermined current when the output voltage and the reference voltage match, and the current flowing through the second transistor is the predetermined current. It is controlled so as to approach a constant current according to the current.
Therefore, even when the reference voltage is changed and thereby the target value of the output voltage is changed, the current flowing through the second transistor flows when the voltage at the output terminal matches the reference voltage. It is controlled to approach a constant current. In other words, even if the target value of the output voltage is changed, the operating point for overcurrent protection is kept constant.

  According to the present invention, a U-shaped (fallback type) overcurrent protection characteristic can be realized with less power consumption.

<First Embodiment>
FIG. 1 is a diagram showing an example of a configuration of a constant voltage power supply circuit according to the first embodiment of the present invention.

  The constant voltage power supply circuit shown in FIG. 1 includes an n-channel MOS transistor Q1, p-channel MOS transistors Q2 and Q3, a voltage / current control circuit 1, an output current limiting circuit 2, a differential amplifier 3, Gate control circuits 4 and 5, output voltage detection circuit 6, and reference voltage source 7 are included.

The voltage / current control circuit 1 is an embodiment of the current control circuit of the present invention.
The output current limiting circuit 2 is an embodiment of the output current limiting circuit of the present invention.
Transistor Q1 is an embodiment of the first transistor of the present invention.
Transistor Q2 is an embodiment of the second transistor of the present invention.
Transistor Q3 is an embodiment of the third transistor of the present invention.

  The voltage / current control circuit 1 controls the output voltage Vout and the output current Iout output to the load according to the input control signal S3.

  The voltage / current control circuit 1 is composed of, for example, a transistor, and is connected between an input terminal Tin to which a voltage Vin is input and an output terminal Tout. Then, the impedance is changed according to the control signal S3 to change the current Iout flowing from the input terminal Tin to the output terminal Tout.

  The output current limiting circuit 2 is a circuit that limits the output current Iout by adjusting the control signal S3 according to the voltage V1 of the node N1. That is, when the voltage V1 exceeds the predetermined threshold voltage Vth between the voltage Vin and the ground level VSS and approaches the ground level VSS, the output current Iout is limited according to the excess voltage from the threshold voltage Vth. The control signal S3 is adjusted as described above. When the voltage V1 does not exceed the threshold voltage Vth, the control signal S3 output from the differential amplifier 3 is directly input to the voltage / current control circuit 1 without performing the above-described adjustment.

  The output voltage detection circuit 6 is a circuit that detects the output voltage Vout. For example, as shown in FIG. 1, the output voltage detection circuit 6 is divided by resistors 61 and 62 connected in series between the output terminal Tout and the supply line of the ground level VSS. It has a circuit. This voltage dividing circuit outputs a divided voltage VZ of the output voltage Vout.

  The differential amplifier 3 amplifies a difference between the output voltage detected by the output voltage detection circuit 6 (the divided voltage VZ in the example of FIG. 1) and the reference voltage Vref output from the reference voltage source 7, and controls the control signal. Output as S3. That is, the control signal S3 adjusted so that the divided voltage VZ approaches the reference voltage Vref according to the difference between the divided voltage VZ and the reference voltage Vref is output.

  The transistor Q1 is connected between the supply line of the ground level VSS and the node N1, and is controlled by the gate control circuit 4 so that a current I1 corresponding to the output current Iout flows.

  The transistor Q2 is connected between the input terminal Tin to which the voltage Vin is supplied and the node N1, and is controlled by the gate control circuit 5 so that a current I2 corresponding to the output voltage Vout flows.

  The transistor Q3 is connected between the input terminal Tin to which the voltage Vin is supplied and the node N1, and the gate voltage is controlled so that a constant offset current I3 flows. For example, a constant bias voltage Vb is supplied to the gate by a current mirror circuit or the like.

FIG. 2 is a diagram illustrating an example of the relationship between the current I1 of the transistor Q1 and the voltage V1 of the node N1.
As shown in FIG. 2, when the voltage V1 at the node N1 is low, that is, when the drain-source voltage is small, the transistor Q1 operates in the non-saturated region. In this case, the current I1 linearly decreases as the voltage V1 decreases, and when the voltage V1 becomes zero, the current I1 becomes almost zero.
On the other hand, when the voltage V1 of the node N1 becomes higher than a certain level, the transistor Q1 operates in the saturation region. In this case, the current I1 is substantially constant regardless of the voltage V1.

FIG. 3 is a diagram showing an example of the relationship between the combined current (I2 + I3) of the currents I2 and I3 of the transistors Q2 and Q3 and the voltage V1 of the node N1.
As shown in FIG. 3, when the voltage V1 at the node N1 is close to the input voltage Vin, that is, when the drain-source voltage is small, the transistors Q2 and Q3 operate in the non-saturated region. In this case, the combined current (I2 + I3) decreases linearly as the voltage V1 increases, and when the voltage V1 becomes equal to the voltage Vin, the combined current (I2 + I3) becomes almost zero.
On the other hand, when the voltage V1 of the node N1 becomes lower than a certain level, the transistors Q2 and Q3 operate in the saturation region. In this case, the combined current (I2 + I3) is substantially constant regardless of the voltage V1.

  The gate control circuit 4 controls the gate voltage so that the current I1 corresponding to the output current Iout flows through the transistor Q1. That is, the gate voltage of the transistor Q1 is controlled so that the current I1 increases when the output current Iout increases, and the current I1 decreases when the output current Iout decreases.

  The gate control circuit 4 controls the gate voltage based on, for example, a control signal S3 input to the voltage / current control circuit 1. That is, when the control signal S3 is adjusted so that the output current Iout is increased, the gate voltage of the transistor Q1 is increased to increase the current I1, and the control signal S3 is adjusted so that the output current Iout is decreased. Then, the gate voltage of the transistor Q1 is lowered to reduce the current I1.

  The gate control circuit 5 controls the gate voltage so that a current corresponding to the output voltage Vout flows through the transistor Q2. That is, the gate voltage of the transistor Q2 is controlled so that the current I2 increases when the output voltage Vout increases, and the current I2 decreases when the output voltage Vout decreases.

  The gate control circuit 5 controls the gate voltage based on the detection result of the output voltage detection circuit 6, for example. That is, when the divided voltage VZ increases, the gate voltage of the transistor Q2 is decreased to increase the current I2, and when the divided voltage VZ decreases, the gate voltage of the transistor Q2 is increased to decrease the current I2.

  In the example of FIG. 1, a capacitor Co and a load L are connected in parallel between the output terminal Tout and the supply line of the ground level VSS.

  Here, the operation of the constant voltage power supply circuit shown in FIG. 1 having the above-described configuration will be described.

First, normal constant voltage operation will be described.
When the output voltage Vout varies due to the variation of the load L, this voltage variation is fed back to the differential amplifier 3. When the difference between the divided voltage VZ and the reference voltage Vref increases due to voltage fluctuation, the voltage difference is amplified in the differential amplifier 3 and the output current Iout flowing through the voltage / current control circuit 1 changes. The output current Iout is controlled so that the difference between the divided voltage VZ and the reference voltage Vref is small.

When the gain of the error amplifier 3 is sufficiently large, the output current Iout is controlled so that the divided voltage VZ is substantially equal to the reference voltage Vref.
When the voltage division ratio of the output voltage detection circuit 6 is “K” (= VZ / Vout), the relationship between the output voltage Vout and the reference voltage Vref is expressed by the following equation.

  Vout = Vref / K (4)

Next, the overcurrent protection operation will be described.
Currents I1, I2, and I3 flowing through transistors Q1, Q2, and Q3 satisfy the relationship of the following equation.

  I1 = I2 + I3 (5)

Therefore, the voltage V1 of the node N1 and the current I1 of the transistor Q1 can be obtained from the intersection of the voltage-current characteristic curve of the transistor Q1 shown in FIG. 2 and the voltage-current characteristic curves of the transistors Q2 and Q3 shown in FIG. it can.
FIG. 4 is a diagram showing an example of changes in the voltage V1 and the current I1 accompanying the overcurrent protection operation by the intersection of these characteristic curves.

When the output current Iout is sufficiently small, the output that should flow to the transistor Q1 compared to the combined current (I2 + I3) of the current I2 corresponding to the output voltage Vout that should flow to the transistor Q2 and the constant offset current I3 that should flow to the transistor Q3 The current I1 corresponding to the current Iout is reduced.
Therefore, as shown in FIG. 4A, the transistor Q1 operates in the saturation region, the transistors Q2 and Q3 operate in the non-saturation region, and the voltage V1 at the node N1 at the intersection P1 of the characteristic curve is a voltage close to the input voltage Vin. Become. As a result, the voltage V1 at the node N1 becomes higher than the threshold voltage Vth, and the control signal S3 is not adjusted by the output current limiting circuit 2.

5 and 6 are diagrams showing an example of the relationship between the output current Iout and the output voltage Vout. FIG. 5 shows a U-shaped overcurrent protection characteristic, and FIG. 6 shows a fallback type overcurrent protection characteristic.
In the range where the output current Iout does not exceed the maximum output current value Il3 (the range from the point PA to PB), the voltage V1 at the node N1 is higher than the threshold voltage Vth, and the control signal S3 is adjusted by the output current limiting circuit 2 Since it is not performed, the constant voltage power supply circuit performs a normal constant voltage output operation.

  Next, when the output current Iout increases and the combined current (I2 + I3) that should flow through the transistors Q2 and Q3 and the current I1 that flows through the transistor Q1 approximate, the transistors Q2 and Q3 also operate in the saturation region. As a result, the voltage across the transistor Q2 and the voltage across the transistor Q3 increase, and the voltage at the node N1 changes toward the ground level VSS. When the voltage V1 of the node N1 reaches the threshold voltage Vth (FIG. 4B), the control of the control signal S3 by the output current limiting circuit 2 starts, the output current Iout is limited, and the output voltage Vout decreases. Begin to.

When the output voltage Vout decreases, the current of the transistor Q2 is controlled to decrease accordingly, and the voltage across the transistor Q2 further increases. As a result, the voltage V1 of the node N1 further changes in the direction of exceeding the threshold voltage Vth and approaching the ground level VSS, so that the control signal S3 is adjusted in the output current limiting circuit 2 so that the output current Iout is further reduced. The
When the output current Iout decreases, the output voltage Vout decreases. Therefore, feedback control works so that the output current Iout and the output voltage Vout are further decreased by the same operation as described above.
That is, as shown in PC from the point PB in FIG. 5 or FIG. 6, both the output voltage Vout and the output current Iout decrease.

  When the output voltage Vout becomes almost zero, if the current of the transistor Q2 also becomes zero, a constant offset current I3 flowing through the transistor Q3 flows into the transistor Q1, and these two transistors operate in the saturation region. (FIG. 4C). At this time, the output current Iout is limited to a constant value (short-circuit current value It3) corresponding to the offset current I3 of the transistor Q3.

  In this short-circuit state, when the load L is removed or the current flowing through the load L becomes smaller than the short-circuit current value It3, the capacitor Co is charged by the output current Iout and the output voltage Vout starts to rise.

When the output voltage Vout increases, the current I2 of the transistor Q2 increases accordingly, so that the voltage V1 of the node N1 increases, the restriction of the output current Iout by the output current limiting circuit 2 is relaxed, and the output current Iout becomes growing.
As the output current Iout increases, the charging of the capacitor Co is accelerated, and the output voltage Vout further increases.
In this way, feedback control works so that both the output current Iout and the output voltage Vout increase.

  When the output voltage Vout reaches the target value shown in the equation (4), the output voltage Vout stops increasing and the capacitor Co stops charging. Therefore, the output current Iout becomes zero or only the current of the load L. Accordingly, since the current I1 that should flow through the transistor Q1 is smaller than the combined current (I2 + I3) that should flow through the transistors Q2 and Q3, the voltage V1 at the node N1 becomes higher than the threshold voltage Vth, and FIG. The normal constant voltage output operation shown in FIG.

  As described above, according to the constant voltage power supply circuit shown in FIG. 1, in the overcurrent protection operation, the F-shaped (fallback type) overcurrent protection characteristic that reduces the output current Iout as the output voltage Vout decreases is provided. Can be realized. Thereby, the power loss of the output control circuit during the overcurrent protection operation can be reduced, and the heat generation of the circuit elements can be suppressed.

  Further, according to the constant voltage power supply circuit shown in FIG. 1, the load L is removed or the current flowing through the load L is determined from the short-circuit current value It3 in a state where the output voltage Vout is reduced to near zero by the activation of the overcurrent protection operation. By setting a smaller value, it is possible to automatically return to a normal constant voltage output operation. Therefore, handling becomes easier as compared with a constant voltage power supply circuit that requires an external control signal to release the overcurrent protection operation.

In addition, according to the constant voltage power supply circuit shown in FIG. 1, when the output current Iout is sufficiently small, the transistor Q1 operates in the saturation region and the transistors Q2 and Q3 operate in the non-saturation region, and therefore flows from the transistors Q2 and Q3 to the transistor Q1. The current can be made very small. For example, when the gate voltage of the transistor Q1 is controlled so that the current I1 of the transistor Q1 becomes zero when the output current Iout is zero, the current flowing from the transistors Q2 and Q3 to the transistor Q1 becomes zero when there is no load. Therefore, the power consumption of the circuit related to the overcurrent protection operation can be greatly reduced as compared with the conventional constant voltage power supply circuit described above in which the current consumption of the voltage comparator constantly flows.
Therefore, the constant voltage power supply circuit according to the present embodiment is installed in a portable electronic device such as a mobile phone, a mobile personal computer, a PDA, a digital still camera, a video camera, and a portable audio device, which is required to reduce power consumption. Useful for voltage power supply circuits.

<Second Embodiment>
Next, a second embodiment of the present invention will be described.
FIG. 7 is a diagram showing an example of the configuration of the constant voltage power supply circuit according to the second embodiment of the present invention.

The constant voltage power supply circuit shown in FIG. 7 includes n-channel MOS transistors Q1, Q6, p-channel MOS transistors Q2,..., Q5, Q7, a differential amplifier 3A, a reference voltage source 7, and an output voltage. And a detection circuit 6.
In the example of FIG. 7, the differential amplifier 3A includes n-channel MOS transistors Q10,..., Q13, p-channel MOS transistors Q8, Q9, Q14, Q15, and a current source SC1.

The transistor Q4 is an embodiment of the current control circuit of the present invention.
Transistor Q7 is an embodiment of the output current limiting circuit of the present invention.
Transistor Q1 is an embodiment of the first transistor of the present invention.
Transistor Q2 is an embodiment of the second transistor of the present invention.
Transistor Q3 is an embodiment of the third transistor of the present invention.
The circuit including the transistors Q1, Q5, and Q6 is an embodiment of the first current mirror circuit of the present invention.
Current source SC1 is an embodiment of the current source of the present invention.
Transistors Q8 and Q9 are an embodiment of the transistor pair of the present invention.
The circuit including the transistors Q10,..., Q15 is an embodiment of the control signal generation circuit of the present invention.

  The source of the transistor Q4 is connected to the input terminal Tin of the voltage Vin, the drain is connected to the output terminal Tout, and the gate is connected to the node N2 that is the output of the differential amplifier 3A.

The transistor Q7 is connected between the gate and source of the transistor Q4, and inputs the voltage V1 of the node N1 to the gate.
FIG. 8 is a diagram illustrating an example of the relationship between the resistance of the transistor Q7 and the voltage V1 of the node N1. As shown in FIG. 8, the transistor Q7 has a high impedance when the voltage V1 of the node N1 is higher than the threshold voltage Vth, and suddenly becomes a low impedance with the threshold voltage Vth as a boundary.

  Transistors Q1, Q5, and Q6 constitute a current mirror circuit that causes the mirror current of the output current Iout flowing through transistor Q4 to flow through transistor Q1.

Transistor Q5 receives the same gate-source voltage as transistor Q4. That is, the source is connected to the input terminal Tin, and the gate is connected to the node N2.
The drain and gate of the transistor Q6 are commonly connected to the drain of the transistor Q5, and the source is connected to the supply line of the ground level VSS.
The transistor Q1 inputs the same gate-source voltage as the transistor Q6. That is, the gate of the transistor Q1 is connected in common with the gate of the transistor Q6, and the source is connected to the supply line of the ground level VSS. The drain of the transistor Q1 is connected to the node N1.

Since the same gate-source voltage is input to transistors Q5 and Q4, a mirror current proportional to the output current Iout of transistor Q4 flows through transistor Q5. The current of the transistor Q5 is input to the transistor Q6, and a voltage corresponding to the input current is generated between the gate and source of the transistor Q6. Since the same gate-source voltage is input to the transistors Q1 and Q6, the transistor Q1 is controlled so that a mirror current proportional to the current of the transistor Q6 flows.
In this way, the transistor Q1 is controlled such that a mirror current proportional to the output current Iout of the transistor Q4 flows.

  The transistor Q2 is connected between the input terminal Tin and the node N1, and inputs the gate voltage of a transistor Q14 in the differential amplifier 3A described later to the gate.

  The transistor Q3 is connected between the input terminal Tin and the node N1, and the gate voltage is controlled so that a constant offset current I3 flows. For example, a constant bias voltage Vb is supplied to the gate by a current mirror circuit or the like.

  The output voltage detection circuit 6 is a circuit that detects the output voltage Vout. For example, as shown in FIG. 7, the voltage is divided by resistors 61 and 62 connected in series between the output terminal Tout and the supply line of the ground level VSS. It has a circuit. This voltage dividing circuit outputs a divided voltage VZ of the output voltage Vout.

  The differential amplifier 3A amplifies the difference between the output voltage detected by the output voltage detection circuit 6 (the divided voltage VZ in the example of FIG. 7) and the reference voltage Vref output from the reference voltage source 7. That is, the voltage at the node N2 is adjusted so that the divided voltage VZ approaches the reference voltage Vref according to the difference between the divided voltage VZ and the reference voltage Vref.

  The current source SC1 outputs a constant current Ib. In the example of FIG. 7, a constant current Ib flows from the input terminal Tin to the node N3.

Transistors Q8 and Q9 constitute a transistor pair whose emitters are commonly connected to node N3.
The reference voltage Vref is input to the gate of the transistor Q8, and the divided voltage VZ of the output voltage detection circuit 6 is input to the gate of the transistor Q9.

When the divided voltage VZ becomes lower than the reference voltage Vref, the ratio of the current that is divided from the current source SC1 to the transistor Q9 increases according to the reduced voltage. Conversely, when the divided voltage VZ becomes higher than the reference voltage Vref. The ratio of the current that is shunted from the current source SC1 to the transistor Q8 increases in accordance with the increased voltage.
That is, in the transistor pair (Q8, Q9), the ratio of the current divided from the current source SC1 to each transistor is controlled according to the difference between the divided voltage VZ and the reference voltage Vref.

  Here, transistors Q8 and Q9 are transistors having the same structure and having equivalent characteristics. In this case, when the divided voltage VZ and the reference voltage Vref are equal, the currents flowing through them are substantially equal. That is, the current of each transistor is approximately 'Ib / 2'.

  Transistors Q10 and Q11 form a current mirror circuit that outputs a mirror current of the current flowing through transistor Q9 to node N2.

The drain and gate of the transistor Q10 are commonly connected to the drain of the transistor Q9, and the source thereof is connected to the supply line of the ground level VSS.
Transistor Q11 receives the same gate-source voltage as transistor Q10. That is, the gate of the transistor Q11 is commonly connected to the gate of the transistor Q10, and the source is connected to the supply line of the ground level VSS. The drain of transistor Q11 is connected to node N2.

The current of the transistor Q9 is input to the transistor Q10, and a voltage corresponding to the input current is generated between the gate and source of the transistor Q10. Since the same gate-source voltage is input to transistors Q10 and Q11, a mirror current proportional to the current flowing through transistor Q10 flows through transistor Q11.
Therefore, the transistor Q11 is controlled so that a mirror current proportional to the current of the transistor Q9 flows.

  Transistors Q12, Q13, Q14, and Q15 form a current mirror circuit that outputs a mirror current of the current flowing through transistor Q8 to node N2.

The drain and gate of the transistor Q12 are commonly connected to the drain of the transistor Q8, and the source thereof is connected to the supply line of the ground level VSS.
Transistor Q13 receives the same gate-source voltage as transistor Q12. That is, the gate of the transistor Q13 is connected in common with the gate of the transistor Q12, and the source is connected to the supply line of the ground level VSS.
The drain and gate of the transistor Q14 are commonly connected to the drain of the transistor Q13, and the source thereof is connected to the input terminal Tin.
Transistor Q15 receives the same gate-source voltage as transistor Q14. That is, the gate of the transistor Q15 is connected in common with the gate of the transistor Q14, and the source is connected to the input terminal Tin. The drain of transistor Q15 is connected to node N2.

The current of the transistor Q8 is input to the transistor Q12, and a voltage corresponding to the input current is generated between the gate and source of the transistor Q12. Since the same gate-source voltage is input to the transistors Q13 and Q12, a mirror current proportional to the current flowing through the transistor Q12 flows through the transistor Q13. The mirror current of the transistor Q13 is input to the transistor Q14, and a voltage corresponding to the input mirror current is generated between the gate and source of the transistor Q14. Since the same gate-source voltage is input to the transistors Q15 and Q14, a mirror current proportional to the current flowing through the transistor Q14 flows through the transistor Q15.
Therefore, the transistor Q15 is controlled such that a mirror current proportional to the current of the transistor Q8 flows.

  The gate voltage of the transistor Q14 is input to the gate of the transistor Q2. That is, the same gate-source voltage is input to the transistors Q2 and Q14. Therefore, the transistor Q2 is controlled so that a mirror current proportional to the current of the transistor Q8 flows.

  Here, the operation of the constant voltage power supply circuit shown in FIG. 7 having the above-described configuration will be described.

First, normal constant voltage operation will be described.
When the output voltage Vout varies due to the variation of the load L, this voltage variation is fed back to the gate of the transistor Q9 of the differential amplifier 3A.
When the divided voltage VZ becomes smaller than the reference voltage Vref due to voltage fluctuation, the voltage between the gate and source of the transistor Q9 increases, so that the current that is shunted from the current source SC1 to the transistor Q9 increases and the current that shunts to the transistor Q8 is increased. Decrease. Thus, the transistor Q11 is controlled to increase the mirror current of the transistor Q9, and the transistor Q15 is controlled to decrease the mirror current of the transistor Q8. As a result, the voltage at node N2 decreases, the impedance of transistor Q4 decreases, and output current Iout and output voltage Vout increase.
Contrary to the above, when the divided voltage VZ becomes larger than the reference voltage Vref, the voltage at the node N2 rises and the output current Iout and the output voltage Vout become smaller.
By such feedback control, the output current Iout is controlled so that the divided voltage VZ and the reference voltage Vref are substantially equal.
Assuming that the voltage dividing ratio of the output voltage detection circuit 6 is 'K' (= VZ / Vout), the output voltage Vout is expressed in the same manner as the equation (4) described above.

Next, the overcurrent protection operation will be described.
The transistor Q1 is controlled by a current mirror circuit including the transistors Q1, Q5, and Q6 so that a mirror current proportional to the output current Iout of the transistor Q4 flows.
The transistor Q2 is controlled so that a mirror current proportional to the current of the transistor Q8 flows by a current mirror circuit including the transistors Q12, Q13, Q14, and Q2. The current of the transistor Q8 increases when the divided voltage VZ increases, and conversely decreases when the divided voltage VZ decreases. Therefore, the current I2 of the transistor Q2 also increases when the divided voltage VZ increases, and the divided voltage VZ increases. Decreases as VZ decreases.
Similar to the constant voltage power supply circuit shown in FIG. 1, the transistor Q3 is controlled such that a constant offset current I3 flows by a constant base bias voltage Vb.
Thus, since all of the transistors Q1, Q2, and Q3 are controlled in the same manner as the constant voltage power supply circuit shown in FIG. 1, an overcurrent protection operation similar to this can be realized.

More specifically, when the output current Iout is sufficiently small, the transistor is smaller than the combined current (I2 + I3) of the mirror current I2 proportional to the output voltage Vout that should flow through the transistor Q2 and the constant offset current I3 that should flow through the transistor Q3. The mirror current I1 proportional to the output current Iout that should flow through Q1 decreases.
Therefore, as shown in FIG. 4A, the transistor Q1 operates in the saturation region, the transistors Q2 and Q3 operate in the non-saturation region, and the voltage V1 of the node N1 at the intersection P1 of the characteristic curve is a voltage close to the input voltage Vin. It becomes. As a result, the voltage V1 at the node N1 becomes higher than the threshold voltage Vth, and the transistor Q7 is turned off. The output voltage of the differential amplifier 3A generated at the node N1 is input to the gate of the transistor Q4 without being attenuated by the transistor Q7.

  Next, when the output current Iout increases and the combined current (I2 + I3) that should flow through the transistors Q2 and Q3 and the mirror current I1 that flows through the transistor Q1 approximate, the transistors Q2 and Q3 also operate in the saturation region. As a result, the voltage across the transistors Q2 and Q3 increases, and the voltage at the node N1 changes in a direction approaching the ground level VSS. Then, when the voltage V1 at the node N1 reaches the threshold voltage Vth (FIG. 4B), the impedance of the transistor Q7 decreases rapidly, and the voltage at the node N2 is raised in the direction of the input voltage Vin. As a result, the impedance of the transistor Q4 increases, the output current Iout is limited, and the output voltage Vout begins to decrease.

  When the output voltage Vout decreases, the mirror current I2 of the transistor Q2 is controlled to decrease accordingly, and the voltage across the transistor Q2 further increases. As a result, the voltage V1 at the node N1 further changes in a direction that exceeds the threshold voltage Tth and approaches the ground level VSS, and thus the voltage at the node N2 is further increased in the direction of the input voltage Vin. As a result, the impedance of the transistor Q4 increases and the output current Iout further decreases.

When the output current Iout decreases, the output voltage Vout decreases. Therefore, feedback control works so that the output current Iout and the output voltage Vout are further decreased by the same operation as described above.
That is, both the output voltage Vout and the output current Iout decrease as indicated by PC from the point PB in FIG.

  When the output voltage Vout becomes almost zero, the current Ib of the current source SC1 almost flows into the transistor Q9, and the current of the transistor Q8 is close to zero, so that the current of the transistor Q2 is also close to zero. Therefore, a constant offset current I3 flowing through the transistor Q3 flows through the transistor Q1, and these two transistors operate in the saturation region (FIG. 4C). At this time, the output current Iout is limited to a constant short-circuit current value It3 corresponding to the offset current I3 of the transistor Q3.

  When the output current Iout reaches the maximum output current value Il3, the mirror current I1 of the transistor Q1 becomes substantially equal to the combined current (I2 + I3) of the transistors Q2 and Q3. When the output current Iout reaches the short-circuit current value It3 due to the overcurrent protection operation, the mirror current I1 of the transistor Q1 becomes substantially equal to the offset current I3 of the transistor Q3. Therefore, the relationship shown in the following equation is established.

  (I2 + I3): I3 = Il3: It3 (6)

In this short-circuit state, when the load L is removed or the current flowing through the load L becomes smaller than the short-circuit current value It3, the capacitor Co is charged by the output current Iout and the output voltage Vout starts to rise.
At this time, the output current Iout for charging the capacitor Co increases so that the output voltage Vout approaches the target value, but does not become an excessive current due to the overcurrent protection operation and is limited to the short-circuit current value It3.

  At this time, the differential amplifier 3A operates according to the large amplitude characteristic because the difference between the input voltages, that is, the difference between the reference voltage Vref and the divided voltage VZ is large. While the differential amplifier 3A operates with a large amplitude characteristic, most of the current Ib of the current source SC1 flows into the transistor Q9 and the current of the transistor Q8 is close to zero, so the mirror current I2 of the transistor Q2 also remains zero. become. Accordingly, the output current Iout remains limited to the short-circuit current value It3.

Thereafter, when the output voltage Vout approaches the target value shown in Equation (4), the differential amplifier 3A gradually starts to operate with a small amplitude characteristic, and a mirror current I2 corresponding to the output voltage Vout flows through the transistor Q2. . Thereby, the limitation of the output current Iout by the transistor Q7 is relaxed, and the output current Iout increases while being limited to a value smaller than the maximum output current value Il3.
When the output voltage Vout reaches the target value, the output voltage Vout stops increasing, and the capacitor Co stops charging. Therefore, the output current Iout is zero or only the current of the load L. As a result, the mirror current I1 that should flow through the transistor Q1 is smaller than the combined current (I2 + I3) that should flow through the transistors Q2 and Q3, so that the voltage V1 at the node N1 becomes higher than the threshold voltage Vth. The operation returns to the normal constant voltage output operation shown in FIG.

  As described above, the constant-voltage power supply circuit shown in FIG. 7 can realize the same overcurrent protection operation as that of the constant-voltage power supply circuit shown in FIG. 1 and without giving a special control signal from the outside. It is possible to automatically return to the normal operation from the overcurrent protection operation.

  Similarly to the constant voltage power supply circuit shown in FIG. 1, the transistor Q1 operates in the saturation region and the transistors Q2 and Q3 operate in the non-saturation region during normal operation. Therefore, the current flowing from the transistors Q2 and Q3 to the transistor Q1 is very high. Can be small. In particular, since the mirror current I1 of the transistor Q1 becomes almost zero in the no-load state, the current flowing from the transistors Q2 and Q3 to the transistor Q1 becomes almost zero. Therefore, power consumption related to the overcurrent protection operation can be greatly reduced as compared with the constant voltage power supply circuit of the prior art described above in which the current consumption of the voltage comparator constantly flows.

Further, according to the constant voltage power supply circuit shown in FIG. 7, the difference between the output voltage Vout and the reference voltage Vref changes in accordance with the change in the output voltage Vout, and the current shunted from the current source SC1 to the transistors Q8 and Q9. The ratio changes. Therefore, by controlling the transistor Q2 so that the mirror current of the transistor Q8 flows, the transistor Q2 can be controlled so that a current according to the output voltage Vout flows.
On the other hand, since the mirror currents generated in the current mirror circuit constituted by the transistors Q10 and Q11 and the current mirror circuit constituted by the transistors Q12,..., Q15 are both input to the node N2, Generates a voltage corresponding to the difference between the currents flowing through the transistors Q8 and Q9. The voltage at the node N2 is controlled so that the divided voltage VZ approaches the reference voltage Vref.
When the divided voltage VZ and the reference voltage Vref coincide with each other, for example, a constant current of the current 'Ib / 2' flows through the transistor Q8. Therefore, the mirror current of the transistor Q8 flowing through the transistor Q2 is also the current 'Ib / 2'. A constant current proportional to
Therefore, even if the target value of the output voltage Vout is changed by changing the reference voltage Vref (for example, as a variable voltage source), the current I2 flowing through the transistor Q2 is equal to the output voltage Vout and the reference voltage Vref. Are controlled so as to approach a constant current that flows when they match. That is, even when the target value of the output voltage Vout is changed, the current I2 of the transistor Q2 when shifting from the normal operation state to the overcurrent protection operation is kept substantially constant.
Therefore, according to the constant voltage power supply circuit shown in FIG. 7, even if the target value of the output voltage Vout is changed, the maximum output current value Il3 can be kept constant.
In the conventional constant voltage power supply circuit described above, the operating point for overcurrent protection changes according to the output voltage, so that it is necessary to provide a circuit for adjusting the operating point separately in order to use it as a variable voltage source. The constant voltage power supply circuit shown in FIG. 7 can be easily used as a variable voltage source without providing such a circuit.

  Moreover, according to the constant voltage power supply circuit shown in FIG. 7, the current mirror circuit is used to detect the current of the transistor Q4, and no current detection element such as a resistor is inserted on the path of the output current Iout. The loss associated with current detection can be kept to a minimum. Further, since the drop in the output voltage Vout with respect to the input voltage Vin can be reduced, for example, when the input voltage Vin is supplied from a battery, the device can be operated for a long time with a low battery voltage.

  As mentioned above, although several embodiment of this invention was described, this invention is not limited only to said form, Various modifications are included.

  For example, in the constant voltage power supply circuit shown in FIG. 7, a p-channel MOS transistor is used as a configuration corresponding to the current control circuit in the constant voltage power supply circuit shown in FIG. 1, but the present invention is limited to this. It is not a thing. For example, various other configurations that can control current according to a control signal, such as an n-channel MOS transistor or a bipolar transistor, may be used.

  The specific circuit configuration shown in FIGS. 1 and 7 (for example, the internal configuration of the differential amplifier 3A and the polarity of the transistor) is an example for explanation, and can be replaced with another circuit having a similar function. is there.

It is a figure which shows an example of a structure of the constant voltage power supply circuit which concerns on 1st Embodiment. It is a figure which shows an example of the relationship between the electric current which flows into a 1st transistor, and the voltage of a 1st node. It is a figure which shows an example of the relationship between the synthetic current of a 2nd transistor and a 3rd transistor, and the voltage of a 1st node. It is a figure which shows an example of the change of the voltage of a 1st node, and the electric current of a 1st transistor accompanying overcurrent protection operation | movement. FIG. 2 is a first diagram illustrating an example of a relationship between an output current and an output voltage in the constant voltage power supply circuit illustrated in FIG. 1. FIG. 4 is a second diagram illustrating an example of a relationship between an output current and an output voltage in the constant voltage power supply circuit illustrated in FIG. 1. It is a figure which shows an example of a structure of the constant voltage power supply circuit which concerns on 2nd Embodiment. It is a figure which shows an example of the relationship between the resistance of the transistor for output current limiting, and the voltage of a 1st node. It is a figure which shows an example of a structure of a general constant voltage power supply circuit. It is a figure which shows an example of the characteristic of the output current-output voltage in a general constant voltage power supply circuit. It is a figure which shows an example of the characteristic of the output current-output voltage in a drooping type overcurrent protection circuit.

Explanation of symbols

Q1, Q6, Q10 to Q13 ... n-channel MOS type transistors, Q2 to Q5, Q7 to Q9, Q14, Q15 ... p-channel MOS type transistors, 1 ... current control circuit, 2 ... output current limiting circuit, 3, 3A ... difference Dynamic amplifiers, 4, 5 ... Gate control circuit, 6 ... Output voltage detection circuit, 7 ... Reference voltage source, SC1 ... Current source

Claims (12)

A voltage / current control circuit for controlling the output voltage and the first output current output to the load according to the input control signal;
An output voltage detection circuit connected between the load and a wiring to which a first voltage is supplied, detecting the output voltage and outputting a detection voltage ;
A first transistor of a first variable current source connected between a wiring to which the first voltage is supplied and a first node and controlled so that a current corresponding to the first output current flows. When,
The first voltage is connected between the wiring to which the second voltage is supplied and the first node, and is controlled so that the second output current corresponding to the output voltage detected by the output voltage detection circuit flows . A second transistor of two variable current sources ;
A fixed current source connected between the wiring to which the second voltage is supplied and the first node and controlled so that a fixed voltage is supplied to the input terminal and a constant third output current flows ; A third transistor;
A control signal generation circuit for supplying a voltage detected by the output voltage detection circuit and a reference voltage, and outputting a control signal corresponding to a difference voltage between the detection voltage detected by the output voltage detection circuit and the reference voltage ;
The first output current is increased and the second output current is increased by the detected voltage detected by the output voltage detection circuit, and the sum of the increased second output current and the fixed current is the first output current. When the current value of the variable current source approaches the value of the variable current source, the voltage between the output terminals of the second and third transistors increases, and the voltage at the first node becomes the first voltage and the second voltage. When the voltage approaches a first threshold voltage exceeding a predetermined threshold voltage, the control signal output from the control signal generation circuit begins to be adjusted, and an excess voltage from the threshold voltage is reached. An output current limiting circuit that adjusts the control signal such that the first output current is limited accordingly;
A constant voltage power circuit. The voltage / current control circuit includes an output transistor that controls the first output current in response to the control signal,
Having a first current mirror circuit including the first transistor for flowing a mirror current of the current flowing in the output transistor to the first transistor;
The constant voltage power supply circuit according to claim 1. A current source that outputs a constant current;
Are connected in common to the current source, the transistor pair ratio of current is controlled to be shunted to each according to the difference between the output voltage and the reference voltage,
The output current limiting circuit that generates the control signal adjusted so that the output voltage approaches the reference voltage according to a difference in current flowing through each transistor of the transistor pair;
The second transistor is controlled so that a current corresponding to a current flowing in one transistor of the transistor pair flows.
The constant voltage power supply circuit according to claim 1. The control signal generation circuit outputs two mirror currents of a current flowing in one transistor of the transistor pair and a mirror current of a current flowing in the other transistor of the transistor pair to a common second node, respectively. Including a current mirror circuit, outputting the control signal from the second node,
The second transistor is included in one of the two current mirror circuits of the control signal generation circuit, and flows a mirror current of a current flowing through one transistor of the transistor pair.
The constant voltage power supply circuit according to claim 3. The second and third transistors operate in a saturation region when starting adjustment of the control signal output from the control signal generation circuit, and are connected between respective output terminals of the second and third transistors. Potential difference increases
The constant voltage power supply circuit according to claim 1 . Values of the first output current is equal to the sum of the value of the current flowing through the first transistor of the second output current and the upper Symbol first variable current source
The constant voltage power supply circuit according to claim 1 . The first output current decreases, and the detection voltage detected by the output voltage detection circuit decreases the second output current and the current flowing through the first transistor of the first variable current source, thereby reducing the decrease. When the sum of the second output current and the fixed current approaches the current value of the first variable current source, the adjustment of the control signal output from the control signal generation circuit is stopped.
The constant voltage power supply circuit according to claim 6 . The second and third transistors are composed of P-channel MOSFETs, and the first transistor is composed of an N-channel MOSFET.
The constant voltage power supply circuit according to claim 1. The control signal is adjusted by a P-channel MOSFET having a source connected to the second wiring, a drain connected to the output terminal of the control signal generation circuit, and a gate connected to the first node.
The constant voltage power supply circuit according to claim 1. The transistor that supplies the first output current to the load is configured by a P-channel MOSFET, the source of the P-channel MOSFET is connected to the wiring to which the second voltage is supplied, and the drain is connected to the load. ,
In the output voltage detection circuit, a first resistor and a second resistor are connected in series between the load and a wiring for supplying the first voltage, and the detected voltage is output from a common connection point of the first and second resistors. Do
The constant voltage power supply circuit according to claim 1. The constant voltage power supply circuit includes a gate control circuit, and the gate control circuit is connected between the output of the control signal generation circuit and the input terminal of the first transistor, and the input signal is output from the gate control circuit. When the first output current is large, the current output from the first transistor of the first variable current source is increased, and when the first output current is small, the first variable current is Reduced the current output from the first transistor of the source
The constant voltage power supply circuit according to claim 1. The load is removed or the current flowing through the load is set to be smaller than the short-circuit current value in a state where the output voltage is reduced to be close to the first voltage due to the activation of the overcurrent protection operation of the constant voltage power supply circuit. To automatically return to the normal constant voltage output operation.
The constant voltage power supply circuit according to claim 1.

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