JP4530947B2 - Power capacitor charging device - Google Patents

Description

  The present invention relates to a power capacitor charging apparatus that repeatedly charges a power capacitor provided in a DC power source or the like incorporated in a device to a target voltage.

  Conventional power capacitor charging devices include a rectifier that rectifies an AC power source, a smoothing capacitor that smoothes the rectified voltage output from the rectifier, and a DC power source that uses a smoothing capacitor that is on-controlled during charging of the power capacitor. A first semiconductor switch connected to the power capacitor and controlled to be turned off when the power capacitor is discharged to suppress current leakage from the DC power source to the power capacitor side, and between the first semiconductor switch and the power capacitor A reactor, a second semiconductor switch, a flywheel diode and a diode, and a DC power supply is applied to the reactor during the on-period of the first and second semiconductor switches, and the reactor is turned off when the second semiconductor switch is off. Booster choke that charges the power capacitor with the electromagnetic energy stored in There is provided with a circuit.

The boost chopper circuit is controlled by setting the charging voltage of the power capacitor based on the target setting value of the charging voltage of the power capacitor, the residual voltage of the power capacitor, and the DC power supply voltage of the smoothing capacitor. The first and second semiconductor switches are controlled to be turned on / off so as to have a value.
Note that the timing at which the second semiconductor switch is turned off can be represented by iL × L / EIN. However, iL is a current command to flow through the reactor, L is an inductance of the reactor, and EIN is a DC power supply voltage by a smoothing capacitor (see, for example, Patent Document 1).

JP 2002-218743 A

Since the conventional power capacitor charging device is configured as described above, the power capacitor is charged at high speed up to the target set value of the charging voltage using only the step-up chopper circuit of the DC power source rectified directly from the AC power source. be able to.
However, the timing at which the second semiconductor switch is turned off is expressed by iL × L / EIN, and when the power is turned on, the DC power supply voltage EIN by the smoothing capacitor is zero, so the second semiconductor switch is turned off. The timing is very long. That is, the time for charging the power capacitor is increased, and the charging current is also increased.
For this reason, since a large current flows through the first semiconductor switch and the diode, it is necessary to use a rated current that can withstand this current, which increases the external dimensions and increases the cost. It was.
In addition, there is a problem that the inrush current of the power capacitor exceeds the allowable current, and there is a risk that the life of the power capacitor may be deteriorated or damaged.

  The present invention has been made to solve the above-described problems, and suppresses inrush current to the power capacitor when the power is turned on, protects the power capacitor and the boost chopper circuit, and reduces the size and price. An object of the present invention is to obtain a power capacitor charging device that realizes the above.

The charging device for a power capacitor according to the present invention comprises a time constant circuit by charging a DC power supply, and the ON time width of the semiconductor switch is short when the DC power supply is turned on, and the ON time width gradually increases with time. A first chopper control circuit for generating a control pulse and a second chopper for generating a control pulse for stopping the operation of the semiconductor switch when the charging voltage of the power capacitor reaches a preset target charging voltage. A chopper control circuit; and a fourth chopper control circuit that controls the operation of the semiconductor switch based on control pulses generated from the first and second chopper control circuits . A control parameter that operates the semiconductor switch when the charging voltage does not satisfy the preset target charging voltage due to the discharge of the capacitor. The first chopper control circuit resets the time constant circuit in conjunction with the generation of the control pulse for resuming the operation of the semiconductor switch by the second chopper control circuit, and the on-time width of the semiconductor switch is A control pulse that is short and gradually increases the on-time width as time elapses is regenerated .

According to the present invention, in the fourth chopper control circuit, the on-time width of the semiconductor switch generated from the first chopper control circuit is short immediately after the DC power supply is turned on, and the on-time width gradually increases with time. By operating the semiconductor switch with a long control pulse, the inrush current to the power capacitor when the power is turned on is suppressed, the power capacitor and the boost chopper circuit are protected, and miniaturization and cost reduction are realized. . Further, when the charging voltage of the power capacitor reaches the target charging voltage by the control pulse generated from the second chopper control circuit, the operation of the semiconductor switch is stopped, and the charging voltage of the power capacitor becomes the target charging voltage. Can be . Further, the second chopper control circuit generates a control pulse for operating the semiconductor switch when the charging voltage does not satisfy the preset target charging voltage due to the discharging of the power capacitor, and the first chopper control circuit The circuit resets the time constant circuit in conjunction with the generation of a control pulse for resuming the operation of the semiconductor switch by the second chopper control circuit, and the on-time width of the semiconductor switch is short. As a result, the control pulse is generated again so as to be longer, so that it can be recharged according to the discharge of the power capacitor. Further, even during the recharging, the inrush current to the power capacitor is suppressed, the power capacitor, the first and second semiconductor switches, and the reactor are protected, and the size and the price are reduced. Furthermore, there is an effect that the charging voltage of the power capacitor can be set to the target charging voltage .

Embodiment 1 FIG.
FIG. 1 is a circuit diagram showing a power capacitor charging apparatus according to Embodiment 1 of the present invention. In FIG. 1, a rectifier (power supply circuit) 1 is connected to an AC power supply line and supplied in response to power-on. It rectifies the AC power supply. The smoothing capacitor (power supply circuit) 2 is connected between the high-potential line and the low-potential line on the output side of the rectifier 1, and smoothes the rectified output to generate a DC power supply.
The power capacitor 3 is connected between a high potential line and a low potential line on the output side of the smoothing capacitor 2 and on the output side of a step-up chopper circuit, which will be described later, and is repeatedly charged up to a target charging voltage.

  The first semiconductor switch (semiconductor switch) 4 is connected to the high potential line on the output side of the smoothing capacitor 2, and the first diode 5 is connected to the high potential line on the output side of the first semiconductor switch 4 and the low potential. The reactor 6 is connected to the high potential line on the output side of the first diode 5, and the second semiconductor switch (semiconductor switch) 7 is connected to the high potential line on the output side of the reactor 6. The second diode 8 is connected to the high potential line on the output side of the second semiconductor switch 7 and on the input side of the power capacitor 3 with a forward polarity. The step-up chopper for charging the power capacitor 3 with the DC power generated from the smoothing capacitor 2 by the first and second semiconductor switches 4 and 7, the first and second diodes 5 and 8, and the reactor 6. It constitutes a circuit.

The control circuit power supply circuit 11 is connected to an AC power supply line, converts the AC power supplied in response to power-on into a DC power supply, a triangular wave generation circuit 15, a first comparison circuit 16, and a target voltage setting unit to be described later. 17, DC power is supplied to each of the charge voltage control error amplifying circuit 18, the second comparison circuit 19 and the AND circuit 20.
The control capacitor 12, the resistor 13, the power supply 14, and the ground are connected in series. The high potential line on the output side of the control circuit power supply circuit 11 is connected to the control capacitor 12, and the low potential line is connected between the ground of the power supply 14. It is a thing. Thus, a time constant circuit that generates a waveform according to the time constants of the control capacitor 12 and the resistor 13 is configured.

  The triangular wave generation circuit 15 generates a triangular wave in response to the supply of DC power from the control circuit power supply circuit 11. The first comparison circuit 16 inputs the triangular wave from the triangular wave generation circuit 15 from the + terminal, inputs the voltage waveform between the control capacitor 12 and the resistor 13 from the − terminal, and controls pulses according to the comparison of both waveforms. Is generated. The control circuit power supply circuit 11, the control capacitor 12, the resistor 13, the power supply 14, the triangular wave generation circuit 15 and the first comparison circuit 16 turn on the first and second semiconductor switches 4 and 7 when the power is turned on. The first chopper control circuit is configured to generate a control pulse having a short time width and gradually increasing the on-time width as time elapses.

  The target voltage setting unit 17 sets a target charging voltage for charging the power capacitor 3. The charge voltage control error amplification circuit 18 uses the target charge voltage set in the target voltage setting unit 17 and the power from the charge voltage detection line (charge voltage detection circuit) connected to the high potential line of the power capacitor 3. The charging voltage of the capacitor 3 is compared, and a signal is output when the charging voltage is equal to or higher than the target charging voltage, and the signal output is stopped when the charging voltage is lower than the target charging voltage. The second comparison circuit 19 inputs the triangular wave from the triangular wave generation circuit 15 from the + terminal, inputs the signal output from the charge voltage control error amplification circuit 18 from the-terminal, and performs control according to the comparison of both waveforms. A pulse is generated. The target voltage setting unit 17, the charge voltage control error amplifying circuit 18 and the second comparison circuit 19 make the first and first when the charging voltage of the power capacitor 3 reaches a preset target charging voltage. 2 constitutes a second chopper control circuit that generates a control pulse for stopping the operation of the semiconductor switches 4 and 7.

  The AND circuit 20 takes a logical product of the control pulse generated from the first comparison circuit 16 and the control pulse generated from the second comparison circuit 19, and based on the control pulse corresponding to the logical product, The operation of the second semiconductor switches 4 and 7 is controlled. The AND circuit 20 constitutes a fourth chopper control circuit.

Next, the operation will be described.
FIG. 2 is a waveform diagram showing the operation of the charging apparatus for the power capacitor according to the first embodiment of the present invention, and will be described with reference to FIG. 2 together with FIG.
When AC power is turned on, the rectifier 1 rectifies the supplied AC power, and the smoothing capacitor 2 smoothes the rectified output to generate DC power.
When the AC power supply is turned on, the control circuit power supply circuit 11 converts the supplied AC power supply into a DC power supply, and generates a triangular wave generation circuit 15, a first comparison circuit 16, a target voltage setting unit 17, a charging voltage. The DC power supply (waveform (1)) is supplied to each of the control error amplifier circuit 18, the second comparison circuit 19, and the AND circuit 20.

  The control capacitor 12 of the time constant circuit is not charged when the control circuit power supply circuit 11 rises. Charging is started at the same time as the rise, and the voltage across the terminals of the control capacitor 12 increases as charging progresses. Therefore, the divided voltage (waveform (2)) by the control capacitor 12 and the resistor 13 has a waveform that gradually decreases after rising. Since the power source 14 is connected in series to the time constant circuit, the divided voltage does not become 0 V, and is constant at the voltage of the power source 14.

  When the DC power supply (waveform (1)) is established, the triangular wave generation circuit 15 starts oscillating the triangular wave (waveform (3)). The first comparison circuit 16 compares the divided voltage (waveform (2)) by the control capacitor 12 and the resistor 13 with the triangular wave (waveform (3)) from the triangular wave generation circuit 15, and the triangular wave is divided. A control pulse (waveform (4)) corresponding to a period higher than the voltage is generated. This control pulse has a short pulse width because the divided voltage (waveform (2)) immediately after power-on is high, and the pulse width gradually increases because the divided voltage gradually decreases with time.

  The AND circuit 20 calculates the logical product of the control pulse (waveform (4)) generated from the first comparison circuit 16 and the control pulse (waveform (10)) generated from the second comparison circuit 19 described later. The operation of the first and second semiconductor switches 4 and 7 is controlled based on a control pulse (waveform (5)) corresponding to the logical product. That is, the first and second semiconductor switches 4 and 7 are turned on at the high level of the control pulse, and are turned off at the low level.

When the first and second semiconductor switches 4 and 7 are turned on, a current flows from the smoothing capacitor 2 through the path of the first semiconductor switch 4 → the reactor 6 → the second semiconductor switch 7, and electromagnetic energy is supplied to the reactor 6. Is accumulated. Since the control pulse (waveform (5)) has a short pulse width at first, the current flowing through the path × time is short, and when the control pulse is started up by the reactor 6, the current is suppressed by a transient phenomenon. The current passing through the second semiconductor switches 4 and 7 and the reactor 6 is suppressed.
In addition, the electromagnetic energy accumulated in the reactor 6 circulates in the path of the reactor 6 → the second diode 8 → the power capacitor 3 → the first diode 5 by the off operation of the first and second semiconductor switches 4 and 7. Thus, the power capacitor 3 is charged.

  A target charging voltage for the power capacitor 3 is set in advance in the target voltage setting unit 17, and the set target charging voltage (waveform (11)) is generated from the target voltage setting unit 17. The charge voltage control error amplification circuit 18 uses the target charge voltage (waveform (11)) set in the target voltage setting unit 17 and the power from the charge voltage detection line connected to the high potential line of the power capacitor 3. The charging voltage of the capacitor 3 (waveform (12)) is compared, and no signal is output while the charging voltage does not reach the target charging voltage. When the charging voltage reaches the target charging voltage, the signal output (waveform (13) )) The second comparison circuit 19 compares the triangular wave (waveform (3)) from the triangular wave generation circuit 15 with the signal output voltage (waveform (13)) from the charge voltage control error amplification circuit 18, and the triangular wave outputs the signal. A control pulse (waveform (10)) corresponding to a period higher than the voltage is generated. The control pulse is stopped when the charging voltage of the power capacitor 3 reaches a preset target charging voltage.

  This control pulse (waveform (10)) is output to the AND circuit 20, and a logical product with the control pulse (waveform (4)) generated from the first comparison circuit 16 is obtained, and a control pulse corresponding to the logical product is obtained. By controlling the operation of the first and second semiconductor switches 4 and 7 on the basis of (waveform (5)), the first charging voltage when the charging voltage of the power capacitor 3 reaches a preset target charging voltage. In addition, the operation of the second semiconductor switches 4 and 7 can be stopped, and the charging voltage of the power capacitor 3 can be matched with the target charging voltage.

  As described above, according to the first embodiment, in the AND circuit 20, the ON time widths of the first and second semiconductor switches 4 and 7 generated from the first comparison circuit 16 immediately after the power is turned on. By operating the first and second semiconductor switches 4 and 7 with a control pulse that is short and gradually increases the on-time width with time, the inrush current to the power capacitor 3 at the time of power-on is suppressed. The power capacitor 3, the first and second semiconductor switches 4, 7 and the reactor 6 are protected, and the size and the price are reduced. Further, when the charging voltage of the power capacitor 3 reaches the target charging voltage by the control pulse generated from the second comparison circuit 19, the operation of the first and second semiconductor switches 4 and 7 is stopped, and the power The charging voltage of the capacitor 3 can be set to the target charging voltage.

Embodiment 2. FIG.
FIG. 3 is a circuit diagram showing a power capacitor charging apparatus according to Embodiment 2 of the present invention. In FIG. 3, a resistor 21 is connected between the anode of the first diode 5 and a low potential line. The charging current charged in the power capacitor 3 when the second semiconductor switches 4 and 7 are turned off is detected as a voltage signal.
The series circuit composed of the resistor 22 and the resistor 23 has one end connected to the power source, that is, the DC power source generated from the control circuit power source circuit 11, and the other end connected between the anode of the first diode 5 and the resistor 21. Is converted into a divided voltage by these resistors 22 and 23.

  The reference current setting unit 24 sets a reference charging current for charging the power capacitor 3 when the first and second semiconductor switches 4 and 7 are turned off. The constant current control error amplifying circuit 25 compares the set voltage corresponding to the reference charging current set in the reference current setting unit 24 with the divided voltage corresponding to the charging current by the resistor 22 and the resistor 23 to A signal is output when the voltage is lower than the set voltage. The second comparison circuit 19 inputs the triangular wave from the triangular wave generation circuit 15 from the + terminal, inputs the signal output from the constant current control error amplification circuit 25 from the-terminal, and performs control according to the comparison of both waveforms. A pulse is generated. Note that the reference current setting unit 24, the constant current control error amplification circuit 25, and the second comparison circuit 19 charge the power capacitor 3 when the first and second semiconductor switches 4 and 7 are turned off. A third chopper control circuit is configured to generate a control pulse such that the current becomes the reference charging current. Other configurations are the same as those in FIG.

Next, the operation will be described.
FIG. 4 is a waveform diagram showing the operation of the charging apparatus for the power capacitor according to the second embodiment of the present invention, and will be described with reference to FIG. 4 together with FIG.
When the AC power supply is turned on, the first chopper control circuit, that is, the control circuit power supply circuit 11, the control capacitor 12, the resistor 13, the power supply 14, the triangular wave generation circuit 15 and the first comparison circuit 16 are implemented as described above. A control pulse (waveform (4)) that performs the same operation as in the first mode, and that the on-time width of the first and second semiconductor switches 4 and 7 is short when the power is turned on, and that the on-time width gradually increases with time. ).
Immediately after the AC power is turned on, a control pulse (waveform (5)) corresponding to this control pulse (waveform (4)) is supplied to the first and second semiconductor switches 4 and 7 through the AND circuit 20, The inrush current to the power capacitor 3 when the power is turned on can be suppressed, and the power capacitor 3, the first and second semiconductor switches 4 and 7, and the reactor 6 can be protected.

  As shown in the first embodiment, electromagnetic energy is accumulated in the reactor 6 by the on operation of the first and second semiconductor switches 4 and 7, and the off operation of the first and second semiconductor switches 4 and 7 is performed. Thus, the electromagnetic energy accumulated in the reactor 6 is charged in the power capacitor 3, and the charging current charged in the power capacitor 3 when the first and second semiconductor switches 4 and 7 are turned off. Is detected as a voltage signal by the resistor 21, and a voltage signal corresponding to the charging current is converted into a divided voltage by the resistor 22 and the resistor 23. Accordingly, the divided voltage (waveform (6)) by the resistor 22 and the resistor 23 is highest when the first and second semiconductor switches 4 and 7 are turned on, that is, when the charging current is 0, and the voltage is increased with time. As the charging current during the off operation of the first and second semiconductor switches 4 and 7 increases, the waveform becomes lower. This is because when the power is turned on, the ON time width of the first and second semiconductor switches 4 and 7 is short, and the charging current when the first and second semiconductor switches 4 and 7 are OFF is also small. In addition, the ON time width is long, and the charging current at OFF is also large. Note that the on-time width becomes constant as time passes, so that the charging current at the time of off also becomes constant.

  In the reference current setting unit 24, a reference charging current for charging the power capacitor 3 when the first and second semiconductor switches 4 and 7 are turned off is set in advance. The reference current setting unit 24 sets the reference charging current. A set voltage (waveform (7)) corresponding to the reference charging current is generated. The constant current control error amplifying circuit 25 includes a set voltage (waveform (7)) corresponding to the reference charging current set in the reference current setting unit 24 and a divided voltage (corresponding to the charging current by the resistors 22 and 23 ( The waveform (6)) is compared, and when the divided voltage exceeds the set voltage, no signal is output, and when the divided voltage is equal to or lower than the set voltage, a signal is output (waveform (8)). This signal output (waveform (8)) increases in height over time, and finally has a constant height.

  The second comparison circuit 19 compares the triangular wave (waveform (3)) from the triangular wave generation circuit 15 with the signal output (waveform (8)) from the constant current control error amplification circuit 25, and the triangular wave is equal to or higher than the signal output. A control pulse (waveform (10)) corresponding to the period is generated. The control pulse (waveform (10)) is wider than the control pulse (waveform (4)) from the second comparison circuit 16 when the power is turned on, and becomes narrower with time. ), And finally the area becomes constant. That is, when the power is turned on, a control pulse (waveform (10)) is generated in which the ON time width of the first and second semiconductor switches 4 and 7 is long, and the ON time width gradually decreases with time and becomes constant at the end. To do. With the control pulse having a constant on-time width, the charging current of the power capacitor 3 can be made the reference charging current.

  This control pulse (waveform (10)) is output to the AND circuit 20, and a logical product with the control pulse (waveform (4)) generated from the first comparison circuit 16 is obtained, and a control pulse corresponding to the logical product is obtained. By controlling the operations of the first and second semiconductor switches 4 and 7 based on (waveform (5)), immediately after the power is turned on, control according to the control pulse (waveform (4)) is performed through the AND circuit 20. A pulse (waveform (5)) is supplied to the first and second semiconductor switches 4 and 7, thereby suppressing an inrush current to the power capacitor 3 when the power is turned on. The second semiconductor switches 4 and 7 and the reactor 6 can be protected, and then a control pulse (waveform (5)) corresponding to the control pulse (waveform (10)) is sent to the first and second semiconductor switches 4 and 4. To 7 Is, thereby, it is possible to make the charging current of the power capacitor 3 becomes the reference charge current.

  FIG. 5 is a configuration diagram showing an example of application to a boost converter in hybrid power generation. Hybrid power generation by a combination of a wind power generator and a solar electric machine is, for example, as shown in FIG. 5, and a boosting converter used for this converts a DC voltage into an AC voltage that is a commercial power supply. Output to a DC / AC inverter. For this reason, in order to integrate the outputs of multiple generators and derive the optimum output, the output of the boost converter applies a constant current output (current source) instead of a constant voltage output (voltage source). Therefore, when the power capacitor charging apparatus in the second embodiment is applied to such a boost converter for hybrid power generation, the requirement can be satisfied effectively.

  As described above, according to the second embodiment, in the AND circuit 20, the ON time widths of the first and second semiconductor switches 4 and 7 generated from the first comparison circuit 16 immediately after the power is turned on. By operating the first and second semiconductor switches 4 and 7 with a control pulse that is short and gradually increases the on-time width with time, the inrush current to the power capacitor 3 at the time of power-on is suppressed. The power capacitor 3, the first and second semiconductor switches 4, 7 and the reactor 6 are protected, and the size and the price are reduced. Further, by operating the first and second semiconductor switches 4 and 7 with the control pulse generated from the second comparison circuit 19, the charging current of the power capacitor 3 can be made the reference charging current. it can.

Embodiment 3 FIG.
FIG. 6 is a circuit diagram showing a power capacitor charging apparatus according to Embodiment 3 of the present invention. In FIG. 6, an OR circuit 26 outputs a signal output from the charge voltage control error amplifying circuit 18 and a constant current control. The sum total with the signal output from the error amplifier circuit 25 is taken, and the sum is outputted to the negative terminal of the second comparison circuit 19.
The start switch 27 is connected between both terminals of the control capacitor 12 and is turned on in conjunction with the discharge of the power capacitor 3. Other configurations are the same as those in FIGS. 1 and 3.

Next, the operation will be described.
FIG. 7 is a waveform diagram showing the operation of the charging apparatus for the power capacitor according to the third embodiment of the present invention, and will be described with reference to FIG. 7 together with FIG.
In the third embodiment, the first and second semiconductor switches 4 and 7 have short on-time widths when the power is turned on as shown in the first and second embodiments, and the on-time gradually increases with time. The first chopper control circuit that generates a control pulse that increases the width and the first chopper control circuit shown in the first embodiment when the charging voltage of the power capacitor 3 reaches a preset target charging voltage. And the second chopper control circuit for generating a control pulse for stopping the operation of the second semiconductor switches 4 and 7, and the first and second semiconductor switches 4 and 7 shown in the second embodiment. This is a combination of a third chopper control circuit that generates a control pulse such that the charging current charged in the power capacitor 3 during the off operation becomes the reference charging current.

In FIG. 6, the OR circuit 26 adds the signal output (waveform (13)) from the charge voltage control error amplifier circuit 18 and the signal output (waveform (8)) from the constant current control error amplifier circuit 25. (Waveform (9)) is taken and the sum is output to the negative terminal of the second comparison circuit 19.
The second comparison circuit 19 compares the triangular wave (waveform (3)) from the triangular wave generation circuit 15 with the signal output (waveform (9)) from the OR circuit 26, and according to a period in which the triangular wave is longer than the signal output. A control pulse (waveform (10)) is generated. This control pulse (waveform (10)) has a long on-time width of the first and second semiconductor switches 4 and 7 when the power is turned on, gradually decreases the on-time width as time passes, and becomes constant at the end. When the charging voltage of the power capacitor 3 reaches a preset target charging voltage, the generation is stopped.

  As a result, the inrush current to the power capacitor 3 when the power is turned on can be suppressed, and the power capacitor 3, the first and second semiconductor switches 4, 7 and the reactor 6 can be protected. 3 charging current can be the reference charging current. Further, when the charging voltage of the power capacitor 3 reaches a preset target charging voltage, the operation of the first and second semiconductor switches 4 and 7 is stopped, and the charging voltage of the power capacitor 3 is changed to the target charging voltage. Can match.

When the power capacitor charging device according to the third embodiment is used as, for example, a closing circuit for a vacuum circuit breaker used for short circuit protection or switching of a high voltage circuit or a power supply device for driving a breaking coil, When a coil or a cut-off coil is used, the power capacitor 3 is discharged and the charging voltage becomes 0 V. Therefore, it is necessary to charge the power capacitor 3 again.
If the charging voltage of the power capacitor 3 decreases, the charging voltage (waveform (12)) of the power capacitor 3 from the charging voltage detection line connected to the high potential line of the power capacitor 3 decreases. The signal output (waveform (13)) from the control error amplifier circuit 18 is stopped, the first and second semiconductor switches 4 and 7 resume their operations, and the charging of the power capacitor 3 is resumed.

  At this time, the start switch 27 is turned on by a signal interlocked with the completion of the discharge of the power capacitor 3 such as a signal at the time of driving the closing coil and the breaking coil of the vacuum circuit breaker, thereby charging the control capacitor 12 with a charge. When the control capacitor 12 is charged again, a divided voltage (waveform (2)) that gradually decreases after rising is generated, and the first and second semiconductor switches 4, 4 are turned on when the power is turned on. 7 has a short on-time width, and a control pulse is generated so that the on-time width gradually becomes longer with the passage of time. As a result, the inrush current to the power capacitor 3 when the control capacitor 12 is charged again is reduced. Therefore, the power capacitor 3, the first and second semiconductor switches 4, 7 and the reactor 6 can be protected.

  As described above, according to the third embodiment, in the AND circuit 20, the ON time width of the first and second semiconductor switches 4 and 7 generated from the first comparison circuit 16 immediately after the power is turned on. By operating the first and second semiconductor switches 4 and 7 with a control pulse that is short and gradually increases the on-time width with time, the inrush current to the power capacitor 3 at the time of power-on is suppressed. The power capacitor 3, the first and second semiconductor switches 4, 7 and the reactor 6 are protected, and the size and price are reduced. Further, when the charging voltage of the power capacitor 3 reaches the target charging voltage by the control pulse generated from the second comparison circuit 19, the operation of the first and second semiconductor switches 4 and 7 is stopped, and the power The charging voltage of the capacitor 3 can be set to the target charging voltage. Further, by operating the first and second semiconductor switches 4 and 7 with the power capacitor 3 by the control pulse generated from the second comparison circuit 19, the charging current of the power capacitor 3 becomes the reference charging current. Can be.

  Further, when the charging voltage does not satisfy the preset target charging voltage due to the discharge of the power capacitor 3, a control pulse is generated so as to operate the first and second semiconductor switches 4 and 7, and the control pulse is generated. In conjunction with the occurrence of this, a control pulse is generated in which the on-time width of the first and second semiconductor switches 4 and 7 is short and the on-time width gradually increases as time elapses. It can be recharged according to the discharge. Further, even during the recharging, the inrush current to the power capacitor 3 is suppressed, the power capacitor 3, the first and second semiconductor switches 4, 7 and the reactor 6 are protected, and the size and cost are reduced. Realize. Furthermore, the charging voltage of the power capacitor 3 can be set to the target charging voltage.

  The start switch 27 according to the third embodiment may be applied to the power capacitor charging device according to the first embodiment, and the start switch 27 is not limited to a mechanical contact. It may be a semiconductor switch.

  In the power capacitor charging apparatus according to the first to third embodiments, the power supply for the boost chopper circuit and the control circuit power supply circuit 11 is shared by the AC power supply. In many cases, a DC battery is always connected and is an uninterruptible power supply. In this case, the control circuit power supply circuit 11 may be a DC / DC converter using the DC battery as a power supply.

  Further, in the power capacitor charging apparatus according to the first to third embodiments, the first and second semiconductor switches 4 and 7 are simultaneously turned on / off. As described above, when the first and second semiconductor switches are turned on, a DC power supply is applied to the reactor to accumulate electromagnetic energy, and when the second semiconductor switch is turned off, in addition to the electromagnetic energy accumulated in the reactor If the power supply capacitor is configured to circulate through the rectifier, smoothing capacitor, reactor, diode, and power capacitor path to charge the power capacitor, the power capacitor including the AC power source energy Can be charged.

  Furthermore, the control circuit power supply circuit 11 can use a variable resistor, a digital switch, or the like so that the target charging voltage for charging the capacitor can be seen by the operator and can be operated. Moreover, when the target charging voltage is determined in advance by the charging device, it may be fixed.

  Further, similarly, the reference current setting unit 24 in the second and third embodiments uses a variable resistor, a digital switch, or the like, so that the reference charging current for charging the capacitor is visible to the operator and the operation is performed. Possible forms. Further, when the reference charging current is determined in advance by the charging device, it may be fixed.

It is a circuit diagram which shows the charging device of the capacitor | condenser for electric power by Embodiment 1 of this invention. It is a wave form diagram which shows operation | movement of the charging device of the capacitor | condenser for electric power by Embodiment 1 of this invention. It is a circuit diagram which shows the charging device of the capacitor | condenser for electric power by Embodiment 2 of this invention. It is a wave form diagram which shows the operation | movement of the charging device of the capacitor | condenser for electric power by Embodiment 2 of this invention. It is a block diagram which shows the example of application to the step-up converter in hybrid electric power generation. It is a circuit diagram which shows the charging device of the capacitor | condenser for electric power by Embodiment 3 of this invention. It is a wave form diagram which shows the operation | movement of the charging device of the capacitor | condenser for electric power by Embodiment 3 of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Rectifier (power supply circuit), 2 smoothing capacitor (power supply circuit), 3 power capacitor, 1st semiconductor switch (semiconductor switch), 1st diode, 6 reactor, 7 2nd semiconductor switch (semiconductor switch) ), 8 Second diode, 11 Control circuit power supply circuit, 12 Control capacitor, 13, 21 to 23 Resistance, 14 Power supply, 15 Triangular wave generation circuit, 16 First comparison circuit, 17 Target voltage setting unit, 18 Charging Error control circuit for voltage control, 19 Second comparison circuit, 20 AND circuit, 24 Reference current setting section, 25 Error amplification circuit for constant current control, 26 OR circuit, 27 Start switch.

Claims (2)

A power supply circuit for generating a DC power supply;
Provided between the power supply circuit and the power capacitor, the DC power generated from the power supply circuit is stored as electromagnetic energy in the reactor by turning on the semiconductor switch, and the reactor is turned off by operating the semiconductor switch. A step-up chopper circuit that charges the stored electromagnetic energy to the power capacitor;
A first constant pulse is generated which comprises a time constant circuit by charging the DC power source, and generates a control pulse such that the ON time width of the semiconductor switch is short when the DC power source is turned on and gradually increases with time. A chopper control circuit;
A second chopper control circuit for generating a control pulse for stopping the operation of the semiconductor switch when the charging voltage of the power capacitor reaches a preset target charging voltage;
A fourth chopper control circuit for controlling the operation of the semiconductor switch based on control pulses generated from the first and second chopper control circuits ,
The second chopper control circuit is
A control pulse is generated so as to operate the semiconductor switch when the charging voltage does not satisfy a preset target charging voltage due to the discharging of the power capacitor,
The first chopper control circuit includes:
The time constant circuit is reset in conjunction with generation of a control pulse for resuming the operation of the semiconductor switch by the second chopper control circuit, and the on-time width of the semiconductor switch is short, and the on-time is gradually increased with time. A charging device for a power capacitor, characterized in that a control pulse having a longer width is regenerated . A power supply circuit for generating a DC power supply;
Provided between the power supply circuit and the power capacitor, the DC power generated from the power supply circuit is stored as electromagnetic energy in the reactor by turning on the semiconductor switch, and the reactor is turned off by operating the semiconductor switch. A step-up chopper circuit that charges the stored electromagnetic energy to the power capacitor;
A first constant pulse is generated which comprises a time constant circuit by charging the DC power source, and generates a control pulse such that the ON time width of the semiconductor switch is short when the DC power source is turned on and gradually increases with time. A chopper control circuit;
A second chopper control circuit for generating a control pulse for stopping the operation of the semiconductor switch when the charging voltage of the power capacitor reaches a preset target charging voltage;
A third chopper control circuit for generating a control pulse so that a charging current charged in the power capacitor when the semiconductor switch is turned off becomes a preset reference charging current;
A fourth chopper control circuit for controlling the operation of the semiconductor switch based on a control pulse generated from the first to third chopper control circuits ,
The second chopper control circuit is
A control pulse is generated so as to operate the semiconductor switch when the charging voltage does not satisfy a preset target charging voltage due to the discharging of the power capacitor,
The first chopper control circuit includes:
The time constant circuit is reset in conjunction with generation of a control pulse for resuming the operation of the semiconductor switch by the second chopper control circuit, and the on-time width of the semiconductor switch is short, and the on-time is gradually increased with time. A charging device for a power capacitor, characterized in that a control pulse having a longer width is regenerated .

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