JP4527179B2 - Game machine - Google Patents

Description

  The present invention relates to a gaming machine such as a pachinko gaming machine, a coin gaming machine, or a slot machine in which a game is played in accordance with a player's operation, and more particularly to a gaming machine that gives a predetermined value when a winning occurs.

  As a gaming machine, for example, a game medium such as a game ball is launched into a game area by a launching device, and when a game medium is won in a prize area such as a prize opening provided in the game area, a predetermined number of prize balls are given to the player. Some are paid out. Furthermore, a variable display unit capable of changing the display state is provided, and a predetermined game value is given to the player when the display result of the identification information such as symbols on the variable display unit becomes a predetermined specific display mode. There is something configured as follows.

  Note that the game value is the right that the state of the variable winning ball device provided in the gaming area of the gaming machine is advantageous for a player who is likely to win a ball, or the advantageous state for a player. Or a condition for paying out premium game media as a valuable value is easily established.

  In a pachinko game machine, the combination of a specific display mode with a predetermined display result of a variable display unit that displays special symbols is usually referred to as “big hit”. When a big hit occurs, for example, the big winning opening is opened a predetermined number of times, and the game shifts to a big hit gaming state in which a hit ball is easy to win. And in each open period, if there is a prize for a predetermined number (for example, 10) of the big prize opening, the big prize opening is closed. And the number of times the special winning opening is opened is fixed to a predetermined number (for example, 16 rounds). An opening time (for example, 29.5 seconds) is determined for each opening, and even if the number of winnings does not reach a predetermined number, the big winning opening is closed when the opening time elapses. Further, when a predetermined condition (for example, winning in the V zone provided in the big prize opening) is not established at the time when the big prize opening is closed, the big hit gaming state is ended.

  In such a gaming machine, a speaker is provided and various sound effects are emitted from the speaker as the game progresses in order to enhance the gaming effect. In addition, light emitters such as lamps and LEDs are provided, and these light emitters are turned on and off as the game progresses in order to enhance the gaming effect. Generally, sound control for generating sound effects is performed by game control means for controlling the progress of the game. Further, the lighting / extinguishing control of the light emitter is performed by a game control means for controlling the progress of the game. Then, if the model of the gaming machine is different, the method of generating the sound effect is different, and the pattern of lighting / extinguishing of the lamp and LED is different, so the configuration of the game control means must be changed accordingly. Therefore, if the models are different, it is necessary to redesign the game control means, which increases the design cost.

  In order to avoid such a problem, a sound control board equipped with sound control means is provided separately from a game control board equipped with game control means, or a light emitter control board equipped with light emitter control means is game controlled. It may be provided separately from the substrate, and a control command may be sent from the game control means to the sound control means or the light emitter control means as the game progresses. In addition, a symbol control board is provided in order to perform display control of the above-described variable display unit and the like, and a control command is sent from the game control means to the symbol control means formed on the symbol control board. Hereinafter, each board may be referred to as an electrical component control board. Further, the control means mounted on the electric component control board may be referred to as an electric component control means.

  However, when a sound control board, a light emitter control board, a symbol control board, and the like are provided in addition to the game control board, the game control means must send a control command to each board. Then, the burden of sending the control command of the game control means increases. Since the game control means performs overall control of the game effects of the gaming machine, the greater the burden of sending control commands, the less time is spent on the original game control. As a result, abundant game effects are hindered.

  Therefore, an object of the present invention is to provide a gaming machine that does not increase the burden of sending a control command of the game control means even when the electrical component control means is provided independently of the game control means. .

A gaming machine according to the present invention includes a variable display unit that variably displays a plurality of types of identification information that can identify each of them, and that displays and displays a display result, and when a specific display result is derived and displayed on the variable display unit, A game machine for controlling a specific gaming state advantageous to a player, a game control means for controlling the progress of the game, and an electric part control for controlling a light emitting part and a sound generating part as electric parts provided in the gaming machine And a display control means for controlling the variable display section, wherein the game control means includes a light emitting part, a sound generation part, and a command output means for outputting a command indicating that the variable display part is controlled , and an electrical component The control means can control the light emitting component and the sound generating component based on the command output from the command output means, and the display control means is output from the command output means. The variable display unit can be controlled based on the command, and the command output means derives and displays the display result after starting the variable display of the identification information on the variable display unit only when starting the variable display of the identification information. And a command indicating that the identification information is stopped when the variable display time has elapsed .

According to the present invention, the gaming machine includes an electrical component control unit that controls a light emitting body and a sound generation component as electrical components provided in the gaming machine, and a display control unit that controls the variable display unit, Since the game control means includes command output means for outputting a command indicating that the light emitting part, sound generation part and variable display unit are controlled, the electrical part control means and the display control means are the game control means and Can be prevented from increasing the burden of sending the control command of the game control means.

It is the front view which looked at the pachinko game machine from the front. It is explanatory drawing which shows each board | substrate provided in the back surface of the pachinko gaming machine. It is the rear view which looked at the mechanism board of the pachinko game machine from the back. It is a front view which shows the structure around the intermediate | middle base unit installed in the mechanism board. It is a disassembled perspective view which shows a ball dispensing apparatus. It is a block diagram which shows the circuit structure of a game control board (main board). It is a block diagram which shows the circuit structure in a symbol control board. It is a block diagram which shows the circuit structure in an audio | voice control board. It is a block diagram which shows the circuit structure in a lamp control board. It is a block diagram which shows the component relevant to prize balls, such as a component of a payout control board and a ball payout apparatus. It is a block diagram which shows one structural example of CPU periphery for a power supply monitoring and a power supply backup. It is a block diagram which shows one structural example of a power supply board. It is a flowchart which shows the main process which CPU in a main board | substrate performs. It is a flowchart which shows an initialization process. It is a flowchart which shows a 2 ms timer interruption process. It is a flowchart which shows a game control process. It is a timing diagram which shows the state of the fluctuation | variation of a normal symbol, and the relationship of hit operation. It is a timing diagram showing the relationship between the progress of the game and the variation of the special symbol. It is a timing diagram which shows the relationship between the fluctuation | variation of a special symbol, and a symbol control command. It is explanatory drawing which shows an example of the command form of a symbol control command. It is explanatory drawing which shows an example of the content of the symbol control command. It is a timing diagram which shows an example of the transmission form of a symbol control command. It is explanatory drawing which shows an example of the command form of an audio | voice control command. It is explanatory drawing which shows an example of the content of a voice control command. It is a timing diagram which shows an example of the transmission form of an audio | voice control command. It is explanatory drawing which shows an example of the command form of a lamp control command. It is explanatory drawing which shows an example of the content of a lamp control command. It is a timing diagram which shows an example of the transmission form of a lamp control command. It is explanatory drawing which shows an example of the command form of a payout control command. It is explanatory drawing which shows an example of the content of the payout control command. It is a timing diagram which shows an example of the delivery form of a payout control command. It is a timing diagram which shows the other example of the sending form of a payout control command. It is a flowchart which shows a special symbol process process. It is explanatory drawing which shows the data structure of process data. It is a flowchart which shows the process data / timer setting process subroutine performed by special symbol process processing. It is a flowchart which shows a special symbol process timer setting process. It is a flowchart which shows the output data setting process in a game control process. It is a flowchart which shows the part relevant to prize ball control of switch processing in game control processing. It is a flowchart which shows an example of the winning ball signal process in a game control process. It is a flowchart which shows an example of the winning ball signal process in a game control process. It is a flowchart which shows an example of a data output process. It is a flowchart which shows a command transmission subroutine. It is a flowchart which shows the main process which CPU for audio | voice control performs. It is a flowchart which shows a timer interruption process. It is a flowchart which shows a command reception interruption process. It is explanatory drawing which shows the example of 1 structure of an audio | voice pattern table. It is a flowchart which shows an audio | voice control process. It is a flowchart which shows the main process which CPU for lamp control performs. It is a flowchart which shows a timer interruption process. It is a flowchart which shows a command reception interruption process. It is explanatory drawing which shows the example of 1 structure of a lamp pattern table. It is a flowchart which shows a lamp control process. It is explanatory drawing which shows an example of the lamp and LED control pattern corresponding to pattern data. It is a flowchart which shows an example of a lamp and LED control process. It is a block diagram which shows the other structural example of a main board | substrate and an electrical component control board. It is a block diagram showing a circuit configuration example of an effect control board together with a command transmission part of a main board. It is explanatory drawing which shows the example of 1 structure of the pattern table set to ROM mounted in the production control board. It is a block diagram which shows the other structural example of a main board | substrate and an electrical component control board. It is a block diagram which shows the signal transmission / reception part in a pattern control board and a lamp control board. It is a block diagram which shows the further another structural example of a main board | substrate and an electrical component control board.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
First, the overall configuration of a pachinko gaming machine that is an example of a gaming machine will be described. FIG. 1 is a front view of the pachinko gaming machine 1 as seen from the front. Here, a pachinko gaming machine is shown as an example of a gaming machine, but the present invention is not limited to a pachinko gaming machine and may be, for example, a coin gaming machine or a slot machine.

  As shown in FIG. 1, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape. On the lower surface of the glass door frame 2 is a hitting ball supply tray 3. Under the hitting ball supply tray 3, there are provided an extra ball receiving tray 4 for storing a payout ball overflowing from the hitting ball supply tray 3 and a hitting operation handle (operation knob) 5 for firing the hitting ball. A game board 6 is detachably attached to the rear side of the glass door frame 2. A game area 7 is provided in front of the game board 6.

  Near the center of the game area 7, there is provided a variable display device 8 including a variable display unit 9 for variably displaying a plurality of types of symbols and a variable display 10 using 7 segment LEDs. Further, a passage memory display (ordinary symbol memory display) 41 composed of four LEDs is provided below the variable display 10. In this embodiment, the variable display section 9 has three symbol display areas of “left”, “middle”, and “right”. A passing gate 11 for guiding a hit ball is provided on the side of the variable display device 8. The hit ball that has passed through the passing gate 11 is guided to the start winning opening 14 through the ball outlet 13. In the passage between the passage gate 11 and the ball exit 13, there is a gate switch 12 that detects a hit ball that has passed through the passage gate 11. The winning ball that has entered the start winning opening 14 is guided to the back of the game board 6 and detected by the start opening switch 17. A variable winning ball device 15 that opens and closes is provided below the start winning opening 14. The variable winning ball device 15 is opened by a solenoid 16.

  An open / close plate 20 that is opened by a solenoid 21 in a specific gaming state (big hit state) is provided below the variable winning ball device 15. In this embodiment, the opening / closing plate 20 is a means for opening and closing the special winning opening. Of the winning balls guided from the opening / closing plate 20 to the back of the game board 6, the winning ball entering one (V zone) is detected by the V count switch 22. A winning ball from the opening / closing plate 20 is detected by the count switch 23. At the bottom of the variable display device 8, a start winning memory display 18 having four display units for displaying the number of winning balls that have entered the start winning opening 14 is provided. In this example, with the upper limit being four, each time there is a start prize, the start prize storage display 18 increases the number of lit display units one by one. Then, each time the variable display of the variable display unit 9 is started, the lit display unit is reduced by one.

  The game board 6 is provided with a plurality of winning openings 19, 24, and winning of the game balls to the winning openings 19, 24 is detected by winning opening switches 19a, 24a. Decorative lamps 25 blinking during the game are provided around the left and right sides of the game area 7, and an outlet 26 for absorbing a hit ball that has not won a prize is provided below. Two speakers 27 that emit sound effects are provided on the left and right upper portions outside the game area 7. On the outer periphery of the game area 7, a game effect LED 28a and game effect lamps 28b and 28c are provided.

  In this example, a prize ball lamp 51 is provided in the vicinity of one speaker 27 to be turned on when there is a remaining number of prize balls. In the vicinity of the other speaker 27, a predetermined amount of replenishment balls is stored. A ball-out lamp 52 is provided that lights up when it is below. Further, FIG. 1 also shows a card unit 50 that is installed adjacent to the pachinko gaming machine 1 and enables lending of a ball by inserting a prepaid card.

  The card unit 50 has a usable indicator lamp 151 indicating whether or not it is in a usable state, and when the remaining amount information recorded in the card has a fraction (a number less than 100 yen), the fraction is indicated as a hitting tray. 3, a fraction display switch 152 for displaying on a frequency display LED provided in the vicinity of 3, a connecting table direction indicator 153 indicating which side of the pachinko gaming machine 1 corresponds to the card unit 50, in the card unit 50 Check the card insertion indicator lamp 154 indicating that a card is inserted, the card insertion slot 155 into which a card as a recording medium is inserted, and the mechanism of the card reader / writer provided on the back of the card insertion slot 155. In some cases, a card unit lock 156 is provided for releasing the card unit 50.

  The hit ball fired from the hit ball launching device enters the game area 7 through the hit ball rail, and then descends the game area 7. When the hit ball is detected by the gate switch 12 through the passing gate 11, the display number of the variable display 10 changes continuously. Further, when the hit ball enters the start winning opening 14 and is detected by the start opening switch 17, the symbol in the variable display portion 9 starts to rotate if the variation of the symbol can be started. If it is not in a state where the change of the symbol can be started, the start winning memory is increased by one.

  The rotation of the image in the variable display unit 9 stops when a certain time has elapsed. If the combination of images at the time of the stop is a combination of jackpot symbols, the game shifts to a jackpot gaming state. That is, the opening / closing plate 20 is opened until a predetermined time elapses or a predetermined number (for example, 10) of hit balls wins. When the hit ball enters the specific winning area while the opening / closing plate 20 is opened and is detected by the V count switch 22, a right to continue is generated and the opening / closing plate 20 is opened again. The generation of the continuation right is allowed a predetermined number of times (for example, 15 rounds).

  When the combination of images in the variable display section 9 at the time of stop is a combination of jackpot symbols with probability fluctuations, the probability of the next jackpot increases. That is, it becomes a more advantageous state for the player in a high probability state. Further, when the stop symbol on the variable display 10 is a predetermined symbol (winning symbol), the variable winning ball device 15 is opened for a predetermined time. Further, in the high probability state, the probability that the stop symbol in the variable display 10 becomes a winning symbol is increased, and the opening time and the number of times of opening of the variable winning ball device 15 are increased.

Next, each board | substrate arrange | positioned at the back surface of the pachinko game machine 1 is demonstrated.
As shown in FIG. 2, on the back surface of the pachinko gaming machine 1, a ball storage tank 38 is provided above the mechanism plate in the frame 2 </ b> A, and the pachinko gaming machine 1 is installed above the gaming machine installation island. The game balls are supplied to the ball storage tank 38. The game balls in the ball storage tank 38 pass through the guide basket 39 and reach the ball payout device covered with the case 40A.

  On the back side of the gaming machine, there are installed a variable display control unit 29 for controlling the variable display unit 9, a game control board (main board) 31 on which a game control microcomputer and the like are mounted. Further, a payout control board 37 on which a payout control microcomputer for performing ball payout control and the like, and a hitting ball launching device for hitting a hitting ball into the game area 7 using the rotational force of the motor are installed. Furthermore, a sound for controlling the sound generation from the lamp 27, the game effect LED 28a, the game effect lamps 28b and 28c, the prize ball lamp 51, the ball break lamp 52 and the like, and the speaker 27. A launch control board 91 for controlling the control board 70 and the ball hitting device is also provided.

  Furthermore, a power supply board 910 on which a power supply circuit for generating DC30V, DC21V, DC12V and DC5V is mounted is provided, and a terminal board 160 provided with terminals for outputting various information to the outside of the gaming machine is installed above. Has been. Near the center, an information terminal board (external information output device) 34 having terminals for outputting various information from the main board 31 to the outside of the gaming machine is installed. In FIG. 2, signals from the lamp control board 35 and the sound control board 70 are sent to the speaker 27, game effect LEDs 28a, game effect lamps 28b and 28c, a prize ball lamp 51 and a ball break lamp provided on the frame side. Although the electrical relay board A77 for supplying to 52 is shown, other relay boards are also provided if necessary for signal relay.

  FIG. 3 is a rear view of the mechanism plate of the pachinko gaming machine 1 as seen from the back. The game balls stored in the ball storage tank 38 pass through the guide rod 39, pass through the ball break detectors (ball break switches) 187a and 187b and pass through the ball supply rods 186a and 186b as shown in FIG. The delivery device 97 is reached. The game balls paid out from the ball payout device 97 are supplied to the hitting ball supply tray 3 provided on the front surface of the pachinko gaming machine 1 through the connection port 45. A surplus ball passage 46 communicating with the surplus ball receiving tray 4 provided on the front surface of the pachinko gaming machine 1 is formed on the side of the communication port 45. A lot of premium balls based on the winnings are paid out and the hitting ball supply tray 3 becomes full. Finally, when the game balls reach the contact port 45 and further game balls are paid out, the game balls are surplus via the surplus ball passage 46. It is guided to the ball receiving tray 4. When the game ball is further paid out, the sensing lever 47 presses the full tank switch 48 and the full tank switch 48 is turned on. In this state, the rotation of the stepping motor in the ball dispensing device 97 is stopped, the operation of the ball dispensing device 97 is stopped, and the driving of the ball hitting device 34 is also stopped.

  In order to perform prize ball payout control, signals from a winning opening switch (not shown), the start opening switch 17 and the V count switch 22 are sent to the main board 31. The CPU 56 of the main board 31 knows that a winning corresponding to six prize ball payout has occurred when the start port switch 17 is turned on. Further, when the count switch 23 is turned on, it is known that a winning corresponding to 15 prize ball payouts has occurred. Then, when the winning opening switch is turned on, it is known that a winning corresponding to ten winning ball payouts has occurred. In this embodiment, for example, a game ball won in the winning opening 24 is detected by a winning opening switch 24 a provided in a winning ball flow path from the winning opening 24 and won in the winning opening 19. Is detected by a winning port switch 19a provided in a winning ball flow path from the winning port 19.

  Next, the configuration of the intermediate base unit installed on the mechanism plate 36 will be described. In the intermediate base unit, ball supply rods 186a and 186b and a ball dispensing device 97 are installed. As shown in FIG. 4, connection concave protrusions 182 are formed on the upper and lower sides of the intermediate base unit. The connection concave protrusion 182 connects and fixes the intermediate base unit and the upper base unit and the lower base unit of the mechanism plate 36.

  A passage body 184 is fixed to the upper part of the intermediate base unit. A ball dispensing device 97 is fixed to the lower part of the passage body 184. The passage body 184 has payout ball passages 186a and 186b for flowing down two rows of game balls whose flow direction has been changed to the left and right directions by a curve rod 174 (see FIG. 3). On the upstream side of the payout ball passages 186a, 186b, ball break switches 187a, 187b are installed. The ball cut switches 187a and 187b detect the presence or absence of a game ball in the payout ball passages 186a and 186b. When the ball cut switches 187a and 187b no longer detect a game ball, The rotation of the ball (not shown in FIG. 4) is stopped and the ball payout is immobilized, and the ball break lamp 52 enters the ball break notification state.

  The ball break switches 187a and 187b are locked by locking pieces 188 at positions where it can be detected that about 27 to 28 game balls are present in the payout ball passages 186a and 186b.

  The central portion of the passage body 184 is formed in a shape that curves to the left and right so as to weaken the ball pressure of the game ball flowing down inside. A stop hole 189 is formed between the payout ball passages 186a and 186b. A mounting boss provided in the intermediate base unit is fitted into the back surface of the stop hole 189. In this state, the set screw is screwed, and the passage body 184 is fixed to the intermediate base unit. The passage body 184 can be aligned by the locking protrusion 185 provided on the intermediate base unit before being screwed.

  Below the passage body 184, a ball stopper 190 is provided for supplying the game ball to the ball payout device 97 and stopping the supply of the game ball to the ball payout device 97 in the event of a failure. A ball payout device 97 installed below the ball stopper 190 is housed in a rectangular parallelepiped case 198. Projections are provided at four places on the left and right sides of the case 198. The lower end of the case 198 is fitted into the elastic engagement piece provided at the lower part of the intermediate base unit in a state where each protrusion is engaged with the positioning protrusion provided on the intermediate base unit.

  FIG. 5 is an exploded perspective view of the ball dispensing device 97. The configuration and operation of the ball dispensing device 97 will be described with reference to FIG. In the ball dispensing device 97 in this embodiment, a stepping motor (dispensing motor) 289 rotates a screw 288 to pay out pachinko balls one by one. Note that the ball payout device 97 pays out not only a prize ball based on a prize but also a game ball to be lent.

  As shown in FIG. 5, the ball dispensing device 97 has two cases 198a and 198b. Engagement protrusions 280 are provided at two positions on the left and right sides of the cases 198a and 198b. In addition, ball supply paths 281a and 281b are formed in the cases 198a and 198b, respectively. The ball supply paths 281a and 281b have curved surfaces 282a and 282b, and ball feed horizontal paths 284a and 284b are formed below the ends of the curved surfaces 282a and 282b. Furthermore, ball discharge paths 283a and 283b are formed at the ends of the ball feed horizontal paths 284a and 284b.

  The ball supply paths 281a and 281b, the ball feed horizontal paths 284a and 284b, and the ball discharge paths 283a and 283b are formed in front of partition walls 295a and 295b that divide the cases 198a and 198b in the front-rear direction. Further, a ball pressure buffering member 285 is sandwiched between the cases 198a and 198b in front of the partition walls 295a and 295b. The ball pressure buffering member 285 distributes the balls supplied to the ball dispensing device 97 to the left and right sides and guides the balls to the ball supply paths 281a and 281b.

  In addition, below the ball pressure buffering member 285, a payout motor position sensor using a light emitting element (LED) 286 and a light receiving element (not shown) is provided. The light emitting element 286 and the light receiving element are provided at a predetermined interval. The tip of the screw 288 is inserted within this interval. The ball pressure buffering member 285 is completely housed and fixed inside the cases 198a and 198b.

  Screws 288 that are rotated by a payout motor 289 are disposed in the ball feed horizontal paths 284a and 284b. The payout motor 289 is fixed to the motor fixing plate 290, and the motor fixing plate 290 is fitted into fixing grooves 291a and 291b formed at the rear of the partition walls 295a and 295b. In this state, the motor shaft of the payout motor 289 protrudes in front of the partition walls 295a and 295b, so that the screw 288 is fixed in front of the protrusion. On the outer periphery of the screw 288, there is provided a spiral projection 288a for moving the game ball placed on the ball feed horizontal paths 284a, 284b forward by the rotation of the payout motor 289.

  A recess is formed at the tip of the screw 288 so as to accommodate the light emitting element 286, and two notches 292 are formed 180 degrees apart from each other on the outer periphery of the recess. Therefore, during one rotation of the screw 288, the light from the light emitting element 286 is detected twice by the light receiving element through the notch 292.

  In other words, the payout motor position sensor including the light emitting element 286 and the light receiving element is for stopping the screw 288 at a fixed position, and detects that the payout operation has been performed. The wiring from the light emitting element 286, the light receiving element, and the payout motor 289 are collectively drawn out from a drawing hole formed below the rear portions of the cases 198a and 198b and connected to the connector.

  When the payout motor 289 rotates in a state where the game ball is placed on the ball feed horizontal paths 284a and 284b, the game ball is moved forward on the ball feed horizontal paths 284a and 284b by the spiral protrusion 288a of the screw 288. Moving. And finally, it falls to the ball discharge paths 283a and 283b from the end of the ball feed horizontal paths 284a and 284b. At this time, the left and right ball feed horizontal paths 284a and 284b are alternately dropped. That is, each time the screw 288 is rotated halfway, one game ball falls from one side. Therefore, each time one game ball falls, the light from the light emitting element 286 is detected by the light receiving element.

  As shown in FIG. 4, a ball sorting member 311 is provided below the ball dispensing device 97. The ball sorting member 311 is driven by the sorting solenoid 310. For example, when the solenoid 310 is on, the ball sorting member 311 falls to the right, and when it is off, the ball sorting member 311 falls to the left. Below the sorting solenoid 310, a prize ball count switch 301A and a ball lending count switch 301B by proximity switches are provided. At the time of a winning ball based on winning, the ball sorting member 311 falls to the right side, and balls from the ball discharge paths 283a and 283b both pass the winning ball count switch 301A. Further, at the time of lending a ball, the ball sorting member 311 falls to the left side, and balls from the ball discharge paths 283a and 283b both pass the ball lending count switch 301B. Accordingly, the ball payout device 97 can change the payout flow path between the winning ball and the ball lending and pay out a predetermined number of game media.

  In this way, by providing the ball sorting member 311, the ball that has fallen through the two ball passages passes only one of the prize ball count switch 301 </ b> A and the ball lending count switch 301 </ b> B. Accordingly, the number of winning balls or the number of balls lent can be immediately grasped from the detection outputs of the winning ball count switch 301A and the ball lending count switch 301B without determining whether the ball is a winning ball or a lending ball.

  FIG. 6 is a block diagram illustrating an example of a circuit configuration in the main board 31. 6 also shows a payout control board 37, a lamp control board 35, a sound control board 70, a launch control board 91, and a symbol control board 80. The main circuit board 31 includes a basic circuit 53 for controlling the pachinko gaming machine 1 according to a program, a gate switch 12, a start port switch 17, a V count switch 22, a count switch 23 winning port switches 19a and 24a, a full switch 48 and a prize. A switch circuit 58 for supplying a signal from the ball count switch 301A to the basic circuit 53, and a solenoid circuit 59 for driving the solenoid 16 for opening / closing the variable winning ball apparatus 15 and the solenoid 21 for opening / closing the opening / closing plate 20 in accordance with a command from the basic circuit 53. And are installed.

  Further, according to the data given from the basic circuit 53, the jackpot information indicating the occurrence of the jackpot, the starting information indicating the number of starting winning balls used for starting the image display of the variable display unit 9, and the probability change indicating that the probability variation has occurred. An information output circuit 64 for outputting information and the like to a host computer such as a hall management computer is included.

  The basic circuit 53 includes a ROM 54 that stores a game control program and the like, a RAM 55 that is an example of storage means used as a work memory, a CPU 56 that performs a control operation in accordance with a control program, and an I / O port unit 57. In this embodiment, the ROM 54 and RAM 55 are built in the CPU 56. That is, the CPU 56 is a one-chip microcomputer. The one-chip microcomputer only needs to incorporate at least the RAM 55, and the ROM 54 and the I / O port unit 57 may be externally attached or built-in. The I / O port unit 57 is a terminal capable of inputting and outputting information in the microcomputer.

Further, the main board 31 includes an initial reset circuit 65 for resetting the basic circuit 53 when power is turned on, and an address signal supplied from the basic circuit 53 to decode any I / O port 57. An address decode circuit 67 for outputting a signal for selecting the / O port is provided.
Note that there is also switch information input to the main board 31 from the ball dispensing device 97, but these are omitted in FIG.

  A ball hitting device for hitting and launching a game ball is driven by a drive motor 94 controlled by a circuit on the launch control board 91. Then, the driving force of the drive motor 94 is adjusted according to the operation amount of the operation knob 5. That is, the circuit on the firing control board 91 is controlled so that the hit ball is fired at a speed corresponding to the operation amount of the operation knob 5.

  In this embodiment, the lamp control means mounted on the lamp control board 35 controls the display of the start memory indicator 18, the gate passing memory indicator 41 and the decoration lamp 25 provided on the game board. At the same time, display control of the game effect lamps / LEDs 28a, 28b, 28c, the prize ball lamp 51 and the ball-out lamp 52 provided on the frame side is performed. Here, the lamp control means is an example of a light emitter control means. The display control of the variable display unit 9 for variably displaying the special symbol and the variable display 10 for variably displaying the normal symbol is performed by a symbol control means (display control means) mounted on the symbol control board 80.

  The decorative lamp 25 and the game effect lamps / LEDs 28a, 28b, and 28c are variously controlled in a decorative manner as the game progresses. Further, the start memory indicator 18 and the gate passing memory indicator 41 are light emitters for informing the player of the reserved number. Furthermore, the prize ball lamp 51 and the ball break lamp 52 are also light emitters for notifying the player and the game clerk that there is an unwinned ball and the ball has run out. In this embodiment, lamp control means provided separately from the game control means performs display control of the decoration lamp 25 and the game effect lamps / LEDs 28a, 28b, 28c, and is provided for information notification. The display control of the start memory display 18, the gate passing memory display 41, the prize ball lamp 51 and the ball break lamp 52 is also performed. Therefore, the game control means does not have to perform specific lighting / extinguishing control of the light emitters provided in the gaming machine, and the control burden on the light emitter control of the game control means is greatly reduced.

  FIG. 7 shows the circuit configuration in the symbol control board 80, LCD (Liquid Crystal Display) 82, the variable display 10, which is an example of realization of the variable display unit 9, and output ports (ports A and B) 571 of the main board 31. , 572 and output buffer circuits 63A and 63B. The output port 571 outputs 8-bit data, and the output port 572 outputs a 1-bit strobe signal (INT signal).

  The symbol control CPU 101 operates according to a program stored in the control data ROM 102. When an INT signal is input from the main board 31 via the noise filter 107 and the input buffer circuit 105B, the symbol control is performed via the input buffer circuit 105A. Receive commands. As the input buffer circuits 105A and 105B, for example, general-purpose ICs 74HC540 and 74HC14 can be used. When the symbol control CPU 101 does not include an I / O port, an I / O port is provided between the input buffer circuits 105A and 105B and the symbol control CPU 101.

  Then, the symbol control CPU 101 performs display control of the screen displayed on the LCD 82 in accordance with the received symbol control command. Specifically, a command according to the symbol control command is given to the VDP 103. The VDP 103 reads necessary data from the character ROM 86. The VDP 103 generates image data to be displayed on the LCD 82 according to the input data, and outputs R, G, B signals and a synchronization signal to the LCD 82.

  7 also shows a reset circuit 83 for resetting the VDP 103, an oscillation circuit 85 for supplying an operation clock to the VDP 103, and a character ROM 86 for storing frequently used image data. The frequently used image data stored in the character ROM 86 is, for example, a person, animal, or an image made up of characters, figures, symbols, or the like displayed on the LCD 82.

  The input buffer circuits 105A and 105B can pass signals only in the direction from the main board 31 toward the symbol control board 80. Therefore, there is no room for signals to be transmitted from the symbol control board 80 side to the main board 31 side. That is, the input buffer circuits 105A and 105B constitute irreversible information input means together with the input ports. Even if the tampering is added to the circuit in the symbol control board 80, the signal output by the tampering is not transmitted to the main board 31 side.

  The outputs of the output ports 571 and 572 may be output to the symbol control board 80 as they are. However, by providing output buffer circuits 63A and 63B capable of transmitting signals only in one direction, the main board 31 and the symbol control board 80 are provided. One-way signal transmission can be made more reliable. That is, the output buffer circuits 63A and 63B constitute irreversible information output means together with the output ports.

  In addition, for example, a three-terminal capacitor or ferrite bead is used as the noise filter 107 that cuts off the high-frequency signal. However, even if noise is placed between the boards in the symbol control command due to the presence of the noise filter 107, the influence is removed. Is done. A noise filter may be provided also on the output side of the buffer circuits 63A and 63B of the main board 31.

  FIG. 8 is a block diagram showing a configuration example of the voice control command signal transmission portion of the main board 31 and the voice control board 70. In this embodiment, a voice control command for instructing voice output from the speaker 27 provided outside the gaming area 7 is output from the main board 31 to the voice control board 70 as the game progresses.

  As shown in FIG. 8, the voice control command is output from the output ports (output ports C and D) 573 and 574 of the I / O port unit 57 in the basic circuit 53. The output port 573 outputs 8-bit data, and the output port 574 outputs a 1-bit INT signal. In the audio control board 70, each signal from the main board 31 is input to the audio control CPU 701 via the input buffer circuits 705 and 705B. When the audio control CPU 701 does not have an I / O port, an I / O port is provided between the input buffer circuits 705A and 705B and the audio control CPU 701.

  Then, for example, a voice synthesis circuit 702 using a digital signal processor generates voice and sound effects according to instructions from the voice control CPU 701 and outputs them to the volume switching circuit 703. The volume switching circuit 703 sets the output level of the audio control CPU 701 to a level corresponding to the set volume and outputs the level to the volume amplification circuit 704. The volume amplifier circuit 704 outputs the amplified audio signal to the speaker 27.

  As the input buffer circuits 705A and 705B, for example, 74HC540 and 74HC14, which are general-purpose CMOS-ICs, are used. The input buffer circuits 705A and 705B can pass signals only in the direction from the main board 31 toward the audio control board 70. Therefore, there is no room for signals to be transmitted from the voice control board 70 side to the main board 31 side. Therefore, even if unauthorized modification is added to the circuit in the voice control board 70, a signal output by the unauthorized modification is not transmitted to the main board 31 side. A noise filter may be provided on the input side of the input buffer circuits 705A and 705B.

  In the main board 31, buffer circuits 67A and 67B are provided outside the output ports 573 and 574. As the buffer circuits 67A and 67B, for example, general-purpose CMOS-ICs 74HC250 and 74HC14 are used. According to such a configuration, since a signal input from the outside to the inside of the main board 31 is blocked, it is possible to further reliably eliminate a signal line from which a signal may be given from the voice control board 70 to the main board 31. be able to. A noise filter may be provided on the output side of the buffer circuits 67A and 67B.

  FIG. 9 is a block diagram showing signal transmission / reception portions in the main board 31 and the lamp control board 35. In this embodiment, the game effect LED 28a, the game effect lamps 28b and 28c provided on the outside of the game area 7, and the decoration lamp 25 provided on the game board are turned on / off, and the prize ball lamp 51 and the ball are out of play. A lamp control command indicating turning on / off of the lamp 52 is output from the main board 31 to the lamp control board 35. Further, a lamp control command indicating the number of lighting of the start memory display 18 and the gate passing memory display 41 is also output from the main board 31 to the lamp control board 35.

  As shown in FIG. 9, the lamp control command related to the lamp control is output from the output ports (output ports E and F) 575 and 576 of the I / O port unit 57 in the basic circuit 53. The output port 575 outputs 8-bit data, and the output port 576 outputs a 1-bit INT signal. In the lamp control board 35, a control command from the main board 31 is input to the lamp control CPU 351 via the input buffer circuits 355A and 355B. When the lamp control CPU 351 does not include an I / O port, an I / O port is provided between the input buffer circuits 355A and 355B and the lamp control CPU 351.

  In the lamp control board 35, the lamp control CPU 351 performs the game effect LED 28 a and the game effect lamp according to the turn-on / off pattern of the game effect LED 28 a, the game effect lamps 28 b and 28 c and the decoration lamp 25 defined according to each control command. 28b, 28c, and the decoration lamp 25 are turned on / off signals. The on / off signal is output to the game effect LED 28a, the game effect lamps 28b and 28c, and the decoration lamp 25. The on / off pattern is stored in the built-in ROM or external ROM of the lamp control CPU 351.

  In the main board 31, the CPU 56 outputs a control command for instructing the lighting of the prize ball lamp 51 when there is an unpaid prize ball remaining in the stored contents of the RAM 55, and the above-mentioned payout ball passage 186 a, When the ball break switch 187a, 187b (see FIG. 4) installed upstream of 186b does not detect a game ball, a control command for instructing lighting of the ball break lamp 52 is output. In the lamp control board 35, each control command is input to the lamp control CPU 351 via the input buffer circuits 355A and 355B. The lamp control CPU 351 turns on / off the prize ball lamp 51 and the ball-out lamp 52 in accordance with these control commands. The on / off pattern is stored in the built-in ROM or external ROM of the lamp control CPU 351.

  Further, the lamp control CPU 351 outputs a light on / off signal to the start memory display 18 and the gate passage memory display 41 in accordance with the control command.

  As the input buffer circuits 355A and 355B, for example, 74HC540 and 74HC14 which are general-purpose CMOS-ICs are used. The input buffer circuits 355A and 355B can pass signals only in the direction from the main board 31 toward the lamp control board 35. Therefore, there is no room for signals to be transmitted from the lamp control board 35 side to the main board 31 side. Even if unauthorized modification is added to the circuit in the lamp control board 35, the signal output by the unauthorized modification is not transmitted to the main board 31 side. Note that a noise filter may be provided on the input side of the input buffer circuits 355A and 355B.

  In the main board 31, buffer circuits 62A and 62B are provided outside the output ports 575 and 576. As the buffer circuits 62A and 62B, for example, general-purpose CMOS-ICs 74HC250 and 74HC14 are used. According to such a configuration, since a signal input from the outside to the inside of the main board 31 is blocked, a signal line that can give a signal from the lamp control board 70 to the main board 31 is further reliably eliminated. be able to. A noise filter may be provided on the output side of the buffer circuits 62A and 62B.

  FIG. 10 is a block diagram showing components related to the prize ball, such as components of the payout control board 37 and the ball payout device 97. As shown in FIG. 10, the detection signal from the full switch 48 is input to the I / O port 57 of the main board 31 via the relay board 71. The full tank switch 48 is a switch for detecting the full tank of the surplus ball receiving tray 4.

  A detection signal from the ball break switch 187 (187a, 187b) is input to the I / O port 57 of the main board 31 via the relay board 72 and the relay board 71. The ball break switch 187 is a switch that detects the presence or absence of a game ball in the payout ball passage.

  When there is a win, a payout control command indicating the number of winning balls is input from the main board 31 to the payout control board 37. A payout control command indicating the number of winning balls is input to the I / O port 372a via the input buffer circuit 373A. An INT signal is input to the interrupt terminal of the CPU via the input buffer circuit 373B. Each buffer in the input buffer circuits 373A and 373B can pass a signal only in the direction from the main board 31 toward the payout control board 37. Therefore, there is no room for signals to be transmitted from the payout control board 37 side to the main board 31 side. Even if unauthorized modification is added to the circuit in the payout control board 37, a signal output by the unauthorized modification is not transmitted to the main board 31 side. In the main board 31, buffer circuits 68A and 68B are provided outside the output ports 577A and 577B for outputting the payout control command. According to such a configuration, since a signal input from the outside to the inside of the main board 31 is blocked, a signal line in which a signal may be given from the payout control board 37 to the main board 31 is more reliably eliminated. be able to.

  The CPU 56 of the main board 31 instructs the ball payout prohibition when the detection signal from the ball break switch 187 indicates a ball shortage state or when the detection signal from the full tank switch 48 indicates a full tank state. Send out a payout control command. When the payout control command for instructing the ball payout prohibition is received, the payout control CPU 371 of the payout control board 37 stops the ball payout process.

  Further, a detection signal from the prize ball count switch 301 </ b> A is also input to the I / O port 57 of the main board 31 via the relay board 72 and the relay board 71. Further, the prize ball count switch 301A and the ball lending count switch 301B are provided in the payout mechanism portion of the ball payout device 97, and detect the game balls actually paid out.

  When there is a win, a payout control command indicating the number of winning balls is input to the payout control board 37 from the output ports (ports G and H) 577A and 577B of the main board 31. The output port 577 outputs 8-bit data, and the output port 578 outputs a 1-bit strobe signal (INT signal). A payout control command indicating the number of winning balls is input to the I / O port 372a via the input buffer circuit 373. The payout control CPU 371 inputs a payout control command via the I / O port 372a, and drives the ball payout device 97 in accordance with the payout control command to perform prize ball payout. In this embodiment, the payout control CPU 371 is a one-chip microcomputer and incorporates at least a RAM.

  The payout control CPU 371 outputs a ball lending number signal indicating the number of lending balls to the terminal board 160 and a buzzer driving signal to the buzzer board 75 via the output port 372g. A buzzer is mounted on the buzzer substrate 75. Further, an error signal is output to the error display LED 374 via the output port 372e.

  Further, the detection signal of the detection signal of the prize ball count switch 301 </ b> A is input to the input port 372 b of the payout control board 37 via the relay board 72. A drive signal from the payout control board 37 to the payout motor 289 is transmitted to the payout motor 289 in the prize ball mechanism portion of the ball payout device 97 via the output port 372c and the relay board 72. The drive signal from the dispensing control board 37 to the sorting solenoid 310 is transmitted to the sorting solenoid 310 of the ball dispensing apparatus 97 via the output port 372d and the relay board 72.

  The card unit 50 is equipped with a card unit control microcomputer. Further, the card unit 50 is provided with a fraction display switch 152, a connecting table direction indicator 153, a card insertion display lamp 154, and a card insertion slot 155 (see FIG. 1). The balance display board 74 is connected with a frequency display LED, a ball lending switch, and a return switch provided in the vicinity of the hitting ball supply tray 3.

  A ball lending switch signal and a return switch signal are given from the balance display board 74 to the card unit 50 via the payout control board 37 in accordance with the player's operation. Further, a card balance display signal indicating a prepaid card balance and a ball lending display signal are given to the balance display board 74 from the card unit 50 via the payout control board 37. Between the card unit 50 and the payout control board 37, a unit operation signal (BRDY signal), a ball lending request signal (BRQ signal), a ball lending completion signal (EXS signal), and a pachinko machine operation signal (PRDY signal) are I / O. Exchanged via port 372f.

  When the power of the pachinko gaming machine 1 is turned on, the payout control CPU 371 of the payout control board 37 outputs a PRDY signal to the card unit 50. When a card is received in the card unit 50, the ball lending switch is operated and a ball lending switch signal is input, the card unit control microcomputer outputs a BRDY signal to the payout control board 37. When a predetermined delay time elapses from this point, the card unit control microcomputer outputs a BRQ signal to the payout control board 37. Then, the payout control CPU 371 of the payout control board 37 turns on the EXS signal in accordance with the BRQ signal and drives the payout motor 289 to pay out a predetermined number of lending balls to the player. When the payout is completed, the payout control CPU 371 sets the EXS signal to the card unit 50 in the OFF state.

  As described above, all signals from the card unit 50 are input to the payout control board 37. Accordingly, with respect to the ball lending control, no signal is input from the card unit 50 to the main board 31, and there is no room for an illegal signal input from the card unit 50 side to the basic circuit 53 of the main board 31. The main board 31 and the payout control board 37 are mounted with driver circuits for driving solenoids, motors and lamps, but these circuits are omitted in FIG.

  In this embodiment, the RAM in the main board 31 and the payout control board 37 is backed up by a backup power source. That is, even if power supply to the gaming machine is stopped, the contents of the RAM are stored for a predetermined period. When each CPU detects a decrease in power supply voltage, it performs a predetermined process and waits for power recovery. Further, when the power is turned on, each CPU restores the state before the power is turned off based on the stored data when the data is stored in the RAM. Each input port shown in FIG. 10 may be built in the payout control CPU 371.

  FIG. 11 is a block diagram showing a configuration example around the CPU 56 of the main board 31 for power supply monitoring and power supply backup. As shown in FIG. 11, the voltage drop signal from the first power supply monitoring circuit (first power supply monitoring means) is connected to the non-maskable interrupt terminal (NMI terminal) of the CPU 56. The first power supply monitoring circuit is a circuit that monitors the voltage of any one of the various DC power supplies used by the gaming machine and detects a power supply voltage drop. In this embodiment, the power supply voltage of VSL is monitored, and a low level voltage drop signal is generated when the voltage value falls below a predetermined value. VSL is the largest DC voltage used in gaming machines, and is + 30V in this example. Therefore, the CPU 56 can confirm the occurrence of power interruption by the interrupt process. In this embodiment, the first power supply monitoring circuit is mounted on a power supply board described later.

  Although the initial reset circuit 65 is also shown in FIG. 11, in this embodiment, the initial reset circuit 65 also serves as a second power supply monitoring circuit (second power supply monitoring means). That is, when the power is turned on, the reset IC 651 sets the output to the low level for a predetermined time determined by the capacity of the external capacitor, and sets the output to the high level when the predetermined time elapses. That is, the reset signal is raised to a high level to make the CPU 56 operable. The reset IC 651 monitors the power supply voltage of VSL, which is the power supply voltage equal to the power supply voltage monitored by the first power supply monitoring circuit, and the voltage value is a predetermined value (the first power supply monitoring circuit outputs a voltage drop signal). When the voltage is lower than the power supply voltage value), a low level voltage drop signal is generated. Therefore, the CPU 56 performs a predetermined power supply stop process in response to the voltage drop signal from the first power supply monitoring circuit, and then the system is reset. In this embodiment, the reset signal and the voltage drop signal from the second power supply monitoring circuit are the same signal.

  As shown in FIG. 11, the reset signal from the reset IC 651 is input to the NAND circuit 947 and also input to the clear terminal of the counter IC 941 via the inverting circuit (NOT circuit) 944. The counter IC 941 counts the clock signal from the oscillator 943 when the input to the clear terminal becomes low level. The Q5 output of the counter IC 941 is input to the NAND circuit 947 via the NOT circuits 945 and 946. The Q6 output of the counter IC 941 is input to the clock terminal of the flip-flop (FF) 942. The D input of the flip-flop 942 is fixed at a high level, and the Q output is input to an OR circuit (OR circuit) 949. The output of the NAND circuit 947 is introduced into the other input of the OR circuit 949 via the NOT circuit 948. The output of the OR circuit 949 is connected to the reset terminal of the CPU 56. According to such a configuration, since the reset signal (low level signal) is given twice to the reset terminal of the CPU 56 when the power is turned on, the CPU 56 surely starts operation.

  For example, the detection voltage of the first power supply monitoring circuit (voltage that outputs a voltage drop signal) is + 22V, and the detection voltage of the second power supply monitoring circuit is + 9V. In such a configuration, since the first power monitoring circuit and the second power monitoring circuit monitor the voltage of the same power supply VSL, the timing when the first voltage monitoring circuit outputs the voltage drop signal. And the timing at which the second voltage monitoring circuit outputs the voltage drop signal can be reliably set to a desired predetermined period. The desired predetermined period is a period from when the power supply stop process is started in response to the voltage drop signal from the first power supply monitoring circuit until the power supply stop process is reliably completed.

  In this example, the first detection condition for the first power supply monitoring means to output the detection signal is that the + 30V power supply voltage has dropped to + 22V, and the second power supply monitoring means outputs the detection signal. The second detection condition that becomes is that the + 30V power supply voltage is lowered to + 9V. However, the voltage value used here is an example, and other values may be used.

  However, although the monitoring range is narrowed, it is also possible to use a + 5V power supply voltage as the monitoring voltage of the first voltage monitoring circuit and the second voltage monitoring circuit. Also in that case, the detection voltage of the first voltage monitoring circuit is set higher than the detection voltage of the second voltage monitoring circuit.

  While power is not supplied from the + 5V power source that is the driving power source of the CPU 56 or the like, at least a part of the RAM is backed up by the backup power source supplied from the power supply board, and the contents are preserved even if the power to the gaming machine is cut off. The When the + 5V power supply is restored, a reset signal is issued from the initial reset circuit 65, so that the CPU 56 returns to a normal operation state. At that time, since necessary data is backed up, it is possible to return to the gaming state at the time of the power failure when recovering from the power failure.

  11 shows a configuration in which a reset signal (low level signal) is given twice to the reset terminal of the CPU 56 when the power is turned on. However, even if the rising timing of the reset signal is only once, the reset is surely released. When using the CPU to be used, the circuit elements denoted by reference numerals 941 to 949 are not necessary. In that case, the output of the reset IC 651 is directly connected to the reset terminal of the CPU 56.

  FIG. 12 is a block diagram illustrating a configuration example of the power supply board 910 of the gaming machine. The power supply board 910 is installed independently of the electric component control boards such as the main board 31, the symbol control board 80, the voice control board 70, the lamp control board 35, and the payout control board 37, and each electric part control board in the gaming machine and Generates voltage used by mechanical components. In this example, AC24V, VSL (DC + 30V), DC + 21V, DC + 12V, and DC + 5V are generated. Further, the capacitor 916 serving as a backup power source is charged from a power source line for driving DC +5 V, that is, an IC on each substrate.

  The transformer 911 converts AC voltage from the AC power source into 24V. The AC 24V voltage is output to the connector 915. The rectifier circuit 912 also generates a DC voltage of +30 V from AC 24 V and outputs it to the DC-DC converter 913 and the connector 915. The DC-DC converter 913 generates + 22V, + 12V, and + 5V and outputs them to the connector 915. The connector 915 is connected to, for example, a relay board, and power of a voltage necessary for each electric component control board and the mechanism component is supplied from the relay board.

  The + 5V line from the DC-DC converter 913 branches to form a backup + 5V line. A large-capacitance capacitor 916 is connected between the backup + 5V line and the ground level. Capacitor 916 has power so that the storage state can be maintained with respect to the backup RAM of the electrical component control board when the power supply to the gaming machine is cut off (RAM that is backed up by power, that is, storage means that can be in the storage content storage state). Backup power supply. Further, a backflow preventing diode 917 is inserted between the + 5V line and the backup + 5V line.

  A battery that can be charged from a + 5V power supply may be used as the backup power supply. In the case of using a battery, a rechargeable battery is used in which the capacity disappears when a state in which no power is supplied from the +5 V power source continues for a predetermined time.

  The power supply board 910 is mounted with a power monitoring IC 902 that constitutes the first power monitoring circuit described above. The power monitoring IC 902 detects the occurrence of power interruption by introducing the VSL power supply voltage and monitoring the VSL power supply voltage. Specifically, when the VSL power supply voltage becomes equal to or lower than a predetermined value (+22 V in this example), a voltage drop signal is output because the power supply is cut off. The power supply voltage to be monitored is preferably higher than the power supply voltage (+5 V in this example) of the circuit element mounted on each electric component control board. In this example, VSL, which is a voltage immediately after being converted from AC to DC, is used. The voltage drop signal from the power monitoring IC 902 is supplied to the main board 31, the payout control board 37, and the like.

  The predetermined value for the power monitoring IC 902 to detect the power-off is lower than the normal voltage, but is a voltage that allows the CPU on each electrical component control board to operate for a while. Further, the power monitoring IC 902 is configured to monitor a voltage that is higher than a voltage for driving a circuit element such as a CPU (+5 V in this example) and immediately after being converted from AC to DC. Therefore, the monitoring range can be expanded for the voltage required by the CPU. Therefore, more precise monitoring can be performed. Furthermore, when VSL (+ 30V) is used as the monitoring voltage, the voltage supplied to the various switches of the gaming machine is + 12V, so that it can be expected to prevent erroneous switch-on detection at the time of instantaneous power interruption. That is, when the voltage of the + 30V power supply is monitored, it is possible to detect a decrease in the level before + 12V created after the creation of + 30V starts to drop. Therefore, when the voltage of the + 12V power supply decreases, the switch output becomes in the on state. However, if the power supply interruption is recognized by monitoring the + 30V power supply voltage that decreases faster than + 12V, the power supply is turned on before the switch output shows the on state. It is possible to enter a state of waiting for recovery and not detect switch output.

  Further, since the power monitoring IC 902 is mounted on the power supply board 910 separate from the electric component control board, the voltage drop signal can be supplied from the first power supply monitoring circuit to the plurality of electric component control boards. Even if there are any number of electrical component control boards that require a voltage drop signal, it is only necessary to provide one first power supply monitoring means. Therefore, each electrical component control means in each electrical component control board performs the return control described later. Even if it goes, the cost of the gaming machine does not rise so much.

  In the configuration shown in FIG. 12, the detection output (voltage drop signal) of the power monitoring IC 902 is supplied to the respective electric component control boards (for example, the main board 31 and the payout control board 37) via the buffer circuits 918 and 919. However, for example, a configuration may be adopted in which one detection output is transmitted to the relay board and the same signal is distributed from the relay board to each electric component control board. Further, a buffer circuit corresponding to the number of substrates that require a voltage drop signal may be provided.

Next, the operation of the gaming machine will be described.
FIG. 13 is a flowchart showing main processing executed by the CPU 56 on the main board 31. When the power to the gaming machine is turned on, in the main process, the CPU 56 first confirms whether or not it is a time of recovery from a power failure (step S1). Whether or not the power failure has been recovered is confirmed by, for example, a power-off flag set in the backup RAM area when the power is cut off.

  If it is time to recover from a power failure, a data check (parity check in this example) of the backup RAM area is performed (step S3). In the case of recovery after an unexpected power failure, the data in the backup RAM area should have been saved, so the check result is normal. If the check result is not normal, the internal state cannot be returned to the state when the power is cut off, and therefore an initialization process that is executed when the power is turned on not when the power failure is restored is executed (steps S4 and S2).

  If the check result is normal, the CPU 56 performs a game state recovery process for returning the internal state to the state at the time of power-off (step S5) and clears the power-off flag (step S6). Then, it returns to the address indicated by the program counter stored in the backup RAM area (the execution address when the power is turned off is set).

  If it is not time to recover from a power failure, the CPU 56 executes normal initialization processing (steps S1 and S2). Thereafter, in the main process, the process proceeds to a loop process in which the monitoring of the timer interrupt flag (step S6) is confirmed. In the loop, display random number update processing (step S7) is also executed.

  Here, it is confirmed in step S1 whether or not the recovery from the power failure, and if the recovery from the power failure, the parity check is performed. First, the parity check is performed and the check result is not normal. If it is determined that the power is not recovered from the power failure, the initialization process of step S2 is executed. If the check result is normal, the game state return process may be performed. That is, it may be determined whether or not recovery from a power failure is made based on the result of the parity check.

  Further, when determining whether or not to execute the power failure recovery processing, that is, when determining whether or not to restore the gaming state, according to the special process flag or the like in the stored RAM data or the start winning memory number data, If it is confirmed that the gaming machine is in a game standby state (not changing in design, not in big hit game, not in probable change, and no start winning memory), it is initial without performing game state recovery processing. The process may be executed.

  In normal initialization processing, as shown in FIG. 14, after timer and register clear processing (step S2a) and necessary initial value setting processing (step S2b) are performed, a timer allocation is periodically performed every 2 ms. Initial setting of the timer register provided in the CPU 56 (setting that the time-out is 2 ms and the timer repeatedly operates) is performed so as to cause a delay (step S2c). That is, in step S2c, processing for activating a timer interrupt and processing for setting a timer interrupt interval are executed.

  Therefore, in this embodiment, the internal timer of the CPU 56 is set to repeatedly generate a timer interrupt. In this embodiment, the repetition period is set to 2 ms. Then, as shown in FIG. 15, when a timer interrupt occurs, the CPU 56 sets a timer interrupt flag (step S11).

  When detecting that the timer interrupt flag is set in step S8, the CPU 56 resets the timer interrupt flag (step S9) and executes a game control process (step S10). With the above control, in this embodiment, the game control process is started every 2 ms. In this embodiment, only the flag is set in the timer interrupt process, and the game control process is executed in the main process, but the game control process may be executed in the timer interrupt process.

  FIG. 16 is a flowchart showing the game control process of step S10. In the game control process, the CPU 56 first performs a process of outputting the data set in the storage area to the output port (data output process: step S21). Next, various output data output to each output port is set in the storage area, and output data such as jackpot information, start information, probability variation information output to the hall management computer is set in the storage area. An output data setting process is performed (step S22). Further, various abnormality diagnosis processes are performed by the self-diagnosis function provided in the pachinko gaming machine 1, and an alarm is issued if necessary according to the result (error process: step S23).

  Next, a process of updating each counter indicating each determination random number such as a big hit determination random number used for game control is performed (step S24).

  Further, the CPU 56 performs special symbol process processing (step S25). In the special symbol process control, corresponding processing is selected and executed according to a special symbol process flag for controlling the pachinko gaming machine 1 in a predetermined order according to the gaming state. The value of the special symbol process flag is updated during each process according to the gaming state. Further, normal symbol process processing is performed (step S26). In the normal symbol process, the corresponding process is selected and executed in accordance with the normal symbol process flag for controlling the variable display 10 using the 7-segment LED in a predetermined order. The value of the normal symbol process flag is updated during each process according to the gaming state.

  Further, the CPU 56 inputs the states of the gate sensor 12, the start port sensor 17, the count sensor 23, and the winning port switches 19a and 24a via the switch circuit 58, and determines whether or not there has been a winning for each winning port or winning device. (Switch processing: Step S27). The CPU 56 further performs a process of updating a display random number such as a random number that determines the type of the stop symbol (step S28).

  Further, the CPU 56 performs signal processing with the payout control board 37 (step S29). That is, when a predetermined condition is satisfied, a process for outputting a payout control command to the payout control board 37 is performed. The payout control CPU mounted on the payout control board 37 drives the ball payout device 97 according to the payout control command.

  As described above, the main process includes a process for determining whether or not to shift to the game control process, and the timer control process based on the timer interrupt periodically generated by the internal timer of the CPU 56 is used for the game control process. Since a flag for determining whether or not to shift is set, all the game control processes are executed reliably. In other words, until all the game control processes are executed, it is not determined whether or not to shift to the next game control process, so it is guaranteed that all the processes in the game control process are completed. ing.

  Conventional general game control processing is forcibly returned to the initial state by an external interrupt that occurs periodically. If it demonstrates in accordance with the example shown by FIG. 16, for example, even during the process of step S31, it was forcibly returned to the process of step S21. In other words, there is a possibility that the next game control process will be started before all the processes in the game control process are completed.

  Here, the game control process executed by the CPU 56 of the main board 31 is executed according to the flag set in the timer interrupt process based on the timer interrupt that the internal timer of the CPU 56 periodically generates. A hardware circuit that generates a signal periodically (for example, every 2 ms) is provided, a signal from the circuit is introduced into an external interrupt terminal of the CPU 56, and it is determined whether or not to shift to a game control process by the interrupt signal. A flag may be set for this purpose.

  Even in such a configuration, the determination of the flag is not performed until all of the game control processes are executed, so that it is guaranteed that all the processes in the game control process are completed.

  FIG. 17 is a timing chart showing the relationship between the variation of the normal symbol variably displayed on the variable display 10 and the hitting operation (opening / closing of the variable winning ball device 15 in this example). As shown in FIG. 17, at the start of normal symbol variation, a command indicating a variation pattern and a stop symbol is transmitted from the main board 31 to the symbol control board 80. In addition, a command indicating normal symbol stop is transmitted at the time of fluctuation stop.

  FIG. 18 is a timing chart showing the relationship between the progress of the game and the variation of the special symbol variably displayed on the variable display unit 9. As shown in FIG. 18, the progress of the game is as follows: (1) When the power is turned on, (2) During the customer waiting demonstration, (3) From the change of the special symbol to the finalization, (4) From the finalization of the special symbol to the first time Until the opening of the prize opening, (5) From the opening of the first prize opening to the closing of the final prize opening, (6) From the closing of the final prize opening to the next special symbol change ((number ) Is synonymous with circled numbers in the figure).

  FIG. 19 is a timing chart showing the relationship between changes in special symbols and symbol control commands. As shown in FIG. 19, at the start of variation, commands for designating a variation pattern, designation of left symbol, designation of middle symbol, and designation of right symbol are transmitted from the main board 31 to the symbol control board 80. At the end of the change, a command indicating all symbol stops is transmitted. Thus, in this embodiment, five commands are transmitted for one change.

  FIG. 20 is an explanatory diagram showing an example of a command form of the symbol control command. In this embodiment, the symbol control command has a 2-byte structure, and the first byte represents MODE (command classification), and the second byte represents EXT (command type).

  FIG. 21 is an explanatory diagram showing an example of the contents of the symbol control command. In the example shown in FIG. 21, commands 8000 (H) to 8022 (H) and 8100 (H) to 8122 (H) designate a variation pattern of a special symbol in the variable display unit 9 that variably displays the special symbol. This is a symbol control command. Note that the command for specifying the variation pattern also serves as a variation start instruction. The command 88XX (X = any value of 4 bits) is a symbol control command related to a variation pattern of a normal symbol variably displayed on the variable display 10. The command 89XX is a symbol control command for designating a normal symbol stop symbol. Command 8AXX (X = any value of 4 bits) is a symbol control command for instructing stop of variable symbol display.

  Commands 91XX, 92XX, and 93XX are symbol control commands for designating a stop symbol in the middle left of the special symbol. Command A0XX is a symbol control command for instructing stop of variable symbol special display. The command BXXX is a symbol control command that is sent between the start of the big hit game and the end of the big hit game. The commands C000 and EXXX are symbol control commands relating to the display state of the variable display unit 9 that is not related to special symbol fluctuations and jackpot games. Note that (1) to (6) shown in FIG. 21 correspond to the period shown in FIG. When the symbol control means of the symbol control board 80 receives the above-described symbol control command from the game control means of the main board 31, the display state of the variable display section 9 and the variable display 10 is changed according to the contents shown in FIG. To do.

  FIG. 22 is a timing chart showing an example of a form of sending a symbol control command. In this embodiment, a symbol control command is output by 8-bit symbol control signals CD to CD7. Then, when the first byte and the second byte of the symbol control command are output, the INT signal is turned on (low level in this example). The ON period of the INT signal is 1 μs or more, for example, and a period of 4 μs or more is provided between the first byte and the second byte. The symbol control means inputs the symbol control signals CD to CD7 by interruption processing according to the INT signal.

  The symbol control command is sent only once so that the symbol control means can recognize (can be received). In this example, “recognizable (receivable)” means that the INT signal is turned on, and “recognizable (receivable) is sent once” means that in this example, the INT signal is only once. It is to turn on. Since the game control means is configured to send the command only once, the load required for sending the command is reduced also from this point. However, since it need only be sent once so that it can be recognized, other sending methods may be used.

  FIG. 23 is an explanatory diagram showing an example of a command form of the voice control command. In this embodiment, the voice control command has a 2-byte structure, and the first byte represents MODE (command classification), and the second byte represents EXT (command type).

  FIG. 24 is an explanatory diagram showing an example of the contents of a voice control command. In the example shown in FIG. 24, the command 8XXX (X = any value of 4 bits) is a voice control command for designating a sound generation pattern in a special symbol variation period. The command BXXX (X = any value of 4 bits) is a voice control command for designating a sound generation pattern from the start of the jackpot game to the end of the jackpot game. Other commands are voice control commands that are not related to special symbol changes and jackpot games. Note that (1) to (6) shown in FIG. 24 correspond to the period shown in FIG. When the voice control means of the voice control board 70 receives the above-described voice control command from the game control means of the main board 31, the voice output state is changed according to the contents shown in FIG.

  FIG. 25 is a timing chart showing an example of a transmission form of the voice control command. In this embodiment, an audio control command is output by 8-bit audio control signals CD to CD7. Then, when the first byte and the second byte of the voice control command are output, the INT signal is turned on (low level in this example). The ON period of the INT signal is, for example, 2 μs or longer, and a period of 30 μs or longer is provided between the first byte and the second byte. The voice control means inputs the voice control signals CD to CD7 by interruption processing according to the INT signal.

  The voice control command is sent only once so that the voice control means can recognize it. In this example, “recognizable” means that the INT signal is turned on, and “recognizable once” means that in this example, the INT signal is turned on only once.

  FIG. 26 is an explanatory diagram showing an example of a command form of the lamp control command. In this embodiment, the lamp control command has a 2-byte structure, the first byte represents MODE (command classification), and the second byte represents EXT (command type).

  FIG. 27 is an explanatory diagram showing an example of the contents of the lamp control command. In the example shown in FIG. 27, commands 8000 (H) to 8022 (H) and 8100 (H) to 8122 (H) are lamp / LED display control patterns corresponding to the variation pattern of the special symbol in the variable display unit 9. Is a lamp control command for designating. The command A0XX (X = any value of 4 bits) is a lamp control command for instructing a lamp / LED display control pattern when the variable symbol special display is stopped. The command BXXX is a lamp control command for instructing a lamp / LED display control pattern from the start of the jackpot game to the end of the jackpot game. The command C000 is a lamp control command for instructing a lamp / LED display control pattern during a customer waiting demonstration.

  The commands 8XXX, AXXX, BXXX and CXXX are ramp control commands sent from the game control means according to the game progress status. Also, (1) to (6) shown in FIG. 27 correspond to the period shown in FIG. When the lamp control means receives the above-described lamp control command from the game control means of the main board 31, the lamp / LED display state is changed in accordance with the contents shown in FIG.

  The command E0XX is a lamp control command indicating the number of lighting of the start memory display 18. For example, the lamp control means turns on the number of displays designated by “XX” in the start memory display 18. The command E1XX is a lamp control command indicating the number of lighting of the gate passing memory display 41. For example, the lamp control means turns on the number of displays designated by “XX” in the gate passing storage display 41. That is, these commands are commands for instructing control of the light emitters that are provided in order to notify information about the number of reserves. In addition, the command regarding the number of lighting of the start memory | storage display 18 and the gate passage memory | storage display 41 may be comprised so that increase / decrease in the number of lighting may be shown.

  Commands E200 and E201 are lamp control commands relating to the display state of the winning ball lamp 51, and commands E300 and E301 are lamp control commands relating to the display state of the ball-out lamp 52. When the lamp control means receives the lamp control command of “E201” from the game control means of the main board 31, the lamp control means sets the display state of the prize ball lamp 51 as a predetermined display state when there is a prize ball remaining, and “E200” When the lamp control command is received, the display state of the prize ball lamp 51 is set to a display state determined in advance as a case where there is no prize ball remaining. When the lamp control command “E300” is received from the game control means of the main board 31, the display state of the ball break lamp 52 is changed to the display state with a ball, and when the lamp control command “E301” is received, the ball break lamp 52 is displayed. The display state of is set to the display state when the ball is out. That is, commands E200 and E201 are commands indicating control of a light-emitting body provided for notifying a player or the like that there is a non-prize ball, and commands E300 and E301 are supply balls. This is a command indicating that a light-emitting body provided for notifying a player or a game store clerk that the game has expired is controlled.

  The command E400 is changed from a specific gaming state (high probability state or short-time state, high probability state in this example) to a normal state (low probability state or non-time-short state, low probability state in this example) when the gaming machine is turned on. This is a lamp control command for instructing a lamp / LED display control pattern at the time of transition. The command E401 is a lamp / LED display when a transition is made from a normal state (low probability state or non-time-short state, in this example low probability state) to a specific gaming state (high probability state or time-short state, in this example high probability state). This is a lamp control command for designating a control pattern. The command E402 is a lamp control command for instructing a lamp / LED display control pattern when an error occurring during the big hit game is canceled. The command E403 is a lamp control command for instructing a lamp / LED display control pattern when an error of the count switch 23 occurs. That is, these commands are commands for instructing the gaming state to be notified by the light emitter. In this embodiment, when the lamp control means receives a command instructing to notify the gaming state, the lamp control means uses a part or all of the decoration lamp 25, the game effect LED 28a, and the game effect lamps 28b and 28c, Turn on / off control to notify the gaming state. The decorative lamp 25, the game effect LED 28a, and the game effect lamps 28b, 28c may each be composed of a plurality of light emitters. In this case, the decorative lamp 25, the game effect LED 28a, and the game effect lamp 28b, Notifying the gaming state using a part of 28c also means that, for example, a part of a plurality of light emitters constituting the decorative lamp 25 may be used.

As described above, in this embodiment,
(1) A lamp control command (system 1) regarding a lamp / LED display control pattern that changes according to the progress of the game.
(2) A lamp control command (system 2) relating to notification of the number displayed on the start memory indicator 18.
(3) A lamp control command (system 3) relating to notification of the number of displays on the gate passing memory display 41.
(4) A lamp control command (system 4) related to notification by the prize ball lamp 51.
(5) A lamp control command (system 5) related to notification by the ball break lamp 52.
(6) A lamp control command (system 6) for instructing to notify the gaming state.
Lamp control commands are systematized.

  Further, in this embodiment, a test command (F000 (H)) is also prepared. When the lamp control means receives the test command, it puts all the light emitters controlled by the lamp control means into a state of lighting, extinguishing, blinking, etc. according to a test pattern stored in advance for a predetermined period.

  The first byte (MODE byte) data is classified for each system. Therefore, the lamp control means that has received the lamp control command from the game control means can determine which system command has been received immediately by the MODE byte. Therefore, the lamp control program executed by the lamp control CPU 351 can be systematically constructed. As a result, the program capacity can be saved and the program can be easily created. Furthermore, program analysis is easy. Easier program creation means easier game machine design. The fact that the program analysis is easy means that the program can be easily changed, and it is also easy to modify a part and divert it to other models.

  FIG. 28 is a timing chart showing an example of a lamp control command transmission form. In this embodiment, the lamp control command is output by the 8-bit lamp control signals CD to CD7. Then, when the first byte and the second byte of the lamp control command are output, the INT signal is turned on (low level in this example). The ON period of the INT signal is, for example, 2 μs or longer, and a period of 30 μs or longer is provided between the first byte and the second byte. The ON period of the INT signal is, for example, 1 μs or longer. The lamp control means inputs the lamp control signals CD to CD7 by interruption processing according to the INT signal.

  The lamp control command is sent only once so that the lamp control means can recognize it. In this example, “recognizable” means that the INT signal is turned on, and “recognizable once” means that in this example, the INT signal is turned on only once.

  FIG. 29 is an explanatory diagram showing an example of a command form of the payout control command. In this embodiment, the payout control command has a 1-byte structure, the upper 4 bits represent MODE (command classification), and the lower 4 bits represent EXT (command type).

  FIG. 30 is an explanatory diagram showing an example of the contents of the payout control command. In the example shown in FIG. 30, the command 80 (H) is a payout control command for designating a payout enabled state. The command 81 (H) is a payout control command that designates a payout enabled state. Command 9X (H) is a payout control command for designating the number of prize balls. The lower four bits “X” indicate the number of payouts.

  When the payout control means receives the payout control command of 81 (H) from the game control means of the main board 31, the payout payout and ball lending are stopped, and when the payout control command of 80 (H) is received, the payout ball payout And you can rent a ball. When a payout control command for designating the number of prize balls is received, prize ball payout control is performed according to the number designated by the received command.

  FIG. 31 is a timing chart showing an example of a delivery form of the payout control command. In this embodiment, a payout control command is output by an 8-bit payout control signal CD to CD7. When the payout control command is output, the INT signal is turned on (low level in this example). The ON period of the INT signal is, for example, 1 μs or longer. The payout control means inputs the payout control signals CD to CD7 by interrupt processing according to the INT signal.

  The payout control command is sent only once so that the payout control means can recognize it. In this example, “recognizable” means that the INT signal is turned on, and “recognizable once” means that in this example, the INT signal is turned on only once.

  The payout control command is expected to be sent out more frequently than other control commands. Therefore, the payout control command has a 1-byte configuration, while other control commands have a 2-byte configuration. As described above, if the length of a control command that may be frequently transmitted is shorter than the length of other control commands, it is possible to achieve efficient control command transfer as a whole.

  However, as shown in FIGS. 20, 23, 26, and 29, the symbol control command, voice control command, lamp control command, and payout control command are all composed of a MODE portion and an EXT portion. That is, the voice control command and the lamp control command have the same form. The form of the voice control command and the payout control command are common. The forms of the lamp control command and the payout control command are also common. The design of the symbol control command and the voice control command is common. Also, the symbol control command and the lamp control command have the same form. The design of the symbol control command and the payout control command is also common.

  Since the form of each command sent out from the game control means is common, in the program executed by the CPU 56 of the game control means, the creation part and the output part of each command can be easily shared. As a result, the module for sending out the command of the game control program is simplified, the program maintenance becomes easy, and the program diversion to other models becomes easy.

  In this embodiment, the payout control command has a 1-byte configuration. However, if the 2-byte configuration is used, the command length is also shared. When the payout control command has a 2-byte configuration, for example, as shown in FIG. 32, when the first byte and the second byte of the payout control command are output, the INT signal is turned on (this example (Low level). The ON period of the INT signal is, for example, 1 μs or more, and a period of, for example, 10 μs or more is provided between the first byte and the second byte.

  The command forms shown in FIGS. 20, 23, 26, and 29 are examples, and other command forms may be used as long as the command forms can be easily shared.

  FIG. 33 is a flowchart showing an example of a special symbol process processing program executed by the CPU 56. The special symbol process shown in FIG. 33 is a specific process of step S25 in the flowchart of FIG. When performing the special symbol process, the CPU 56 of the main board 31 performs any one of steps S300 to S309 shown in FIG. 33 according to the internal state (the state of the special symbol process flag). In each process, the following process is executed.

  Special symbol variation waiting process (step S300): Wait until the special symbol variable display can be started.

  Special symbol determination process (step S301): When variable symbol special display can be started, the number of start winning memories is confirmed. If the starting winning memorized number is not 0, it is determined whether to win or not according to a predetermined value of the big hit determination random number.

  Stop symbol setting process (step S302): A special symbol stop symbol of right and left middle symbols is determined.

  Reach operation setting process (step S303): It is determined whether or not a reach operation is performed according to the value of the reach determination random number, and a variation mode of the reach operation is determined according to the value of the reach operation random number.

  All symbol variation start processing (step S304): Control is performed so that the variation display unit 9 starts variation of all symbols. At this time, a symbol control command for instructing a variation pattern and a symbol control command for instructing a right / left middle stop symbol are transmitted to the symbol control board 80.

  All symbols stop waiting process (step S305): When a predetermined time has elapsed, control is performed so that all symbols displayed on the variable display unit 9 are stopped.

  Jackpot display processing (step S306): When the stop symbol is a combination of jackpot symbols, control is performed so that the symbol control command generated by the jackpot is sent to the symbol control board 80, and the internal state (special symbol process flag) is set. Update to move to step S307. If not, the internal state is updated to shift to step S309. The jackpot symbol combination is, for example, a combination of left and right middle symbols.

  Big winning opening opening process (step S307): Control for opening the big winning opening is started. Specifically, the counter and the flag are initialized, and the solenoid 21 is driven to open the special winning opening. Further, control for sending a control command for starting a round to the symbol control board 80 is performed.

  Processing during opening of a big winning opening (step S308): control for sending a round end control command to the symbol control board 80 when a round ending condition (for example, the number of winning balls to the big winning opening reaches a predetermined number) is established. I do. If the jackpot game end condition is not satisfied, the special symbol process flag is set to a value corresponding to step S307. If the big hit game ending condition is satisfied, the special symbol process flag is set to a value corresponding to step S309.

  Big hit end processing (step S309): Control to send a big hit end control command to the symbol control board 80 is performed. When the probability variation flag is set, control is performed to send a symbol control command indicating a high probability state to the symbol control board 80. Further, if the high-probability state is satisfied and an end condition for the state (for example, a specified number of times of fluctuations is satisfied), control is performed to send a control command indicating the low-probability state to the symbol control board 80. . Thereafter, the special symbol process flag is set to a value corresponding to step S300.

  In accordance with the processing of each step described above, the module that performs the process of sending the symbol control command in the game control program outputs the corresponding symbol control command to the output port and outputs the INT signal to the output port. As the game progresses as described above, a voice control command and a lamp control command are also sent out.

  FIG. 34 is an explanatory diagram showing a data structure of process data used in the special symbol process. The process data is stored in the ROM 54 of the basic circuit 53. In each process (steps S300 to S309) in the special symbol process, symbol variation control, lamp / LED control, and sound control are performed according to each data set in the process data. That is, process data corresponding to each process (steps S300 to S309) is stored in the ROM 54.

  In this embodiment, it is assumed that the process data is a collection of one or more data groups composed of 8 bytes. A process timer value is set in the first and second bytes of a data group composed of 8 bytes. Lamp control command data is set in the third and fourth bytes. Voice control command data is set in the fifth and sixth bytes. In the 7th and 8th bytes, symbol control command data is set. An end code indicating the end of the process is added to the end of the process data.

  FIG. 35 is a flowchart showing a process data / timer setting processing subroutine executed in each special symbol process (steps S300 to S309). In the process data / timer setting process, the CPU 56 executes a special symbol process timer setting process (step S401). Next, 1 is subtracted from the value of the process timer (step S403). If the value of the process timer is not 0, it is determined that this process is continuing (step S408), and the process is terminated.

  When the value of the process timer becomes 0, the data pointer is set to point to the next data group (8 bytes) in the process data (step S405). Then, the value of the first and second bytes in the data group pointed to by the data pointer is set in the process timer, and this process is continued (step S408), and the process is terminated (step S406). If the data pointed to by the data pointer is an end code (step S407), it is assumed that this process is ended (step S409).

  FIG. 36 is a flowchart showing the special symbol process timer setting process (step S401). In the special symbol process timer setting process, the CPU 56 checks whether or not the address has been changed (step S421). Here, the address is the head address of process data. That is, when there is a process change, the processes of steps S422 to S424 are executed. If the address is not changed, that is, if the process is continuing, a process data address is set (step S425), and the process is terminated. However, when branching directly from step S421 to step S425, the contents of the process data address are not changed.

  When the address is changed, that is, when the process is switched, the start address of the process data corresponding to the changed process is set as the data address (step S422). Then, the first and second byte values in the process data are newly set in the process timer (step S423), and the process timer value is saved (step S424). Furthermore, the process data address is set as the value of the data address (step S425).

  As described above, process data as shown in FIG. 34 is set in advance in the ROM 54 in correspondence with each special symbol process (steps S300 to S309). In each process, each process timer data is set so that the process timer is timed out at the timing of sending at least one of the lamp control command, the voice control command, and the symbol control command.

  FIG. 37 is a flowchart showing an output data setting process (step S22 in the game control process) in the game control process shown in FIG. In the output data setting process, the CPU 56 determines whether there is any change in the audio data (step S701). When the process timer shown in FIG. 34 expires and the data group (8 bytes) used in the process data is switched (changed to the next time), the voice data can be changed. However, even when the data group is switched, the audio data before and after the switching may be the same. In that case, the CPU 56 does not consider that the audio data has changed.

  When there is a change in the voice data, the CPU 56 reads out the voice data in the currently used data group in the process data, that is, voice control command data (step S702). Then, the read voice data is set in the buffer area # 2 provided for storing the voice control command (step S703). Also, a voice control command transmission request is set (step S704).

  Next, the CPU 56 determines whether or not the lamp data is changed (step S711). As shown in FIG. 34, the change of the ramp data can also occur when the process timer times out and the data group (8 bytes) used in the process data is switched. However, even when the data group is switched, the lamp data before and after the switching may be the same. In that case, the CPU 56 does not consider that the lamp data has changed.

  When the lamp data is changed, the CPU 56 reads out the lamp data in the currently used data group in the process data, that is, the lamp control command data (step S712). Then, the read lamp data is set in the buffer area # 1 provided for storing the lamp control command (step S713). Also, a lamp control command transmission request is set (step S714).

  Next, the CPU 56 determines whether or not the symbol control data has changed (step S715). As shown in FIG. 34, the symbol control data can also be changed when the process timer expires and the data group (8 bytes) used in the process data is switched. However, even when the data group is switched, the symbol control data before and after the switching may be the same. In that case, the CPU 56 does not consider that the symbol control data has changed.

  If there is a change in the symbol control data, the CPU 56 reads the symbol control data in the currently used data group in the process data, that is, symbol control command data (step S716). Then, the read symbol control data is set in the buffer area # 3 provided for storing symbol control commands (step S717). Also, a symbol control control command transmission request is set (step S718).

  As described above, when it is time to send a command, the command to be sent is set in the corresponding buffer area. As for the symbol control command, a plurality of commands may be sent almost simultaneously (fluctuation pattern and stop symbol). In such a case, a plurality of continuous data groups (8 bytes) in the process data. Each symbol control command may be set in each symbol control data. If each process timer value is set to 0, each symbol control command is sequentially set in the buffer area.

  As for the lamp control command, command setting to the buffer area # 1 may be performed other than the special symbol process. For example, for initialization lamp designation, command setting is performed in the initialization process of the main process, and for gate passing memory number lamp designation, command setting is performed in the normal symbol process process (step S26) in the game control process.

  FIG. 38 is a flowchart showing a portion related to prize ball control in the switch process (step S27) in the game control process shown in FIG. In the switch process, the CPU 56 sets a ball break flag when the ball break switch 187 detects a ball break (steps S121 and S122). Further, when it is detected by the ball cut switch 187 that the ball is not cut, the ball cut flag is reset (steps S121 and S123).

  Next, when the lower pan full tank is detected by the full tank switch 48, a full tank flag is set (steps S124 and S125). Further, when it is detected by the full tank switch 48 that the lower pan is not full, the full tank flag is reset (steps S124 and S126).

  Further, when it is detected that the count switch 23 is turned on, the 15 counter is incremented by 1 (steps S131 and S132), and when any of the winning opening switches 19a and 24a is detected, the 10 counter is incremented by 1 ( In steps S133 and S134), when it is detected that the start port switch 17 is turned on, the six counters are incremented by one (steps S135 and S136).

  In this embodiment, 15 winning balls are paid out for winning through the big winning opening, 6 winning balls are paid out for winning through the starting winning opening 14, and the other winning openings 19, 24 and the winning ball apparatus. It is assumed that 10 prize balls are paid out for the winning after passing through. The 15 counter, the 10 counter, and the 6 counter are counters for counting the number of winning prizes.

  39 and 40 are flowcharts showing an example of the winning ball signal process (step S29) in the game control process shown in FIG. In this example, in the winning ball signal processing, first, it is confirmed whether or not the payout is stopped (step S731). The payout stop state is a state after a payout stop instruction command is sent to the payout control board 37. If it is not in the payout stop state, it is confirmed whether or not the above-described ball-out state flag or full tank flag is turned on (step S732).

  When either of them changes to the ON state, a payout stop instruction command is set in the buffer area # 4 provided for storing the payout control command (step S733), and a payout control command transmission request is set (step S734). ). In step S732, when one of the flags is already in the on state and the other flag is in the on state, the payout control command sending control indicating the payout stop instruction (steps S733 and S734) is executed. I will not.

  Note that when the ball-out state flag is turned on, control for sending a lamp control command to the lamp control board 35 is also performed. That is, a command for specifying a lamp that is out of ball is set in the buffer area # 1 provided for storing the lamp control command, and a lamp control command transmission request is set.

  If it is in the payout stopped state, it is checked whether or not both the ball-out state flag and the full tank flag are turned on (step S741). When both are turned off, a payout stop cancel instruction command is set in the buffer area # 4 (step S742), and a payout control command transmission request is set (step S743).

  When the ball break state flag changes from on to off, control for sending a lamp control command to the lamp control board 35 is also performed. That is, a command for specifying a lamp with a ball is set in the buffer area # 1 provided for storing the lamp control command, and a lamp control command sending request is set.

  Next, the CPU 56 performs control for sending out the number of prize balls according to winning a prize to the payout control board 37. First, the CPU 56 checks the value of the 15 counter (step S751). As described above, the 15 counter is counted up when the game ball wins the big winning opening and the count switch 23 is turned on. If the value of the 15 counter is not 0, a payout number instruction command indicating 15 payout number instructions is set in the buffer area # 4 (step S752), and a payout control command transmission request is set (step S753). Then, 15 is added to the total number storage (step S754), and the value of the 15 counter is decremented by 1 (step S755).

  If the value of the 15 counter is 0, the value of the 10 counter is checked (step S756). As described above, the 10 counter is counted up when the game ball has won a winning opening and the winning opening switches 19a and 24a are turned on. If the value of the 10 counter is not 0, a payout number instruction command indicating 10 payout number instructions is set in the buffer area # 4 (step S757), and a payout control command transmission request is set (step S758). Then, 10 is added to the total number storage (step S759) and the value of the 10 counter is decremented by 1 (step S760).

  If the value of the 10 counter is 0, the value of the 6 counter is checked (step S761). As described above, the six counter is counted up when the game ball wins the start winning opening and the start opening switch 17 is turned on. If the value of the six counter is not 0, a payout number instruction command indicating six payout number instructions is set in the buffer area # 4 (step S762), and a payout control command transmission request is set (step S763). Then, 6 is added to the total number storage (step S764) and the value of the six counter is decremented by 1 (step S765).

  With the above processing, in this embodiment, the number of prize balls is notified to the payout control board 37 in order from the largest number of prize balls for winning regardless of the order of winning. The number of prize balls may be notified in order.

  Next, the CPU 56 checks whether or not the content of the total number storage has changed from 0 to a positive value (step S351). The change from 0 to a positive value indicates that the number of prize balls is notified to the payout control board 37 and the prize ball payout is started. Therefore, in order to display the prize ball lamp 51 in a display state when there is a prize ball remaining, the CPU 56 issues a command indicating the designation of the lamp with the prize ball remaining in the buffer # 1 provided for storing the lamp control command. Setting is made (step S352), and a lamp control command transmission request is set (step S353).

  If the total number storage content is not changed from 0 to a positive value, the CPU 56 checks whether the total number storage is 0 (step S361). When it is not 0, that is, when a prize ball is in progress, the prize ball count switch 301A is monitored (step S362). When one prize ball payout is detected by the prize ball count switch 301A, the value of the total number memory is decreased by 1 (step S363). Then, when the value of the total number storage becomes 0 (step S364), it is controlled that the prize ball lamp 51 is in a display state when there is no prize ball remaining because the prize ball payout is completed.

  That is, a command indicating the no-remaining-ball remaining lamp designation is set in the buffer # 1 provided for storing the lamp control command (step S365), and a lamp control command transmission request is set (step S366).

  As described above, in the winning ball signal processing, the payout control command is set in the buffer area # 4 provided for storing the payout control command. Further, the lamp control commands relating to the winning ball lamp 51 and the ball-out lamp 42 are set in the buffer area # 1 provided for storing the lamp control commands. Since the control for setting the lamp control command is performed in both the output data setting process and the winning ball signal process shown in FIG. 37, the control is performed so as not to compete. For example, when a command is set in the buffer # 1, if a command has already been set and the command has not yet been transmitted, a new command setting is not performed.

  In the output data setting process shown in FIG. 37 and the winning ball signal process shown in FIGS. 39 and 40, the process for setting the command to be sent in the buffer area is common. That is, the command is written to the buffer area and a command transmission request is set. Then, it is possible to share a program part for writing commands to the buffer area for the symbol control command, voice control command, lamp control command, and payout control command. For example, when writing a lamp control command to the buffer area, a program configuration may be adopted in which “1” is written in a certain register, a command to be transmitted is set in another register, and a buffer setting subroutine is called. In this case, in the buffer setting subroutine, when it is recognized that “1” is written in the register, the command set in another register is set in the buffer area # 1 provided for the lamp control command. .

  Also, for each of the symbol control command, voice control command, lamp control command, and payout control command, a table in which all commands are set is prepared, and when the buffer setting subroutine is called, it corresponds to the command to be transmitted. An address in the table or a number corresponding to the address may be set in the register. In this case, in the buffer setting subroutine, the table can be searched based on the address information, the corresponding command can be read, and the read command can be set in the buffer area.

  As described above, command creation processing to be transmitted can be shared for symbol control commands, voice control commands, lamp control commands, and payout control commands. As a result, the load required for command transmission in the game control means is reduced. In addition, even if it is not common to all control commands, if a process for creating any two or more control commands (for example, a lamp control command and a voice control command) is common, otherwise In comparison, the load required for command transmission in the game control means can be reduced.

  FIG. 41 is a flowchart showing an example of a data output process (step S21 of the game control process shown in FIG. 16) for outputting a command set in the buffer area. In the data output process, the CPU 56 checks whether or not a symbol control command transmission request is set (step S771). If set, a value corresponding to 1 μs is set in the specific register # 1, a value corresponding to 4 μs is set in the specific register # 2, and “03” is set in the specific register # 3 (step S772). An ON period of the INT signal is set in the specific register # 1. In the specific register # 2, the interval between the first byte and the second byte of the command is set. A value indicating which control command should be sent is set in the specific register # 3.

  Next, the symbol control command transmission request is reset (step S773), and the command transmission subroutine is called (step S774).

  Next, the CPU 56 checks whether or not a voice control command transmission request is set (step S776). If set, a value corresponding to 2 μs is set in the specific register # 1, a value corresponding to 30 μs is set in the specific register # 2, and “02” is set in the specific register # 3 (step S777). Further, the voice control command transmission request is reset (step S778), and the command transmission subroutine is called (step S779).

  Subsequently, the CPU 56 checks whether or not a lamp control command transmission request is set (step S781). If set, a value corresponding to 2 μs is set in the specific register # 1, a value corresponding to 30 μs is set in the specific register # 2, and “01” is set in the specific register # 3 (step S782). Further, the lamp control command transmission request is reset (step S783), and the command transmission subroutine is called (step S784).

  Then, the CPU 56 checks whether or not a payout control command transmission request is set (step S786). If set, a value corresponding to 1 μs is set in the specific register # 1, a value corresponding to 0 μs is set in the specific register # 2, and “04” is set in the specific register # 3 (step S787). Further, the payout control command transmission request is reset (step S788), and the command transmission subroutine is called (step S789).

  FIG. 42 is a flowchart showing a command transmission subroutine. In the command transmission subroutine, the CPU 56 sets the buffer area corresponding to the value set in the specific register # 3 (for example, if “03” is set, the buffer area # 3 = the symbol control command storage buffer area). The first byte of the stored data is output to the corresponding output port (step S790). The corresponding output port is the output port 575 if a symbol control command is sent (see FIG. 9).

  Then, the corresponding INT signal is turned on (step S791). Further, after a delay time corresponding to the value set in the specific register # 1 (step S792), the INT signal is turned off (step S793).

  Next, the value set in the specific register # 2 is confirmed (step S794). When it is confirmed that 0 is set, the process is terminated. If a value other than 0 is set, the second byte of the data set in the buffer area corresponding to the value set in the specific register # 3 is output to the corresponding output port (step S795), and the specific register After a delay time corresponding to the value set in # 2 (step S796), the corresponding INT signal is turned on (step S797). Further, after a delay time corresponding to the value set in the specific register # 1 is set (step S798), the INT signal is turned off (step S799).

  Through the processing as described above, the control command is sent from the main board 31 at the timings shown in FIGS. 22, 25, 28 and 31.

  In this embodiment, since a common subroutine is called for the symbol control command, voice control command, lamp control command, and payout control command, command output processing to be sent can be made common. As a result, the load required for command transmission in the game control means is further reduced. In addition, even if it is not common to all control commands, if the process of outputting any two or more control commands (for example, lamp control command and voice control command) is common, otherwise In comparison, the load required for command transmission in the game control means can be reduced.

  In this embodiment, the payout control command has a 1-byte structure and the other control commands have a 2-byte structure. However, if the payout control command is also formed of a 2-byte structure, the process of step S794 in FIG. 42 is not necessary. Thus, the sharing effect can be further improved.

  In this embodiment, since the data output process is started once every 2 ms, each control command can be sent only one command in 2 ms. However, it can be configured such that a plurality of commands can be transmitted within 2 ms. For example, in the game control process shown in FIG. 16, if a program is configured to intermittently execute a data output process or the like a plurality of times, a plurality of commands can be transmitted within 2 ms.

  Hereinafter, the operation of each electric component control means mounted on the sub-board (in this example, the symbol control board 80, the voice control board 70, the lamp control board 37, and the payout control board 37) will be described.

  First, the operation of the voice control means will be described. FIG. 43 is a flowchart showing main processing executed by the voice control CPU 701. In the main process, first, an initial value setting process such as clearing the RAM area is performed (step S201). Thereafter, in this embodiment, the voice control CPU 701 proceeds to a loop process for monitoring the timer interrupt flag (step S202). Then, as shown in FIG. 44, when a timer interrupt occurs, the voice control CPU 701 sets a timer interrupt flag (step S207). If the timer interrupt flag is set in the main processing, the voice control CPU 701 clears the flag (step S203) and performs voice control processing (step S205).

  In this embodiment, it is assumed that the timer interrupt takes every 2 ms. That is, the voice control process is started every 2 ms.

  FIG. 45 is a flowchart showing voice control command reception processing by interrupt processing. A voice control INT signal from the main board 31 is input to an interrupt terminal of the voice control CPU 701. Therefore, when the INT signal from the main board 31 is turned on, the voice control CPU 701 is interrupted and the voice control command reception process shown in FIG. 45 is started.

  In the voice control command reception process, the voice control CPU 701 first reads data from an input port assigned to input voice control command data (step S221). Then, it is confirmed whether or not the first byte of the two-byte voice control command has already been received (step S222). Whether the data has already been received can be confirmed by checking whether valid data is set in the first byte of the reception buffer.

  If the first byte has not been received yet, it is confirmed whether or not bit 7 of the received 1 byte is “1” (step S223). Bit 7 must be “1” in the MODE byte (first byte) of the 2-byte voice control command (see FIG. 20). If bit 7 is “1”, it is determined that a valid first byte has been received, and the received command is stored in the first byte of the reception buffer (step S224).

  If the first byte has already been received, it is checked whether bit 7 of the received 1 byte is “0” (step S225). Bit 7 should be “0” in the EXT byte (second byte) of the two-byte voice control command (see FIG. 20). In this case, if bit 7 is “0”, it is determined that a valid second byte has been received, and the received command is stored in the second byte of the reception buffer (step S226). In addition, a communication end flag is set (step S227). The communication end flag is a flag indicating that the voice control command has been normally received.

  If bit 7 of the received data is not “0” in step S225, the received data is stored again in the first byte of the reception buffer (step S228).

  As described above, in this embodiment, the voice control command is sent from the main board 31 only once so that the receiving side can recognize it. Then, the possibility of garbled data due to noise or the like cannot be denied. Therefore, in this embodiment, bit 7 of the first byte (MODE) in the 2-byte voice control command is set to “1”, bit 7 of the second byte (EXT) is set to “0”, and the receiving side Thus, it is possible to identify whether the first byte or the second byte has been received. If data corruption or the like occurs in the first byte and bit 7 is no longer “1”, such data is discarded according to the determination in step S223. In addition, when data is garbled in the second byte and the bit 7 is not “0”, that is, when it becomes “1”, the received data becomes 1 by the processing of step S225 and step S228. Judged to be the byte.

  Thereafter, the first byte of the next voice control command is transmitted from the main board 31 side. If the first byte can be correctly received, the reception is again performed by the processing of step S225 and step S228. It is determined that the data is the first byte. That is, from that point on, it is determined that the first byte sent from the main board 31 is the first byte on the receiving side. Therefore, even if data corruption occurs between the boards, one command is not correctly received on the receiving side. Thereafter, on the receiving side, the second byte of the command sent from the main board 31 is the first byte (MODE). ) And the first byte of the command is not determined to be the second byte (EXT).

  FIG. 46 is an explanatory diagram showing a configuration example of a voice pattern table set in a ROM mounted on the voice control board 70. As shown in FIG. As shown in FIG. 46, a receivable voice control command and corresponding pattern data are set in the voice pattern table.

  The ROM in which the sound pattern table is set may be built in the sound control CPU 701 or may be externally attached. 47 also shows commands that are not received by the voice control means. However, if columns corresponding to commands that are not received are provided, for example, control of each electrical component from the main board 31 is possible. This can be easily handled when a common command is sent to the means. That is, in the voice pattern table, data indicating “no change” is set for a command that is not necessary, and when such a command is received, the voice control content may not be changed.

  FIG. 47 is a flowchart showing the voice control process (step S205). In the voice control process, the voice control CPU 701 checks whether a communication end flag is set (step S231). The fact that the communication end flag is set means that a voice control command has been received.

  Therefore, if the communication end flag is set, it is cleared (step S232), the reception command is read from the reception buffer, and then the pattern data corresponding to the reception command in the voice pattern table is read (step S233). Then, control data corresponding to the read pattern data is read from the ROM (step S234), and the following voice control is performed based on the read control data. The control data is data such as sound type and sound duration, and is set in the ROM corresponding to each pattern data.

  In this embodiment, the speech synthesis circuit 702 is controlled by a transfer request signal (SIRQ), a serial clock signal (SICK), a serial data signal (SI), and a transfer end signal (SRDY). When the SIRQ becomes low level, the voice synthesis circuit 702 captures SI one bit at a time in synchronization with SICK, and when SRDY becomes low level, interprets data composed of each SI received as one voice reproduction data. To do. Therefore, the voice control CPU 701 turns on SIRQ (low level) (step S235), outputs the control data read from the ROM as SI in synchronization with SICK (step S236), and when output is completed, sets SRDY to low. The level is set (step S237). When the voice synthesis circuit 702 receives control data by SI, the voice synthesis circuit 702 generates a voice corresponding to the received control data.

  Next, the operation of the lamp control means will be described. FIG. 48 is a flowchart showing main processing executed by the lamp control CPU 351. In the main process, first, an initial value setting process such as clearing the RAM area is performed (step S241). Thereafter, in this embodiment, the CPU 351 for lamp control shifts to a loop process for confirming the monitoring of the timer interrupt flag (step S242). As shown in FIG. 49, when a timer interrupt occurs, the lamp control CPU 351 sets a timer interrupt flag (step S247). If the timer interrupt flag is set in the main process, the lamp control CPU 351 clears the flag (step S243) and performs the lamp control process (step S245).

  In this embodiment, it is assumed that the timer interrupt takes every 2 ms. That is, the lamp control process is started every 2 ms.

  FIG. 50 is a flowchart showing lamp control command reception processing by interrupt processing. The lamp control INT signal from the main board 31 is input to the interrupt terminal of the lamp control CPU 351. Therefore, when the INT signal from the main board 31 is turned on, the lamp control CPU 351 is interrupted, and the lamp control command reception process shown in FIG. 50 is started.

  In the lamp control command reception process, the lamp control CPU 351 first reads data from an input port assigned to input of lamp control command data (step S251). Then, it is confirmed whether or not the first byte of the 2-byte lamp control command has been received (step S252). Whether the data has already been received can be confirmed by checking whether valid data is set in the first byte of the reception buffer.

  If the first byte has not been received yet, it is confirmed whether or not bit 7 of the received 1 byte is “1” (step S253). Bit 7 must be “1” in the MODE byte (first byte) in the 2-byte configuration ramp control command (see FIG. 26). If bit 7 is “1”, it is determined that a valid first byte has been received, and the received command is stored in the first byte of the reception buffer (step S254).

  If the first byte has already been received, it is confirmed whether bit 7 of the received 1 byte is “0” (step S255). Bit 7 must be “0” in the EXT byte (second byte) of the 2-byte ramp control command (see FIG. 26). In this case, if bit 7 is “0”, it is determined that a valid second byte has been received, and the received command is stored in the second byte of the reception buffer (step S256). Also, a communication end flag is set (step S257). The communication end flag is a flag indicating that the lamp control command has been normally received.

  If bit 7 of the received data is not “0” in step S255, the received data is newly stored in the first byte of the reception buffer (step S258).

  As described above, in this embodiment, the lamp control command is sent from the main board 31 only once so that the receiving side can recognize it. Then, the possibility of garbled data due to noise or the like cannot be denied. Therefore, in this embodiment, bit 7 of the first byte (MODE) of the ramp control command having a 2-byte configuration is set to “1”, and bit 7 of the second byte (EXT) is set to “0”. Thus, it is possible to identify whether the first byte or the second byte has been received. If data corruption or the like occurs in the first byte and bit 7 is no longer “1”, such data is discarded according to the determination in step S253. In addition, when data is garbled in the second byte and bit 7 is no longer “0”, that is, when it becomes “1”, the received data is 1 by the processing of step S255 and step S258. Judged to be the byte.

  After that, the first byte of the next lamp control command is sent from the main board 31 side. If the first byte can be correctly received, the reception is again performed by the processing of step S255 and step S258. It is determined that the data is the first byte. That is, it is determined that the first byte sent from that point is the first byte on the receiving side. Therefore, even if data corruption occurs between the boards, one command is not correctly received on the receiving side. Thereafter, on the receiving side, the second byte of the command sent from the main board 31 is the first byte (MODE). ) And the first byte of the command is not determined to be the second byte (EXT).

  FIG. 51 is an explanatory diagram showing a configuration example of a lamp pattern table set in a ROM mounted on the lamp control board 35. As shown in FIG. 51, the lamp pattern table includes a lamp control command that can be received and a decoration lamp (game board decoration lamp 25, frame side game effect lamps / LEDs 25a, 25b, and 25c) corresponding to the command that can be received. Pattern data relating to lighting / extinction of the lamp 18, the gate passage indicator 41, the prize ball lamp 51 and the ball break lamp 52 is set.

  The ROM in which the lamp pattern table is set may be built in the lamp control CPU 351 or may be externally attached. 51 also shows commands that are not received by the lamp control means. If a column corresponding to commands that are not received is provided, for example, each electric component control can be performed from the main board 31. This can be easily handled when a common command is sent to the means. That is, in the lamp pattern table, data indicating “no change” is set for an unnecessary command, and when such a command is received, the lamp control content may not be changed.

  FIG. 52 is a flowchart showing the lamp control process (step S245). In the lamp control process, the lamp control CPU 351 checks whether or not a communication end flag is set (step S261). The fact that the communication end flag is set means that a lamp control command has been received.

  Therefore, if the communication end flag is set, it is cleared (step S262), the reception command is read from the reception buffer, and then the pattern data corresponding to the reception command in the lamp pattern table is read (step S263). If the pattern data exists, that is, if the pattern data is described (step S264), the corresponding control pattern is changed (step S265). For example, when a lamp control command of “8000” is received, the control pattern related to the decoration lamp is changed, and other start memory display 18, gate passing display 41, prize ball lamp 51, and out-of-ball lamp 52 are changed. Do not change the control pattern. Then, a lamp / LED control process (step S266) is executed.

  Also, when a test command (F000) indicating a lamp test is received, each light emitter is turned on or blinked according to the lamp / LED control pattern corresponding to the test pattern. The lamp / LED control pattern is stored in the ROM in advance. Examples of lamp / LED control patterns corresponding to the test pattern include decoration lamps (game board decoration lamp 25, frame side game effect lamps / LEDs 25a, 25b, 25c), start-up memory display 18, gate passage display 41, There is a pattern in which the winning ball lamp 51 and the ball break lamp 52 are sequentially turned on for a predetermined time (for example, 1 second) and such control is repeated for a predetermined period.

  By preparing a lamp test based on such a test command, it is possible to easily check whether each light emitter is good or bad at the time of inspection of a gaming machine.

  As an opportunity for the game control means to send a test command, for example, when a switch is installed on the power supply board 910 and the switch is pressed, or when the power is turned on while the switch is pressed. It can be. As a trigger for sending the test command, it is of course possible to use another means that makes it easy to start the lamp test. Furthermore, the lamp control means may be configured to start the lamp test independently, not in response to a command from the game control means. For example, by preparing a switch on the lamp control board 35 and starting the lamp test when the switch is pressed, or by introducing the switch output of the power supply board 910 described above to the lamp control board 35, the switch A lamp test may be started when is pressed down.

  FIG. 53 is an explanatory diagram showing an example of a lamp / LED control pattern corresponding to the pattern data. The lamp / LED control pattern is also set in the ROM. The example shown in FIG. 53 is a lamp / LED control pattern in the case where control is performed so as to repeatedly turn on and off, and a lighting time and a light-off time are set.

  FIG. 54 is a flowchart showing an example of the lamp / LED control process (step S266). In the lamp / LED control process, the lamp control CPU 351 first checks whether or not it is lit (step S271). If it is lit, it is checked whether or not the actual lighting time has passed the lighting time set in the lamp / LED control pattern (step S272). If it has elapsed, the lamp / LED to be controlled is turned off (step S273).

  If it is not lit, it is checked whether the actual turn-off time has passed the turn-off time set in the lamp / LED control pattern (step S274). If it has elapsed, the lamp / LED to be controlled is turned on (step S275).

  This example is a simple example of repeating lighting and extinguishing, but even when a more complicated lighting / extinguishing pattern is realized, the lamp pattern table as illustrated in FIG. 51 corresponds to the lamp control command. In addition to setting the pattern data and preparing a lamp / LED control pattern (a table in which specific lighting times are set) corresponding to each pattern data, any lighting / extinguishing pattern can be realized. Can do.

  In the lamp pattern table illustrated in FIG. 51, “ON” or “OFF” is set for the prize ball lamp 51 and the ball-out lamp 52. In this case, for example, infinity is set as the lighting time or the light-off time in the lamp / LED control pattern illustrated in FIG. If such a setting is made, for example, during lighting, lighting is continued until a lamp control command for instructing turning off is received. Further, the display patterns of the winning ball lamp 51 and the ball-out lamp 52 are not limited to lighting or extinguishing, and other display patterns such as blinking patterns may be used. Furthermore, the display color of the prize ball lamp 51 is changed between when there is a remaining number of prize balls (for example, red and green), and when the supply ball is below a predetermined amount, it is out of ball. The display color of the lamp 52 may be changed (for example, red and green).

  In the above-described embodiment, the winning ball lamp 51 and the ball-out lamp 52 are separately installed, but a light emitter such as one lamp may also be used. In that case, for example, by changing the display color of the illuminant, it is notified whether or not the supply balls are below a predetermined amount and whether or not there are remaining unpaid prize balls.

  As described above, in this embodiment, the lamp control means controls the light emitters such as lamps and LEDs provided on the frame side, and the light emitters such as lamps and LEDs provided on the game board. Control. Therefore, in the configuration in which the lamp control board 35 is provided separately from the main board 31, the light emitter control can be simply realized. In addition, since the game control means does not need to control light emitters such as lamps and LEDs on the game board, the load required for the light emitter control of the game control means is reduced, the time required for game progress control increases, The program capacity that can be allocated to the progress control is increased.

  The lamp control means controls the light emitters provided on the frame side and the light emitters provided on the game board based on the pattern data. Therefore, even if the light emitter display control is performed according to the command from the game control means, the configuration of the lamp control means can be simply realized.

  Further, the lamp control means performs display control of the winning ball lamp 51 and the ball-out lamp 52 based on the pattern data. Therefore, even if the display control of the prize ball lamp 51 and the ball break lamp 52 is performed in accordance with a command from the game control means, the configuration of the lamp control means can be simply realized. Further, since the control is performed based on the pattern data, the display pattern can be easily changed. When changing the display pattern, it is only necessary to change the contents of the pattern data and not to change the program. As a result, the program of the lamp control means can be easily used for other models.

  In addition, the lamp control means provided separately from the game control means only performs display control of the decoration lamp 25 and the game effect lamps / LEDs 28a, 28b, and 28c that are variously decoratively controlled according to the progress of the game. In addition, display control of the start memory display 18, the gate passing memory display 41, the prize ball lamp 51 and the ball break lamp 52 which may change the display contents at random asynchronously with the game currently in progress is also performed. Therefore, the game control means does not have to perform specific lighting / extinguishing control even for a light emitter whose display content changes asynchronously with the game currently in progress, and the control burden on the light emitter control of the game control means is greatly reduced. Has been.

  The lamp control commands sent from the game control means to the lamp control means are systematically constructed. As a result, the lamp control means that has received the lamp control command can immediately determine which system command has been received, and the program creation is facilitated. Furthermore, since the program analysis becomes easy, it becomes easy to change the program, and it is also easy to modify a part and divert it to other models.

  FIG. 55 is a block diagram showing another configuration example of the main board 31 and the electrical component control board. In this example, there is provided an effect control board 400 on which effect control means for controlling light emitters, sound generation means and symbol display means provided in the gaming machine are mounted. The effect control means receives the effect control command from the game control means, and on the basis of the received command, the decoration lamp 25, the game effect lamps / LEDs 28a, 28b, 28c, the prize ball lamp 51, the ball out lamp 52, and the start memory display The display 18 and the gate passing storage display 41 are controlled, and the sound generation from the speaker 27 is controlled. Further, display control is performed on the variable display unit 9 that variably displays a special symbol as identification information and the variable display unit 10 that variably displays a normal symbol as identification information. In FIG. 55, portions related to launch control are omitted.

  FIG. 56 is a block diagram showing a circuit configuration example of the effect control board 400 together with the command transmission part of the main board 31. As shown in FIG. 56, 8-bit data CD0 to CD7 (effect control signals constituting an effect control command) are output from the output port output port 571 of the main board 31, and a 1-bit strobe signal is output from the output port 572. (INT signal) is output. Note that the method of sending the effect control command may be the same as that of the symbol control command shown in FIG. 22, for example.

  The effect control CPU 401 operates in accordance with a program stored in the control data ROM 102. When an INT signal is input from the main board 31 via the noise filter 107 and the input buffer circuit 105B, the effect control is performed via the input buffer circuit 105A. Receive commands. As the input buffer circuits 105A and 105B, for example, general-purpose ICs 74HC540 and 74HC14 can be used. If the effect control CPU 401 does not have an I / O port, an I / O port is provided between the input buffer circuits 105A and 105B and the effect control CPU 401.

  Then, the effect control CPU 101 performs display control of the variable display unit 9 and the variable display 10 in accordance with the received effect control command. In order to perform display control of the variable display section 9, specifically, a command according to the effect control command is given to the VDP 103. The VDP 103 reads necessary data from the character ROM 86. The VDP 103 generates image data to be displayed on the variable display unit 9 according to the input data, and outputs the R, G, B signal and the synchronization signal to the variable display unit 9.

  The input buffer circuits 105 </ b> A and 105 </ b> B can pass signals only in the direction from the main board 31 to the effect control board 400. Therefore, there is no room for signals to be transmitted from the production control board 400 side to the main board 31 side. That is, the input buffer circuits 105A and 105B constitute irreversible information input means together with the input ports. Even if unauthorized modification is added to the circuit in the production control board 400, a signal output by the unauthorized modification is not transmitted to the main board 31 side.

  Note that the outputs of the output ports 571 and 572 may be output to the effect control board 400 as they are, but by providing output buffer circuits 63A and 63B capable of transmitting signals only in one direction, the main control board 31 and the effect control board 400 are provided. One-way signal transmission can be made more reliable. That is, the output buffer circuits 63A and 63B constitute irreversible information output means together with the output ports.

  In addition, for example, a three-terminal capacitor or a ferrite bead is used as the noise filter 107 that cuts off the high-frequency signal. However, the presence of the noise filter 107 eliminates the influence even if the production control command has noise between the boards. Is done. A noise filter may be provided also on the output side of the buffer circuits 63A and 63B of the main board 31.

  Further, for example, a voice synthesis circuit 702 using a digital signal processor generates a voice or a sound effect according to an instruction from the CPU 401 for effect control and outputs it to the volume switching circuit 703. The volume switching circuit 703 sets the output level of the audio control CPU 701 to a level corresponding to the set volume and outputs the level to the volume amplification circuit 704. The volume amplifier circuit 704 outputs the amplified audio signal to the speaker 27.

  In addition, the effect control CPU 401 performs the game effect LED 28a, the game effect lamps 28b, 28c, and the game effect LEDs 28b, 28c, 28c, 28c, 28c, 28c, 28c, 28c, 28c, 28c, 28c, 28c, 28c. A lighting / extinguishing signal is output to the decoration lamp 25. The on / off signal is output to the game effect LED 28a, the game effect lamps 28b and 28c, and the decoration lamp 25. Further, in response to the received control command, the award ball lamp 51 and the off-ball lamp 52 are turned on / off, and a light on / off signal is output to the start memory display 18 and the gate passing memory display 41. Note that the lighting / extinguishing pattern for each light emitter is stored in the internal ROM or the external ROM of the CPU 401 for effect control.

  FIG. 57 is an explanatory diagram showing a configuration example of a pattern table set in a ROM mounted on the effect control board 400. As shown in FIG. 57, the pattern table includes receivable effect control commands and corresponding lamps (game board decoration lamp 25, frame side game effect lamps / LEDs 25a, 25b, 25c, prize ball lamp 51, ball Pattern data relating to lighting / extinguishing of the turn-off lamp 52, the start memory indicator 18 and the gate passing memory indicator 41), pattern data relating to sound control, and pattern data relating to symbol control are set. The ROM in which the pattern table is set may be built in the effect control CPU 401 or may be externally attached.

  The details of each data of the lamp control in FIG. 57 are the same as those shown in FIG. Accordingly, when receiving the effect control command, the effect control CPU 401 can read the lamp pattern data corresponding to the received command and perform lamp lighting / extinguishing control according to the read data, as described above. Also, the contents of each data of the voice control in FIG. 57 are the same as those shown in FIG. Therefore, when receiving the effect control command, the effect control CPU 401 can read the sound pattern data corresponding to the received command and perform sound generation control according to the read data, as described above.

  For example, when receiving the command “8000 (H)” from the game control means, the effect control CPU 401 reads data indicating “variation # 1 variation pattern” from the pattern data related to the symbol control of the ROM. The data includes information indicating the variation time and the variation speed determined as the variation pattern # 1. Therefore, the effect control CPU 401 can control the variable display of the symbols on the variable display unit 9 according to the information. At the same time, the effect control CPU 401 reads data indicating “variation pattern designation # 1” from the lighting pattern data in the ROM. The data includes information regarding the blinking state (for example, the lighting duration time or the lighting duration time) of each light emitter according to the variation pattern # 1. The effect control CPU 401 performs lighting / extinguishing control of each light emitter in accordance with the information. Further, the effect control CPU 401 reads out data indicating “variation # 1 audio pattern” from the audio pattern data in the ROM. The data includes information related to the sound generation pattern (for example, the type of sound and its duration) according to the variation pattern # 1. The effect control CPU 401 outputs a control signal to the voice synthesis circuit 702 according to the information.

  As described above, in the effect control command, a plurality of light emitting components, sound generating components, and identification information display components (all of the light emitting components, sound generating components, and identification information display components in the above example) are controlled. Therefore, the effect control CPU 401 can control each of the light emitting component, the sound generating component, and the identification information display component when receiving such one command.

  Further, the pattern table also includes data indicating display patterns of the variable display unit 9 and the variable display 10. When receiving the effect control command, the effect control CPU 401 can read the variation pattern data corresponding to the received command and perform variable display control of the variable display unit 9 and the variable display 10 according to the read data. For example, as the “variation # 1 variation pattern”, the symbol variation speed and variation time of variation # 1 are set. Alternatively, the ROM address where the symbol variation speed and variation time are set is set. The effect control CPU 401 performs variable display of symbols for the set variation time according to the set symbol variation speed. Data about the background and characters are also set. Therefore, the effect control CPU 401 can also perform control of displaying a background or displaying a character according to the set data.

  As described above, in this example, the effect control means performs light emitter display control, sound generation control, and symbol display control. Therefore, the game control means mounted on the main board 31 may send out one control command for game effects and the like. As a result, the burden on sending control commands is greatly reduced.

  FIG. 58 is a block diagram showing another configuration example of the main board 31 and the electrical component control board. In this example, the lamp control means mounted on the lamp control board 35 receives a lamp control command from the symbol control means. Therefore, the game control means mounted on the main board 31 does not need to send a lamp control command.

  FIG. 59 is a block diagram showing signal transmission / reception portions in the symbol control board 80 and the lamp control board 35. As shown in FIG. 59, a lamp control command related to lamp control is output from the output ports (output ports E and F) 455 and 456 of the symbol control board 80. The output port 455 outputs 8-bit data, and the output port 456 outputs a 1-bit INT signal. The lamp control command sending method and command content may be the same as those shown in FIGS.

  In the lamp control board 35, a control command from the symbol control board 80 is input to the lamp control CPU 351 via the input buffer circuits 355A and 355B. When the lamp control CPU 351 does not include an I / O port, an I / O port is provided between the input buffer circuits 355A and 355B and the lamp control CPU 351.

  In this example, the game control means sends, for example, the control commands shown in the left column (MODE and EXIT) of FIG. 57 to the symbol control board 80 as symbol control commands. That is, commands that are not directly related to the symbol display control are also transmitted as symbol control commands. Then, for example, the pattern data shown in the right column of FIG. 57 is stored in the ROM of the symbol control board 80. Therefore, the symbol control means, that is, the symbol control CPU 101 performs symbol display control according to the data corresponding to the corresponding pattern data. If there is no corresponding pattern data, the received control command is ignored.

  The symbol control means sends the received symbol control command as it is to the lamp control board 35 as a lamp control command. Therefore, the symbol control command and the lamp control command have a common form. That is, the form of the command sent from the game control means to the design control means and the form of the command sent from the design control means to the light emitter control means are at least the data amount of the command output at one time (this example In this example, the symbol control command for the symbol control means and the illuminant control command for the illuminant control means are the same command. The reason why the same command may be used is that the production start time by the variable display unit corresponding to the same command and the production start time by the illuminant are related to each other (see FIG. 57).

  The symbol control means may send only the command used by the lamp control means to the lamp control board 35 among the received symbol control commands. Further, in the symbol control board 80, the symbol control CPU 101 does not send a lamp control command, but the symbol control command from the main board 31 is branched in hardware so that the symbol control command is directly sent to the lamp control board 35. You may comprise so that it may be sent out.

  As described above, the game control means does not need to send a lamp control command to the lamp control means provided separately from the main board. Therefore, the load required for sending the control command of the game control means is reduced.

  The voice control command for the voice control board 70 may be sent from the symbol control board 80. Further, a lamp control command for the lamp control board 35 and a voice control command for the voice control board 70 may be transmitted from the symbol control board 80. In any case, since the number of control commands to be sent from the game control means is reduced, the load required for sending the control commands from the game control means is reduced.

  In each of the above examples, the case where the effect control means controls the light emitter, sound, and symbol display, and the case where the symbol control means supplies a lamp control command to the lamp control means and the sound control means, The control command transmission load of the game control means can be reduced by another configuration.

  For example, an effect control board equipped with an effect control means for controlling the light emitter and sound, an effect control board equipped with an effect control means for controlling the light emitter and the design, It is also possible to provide an effect control board on which effect control means for performing control is mounted. FIG. 60 shows an example in which an effect control board 500 provided with effect control means for controlling the light emitter and sound is provided. Also in this case, the game control means need only send out one kind of effect control command for the light emitter and lamp control, and the load required for sending the control command of the game control means is reduced.

  As described above, if the production control boards 400 and 500 are provided or the control command is supplied from the symbol control board 80 to another electrical component control board, the burden of sending the control command of the game control means is reduced. As a result, the game effects can be enriched.

  In the above embodiment, a gaming machine in which a game ball having a predetermined valuable value is paid out in accordance with a winning is taken as an example, but a gaming machine in which a medal or the like as a predetermined valuable value is paid out in accordance with a winning In addition, the present invention is applicable. Further, the present invention can be applied not only to a gaming machine that actually pays out gaming media, but also to gaming machines that add a score as a predetermined valuable value instead of paying out gaming media.

  In each of the above embodiments, the following gaming machines are also disclosed.

  A gaming machine configured such that the command further includes a command indicating that an electrical component is controlled for information notification to a player. In such a configuration, the effect control means can also perform control for information notification, and it is not necessary to provide a separate control means for information notification, thereby simplifying the configuration of the gaming machine. be able to.

  A gaming machine configured to include a command indicating that the command controls a plurality of light emitting components, sound generating components, and identification information display components. In such a configuration, since a plurality of electrical components can be controlled with one command, the number of commands sent out by the game control means is reduced, and the load related to sending the control commands of the game control means is reduced. Is done.

  A game machine in which the production control means executes control of electrical components based on pattern data held in advance. In the case of such a configuration, there is an effect that the structure of the program for controlling the electrical components can be simplified.

  A gaming machine configured such that the command transmitted from the game control means to the effect control means is, for example, a command capable of specifying data in pattern data. In the case of such a configuration, the effect control means can search for the pattern data based on the received information, and can further simplify the structure of the program for controlling the electrical components.

  A gaming machine configured such that the game control means transmits each command only once so that the effect control means can receive the command. In the case of such a configuration, there is an effect that the control for sending the control command in the game control means is simplified.

  A gaming machine configured such that a command is transmitted from the game control means to the effect control means via an irreversible information transmission means capable of only outputting information. In the case of such a configuration, there is an effect that an illegal signal can be prevented from being input to the game control means and it is difficult to receive an illegal act.

  A gaming machine configured such that an input circuit for inputting a command to the effect control means is an irreversible information input means capable of only inputting information. In the case of such a configuration, it is possible to prevent an illegal signal from being supplied to the main board via the effect control means, and to make it difficult to receive an illegal act.

  The gaming machine has a variable display section as an identification information display component whose display state can be changed, and can be controlled to a gaming state advantageous to the player when the display result in the variable display section is a predetermined display result. A gaming machine, wherein the effect control means is configured to perform variable display control of the variable display unit in response to a command from the game control means. In the case of such a configuration, the display control of the variable display unit is executed by one effect control means, so that the device configuration is simplified. In general, in a gaming machine, the effect of the variable display unit and the effect of the light emitter and sound generating means are synchronized, so the effect control means can change the variable display part, light emitter and sound generating means according to one command. Control can be performed collectively, and the control of the production control means is simplified.

31 Game control board (main board)
35 Lamp control board 37 Dispensing control board 51 Prize ball lamp 52 Out of ball lamp 53 Basic circuit 56 CPU
70 Voice control board 80 Design control board 101 Design control CPU
351 CPU for lamp control
400,500 Production control board 401 Production control CPU
701 Voice control CPU

Claims (1)

A specific gaming state that includes a variable display unit that variably displays a plurality of types of identification information that can identify each of them and that derives and displays a display result, and that is advantageous to the player when the specific display result is derived and displayed on the variable display unit A gaming machine to control
Game control means for controlling the progress of the game;
Electrical component control means for controlling light emitting components and sound generating components as electrical components provided in the gaming machine ;
Display control means for controlling the variable display unit,
The game control means includes command output means for outputting a command indicating that the light emitting component, the sound generating component, and the variable display unit are controlled ,
The electrical component control means can control the light emitting component and the sound generating component based on the command output from the command output means,
The display control means can control the variable display section based on the command output from the command output means,
The command output means outputs a command that can specify a variable display time from the start of variable display of identification information in the variable display unit to the display of derived display results only when variable display of identification information is started. And a command indicating that the identification information is stopped when the variable display time has elapsed .

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