JP4509634B2 - Synchronization signal generating circuit and color television camera having the same - Google Patents

Description

  The present invention relates to a color television camera, and more particularly to a synchronizing signal generation circuit for a color television camera.

Conventionally, when a system is operated by combining a plurality of color television cameras, it is necessary to prevent synchronization disturbance. That is, when switching the images of a plurality of color television cameras and outputting them to one output device such as a monitor, if the synchronization of the respective color television cameras is not matched at the time of switching, synchronization disturbance occurs. In order to prevent this disturbance of synchronization, the same synchronization signal (external synchronization signal) is input from the outside to the plurality of color television cameras to synchronize. For this reason, the color television camera has an external synchronization function for synchronizing with the video signal input from the outside. The external synchronization function of the color television camera generates a video signal in which the luminance signal and the chroma signal of the own device are respectively synchronized with the luminance signal and the chroma signal included in the video signal input from the outside.
Therefore, in order to synchronize the video signal of the color television camera and the video signal of the other color television camera, the horizontal synchronization signal is separated from the luminance signal included in the video signal input from the outside, and is also converted into the video signal. The burst signal is separated from the included chroma signal. Then, the phase comparison is made between the separated horizontal sync signal and the own horizontal sync signal made from the oscillation circuit that generates the clock that becomes the reference for the luminance signal of the color TV camera output signal, and the reference of the luminance signal of the own TV A PLL (Phase Locked Loop) that controls the oscillation frequency of the oscillation circuit that generates the clock is configured. By doing so, the synchronization signal of the own device can be synchronized with the synchronization signal included in the video signal of another color television camera input from the outside. In addition, the phase of the separated burst signal and the own carrier's subcarrier signal (burst signal) made from the oscillation circuit that generates the clock that serves as the reference for the chroma signal of the color television camera output signal are compared, and the own chroma signal A PLL that controls the oscillation frequency of an oscillation circuit that generates a clock serving as a reference for the above is configured. As a result, the chroma signal of the own device can be synchronized with the chroma signal included in the video signal of another color television camera input from the outside. By operating the two PLLs of the luminance system and the chroma system at the same time, both the luminance signal and the chroma signal are synchronized with the luminance signal and the chroma signal included in the video signal input from the outside. Can be output. (For example, refer to Patent Document 1).
Japanese Patent Laid-Open No. 6-197237

  In the above-described prior art, the phase and frequency are often different between the horizontal synchronizing clock signal and the chroma clock signal of the color television camera. Therefore, when the external synchronization function with good phase accuracy is realized by a digital circuit, the horizontal synchronization is digitized using the own horizontal synchronization clock signal, and the chroma synchronization is digitized by the own chroma clock signal. Two analog / digital converters are required, and there is a problem that costs and power consumption increase.

  The present invention provides a digital conversion means for converting an analog video signal input from the outside of a color television camera into a digital video signal, a first horizontal synchronizing signal, a first burst signal, and a burst flag signal from the digital video signal. Separating means for separating the first horizontal synchronizing signal, a horizontal synchronizing means for synchronizing the second horizontal synchronizing signal generated by the color television camera, and a horizontal synchronizing clock signal outputted from the horizontal synchronizing means, A synchronizing signal generating circuit for generating a chroma clock signal output from a synchronizing means for synchronizing the first burst signal and a second burst signal generated by the color television camera, wherein the digital converting means When sampling is performed during the high level period of the burst flag signal, the chroma clock A synchronizing signal generating circuit which is characterized in that at issue.

  Further, in the above-mentioned synchronization signal generation circuit, the sampling of the digital conversion means is performed by the horizontal synchronization system clock signal during the low level period of the burst flag signal.

  According to the present invention, by switching the sampling signal of one analog / digital converter, it is possible to separate the synchronization signal with good phase accuracy from the external video signal. Also, the circuit scale can be reduced.

An embodiment of a signal generation circuit according to the present invention will be described below with reference to FIG. FIG. 1 is a block diagram showing a configuration of a synchronization signal generating circuit according to an embodiment of the present invention.
In FIG. 1, reference numeral 101 denotes an external video signal input from the outside. The external video signal 101 is a video signal including a synchronization signal such as VBS (Video Burst Signal) or BBS (Black Burst Signal).

  Reference numeral 102 denotes a terminal for inputting an external video signal. Reference numeral 103 denotes an analog / digital converter (hereinafter referred to as A / D) that converts an analog external video signal 101 input from the outside into a digital video signal. A synchronization separation unit 104 separates the synchronization signal from the digitized external video signal. 105 is an external horizontal sync signal output from the sync separator 104, 106 is an external burst signal, and 107 is a burst flag signal. The burst flag signal 107 is a period of the burst signal 106. During the burst signal period, the burst flag signal 107 is at a high level.

  A synchronization signal generator 119 generates a horizontal synchronization signal, a burst signal, and the like. Reference numeral 117 output from the synchronization signal generator 119 is an internal horizontal synchronization signal, and 118 is an internal burst signal. Reference numeral 120 denotes various synchronization signals such as a composite synchronization signal, a horizontal drive signal, a vertical drive signal, and a field signal output from the synchronization signal generator 119. Reference numeral 121 denotes a terminal for outputting various synchronization signals 120.

  Reference numeral 109 denotes a phase comparison unit that compares the phases of the external horizontal synchronization signal 105 and the internal horizontal synchronization signal 117. Reference numeral 111 denotes an fck oscillation unit that outputs a horizontal synchronizing clock signal. A frequency control unit 110 controls the oscillation frequency of the fck oscillation unit 111 in accordance with the output of the phase comparison unit 109. Reference numeral 112 denotes a horizontal synchronization clock signal (hereinafter referred to as fck signal) output from the fck oscillation unit 111.

  A phase comparator 113 compares the phases of the external burst signal 106 and the internal burst signal 118. Reference numeral 115 denotes a 4 fsc oscillation unit that outputs a chroma clock signal. Reference numeral 114 denotes a frequency control unit that controls the oscillation frequency of the 4 fsc oscillation unit 115 in accordance with the output of the phase comparison unit 113. Reference numeral 116 denotes a chroma clock signal (hereinafter referred to as 4fsc signal) output from the 4fsc oscillator 115.

A switch 108 switches between the fck signal 112 and the 4fsc signal 116 using a burst flag signal. Reference numeral 122 denotes an AD sampling signal output from the switch 108.
Next, the operation of one embodiment of the present invention will be described in detail with reference to FIGS. FIG. 2 is a waveform diagram for explaining the operation of the block diagram of the synchronizing signal generating circuit of one embodiment of the present invention.

  First, the waveform of the external video signal 101 input from the terminal 102 of FIG. 1 is shown in the external video signal 101 of FIG. 2, and this signal is a composite signal of a horizontal synchronizing signal, a burst signal, and a video signal. The external video signal 101 input from the terminal 102 is converted into a digital signal by the A / D 103 using the fck signal 112 asynchronous with the external video signal 101 as an AD sampling signal 122. The external video signal converted into the digital signal is separated into an external horizontal synchronization signal 105, an external burst signal 106, and a burst flag signal 107 by the sync separator 104. The separated external horizontal synchronization signal 105 is phase-compared with the internal horizontal synchronization signal 117 output from the synchronization signal generation unit 119 by the phase comparison unit 109. The frequency control unit 110 controls the oscillation frequency of the fck oscillation unit 111 according to the output of the phase comparison unit 109, and the fck signal 112 is output from the fck oscillation unit 111. The external burst signal 106 is phase-compared by the phase comparison unit 113 with the internal burst signal 118 output from the synchronization signal generation unit 119. The frequency control unit 114 controls the oscillation frequency of the 4 fsc oscillation unit 115 according to the output of the phase comparison unit 113, and the 4 fsc oscillation unit 115 outputs the 4 fsc signal 116. The output fck signal 112 and 4fsc signal 116 are input to the switch 108. The switch 108 performs switching based on the burst flag signal 107 separated by the synchronization separation unit 104. The signal output from the switch 108 becomes the AD sampling signal 122.

  Next, the external video signal 101 input from the terminal 102 is converted into a digital signal by the 4fsc signal 116 during the period when the burst flag signal 107 is High level at the A / D 103 and the period when the burst flag signal 107 is Low level. The fck signal 112 is converted into a digital signal. The external video signal converted into the digital signal is separated into an external horizontal sync signal 105, an external burst signal 106, and a burst flag signal 107 by the sync separator 104. The waveforms of the separated signals are the external horizontal synchronizing signal 105, the external burst signal 106, and the burst flag signal 107 shown in FIG. The separated external horizontal synchronization signal 105 is phase-compared with the internal horizontal synchronization signal 117 output from the synchronization signal generation unit 119 by the phase comparison unit 109. The frequency control unit 110 controls the oscillation frequency of the fck oscillation unit 111 according to the output of the phase comparison unit 109, and the fck signal 112 is output from the fck oscillation unit 111. The waveform of the fck signal 112 is the fck signal 112 of FIG. The separated external burst signal 106 is phase-compared by the phase comparator 113 with the internal burst signal 118 output from the synchronization signal generator 119. The frequency control unit 114 controls the oscillation frequency of the 4 fsc oscillation unit 115 according to the output of the phase comparison unit 113, and the 4 fsc oscillation unit 115 outputs the 4 fsc signal 116. The waveform of the 4fsc signal 116 is the 4fsc signal 116 of FIG.

  The output fck signal 112 and 4fsc signal 116 are input to the switch 108. The switching unit 108 performs switching using the burst flag signal 107 separated by the synchronization separation unit 104 as a switching signal. The signal output from the switch 108 becomes the AD sampling signal 122. The AD sampling signal 122 of the burst flag signal 107 is synchronized with the external burst signal 106 while the burst flag signal 107 is High level, and is synchronized with the external horizontal synchronization signal 105 when the burst flag signal 107 is Low level. The waveform of the AD sampling signal 122 is the AD sampling signal 122 of FIG. With this AD sampling signal 122, the external video signal 101 is converted into a digital signal in the A / D 103. With this configuration, it is possible to separate a synchronization signal with good phase accuracy from the external video signal 101.

Note that the waveform of the external burst signal 106 in FIG. 2 is a digital signal although it is shown as an analog signal for explaining the operation of the present invention.
In this embodiment, the sampling frequency of the burst signal is shown as a waveform that is four times the burst signal frequency. However, it is needless to say that the frequency is not limited and need not be an integral multiple.

In this embodiment, the description of the vertical synchronization signal is omitted.
An FPGA (Field Program Gate Array) may be used as another embodiment of the present invention.

  Although the present invention has been described in detail above, it is needless to say that the present invention is not limited to the signal generation circuit described herein and can be widely applied to other signal generation circuits.

The block diagram which shows the structure of the synchronizing signal generation circuit of one Example of this invention. The wave form diagram for demonstrating operation | movement of the block diagram of the synchronizing signal generation circuit of one Example of this invention.

Explanation of symbols

101: External video signal, 102: Terminal, 103: A / D, 104: Sync separator, 105: External horizontal sync signal, 106: External burst signal, 107: Burst flag signal, 108: Switch, 109: Phase comparison 110: frequency control unit, 111: fck oscillation unit, 112: fck signal, 113: phase comparison unit, 114: frequency control unit, 115: 4 fsc oscillation unit, 116: 4 fsc signal, 117: internal horizontal synchronization signal, 118 : Internal burst signal, 119: Synchronization signal generator, 120: Various synchronization signals, 121: Terminal, 122: AD sampling signal.

Claims (2)

Digital conversion means for converting an analog video signal input from the outside of the color television camera into a digital video signal, a first horizontal synchronization signal, a first burst signal, and a burst signal period from the digital video signal Separating means for separating into a burst flag signal which becomes a high level and becomes a low level in other periods, and synchronizes the first horizontal synchronizing signal and the second horizontal synchronizing signal generated by the color television camera, Horizontal synchronizing means for outputting a horizontal synchronizing clock signal, burst signal synchronizing means for synchronizing the first burst signal and a second burst signal generated by the color television camera, and generating a chroma clock signal; A synchronization signal generating circuit comprising:
Sampling of the digital conversion means is performed with the chroma clock signal when the burst flag signal is at a high level, and with the horizontal synchronization clock signal when the burst flag signal is at a low level. A synchronizing signal generating circuit.   2. The synchronizing signal generating circuit according to claim 1, wherein the chroma clock signal for sampling the digital conversion means is a clock signal that is an integral multiple of the frequency of the burst signal.