JP4505238B2 - Distortion compensation circuit - Google Patents

Description

  The present invention relates to a non-linear distortion compensation technique for reducing a non-linear distortion component output from a transmission apparatus that performs wireless radio wave transmission using a power amplifier.

  As an example of conventional nonlinear distortion compensation technology, in particular, the technology of the predistortion compensation method, see, for example, Film Information Technology Vol. 24, no. 79, BCS2000-92, “Adaptive Predistorter Type Distortion Compensating Power Amplifier” (Non-Patent Document 1). Here, FIG. 6 shows a block configuration example of a transmission apparatus including a conventional power amplifier, and this technique will be described below with reference to FIG.

  In FIG. 6, an input signal which is a signal to be transmitted is amplified by a power amplifier 55 through a distributor 51, a delay element 52, a phase adjuster 53, and a gain adjuster 54, and passes through a directional coupler 56 as an output signal. Is output. On the other hand, a part of the input signal distributed by the distributor 51 is converted into a digital signal by the detector 57 and the A / D converter 58.

  Further, a part of the output signal distributed by the directional coupler 56 is converted to an intermediate frequency by the mixer 59 and the synthesizer 60, and the out-of-band distortion power generated by the power amplifier 55 is extracted by the BPF 61. A / D converter 68 converts the signal into a digital signal.

  Hereinafter, a control method of the nonlinear distortion compensation operation will be described. The contents of the tables 64 and 65 are converted into analog signals by the DA converters 66 and 67, and the phase adjuster 53 and the gain adjuster 54 are controlled by the signals. The phase adjuster 53 and the gain adjuster 54 generate distortion having the same amplitude and opposite phase as the distortion generated in the power amplifier 55, cancel the distortion generated in the power amplifier 55, and perform nonlinear compensation.

  In the tables 64 and 65, addresses are assigned to envelope signals detected by the detector 57 and captured by the AD converter 58. Further, the arithmetic unit 63 learns by using the perturbation method so that the power of the distortion detected by the detector 62 is reduced, and the contents of the tables 64 and 65 are updated to sequentially obtain the optimum values that minimize the distortion. Rewrite.

  Note that, as described in Non-Patent Document 1, the table update method is equivalent to the case where the values of all the addresses are obtained by the perturbation method so that the table addresses are incremented by one. Update time is required, which makes it extremely impractical. Therefore, it is more practical to use the perturbation method when obtaining the values of eight representative points, for example, instead of obtaining all the values of the table by the perturbation method.

  FIG. 7 shows the relationship between the table address and the representative point in that case. Here, the table addresses are assumed to be 1 to 1024. First, addresses 1 to 1024 are represented by 8 points. In FIG. 7, the table values of the eight representative points and the representative point addresses are indicated by black circles.

  Here, the value of the eight representative point addresses (value indicated by the position in the height direction of the black circle) is increased (in the direction of the upward arrow in the figure) or reduced (in the lower part of the figure) while observing the distortion power. To the value with the smaller distortion. Thereafter, the same operation is repeated for the other representative points to optimize the table values. For the values of addresses other than the eight representative points, values interpolated using an FIR filter are used as update values.

  The update control of the values of the eight representative points is performed on the phase adjuster table and the gain adjuster table while monitoring the distortion power, and a total of 16 points are optimized using the perturbation method.

  As another conventional technique, Japanese Patent Laid-Open No. 2001-168774 (Patent Document 1) extracts a digital baseband signal of RF input and RF output of an RF amplifier, and detects a time difference and a phase difference between both signals. Both are synchronized and phased.

  In this state, the amplitude error and phase error of both signals are obtained, and the compensation amount of the amplitude and phase with respect to the amplitude value is sequentially selected from the compensation amounts that are registered and adaptively updated in the initial stage, and this compensation amount is selected as described above. Some of them compensate for distortion components by adding to an RF input digital baseband signal.

Emotional Technical Report Vol. 24, no. 79, BCS 2000-92, “Adaptive Predistorter Type Distortion Compensating Power Amplifier”, p. 91-96

JP 2001-168774 A, Abstract

  In the technique described in Non-Patent Document 1, distortion power is monitored, optimization processing is performed by a perturbation method so that the power is reduced, and nonlinear compensation of amplitude distortion components and phase distortion components is performed. With this technique, the magnitude of amplitude distortion and the magnitude of phase distortion cannot be distinguished. In addition, amplitude distortion includes third-order distortion component, fifth-order distortion component, and seventh-order distortion component, and phase distortion includes third-order distortion component, fifth-order distortion component, and seventh-order distortion component. I can't tell you. Therefore, it is obvious that not only the accuracy of compensation, but also the speed of compensation (convergence time) is greatly affected.

  In addition, since the distortion component generated in the power amplifier differs depending on variations in characteristics of the semiconductor devices constituting the power amplifier, the distortion component generated in the power amplifier should be adjusted to be smaller according to the characteristics of the power amplifier. However, in the technique disclosed in Patent Document 1, there is no description about this.

  Further, in the technique disclosed in Patent Document 1 described above, since only the difference is simply taken, when the amplitude of the input signal is small, the error of the difference value cannot be ignored and the distortion cannot be compensated.

  Further, it is desired to make the frequency characteristic of the output signal linear with respect to the input signal of the power amplifier. However, it is difficult to make the frequency characteristic uniform linear due to variations in characteristics of semiconductor devices constituting the power amplifier. In the technique described in the document description 1, there is no description about this.

  The purpose of the present invention is to generate distortion compensation signals accurately and at high speed when performing distortion compensation of power amplifiers, thereby improving the accuracy of distortion compensation, shortening the convergence time, and depending on the characteristics of the power amplifier. Another object of the present invention is to provide a distortion compensation circuit capable of adjusting the distortion component generated in the power amplifier to be smaller.

  Another object of the present invention is to provide a distortion compensation circuit capable of performing distortion compensation for a level with a small amplitude of an input signal.

  Still another object of the present invention is to provide a distortion compensation circuit capable of linearizing the frequency characteristic of an output signal with respect to an input signal of a power amplifier when distortion compensation of the power amplifier is performed.

  According to a first aspect of the present invention, there is provided a distortion compensating circuit according to the first aspect of the present invention, wherein a third-order intermodulation distortion out of distortion components generated in the power amplifier is obtained from an output signal of a power amplifier that amplifies an input signal in a high frequency band and the input signal. Distortion coefficient detection of at least the third-order amplitude distortion and the third-order phase distortion constituting the coefficient related to the third-order intermodulation distortion among the coefficient related to the fifth order intermodulation distortion and the coefficient related to the seventh-order intermodulation distortion Each of the circuits independently detects the distortion, and a distortion compensation signal is generated by a distortion compensation signal generation circuit based on at least the detected amplitude third-order distortion and phase third-order distortion. At least one of the generated distortion compensation signal and the input signal is generated. Is added through a variable delay filter and then multiplied by a multiplier, and then the power is amplified by the power amplifier.

  A distortion compensation circuit according to a second aspect of the present invention is the distortion compensation circuit according to the first aspect, wherein the distortion compensation signal generation circuit generates a fixed distortion compensation signal for a level at which the amplitude of the input signal is small, and the generated distortion compensation signal is generated. The fixed distortion compensation signal is added by a second multiplier after the multiplier and then amplified by the power amplifier.

  A distortion compensation circuit according to a third aspect of the present invention is the distortion compensation circuit according to the second aspect, wherein after the addition by the second multiplier, the power is amplified by the power amplifier after passing through the frequency characteristic adjustment circuit. And

  According to the present invention, when distortion compensation of a power amplifier is performed, the distortion compensation signal is generated accurately and at high speed, thereby improving the accuracy of distortion compensation and shortening the convergence time and according to the characteristics of the power amplifier. Thus, it is possible to obtain a distortion compensation circuit that can be adjusted to reduce the distortion component generated in the power amplifier. Furthermore, the present invention can provide a distortion compensation circuit capable of performing distortion compensation for a level with a small amplitude of the input signal. Furthermore, the present invention can provide a distortion compensation circuit that can linearize the frequency characteristics of the output signal with respect to the input signal of the power amplifier when performing distortion compensation of the power amplifier.

  Embodiments of the present invention will be described below.

  In the embodiment of the present invention, two types of distortion compensation signals corresponding to the input signal level are generated and used as the distortion compensation signal. One distortion compensation signal is a distortion compensation signal for automatic correction when the amplitude level of the input signal is relatively large, and the other distortion compensation signal is a fixed distortion compensation signal when the amplitude of the input signal is small.

  First, the automatic correction distortion compensation signal will be described.

  First, the principle for obtaining the value of the distortion generated in the power amplifier in order to generate the distortion compensation signal having the reverse characteristic will be described. In general, the characteristics of a power amplifier can be expressed as a development equation shown in equation (1) where an input signal is vin and an output signal is Vout.

ここでα０〜α７は、各々の次数の項における係数であり、電力増幅器に応じた値を示すものとなっている。なお、これら係数は、経時変化等によっても変動し得るものである。

Here, α0 to α7 are coefficients in terms of respective orders, and indicate values according to the power amplifier. Note that these coefficients can also vary due to changes over time.

  By the way, when a signal without distortion is power amplified by the power amplifier having the characteristic expressed by the equation (1), the output signal Vout becomes a signal distorted according to the values of α0 to α7. Here, of the odd-order terms, the third-order terms, the fifth-order terms, and the seventh-order terms are the third-order intermodulation distortion (IM3), the fifth-order intermodulation distortion (IM5), and the seventh-order intermodulation distortion. (IM7) is generated. Since the distortion generated for these odd-order terms falls in the desired wave band, which is the band of only the input signal, it is necessary to remove the distortion by a distortion compensation circuit such as predistortion. However, the distortion generated for the odd-order terms of the 7th order or higher has a value that is negligible in the present embodiment, and is not a removal target.

  On the other hand, the distortion generated for the even-order term falls into a frequency component far from the desired wave band, and therefore can be easily removed by a filter or the like, and is not a target for distortion compensation of the present invention.

  Therefore, the distortion compensation technique of this embodiment need only be considered in terms of odd-order terms, and will be described with particular attention to the third, fifth, and seventh orders.

  First, it is assumed that an OFDM modulated wave is used as an input signal input to the power amplifier. When the input OFDM modulated wave signal Vin is expressed by a function of amplitude and phase, the following equation (2) is obtained.

ここで、
Ａ（ｔ）：振幅の瞬時値
θ（ｔ）：位相の瞬時値
である。

here,
A (t): instantaneous amplitude value θ (t): instantaneous phase value.

  On the other hand, the probability density function PA (A (t)) of the instantaneous amplitude value A (t) is known to have a Rayleigh distribution, and is expressed by equation (3).

ここでσは、信号の分散値である。

Here, σ is a variance value of the signal.

  Further, the probability density function Pθ (θ (t)) of the phase has a uniform distribution and is expressed by the following equation (4).

いま、簡単のため、信号の分散σ＝１と仮定すると（３）式より次の（５）式が得られる。

For simplicity, assuming that the signal variance σ = 1, the following equation (5) can be obtained from the equation (3).

この（５）式から、σ＝１の場合のＡ（ｔ）の平均値が求められ、その値は次の（６）式に示すようになる。

From this equation (5), the average value of A (t) when σ = 1 is obtained, and the value is as shown in the following equation (6).

同様にして、Ａ^ｎの平均値、すなわち、次の（７）式を算出する。

Similarly, the average value of A ^n, i.e., calculates the following equation (7).

その結果は次の表１のようになる。

The results are shown in Table 1 below.

さて、上述したように、上記（１）式において、ＩＭ３及びＩＭ５及びＩＭ７を発生させるのは３次の項と５次の項と７次の項である。しかしながら、これらの項には、入力信号に関わる成分や他の次数成分についてもそれぞれ含まれている。従って、３次の項からその入力信号に関わる成分を、また５次の項からもその入力信号に関わる成分と３次の項に関わる成分を、７次の項からその入力信号に関わる成分と３次の項に関わる成分と５次の項に関わる成分を差し引き、それら差し引いたものが各次数における相互変調歪み成分となる。

As described above, in the above equation (1), IM3, IM5, and IM7 are generated by the third-order term, the fifth-order term, and the seventh-order term. However, these terms include components relating to the input signal and other order components, respectively. Therefore, the component related to the input signal from the third-order term, the component related to the input signal from the fifth-order term and the component related to the third-order term, and the component related to the input signal from the seventh-order term The component related to the third order term and the component related to the fifth order term are subtracted, and the result of subtraction is the intermodulation distortion component in each order.

  Therefore, in order to obtain the magnitude of the component related to the input signal included in the third-order term in the above equation (1) in the OFDM modulated wave, first, its cross-correlation coefficient η31 is shown in the following equation (8). Asking.

この（８）式より、３次の項に含まれる信号には大きさ２の入力信号が含まれることがわかる。そのため、この入力信号を２倍したものを、入力信号を３乗したものから差し引いた残りが、３次相互変調歪みとなる。これを次の（９）式に示す。

From this equation (8), it can be seen that the signal included in the third-order term includes an input signal of magnitude 2. Therefore, the remainder obtained by subtracting the doubled input signal from the cube of the input signal is third-order intermodulation distortion. This is shown in the following equation (9).

ここで、（９）式を２乗してその平均値を求めるとすると、表１を参照して計算することにより、その２乗平均値は“２”となる。そのため、（９）式で表される３次相互変調歪みの分散値は、√２となる。

Here, if the equation (9) is squared to obtain the average value, the mean square value is “2” by calculating with reference to Table 1. Therefore, the dispersion value of the third-order intermodulation distortion expressed by the equation (9) is √2.

  From this, when the third-order intermodulation distortion IM3 in the case of dispersion 1 is obtained, the following equation (10) is obtained.

同様にして分散１の場合の５次相互変調歪みＩＭ５を求めるとすると、次の（１１）式となる。

Similarly, when the fifth-order intermodulation distortion IM5 in the case of dispersion 1 is obtained, the following equation (11) is obtained.

また、同様にして分散１の場合の７次相互変調歪みＩＭ７を求めるとすると、次の（１２）式となる。

Similarly, when the seventh-order intermodulation distortion IM7 in the case of dispersion 1 is obtained, the following equation (12) is obtained.

ここで、

here,

とおくと、電力増幅器で発生したＩＭ３及びＩＭ５及びＩＭ７を含む出力信号Ｖｏｕｔは、次の（１６）式で表現できる。

In other words, the output signal Vout including IM3, IM5, and IM7 generated by the power amplifier can be expressed by the following equation (16).

次に、歪係数であるα３とα５とα７を算出する方法について述べる。ここで、歪みを含んだ（１６）式から歪みのない（２）式を差し引いて、誤差信号ｅｒｒを求めると、次の（１７）式となる。

Next, a method for calculating the distortion coefficients α3, α5, and α7 will be described. When the error signal err is obtained by subtracting the expression (2) without distortion from the expression (16) including distortion, the following expression (17) is obtained.

さらに、この（１７）式の誤差信号ｅｒｒと（２）式の複素共約の積ｕを取ると、次の（１８）式となる。

Further, when the product u of the error signal err of the equation (17) and the complex co-reduction of the equation (2) is taken, the following equation (18) is obtained.

さらに、この（１８）式の誤差相関信号ｕ(ｔ)と（１３）式のＡ３との積の平均値ｘｃｏｒ３を求めると、次の（１９）式となる。

Further, when the average value xcor3 of the product of the error correlation signal u (t) of the equation (18) and A3 of the equation (13) is obtained, the following equation (19) is obtained.

以上のような計算により、３次高調波の係数α３が検出できる。

Through the above calculation, the coefficient α3 of the third harmonic can be detected.

  Similarly, when the average value xcor5 of the product of the error correlation signal u (t) in the equation (18) and the equation (14) is obtained, the following equation (20) is obtained.

このことで、５次高調波の係数α５が検出できる。

Thus, the coefficient α5 of the fifth harmonic can be detected.

  Similarly, when the average value xcor7 of the product of the error correlation signal u (t) in the equation (18) and the equation (15) is obtained, the following equation (21) is obtained.

このことで、７次高調波の係数α７が検出できる。

As a result, the coefficient α7 of the seventh harmonic can be detected.

  As described above, A3 (t), A5 (t), and A7 (t) are calculated from the input signal Vin, and an error signal obtained by calculating a difference from the input signal Vin and the output signal Vout is calculated. An error correlation signal u (t) is calculated from the error signal and the input signal Vin, and a third-order harmonic coefficient α3 is calculated from A3 (t), A5 (t), A7 (t), and the error correlation signal u (t). The fifth-order harmonic coefficient α5 and the seventh-order harmonic coefficient α7, and then the amplitude distortion and phase distortion constituting each harmonic coefficient can be determined independently.

  Therefore, distortion in the output signal can be reduced by generating a distortion compensation signal having the inverse characteristics from the amplitude distortion and phase distortion constituting the coefficients of the harmonics obtained independently and adding them to the input signal. be able to.

  The reduced distortion in the output signal cannot always be reduced to a desired distortion because a distortion component generated in the power amplifier differs depending on variations in characteristics of semiconductor devices constituting the power amplifier. Here, at least one of the generated distortion compensation signal and the input signal is passed through a variable delay filter, added by a multiplier, and then amplified by the power amplifier, so that the value of the variable delay filter can be seen while observing the output signal of the power amplifier. By adjusting the distortion, the distortion can be reduced to a desired distortion.

  Therefore, when performing distortion compensation of the power amplifier, the distortion compensation signal is generated accurately and at high speed, thereby improving the accuracy of distortion compensation and shortening the convergence time, and according to the characteristics of the power amplifier. Thus, it is possible to obtain a distortion compensation circuit that can be adjusted so as to reduce the distortion component generated in the above.

  Next, another fixed distortion compensation signal with respect to a level where the amplitude of the input signal is small will be described.

  The power amplifier is usually composed of a push-pull type power amplifier, and the input signal is converted from unbalanced to balanced by the input transformer and input to the gates of the paired FETs with a phase difference of 180 degrees, amplified, and output transformer. Thus, it is converted from balanced to unbalanced and output. In this case, since the drain current with respect to the gate bias voltage of one FET hardly flows in the portion where the gate bias voltage is small, the drain current does not flow in the region where one FET is switched by push-pull. The portion that hardly flows continues, and as a result, the drain current flows and the portion where the drain current changes is distorted. This distortion is usually referred to as crossover distortion.

  In such a crossover distortion portion, since a drain current flows and a level change cannot be easily detected, it is difficult to use a distortion compensation signal for automatic correction as described above. However, paying attention to the fact that there is almost no change in the signal level when there is almost no signal level, a compensation unit that generates and holds a fixed distortion compensation signal with reverse characteristics in advance is prepared, and fixed distortion compensation with reverse characteristics is provided. If the signal is added to the input signal, distortion in the output signal can be reduced.

  FIG. 4 is an explanatory diagram for reducing the crossover distortion. FIG. 4A is an enlarged view of a portion of the input signal 71 having almost no signal level. The output signal 72 of the power amplifier has a signal level of FIG. There is almost no signal level. However, since the signal level hardly changes, a fixed distortion compensation signal 73 having a characteristic opposite to that of the output signal 72 is generated and prepared and added to the input signal. Here, the fixed distortion compensation signal 73 having a characteristic opposite to that of the output signal 72 is prepared by generating an amplitude distortion compensation signal 74 shown in (b) and a phase distortion compensation signal 75 shown in (c). To be added to. As a result, the input signal 71 without distortion can be made substantially the same, and distortion in the output signal can be reduced.

  Thus, when performing distortion compensation of a power amplifier, by generating a distortion compensation signal accurately and at high speed, the accuracy of distortion compensation is improved, the convergence time is shortened, and the distortion is corrected according to the characteristics of the power amplifier. It is possible to obtain a distortion compensation circuit that can adjust the distortion component generated in the power amplifier to be smaller and can perform distortion compensation for a level with a small amplitude of the input signal.

  Next, it is desired to make the frequency characteristic of the output signal linear with respect to the input signal of the power amplifier, but it is difficult to make the frequency characteristic uniform linearly due to variations in characteristics of the semiconductor devices constituting the power amplifier. Therefore, when performing distortion compensation, the frequency characteristic of the power amplifier is adjusted by adjusting the frequency characteristic with the frequency characteristic adjustment circuit while observing the output signal of the power amplifier by performing power amplification with the power amplifier after passing through the frequency characteristic adjustment circuit. Can be made linear.

  The embodiment described above will be specifically described with reference to the drawings.

  FIG. 1 is a diagram showing a block configuration of a transmission apparatus including an embodiment of a power amplifier and a distortion compensation circuit according to the present invention.

  In FIG. 1, the input signal output from the OFDM modulator 1 is input to the distortion compensation circuit 2 of the present invention. This input signal is converted into a digital signal by the A / D converter 21. The converted signal is gain-adjusted to an appropriate level signal by the AGC 22 and further converted to a baseband signal by the orthogonal demodulator 23. The baseband signal is input to the automatic delay adjuster 24 and the delay element 34, respectively. The input signal that has been subjected to appropriate delay adjustment by the automatic delay adjuster 24 is input to the distortion coefficient detection circuit 32 of the distortion compensation calculation circuit 3.

  The output signal of the delay element 34 passes through the multipliers 25 and 39, is adjusted by the frequency characteristic adjustment circuit 40, is modulated by the quadrature modulator 26, is converted into an analog signal by the D / A converter 27, and then is a distortion compensation circuit. 2 and input to the up-converter 8. The up-converter 8 converts the frequency into an RF band frequency, and the power amplifier 9 further amplifies the power to a specified level. Here, the signal is output from the power amplifier 9 as a signal including a distortion component. The output signal output from the power amplifier 9 passes through the directional coupler 10 and the BPF 11 and is transmitted by radio waves from the antenna 12.

  On the other hand, an output signal distributed by the directional coupler 10 and frequency-converted to the IF band by the down converter 7 is input to the distortion compensation circuit 2. This output signal is converted into a digital signal by the A / D converter 28. The digital signal is adjusted to an appropriate level by the AGC 29 and converted into a baseband signal by the quadrature demodulator 30.

  The baseband signal is adjusted to an appropriate phase by the automatic phase adjuster 31 and input to the distortion coefficient detection circuit 32 of the distortion compensation calculation circuit 3.

  In the distortion coefficient detection circuit 32, the baseband signal output from the quadrature demodulator 23 is appropriately delayed by the automatic delay adjuster 24, and the baseband signal output from the quadrature demodulator 30 is output from the automatic phase adjuster 31. The two baseband signals are adjusted by the automatic delay adjuster 24 and the automatic phase adjuster 31 so that the delay and the phase match, respectively.

  Based on the two input signals thus adjusted, the distortion coefficient detection circuit 32 outputs 6th order of amplitude third order distortion, phase third order distortion, amplitude fifth order distortion, phase fifth order distortion, amplitude seventh order distortion, and phase seventh order distortion. Each type of distortion is calculated and detected independently, and a distortion compensation signal generation circuit 33 generates a distortion compensation signal from each of the six types of distortion, and the distortion compensation signal is multiplied by a variable delay filter 35. Since the adder 25 adds the signal from the quadrature demodulator 23 to the signal via the delay element 34, an accurate and high-speed predistortion compensation operation can be performed for a relatively large amplitude level of the input signal. Realized.

  Hereinafter, embodiments of the distortion coefficient detection circuit 32 and the distortion compensation signal generation circuit 33 of the distortion compensation circuit 2 in FIG. 1 will be described with reference to the drawings. FIG. 2 is a diagram showing a configuration of an embodiment of the distortion coefficient detection circuit 32 of the distortion compensation circuit 2 of FIG. FIG. 3 is a diagram showing a configuration of an embodiment of the distortion compensation signal generation circuit 33 of the distortion compensation circuit 2 of FIG. A distortion compensation signal for automatic correction is generated and used by the distortion coefficient detection circuit 32 and the distortion compensation signal generation circuit 33.

  In FIG. 2, as the distortion coefficient detection circuit 32 of FIG. 1, the output signal from the automatic delay adjuster 24 of FIG. 1 is input to the terminal 41, and the output signal of the automatic phase adjuster 31 is input to the terminal 42, respectively. Is entered as The input signal input to the terminal 41 is input to an absolute value circuit 80 of a circuit block (hereinafter referred to as a block) 90 as shown in the figure, and is converted into a real signal having an absolute value of a complex signal. The real signal is input to the multiplier 84, becomes a squared signal, is output from the block 90, and is input to the block 91, block 92, and block 93.

  Here, the block 91 is a circuit block for outputting the value of A3 (t) based on the above equation (13). The block 92 is a circuit block for outputting the value of A5 (t) based on the above equation (14). The block 93 is a circuit block for outputting the value of A7 (t) based on the above equation (15).

  On the other hand, the input signal input to the terminal 42 is input to the block 94 together with the input signal input to the terminal 41. Here, the block 94 calculates an error signal obtained by taking a difference from the input signal input to the terminal 41 and the input signal input to the terminal 42, and from the calculated error signal and the input signal input to the terminal 41. , A circuit block for calculating and outputting the value of the error correlation signal u (t) based on the above-described equation (18).

  The error correlation signal u (t) from the block 94 is multiplied by the signal A3 (t), the signal A5 (t) and the signal A7 (t) by the multiplier 84, and further averaged by the averaging circuit 85. Then, a complex signal having the values of α3, α5, and α7 is output.

  The signal α3, the signal α5, and the signal α7 are coefficient signals having real part and imaginary part values by the real circuit 86 and the imag circuit 87, respectively. The distortion becomes the second-order distortion, the fifth-order distortion, the seventh-order distortion, and the seventh-order distortion.

  As shown in FIG. 3, the distortion compensation signal generation circuit 33 in FIG. 1 has the above-described third-order distortion, third-order phase distortion, fifth-order distortion, fifth-order phase distortion, seventh-order distortion, and seventh-order distortion. Input to terminals 45-1 to 45-6. An input signal from the quadrature demodulator 23 of FIG. The input signal input to the terminal 44 is input to the block 96 and the block 97, respectively, as shown in the figure.

The block 96 includes α3A3 (t) based on an input signal from the terminal 44, an amplitude third-order distortion from the terminal 45-1, an amplitude fifth-order distortion from the terminal 45-3, and an amplitude seventh-order distortion from the terminal 45-5. A signal having a real part value of + α5A5 (t) + α7A7 (t) is output. In addition, the block 97 includes α3A3 (t by an input signal from the terminal 44, a phase third-order distortion from the terminal 45-2, a phase fifth-order distortion from the terminal 45-4, and a phase seventh-order distortion from the terminal 45-6. ) + Α5A5 (t) + α7A7 (t) The signal of the imaginary part value is output.
The signal of the real part value of α3A3 (t) + α5A5 (t) + α7A7 (t) output from the block 96 is subtracted from the signal of value 1 by the adder 83. The signal of the imaginary part value of α3A3 (t) + α5A5 (t) + α7A7 (t) output from the block 97 is subtracted from the signal of value 0 by the adder 83. Signals obtained by the subtraction are output from the terminals 46-1 and 46-2 to the multiplier 25 in FIG. 1, respectively, and the input signals are corrected. The multiplier 25 is a vector multiplier that performs multiplication using signals of the real part and the imaginary part.

  Here, by subtracting the signal of the imaginary part value and the signal of the real part value of α3A3 (t) + α5A5 (t) + α7A7 (t), the signal obtained by the subtraction is output as a distortion compensation signal. Is done. Note that the signal of the real part value of α3A3 (t) + α5A5 (t) + α7A7 (t) is subtracted from the value 1 signal by the adder 83 because the value 1 is the quadrature demodulator by the multiplier 25 in the subsequent stage. This is because the input signal from 23 is held, and the amplitude distortion generated in the power amplifier is reversed. The reason why the value of the imaginary part is subtracted from 0 is to make the characteristic opposite to the phase distortion generated in the power amplifier.

  As described above, according to the embodiment of the present invention, the third-order amplitude, third-order phase distortion, and fifth-order amplitude are calculated from the input signal and output signal of the power amplifier by the arithmetic means without using the perturbation method. Distortion, phase fifth-order distortion, amplitude seventh-order distortion, and phase seventh-order distortion are independently detected by the distortion coefficient detection circuit, and the detected amplitude third-order distortion, phase third-order distortion, amplitude fifth-order distortion, phase fifth-order distortion, By generating a distortion compensation signal with a distortion compensation signal generation circuit based on the amplitude seventh-order distortion and phase seventh-order distortion, it is possible to detect distortion coefficients accurately and at high speed, and using them accurately and quickly In addition, since it is possible to generate a distortion compensation signal, the accuracy of distortion compensation can be significantly improved, and the convergence time can be significantly shortened.

  The distortion compensation signal generated by the distortion compensation signal generation circuit 33 in FIGS. 3 and 1 is added to the signal from the quadrature demodulator 23 through the delay element 34 by the multiplier 25 through the variable delay filter 36. Therefore, the time from the quadrature demodulator 23 to the multiplier 25 through the delay element 34 is t1, and the time from the quadrature demodulator 23 to the multiplier 25 through the distortion compensation signal generation circuit 33 and the variable delay filter 35 is added. T2 with respect to t1, the value of the variable delay filter 35 is adjusted so that the distortion appearing in the output signal of the power amplifier 9 is desired while the output signal of the power amplifier is viewed on a monitor (not shown). It can be adjusted to be distorted.

  FIG. 5 is a diagram showing the spectrum of the output signal of the power amplifier 9 of FIG. The horizontal axis indicates the frequency, the vertical axis indicates the amplitude level dB, the signal 5A in the center of the figure is a signal to be transmitted, and an output signal in which the distortion component 5B is superimposed on the frequency on both sides is output from the power amplifier 9. come. The distortion component 5B is reduced like the distortion component 5C or 5D by the distortion compensation circuit 2 of the present invention, and the S / N between the output signal and the distortion can be greatly improved.

  However, since the distortion component generated in the power amplifier 9 varies depending on variations in characteristics of the semiconductor devices constituting the power amplifier, the distortion component obtained by the distortion compensation circuit 2 of the present invention also varies as 5C or 5D. Therefore, for example, when the distortion component is 5C, the required S / N is a little insufficient.

  In such a case, by adjusting the value of the variable delay filter 35, the S / N can be adjusted to a value that requires a slight decrease, such as the distortion component 5D.

  5 shows an example in which the distortion component 5C is t1 = t2, and the distortion component 5D is adjusted by adjusting the value of the variable delay filter 35 to satisfy t1> t2. It goes without saying that the value of the variable delay filter 35 may or may not need to be adjusted depending on the generated distortion component. Further, the variable delay filter 35 and the delay element 34 may be exchanged, for example, and adjusted on the orthogonal demodulator 23 side. By providing the variable delay filter 35, the final distortion component generated in the power amplifier 9 can be adjusted.

  Next, the fixed distortion compensation signal will be described. The fixed distortion compensation signal is generated and held in the fixed compensation ROM 38. The fixed compensation ROM 38 includes the amplitude distortion ROM having the amplitude distortion compensation signal 74 shown in FIG. It is composed of a phase distortion ROM having the phase distortion compensation signal 75 shown in (c), and an address is assigned to the amplitude of the output signal of the quadrature demodulator 23.

  The output signal of the quadrature demodulator 23 passes through the delay element 36 and the amplitude squaring circuit 37 and designates the address of the fixed compensation ROM 38. The contents of the designated address (amplitude square circuit output) are discharged from the fixed compensation ROM 38 and added to the output signal of the multiplier 25 by the multiplier 39.

  Then, by correcting the input signal with the multiplier 25 and the multiplier 39 using the automatic correction distortion compensation signal and the fixed distortion compensation signal, the amplitude level can be reduced from the crossover distortion generated when the amplitude level is small. By generating a distortion compensation signal accurately and at high speed over a wide range of amplitude levels up to the distortion that occurs at relatively large times, the accuracy of distortion compensation is improved and the convergence time is shortened, and the distortion is reduced depending on the characteristics of the power amplifier. It is possible to obtain a distortion compensation circuit that can be adjusted so as to reduce the distortion component generated in the power amplifier.

  Next, the distortion-compensated input signal is input to the frequency characteristic adjustment circuit 40, and is input to the power amplifier 9 at a later stage through the frequency characteristic adjustment circuit 40 that linearizes the frequency characteristic of the output signal with respect to the input signal of the power amplifier 9. Power amplification. Thus, even if the frequency characteristic of the output signal with respect to the input signal of the power amplifier 9 cannot be set linearly in advance, the frequency characteristic of the power amplifier can be adjusted by adjusting the frequency characteristic with the frequency characteristic adjusting circuit while observing the output signal of the power amplifier. Can be made linear.

It is a figure which shows the block configuration of the transmission apparatus containing embodiment of the power amplifier and the distortion compensation circuit by this invention. FIG. 2 is a diagram illustrating a configuration of an embodiment of a distortion coefficient detection circuit of the distortion compensation circuit in FIG. 1. FIG. 2 is a diagram illustrating a configuration of an embodiment of a distortion compensation signal generation circuit of the distortion compensation circuit of FIG. 1. It is explanatory drawing which reduces crossover distortion. It is a figure which shows the spectrum of the output signal of the power amplifier of FIG. It is a figure which shows the block structural example of the transmitter which contains the power amplifier of a prior art. In FIG. 6, it is a figure which shows the relationship between the table address in the case of calculating | requiring the value of a representative point by the perturbation method, and a representative point.

Explanation of symbols

  1: OFDM modulator, 2: distortion compensation circuit, 3: distortion compensation arithmetic circuit, 7: down converter, 8: up converter, 9: power amplifier, 10: directional coupler, 11: BPF, 12: antenna, 21 , 28: A / D converter, 22, 29: AGC, 23, 30: Quadrature demodulator, 24: Automatic delay adjuster, 25, 39: Multiplier, 26: Quadrature modulator, 27: D / A converter , 31: automatic phase adjuster, 32: distortion coefficient detection circuit, 33: distortion compensation signal generation circuit, 34: delay element, 35: variable delay filter, 36: delay element, 37: amplitude square circuit, 38: for compensation ROM, 40: frequency characteristic adjustment circuit, 41, 42, 43-1 to 43-6, 44, 45-1 to 45-6, 46-1, 46-2: terminal, 71: input signal, 72: output signal 73: Fixed distortion compensation signal, 74: Amplitude distortion compensation signal 75: phase distortion compensation signal, 80: absolute value circuit, 81: complex conjugate circuit, 82: adder, 84: multiplier, 85: averaging circuit, 86: real circuit, 87: imag circuit, 88: Absolute value circuit, 90, 91, 92, 93, 94, 96, 97: circuit block.

Claims (2)

A coefficient related to third-order intermodulation distortion and a coefficient related to fifth-order intermodulation distortion among distortion components generated in the power amplifier from the output signal of the power amplifier that amplifies the power signal in the high frequency band and the input signal, Among the coefficients related to the seventh-order intermodulation distortion, at least the amplitude third-order distortion and the phase third-order distortion constituting the coefficient related to the third-order intermodulation distortion are independently detected by the distortion coefficient detection circuit, and at least the detected amplitude 3 A distortion compensation signal is generated by a distortion compensation signal generation circuit based on the second-order distortion and phase third-order distortion, and at least one of the generated distortion compensation signal and the input signal is added by a multiplier after passing through a variable delay filter; In the distortion compensation circuit that amplifies power by the power amplifier, a fixed distortion compensation signal for a level at which the amplitude of the input signal is small is generated by the distortion compensation signal generation circuit, and the generated fixed compensation signal is generated. Distortion compensation circuit of the distortion compensation signal, after adding the second multiplier after the multiplier, characterized in that the power amplified by the power amplifier. 2. The distortion compensation circuit according to claim 1, wherein after the addition by the second multiplier , the power is amplified by the power amplifier after passing through a frequency characteristic adjustment circuit.

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