JP2005236715A - Distortion compensating circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a distortion compensating circuit capable of suppressing the output level of the distortion compensation circuit and protecting a power amplifier on a subsequent stage, when a momentary over input occurs. <P>SOLUTION: This distortion compensating circuit detects a distorted component occurring in a power amplifier circuit, according to the output signal and the input signal of the power amplifier circuit for amplifying the input signal of a high-frequency band in power, generates a distortion compensation signal that corresponds to the detected distorted component, and compensates the distortion with the generated distortion compensated signal. The distortion compensating circuit is provided with a determination circuit 24 for determining the level of a signal subjected to distortion compensation and an attenuation circuit 25 for attenuating the level of the signal, subjected to distortion compensation with the output signal of the determination circuit, when the level of the signal subjected to distortion compensation is larger than a prescribed level. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a distortion compensation circuit, and more particularly to a nonlinear distortion compensation technique for reducing a nonlinear distortion component output from a transmission apparatus that performs radio wave transmission using a high-frequency power amplifier.

  Examples of conventional nonlinear distortion compensation techniques, in particular, the predistortion compensation technique, are described in, for example, Eiji jiho VOL. 24, NO. 79, BCS2000-92, “Adaptive Predistorter Type Distortion Compensating Power Amplifier” (Non-Patent Document 1). Here, FIG. 5 shows a block configuration example of a transmission apparatus including a conventional power amplifier, and this technique will be described below with reference to FIG.

  In FIG. 5, an input signal that is a signal to be transmitted is amplified by a power amplifier 55 through a distributor 51, a delay element 52, a phase adjuster 53, and a gain adjuster 54, and passes through a directional coupler 56 as an output signal. Is output. On the other hand, a part of the input signal distributed by the distributor 51 is converted into a digital signal by the detector 57 and the A / D converter 58. Further, a part of the output signal distributed by the directional coupler 56 is converted to an intermediate frequency by the mixer 59 and the synthesizer 60, and the out-of-band distortion power generated by the power amplifier 55 is extracted by the BPF 61. A / D converter 68 converts the signal into a digital signal.

Hereinafter, a control method of the nonlinear distortion compensation operation will be described.
The contents of the tables 64 and 65 are converted into analog signals by the D / A converters 66 and 67, and the phase adjuster 53 and the gain adjuster 54 are controlled by the signals. The phase adjuster 53 and the gain adjuster 54 generate distortion having the same amplitude and opposite phase as the distortion generated in the power amplifier 55, cancel the distortion generated in the power amplifier 55, and perform nonlinear compensation.

  The tables 64 and 65 are detected by the detector 57, and addresses are assigned to the envelope signals taken in by the A / D converter 58. Further, the arithmetic unit 63 learns by using the perturbation method so that the power of the distortion detected by the detector 62 is reduced, and the contents of the tables 64 and 65 are updated to sequentially obtain the optimum values that minimize the distortion. Rewrite.

  Note that, as described in Non-Patent Document 1, the table update method is equivalent to the case where the values of all the addresses are obtained by the perturbation method so that the table addresses are incremented by one. Update time is required, which makes it extremely impractical. Therefore, it is more practical to use the perturbation method when obtaining the values of eight representative points, for example, instead of obtaining all the values of the table by the perturbation method.

  FIG. 6 shows the relationship between the table address and the representative point in that case. Here, the table addresses are assumed to be 1 to 1024.

  First, addresses 1 to 1024 are represented by 8 points. In FIG. 6, the table values of the eight representative points and the representative point addresses are indicated by black circles. Here, the value of the eight representative point addresses (value indicated by the position in the height direction of the black circle) is increased (in the direction of the upward arrow in the figure) or reduced (in the lower part of the figure) while observing the distortion power. To the value with the smaller distortion. Thereafter, the same operation is repeated for the other representative points to optimize the table values.

  For the values of addresses other than the eight representative points, values interpolated using an FIR filter are used as update values. The update control of the values of the eight representative points is performed on the phase adjuster table and the gain adjuster table while monitoring the distortion power, and a total of 16 points are optimized using the perturbation method.

  As another conventional technique, Japanese Patent Laid-Open No. 2001-168774 (Patent Document 1) extracts a digital baseband signal of RF input and RF output of an RF amplifier, and detects a time difference and a phase difference between both signals. Both are synchronized and phased. In this state, the amplitude error and phase error of both signals are obtained, and the compensation amount of the amplitude and phase with respect to the amplitude value is sequentially selected from the compensation amounts that are registered and adaptively updated in the initial stage, and this compensation amount is selected as described above. Some of them compensate for distortion components by adding to an RF input digital baseband signal.

  In the technique described in Non-Patent Document 1, distortion power is monitored, optimization processing is performed by a perturbation method so that the power is reduced, and nonlinear compensation of amplitude distortion components and phase distortion components is performed. In this method, the magnitude of amplitude distortion and the magnitude of phase distortion cannot be distinguished. In addition, amplitude distortion includes third-order distortion component, fifth-order distortion component, and seventh-order distortion component, and phase distortion includes third-order distortion component, fifth-order distortion component, and seventh-order distortion component. I can't tell you. Therefore, it is obvious that not only the accuracy of compensation, but also the speed of compensation (convergence time) is greatly affected.

  Further, in the technique disclosed in Patent Document 1 described above, since only the difference is simply taken, when the amplitude becomes small, the error of the difference value cannot be ignored and the distortion cannot be compensated.

  First, the applicant of the present patent application, when performing predistortion compensation for a power amplifier, generates distortion compensation signals accurately and at high speed, thereby improving distortion compensation accuracy and reducing the convergence time. A compensation circuit was invented and a patent application was filed for the invented content.

  FIG. 4 is a block diagram showing an overall configuration of a transmission apparatus including a distortion compensation circuit and a power amplifier that have been previously applied for in a patent.

  In FIG. 4, a TS (transport stream) signal input from an STL (Studio to Transmitter Link) 48 is converted into an IF signal by an OFDM modulator 26, and the distortion compensation circuit 27 of the present invention is converted. Is input. This input signal is converted into a digital signal by the A / D converter 29. The converted digital signal is gain-adjusted to a signal at an appropriate level by the AGC 30, and further demodulated into a baseband signal by the quadrature demodulator 31. The demodulated signal is input to the multiplier 32 and the delay unit 45. The input signal that has been subjected to appropriate delay adjustment by the delay unit 45 is input to the distortion coefficient detection circuit 46 of the distortion compensation calculation circuit 28.

  The output signal of the multiplier 32 is modulated by the quadrature modulator 33, converted to an analog signal by the D / A converter 34, output from the distortion compensation circuit 27, and input to the IF / UHF converter 35. . The IF / UHF converter 35 converts the frequency into a UHF band frequency, and the power amplification circuit 36 amplifies the power to a specified level. Here, a signal including a distortion component is output from the power amplifier circuit 36. The output signal output from the power amplifier circuit 36 is transmitted by radio waves from the antenna 39 via the directional coupler 37 and the BPF 38.

  On the other hand, the signal distributed by the directional coupler 37 is frequency-converted to the IF band by the UHF / IF converter 40 and input to the distortion compensation circuit 27. This output signal is converted into a digital signal by the A / D converter 41. The converted output signal is demodulated by the quadrature demodulator 42, further adjusted to an appropriate level by the AGC 43, adjusted to an appropriate phase characteristic by the phase shifter 44, and then sent to the distortion coefficient detection circuit 46. Entered.

  At this time, the AGC 43 operates so that the output level of the delay unit 45 and the output level of the phase shifter 44 are the same. Also, the delay time of the two signals input from the delay unit 45 to the distortion coefficient detection circuit 46 is adjusted, and the phase shifter 44 adjusts the phase of the two signals input to the distortion coefficient detection circuit 46 to be the same. doing.

  Based on the two input signals, the distortion coefficient detection circuit 46 uses respective coefficients (distortion) of amplitude third-order distortion, amplitude fifth-order distortion, amplitude seventh-order distortion, phase third-order distortion, phase fifth-order distortion, and phase seventh-order distortion. And distortion compensation signal generation circuit 47 based on the detected coefficient, the third-order distortion, fifth-order distortion and seventh-order distortion having characteristics opposite to the distortion generated in power amplifier 36. Phase third-order distortion, phase fifth-order distortion, and phase seventh-order distortion are generated, and the distortion compensation signal is added to the signal from the quadrature demodulator 31 by the multiplier 32. Distortion compensation is performed by the above operation.

Emotional Technical Report VOL. 24, NO. 79, BCS 2000-92, “Adaptive Predistorter Type Distortion Compensating Power Amplifier”, p. 91-96

JP 2001-168774 A, Abstract

  However, when an abnormality such as an input interruption occurs in the TS signal from the STL, the level of the IF signal output from the OFDM modulator may fluctuate momentarily. In FIG. 4 of the prior application, when such an abnormal state occurs, the output level of the distortion compensation circuit also fluctuates instantaneously, but at this time, it exceeds the rated level of the power amplifier connected to the subsequent stage and may be destroyed. I understood it.

  An object of the present invention is to provide a distortion compensation circuit capable of suppressing the output level of a distortion compensation circuit and protecting a power amplifier at a subsequent stage when an instantaneous excessive input occurs.

  The present invention detects a distortion component generated in the power amplification circuit in accordance with the output signal of the power amplification circuit that amplifies the input signal in a high frequency band and the input signal, and compensates for the distortion in accordance with the detected distortion component. A distortion compensation circuit that generates a signal and compensates for distortion using the generated distortion compensation signal, a determination circuit that determines a level of the signal after the distortion compensation, and a level of the signal after the distortion compensation is greater than a predetermined level And an attenuation circuit for attenuating the level of the signal after distortion compensation with the output signal of the determination circuit.

  According to the present invention, it is possible to obtain a distortion compensation circuit that can suppress the output level of the distortion compensation circuit and protect the power amplifier in the subsequent stage when an instantaneous excessive input occurs.

  FIG. 1 is a block diagram showing the overall configuration of an embodiment of a transmission apparatus including a distortion compensation circuit and a power amplifier according to the present invention.

  In FIG. 1, a TS (transport stream) signal input from the STL 23 is converted into an IF signal by the OFDM modulator 1 and input to the distortion compensation circuit 2. This input signal is converted into a digital signal by the A / D converter 4. The converted signal is gain-adjusted to an appropriate level signal by the AGC 5 and further demodulated into a baseband signal by the orthogonal demodulator 6. The demodulated signal is input to the multiplier 7 and the delay unit 20. The input signal that has been subjected to appropriate delay adjustment by the delay unit 20 is input to the distortion coefficient detection circuit 21 of the distortion compensation calculation circuit 3.

  The output signal of the multiplier 7 is subjected to level determination by the determination circuit 24, and when the determination result becomes an excessive level, the attenuation circuit 25 suppresses the level within the rating. The output signal of the attenuation circuit 25 is modulated by the quadrature modulator 8, converted to an analog signal by the D / A converter 9, output from the distortion compensation circuit 2, and input to the IF / UHF converter 10. . The IF / UHF converter 10 converts the frequency into a UHF band frequency, and the power amplifier 11 further amplifies the power to a specified level. Here, a signal including a distortion component is output from the power amplifier circuit 11. The output signal output from the power amplifier circuit 111 is transmitted as a radio wave from the antenna 14 via the directional coupler 12 and the BPF 13.

  On the other hand, the output signal distributed by the directional coupler 12 and frequency-converted to the IF band by the UHF / IF converter 15 is input to the distortion compensation circuit 2. This output signal is converted into a digital signal by the A / D converter 16. The converted output signal is demodulated by the quadrature demodulator 17, further adjusted to an appropriate level by the AGC 18, adjusted to an appropriate phase characteristic by the phase shifter 19, and input to the distortion coefficient detection circuit 21. Is done.

  At this time, the AGC 18 operates so that the output level of the delay unit 20 and the output level of the phase shifter 19 are the same. Further, the delay time of the two signals input from the delay unit 20 to the distortion coefficient detection circuit 21 is adjusted so that the phase of the two signals input to the distortion coefficient detection circuit 21 by the phase shifter 19 is the same. It is adjusted.

  Based on the two input signals, the distortion coefficient detection circuit 21 uses the coefficients of the third-order distortion, fifth-order distortion, seventh-order amplitude, third-order phase distortion, fifth-order distortion, and seventh-order distortion (distortion). The distortion compensation signal generation circuit 22 uses the detected coefficient to detect the amplitude third-order distortion, the fifth-order distortion, and the seventh-order distortion having characteristics opposite to the distortion generated in the power amplifier 11. Phase third-order distortion, phase fifth-order distortion, and phase seventh-order distortion are generated, and the distortion compensation signal is added by the multiplier 7.

  Here, a detailed configuration example and operation of a limiter circuit configured by the determination circuit 24 and the attenuation circuit 25 will be described with reference to FIG.

  In FIG. 2, when an input signal is input to the determination circuit 24, the power of the signal is obtained by the power calculator 241. The power of the obtained signal is integrated by an integrator 242 to obtain an average power, and the level is determined by comparing this average power with a set detection level by a comparator 243. As a result of the determination, when the average power is larger than the detection level and it is determined that the input is excessive, a set signal is sent to the attenuation circuit 25.

  In the attenuation circuit 25, when a set signal is input from the determination circuit 24, a preset attenuation level value is set in the integrator 251. The output of the integrator 251 becomes an attenuation amount, and level correction is performed with a value subtracted from the reference power (RMS = 2 to the 12th power in this figure). At this time, since the set signal is always sent from the determination circuit 24 while the input signal is an excessive input, the value of the attenuation level is continuously set in the integrator 251. During this period, since the output of the integrator 251 is the value of this attenuation level, this value is a value that determines the amount of attenuation at the time of excessive input.

  When the input level returns to the rated level, the set signal from the determination circuit 24 disappears, so that the integrator 251 keeps the value of the attenuation level set last around the attenuation circuit 25 and gradually outputs the output. The value (attenuation) decreases. Finally, since the output value of the integrator 251 becomes zero and the attenuation amount also becomes zero, the output returns to the rated level.

  FIG. 3 is a diagram showing a change in the level of the output signal when the input signal returns from the excessive level to the steady level. FIG. 3 shows that the level of the output signal gradually returns to the rated level with a return time.

It is a block diagram which shows the whole structure of embodiment of the transmitter which contains the distortion compensation circuit and power amplifier which concern on this invention. It is a figure which shows the detailed structural example of the limiter circuit comprised by the determination circuit and attenuation circuit in FIG. It is the figure which showed the change of the level of an output signal when an input signal returns from an excessive level to a steady level. It is a block diagram which shows the whole structure of the transmission apparatus containing the distortion compensation circuit and power amplifier which applied for the patent previously. It is a figure which shows the block structural example of the transmitter which contains the power amplifier of a prior art. In FIG. 5, it is a figure which shows the relationship between the address of a table in the case of calculating | requiring the value of a representative point by the perturbation method, and a representative point.

Explanation of symbols

  1, 26: OFDM modulator, 2, 27: distortion compensation circuit, 3, 28: distortion compensation arithmetic circuit, 4, 16, 29, 41: A / D converter, 5, 18, 30, 43: AGC, 6 , 17, 31, 42: Quadrature demodulator, 7, 32: Multiplier, 8, 33: Quadrature modulator, 9, 34: D / A converter, 10, 35: IF / UHF converter, 11, 36: Power amplifier, 12, 37: directional coupler, 13, 38: BPF, 14, 39: antenna, 15, 40: UHF / IF converter, 19, 44: phase shifter, 20, 45: delay device, 21, 46: distortion coefficient detection circuit, 22, 47: distortion compensation signal generation circuit, 23, 48: STL, 24: determination circuit, 241: power calculator, 242: integrator, 243: comparator, 25: attenuation circuit, 251 : Integrator.

Claims (1)

  A distortion component generated in the power amplification circuit is detected according to the output signal of the power amplification circuit that amplifies the input signal in the high frequency band and the input signal, and a distortion compensation signal corresponding to the detected distortion component is generated. A distortion compensation circuit that performs distortion compensation with the generated distortion compensation signal, the determination circuit determining a level of the signal after distortion compensation, and the determination circuit when the level of the signal after distortion compensation is greater than a predetermined level An attenuation circuit for attenuating the level of the signal after the distortion compensation with the output signal of the distortion compensation circuit.

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