JP4503950B2 - Method for manufacturing phosphor-integrated LED lamp - Google Patents

Method for manufacturing phosphor-integrated LED lamp Download PDF

Info

Publication number
JP4503950B2
JP4503950B2 JP2003273627A JP2003273627A JP4503950B2 JP 4503950 B2 JP4503950 B2 JP 4503950B2 JP 2003273627 A JP2003273627 A JP 2003273627A JP 2003273627 A JP2003273627 A JP 2003273627A JP 4503950 B2 JP4503950 B2 JP 4503950B2
Authority
JP
Japan
Prior art keywords
phosphor
chip
led chip
led lamp
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2003273627A
Other languages
Japanese (ja)
Other versions
JP2005033138A (en
Inventor
巌 東海林
茂夫 藤澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Stanley Electric Co Ltd
Original Assignee
Stanley Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Stanley Electric Co Ltd filed Critical Stanley Electric Co Ltd
Priority to JP2003273627A priority Critical patent/JP4503950B2/en
Publication of JP2005033138A publication Critical patent/JP2005033138A/en
Application granted granted Critical
Publication of JP4503950B2 publication Critical patent/JP4503950B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909Post-treatment of the connector or wire bonding area
    • H01L2224/8592Applying permanent coating, e.g. protective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)

Description

本発明はLEDランプの製造方法に関するものであり、詳細にはLEDランプからの光の色と、このLEDチップからの光により励起される蛍光体からの光の色との混合色をLEDランプの発光色とするために、一体化されて蛍光体が組込まれるものとされているLEDランプの製造方法に係るものである。 The present invention relates to a method for manufacturing an LED lamp, and more specifically, a mixed color of the color of light from an LED lamp and the color of light from a phosphor excited by light from the LED chip is represented by the LED lamp. The present invention relates to a method of manufacturing an LED lamp that is integrated and incorporated with a phosphor in order to obtain an emission color.

従来のこの種の白色LEDランプ90の形成方法としては、図8に示すように基板91上にマウントされたLEDチップ92を保護するために、このLEDチップ92を覆うレンズ93を形成するための、透明エポキシ樹脂93a中に所定の割合(例えば25重量%)で蛍光体93bを混和しておき、印刷手段、注入手段など適宜な手段で所定位置に配置し、熱硬化などで固化させるものである。(例えば特許文献1参照。)   As a conventional method of forming this type of white LED lamp 90, as shown in FIG. 8, in order to protect the LED chip 92 mounted on the substrate 91, a lens 93 for covering the LED chip 92 is formed. The phosphor 93b is mixed in the transparent epoxy resin 93a at a predetermined ratio (for example, 25% by weight), placed at a predetermined position by an appropriate means such as a printing means or an injection means, and solidified by thermosetting or the like. is there. (For example, refer to Patent Document 1.)

特開2000−223750号公報(段落0033〜段落0037、図3)JP 2000-223750 A (paragraphs 0033 to 0037, FIG. 3)

しかしながら、上記のようにLEDチップを覆う樹脂の全体に蛍光体を混和する方法では、樹脂と蛍光体との比重的な問題、結合性の問題などからトランスファーモールドを行うためのペレット化が困難であり、現実には液状の樹脂中に蛍光体を適宜な割合(例えば25重量%)で混合しておき、上記のように印刷手段、注入手段などで液状のままで金型内に注入し、その後に加熱硬化の工程を行わなければ成らず、生産性の向上が困難である問題点を生じている。   However, in the method of mixing the phosphor in the entire resin covering the LED chip as described above, pelletization for performing transfer molding is difficult due to the specific gravity problem between the resin and the phosphor and the problem of bonding. In reality, the phosphor is mixed in a liquid resin at an appropriate ratio (for example, 25% by weight), and injected into the mold in a liquid state by the printing means, the injection means, etc. as described above, After that, a heat curing step must be performed, resulting in a problem that it is difficult to improve productivity.

また、液状のままで作業を行うものであるので、前記したように液状の状態の樹脂中では、時間の経過と共に、比重の重い蛍光体が沈殿して均一な拡散状態が失われ、白色LEDランプ90の性能低下の要因となるので、常時に樹脂の攪拌を行い蛍光体の均一な拡散状態を保つ作業なども必要となり、工程が煩雑化する問題点も生じ、更に言えば、例え上記の作業を行ったとしても、硬化のための加熱時などには依然として沈殿を生じるので、完全な解決策とは成らないものであった。   In addition, since the work is performed in a liquid state, in the resin in a liquid state as described above, a phosphor having a high specific gravity precipitates over time, and the uniform diffusion state is lost. Since the performance of the lamp 90 is reduced, it is necessary to constantly stir the resin and maintain a uniform diffusion state of the phosphor, which causes a problem that the process becomes complicated. Even if work was performed, precipitation still occurred during heating for curing, and so on, which was not a complete solution.

本発明は上記した従来の課題を解決するための具体的な手段として、基台にダイマウントが行われたLEDチップのボンディングパッドを除く部分に、適量の蛍光体が添加された熱可塑性樹脂もしくは熱硬化性樹脂で形成したチップカバーが熱溶着され、前記ボンディングパッドにはボンディングワイヤによる配線が行われ、前記LEDチップ、チップカバー、ボンディングワイヤを覆って透明樹脂のトランスファモールドによるケーシングが行れていることを特徴とする蛍光体一体型LEDランプの製造方法を提供することで課題を解決するものである。 As a specific means for solving the above-described conventional problems, the present invention provides a thermoplastic resin in which an appropriate amount of phosphor is added to a portion other than the bonding pad of the LED chip on which the die mounting is performed on the base, or A chip cover made of a thermosetting resin is thermally welded, wiring is performed on the bonding pad by a bonding wire, a casing is formed by a transfer molding of a transparent resin covering the LED chip, the chip cover, and the bonding wire. It solves the problem by providing a method for producing a phosphor integral LED lamps, characterized in that there.

本発明の蛍光体一体型LEDランプでは、適量の蛍光体が添加された熱可塑性樹脂によるチップカバーをLEDチップに取付けるという単純な作業で、蛍光体の一体化が可能となるので、ケースを形成する樹脂には蛍光体の添加の必要がなく、よって、トランスファモールドによるケースの形成が可能となって、生産性の向上が可能となる極めて優れた効果がある。また、常温時には固体の樹脂中に蛍光体を混和しておくものであるので、作業中に蛍光体の沈殿を生じることもなく性能の低下も生じない。 In the phosphor-integrated LED lamp of the present invention, the phosphor can be integrated by a simple operation of attaching a chip cover made of a thermoplastic resin to which an appropriate amount of phosphor is added to the LED chip. There is no need to add a phosphor to the resin to be formed. Therefore, the case can be formed by transfer molding, and the productivity can be improved. Further, since the normal temperature are those to be mixed phosphors in solid resin, does not occur loss of performance without causing the precipitation of the phosphor during operation.

本発明では、ケースの形成をトランスファーモールドで行うことで迅速に形成するものとするという目的を、蛍光体を保持するチップカバーを用意することで、ケースを形成する樹脂中に蛍光体を混和することをなくして実現した。また、同時に蛍光体の沈殿も生じないようにして、蛍光体一体型LEDランプの性能も向上させた。   In the present invention, for the purpose of forming the case quickly by transfer molding, a phosphor is mixed in the resin forming the case by preparing a chip cover that holds the phosphor. It was realized without anything. At the same time, the performance of the phosphor-integrated LED lamp was improved by preventing the precipitation of the phosphor.

図1〜図3は、本発明に係る蛍光体一体型LEDランプ1の実施例1の製造方法を工程の順に示すものであり、先ず、最初の工程としては基板2上に敷設された回路パターン2aにLEDチップ3のダイマウントを行う。尚、この実施例では前記LEDチップ3は、サファイヤ基板上に活性層が形成され表面側に一対の表面電極3aが設けられたものを、表面を下方としたフェースダウン状態で回路パターン2aにダイマウントした例で示してあり、従って、この状態で正負極の配線は完了しているので、以後にワイヤボンディングは行われることはない。   FIG. 1 to FIG. 3 show the manufacturing method of Example 1 of the phosphor-integrated LED lamp 1 according to the present invention in the order of steps. First, as the first step, a circuit pattern laid on the substrate 2 is shown. 2a, the LED chip 3 is die mounted. In this embodiment, the LED chip 3 is formed on a circuit pattern 2a in a face-down state in which an active layer is formed on a sapphire substrate and a pair of surface electrodes 3a are provided on the surface side with the surface facing downward. This is shown in the mounted example. Therefore, since the positive and negative wirings are completed in this state, no wire bonding is performed thereafter.

図2は、上記ダイマウントの工程に続いて行われるチップカバー取付工程であり、例えば、熱可塑性の透明樹脂4a中に適量の蛍光体4bを混和し略函状として形成されたチップカバー4をLEDチップ3に被着し、全体の加熱を行うことでLEDチップ3にチップカバー4を溶着させるのである。ここで、この実施例1では、上記にも説明したように、以後にワイヤボンド工程が行われることはないので、続いてケース5の形成工程が行われる。   FIG. 2 shows a chip cover mounting step performed subsequent to the die mounting step. For example, a chip cover 4 formed in a substantially box shape by mixing an appropriate amount of phosphor 4b in a thermoplastic transparent resin 4a. The chip cover 4 is welded to the LED chip 3 by being attached to the LED chip 3 and heating the whole. Here, in the first embodiment, as described above, since the wire bonding process is not performed thereafter, the forming process of the case 5 is subsequently performed.

図3は、上記ケース5の形成工程を示すものであり、上記にも説明したように本発明により適量の蛍光体4bを保持するチップカバー4をLEDチップ3に熱溶着により被着したことで、LEDチップ3から放射される光は、チップカバー4により、例えば、白色など所望の色光に変換されている。従って、ケース5を形成するための、例えばエポキシ樹脂など透明樹脂中に蛍光体を混和する必要はない。   FIG. 3 shows a process of forming the case 5, and as described above, the chip cover 4 holding an appropriate amount of the phosphor 4b according to the present invention is attached to the LED chip 3 by heat welding. The light emitted from the LED chip 3 is converted into desired color light such as white by the chip cover 4. Therefore, it is not necessary to mix a phosphor in a transparent resin such as an epoxy resin for forming the case 5.

よって、ケース5の形成にあたっては、加熱して液状となった熱硬化性樹脂を金型中に流し込み、この金型中で迅速に硬化させるトランスファモールドが行えるものとして、ディスペンサによる注入、及び、加熱炉中での硬化工程を不要として、この種の蛍光体一体型LEDランプ1の製造時間を格段に短縮可能とするものである。   Therefore, in forming the case 5, it is possible to perform transfer molding in which a thermosetting resin that has been heated to a liquid state is poured into a mold and rapidly cured in the mold. This eliminates the need for a curing step in the furnace, and makes it possible to significantly reduce the manufacturing time of this type of phosphor-integrated LED lamp 1.

また、図4〜図6は本発明に係る蛍光体一体型LEDランプ1の実施例2の製造方法を工程の順に示すものであり、この実施例2で採用されるLEDチップ3には、背面側にはマウント用電極3bが設けられ、表面側にはパッド電極3cが設けられ、前記基板2の一方の回路パターン2bとマウント用電極3bとでLEDチップ3のダイマウントが行われている。   FIGS. 4 to 6 show the manufacturing method of Example 2 of the phosphor-integrated LED lamp 1 according to the present invention in the order of steps, and the LED chip 3 employed in Example 2 includes a back surface. A mounting electrode 3b is provided on the side, a pad electrode 3c is provided on the surface side, and the LED chip 3 is die-mounted by one circuit pattern 2b of the substrate 2 and the mounting electrode 3b.

従って、前記LEDチップ3にチップカバー4を被着させ、熱溶着により固定した後には、前記LEDチップ3のパッド電極3cと、基板2の他の一方の回路パターン2cとを金線6によりワイヤーボンドを行う必要が生じる。よって、前記チップカバー4にはパッド電極3cの部分を外部に対して解放する開口部4cが設けられている。   Therefore, after the chip cover 4 is attached to the LED chip 3 and fixed by thermal welding, the pad electrode 3c of the LED chip 3 and the other circuit pattern 2c of the substrate 2 are wired by the gold wire 6. A bond needs to be made. Therefore, the chip cover 4 is provided with an opening 4c for releasing the pad electrode 3c from the outside.

そして、前記LEDチップ3へのチップカバー4の被着、加熱による固定が行われた後には、前記パッド電極3cと他の一方の回路パターン2cとの金線6によるワイヤーボンドが行われる(図4参照)。ここで、この実施例2においては、ワイヤーボンドが行われた後の時点で、再度、前記チップカバー4が形成された樹脂の溶融温度に至る温度での再加熱が行われる。   After the chip cover 4 is attached to the LED chip 3 and fixed by heating, wire bonding is performed by the gold wire 6 between the pad electrode 3c and the other circuit pattern 2c (FIG. 4). Here, in Example 2, at the time after wire bonding is performed, reheating is performed again at a temperature that reaches the melting temperature of the resin on which the chip cover 4 is formed.

これにより、前記チップカバー4が熱可塑性樹脂で形成されている場合、あるいは、熱硬化性樹脂であっても初回の加熱が比較的に低温であった場合には、チップカバー4は再度軟化するものとなり、更に、LEDチップ3との密着性を向上させたり、あるいは、溶融により前記パッド電極3c上に流れ込み、図5に示すように前記金線6を保持するなどして、固定を一層に確実なものとする。そして、上記の再加熱が行われた後には、図6にも示すように、実施例1と同様にトランスファモールドによりケース5が形成される。   Thereby, when the chip cover 4 is formed of a thermoplastic resin, or even if it is a thermosetting resin, when the initial heating is relatively low, the chip cover 4 is softened again. Furthermore, the adhesion with the LED chip 3 is improved, or the molten metal flows onto the pad electrode 3c by melting and holds the gold wire 6 as shown in FIG. Make sure. And after said reheating is performed, as shown also in FIG. 6, case 5 is formed by transfer molding like Example 1. FIG.

また、図示は省略するが、実施例1のLEDチップ3をフェイスダウンすることなく、サファイヤ基板の側で基板2にダイマウントしたものもあり、この場合には、LEDチップ3の上面の2箇所に金線6によるワイヤーボンドが行われるものとなるが、この場合には当然に、前記チップカバー4は2箇所に開口部が設けられたもの、あるいは、2箇所を含む開口部が設けられたものが採用される。   Although not shown in the drawings, there is also one in which the LED chip 3 of Example 1 is die-mounted on the substrate 2 on the sapphire substrate side without facing down. In this case, two locations on the upper surface of the LED chip 3 In this case, naturally, the chip cover 4 is provided with openings at two places, or with openings including two places. Things are adopted.

また、実際の蛍光体一体型LEDランプ1の製造にあたっては、基板2は少なくとも長手方向で適宜の複数が接続された形状として形成されており、これに伴い回路パターン2a(図示せず、図1、図4参照)も同じ数が設けられている。そして、それぞれの回路パターン2aには、LEDチップ3(図示せず、図1、図4参照)がマウントされ、金線6によるワイヤーボンドが行わて、横列に並ぶものとされている。   Further, in the actual manufacture of the phosphor-integrated LED lamp 1, the substrate 2 is formed in a shape in which an appropriate plurality is connected at least in the longitudinal direction, and accordingly, a circuit pattern 2a (not shown, FIG. 1) is formed. The same number is also provided. Each circuit pattern 2a is mounted with an LED chip 3 (not shown, see FIGS. 1 and 4), wire-bonded with a gold wire 6 and arranged in a row.

そして、前記したように横列に並んだLEDチップ3の全てを覆うように一体化した状態でケース5が形成される。しかる後に図7に示すように、蛍光体一体型LEDランプ1としての長手方向に沿うように前記ケース5を含み基板2を、それぞれのLEDチップ3の中間の位置で切断、分離させれば、個別の蛍光体一体型LEDランプ1が得られるものとなる。   As described above, the case 5 is formed in an integrated state so as to cover all the LED chips 3 arranged in a row. Thereafter, as shown in FIG. 7, if the substrate 2 including the case 5 is cut and separated at an intermediate position between the LED chips 3 along the longitudinal direction as the phosphor-integrated LED lamp 1, An individual phosphor-integrated LED lamp 1 is obtained.

次いで、上記説明の製造方法により得られる本発明の蛍光体一体型LEDランプ1の作用、効果について説明を行う。先ず、第一には、LEDチップ3を覆うチップカバー4を設け、このチップカバー4に必要とされる量の蛍光体4bを保持させるものとしたことで、ケース5を形成するための樹脂中に蛍光体4bを分散させなくて良いものとなり、これにより、ケース5のトランスファ成形での形成が可能となって、蛍光体一体型LEDランプ1の生産性が格段に向上する。   Next, functions and effects of the phosphor-integrated LED lamp 1 of the present invention obtained by the manufacturing method described above will be described. First, a chip cover 4 that covers the LED chip 3 is provided, and the chip cover 4 holds a necessary amount of the phosphor 4b, so that the resin in the case 5 can be formed. Thus, it is not necessary to disperse the phosphor 4b, thereby enabling the case 5 to be formed by transfer molding, and the productivity of the phosphor-integrated LED lamp 1 is significantly improved.

また、第二には、上記のようにチップカバー4により蛍光体4bをLEDチップ3の周縁に集中して配置することで、LEDチップ3から放射される光と蛍光体4bとが当接し拡散が行われる範囲を、LEDチップ3に近接する狭い範囲に限定することが可能となる。従って、発光源が過剰に大きくなることを防ぐと共に、過剰な拡散により光量が低下するのも防止し、明るい蛍光体一体型LEDランプ1が提供可能となる。   Second, the phosphor 4b is concentrated on the periphery of the LED chip 3 by the chip cover 4 as described above, so that the light emitted from the LED chip 3 and the phosphor 4b are in contact with each other and diffused. It is possible to limit the range in which is performed to a narrow range close to the LED chip 3. Accordingly, it is possible to prevent the light emitting source from becoming excessively large and to prevent the amount of light from being reduced due to excessive diffusion, thereby providing a bright phosphor-integrated LED lamp 1.

本発明は、LEDチップからの発光色と、このLEDチップからの光に励起される蛍光体からの発光色との混合色、即ち、略補色関係にある2色の混合色で白色を得るときの例で説明したが、前記LEDチップが発する光を不可視光である紫外線とし、赤(R)、緑(G)、青(B)三原色の蛍光体を組合せ、蛍光体からの発光色のみで白色光を得るLEDランプに応用することも可能である。   In the present invention, when a white color is obtained with a mixed color of an emission color from an LED chip and an emission color from a phosphor excited by light from the LED chip, that is, a mixed color of approximately two complementary colors As described in the example, the light emitted from the LED chip is ultraviolet light that is invisible light, and phosphors of the three primary colors of red (R), green (G), and blue (B) are combined, and only the emission color from the phosphor is used. It is also possible to apply to an LED lamp that obtains white light.

本発明に係る蛍光体一体型LEDランプの製造方法の実施例1における第一工程を示す断面図である。It is sectional drawing which shows the 1st process in Example 1 of the manufacturing method of the fluorescent substance integrated LED lamp which concerns on this invention. 同じ実施例1における第二工程を示す断面図である。7 is a cross-sectional view showing a second step in the same Example 1. FIG. 同じく実施例1における第三工程を示す断面図である。FIG. 6 is a cross-sectional view showing a third step in Example 1 in the same manner. 同じく本発明に係る蛍光体一体型LEDランプの製造方法の実施例2における第一工程を示す断面図である。It is sectional drawing which similarly shows the 1st process in Example 2 of the manufacturing method of the fluorescent substance integrated LED lamp which concerns on this invention. 同じ実施例2における第二工程を示す断面図である。11 is a cross-sectional view showing a second step in the same Example 2. FIG. 同じく実施例2における第三工程を示す断面図である。FIG. 6 is a cross-sectional view showing a third step in Example 2 in the same manner. 実際の製造工程における個別のLEDランプへの分離工程の例を示す説明図である。It is explanatory drawing which shows the example of the isolation | separation process to the separate LED lamp in an actual manufacturing process. 従来例を示す説明図である。It is explanatory drawing which shows a prior art example.

符号の説明Explanation of symbols

1…蛍光体一体型LEDランプ
2…基板
2a…回路パターン
2b…一方の回路パターン
2c…他の一方の回路パターン
3…LEDチップ
3a…表面電極
3b…マウント用電極
3c…パッド電極
4…チップカバー
4a…透明樹脂
4b…蛍光体
4c…開口部
5…ケース
6…金線
DESCRIPTION OF SYMBOLS 1 ... Phosphor-integrated LED lamp 2 ... Board | substrate 2a ... Circuit pattern 2b ... One circuit pattern 2c ... Other one circuit pattern 3 ... LED chip 3a ... Surface electrode 3b ... Mounting electrode 3c ... Pad electrode 4 ... Chip cover 4a ... Transparent resin 4b ... Phosphor 4c ... Opening 5 ... Case 6 ... Gold wire

Claims (4)

基台にダイマウントが行われたLEDチップのボンディンパッドを除く部分に、適量の蛍光体が添加された熱可塑性樹脂もしくは熱硬化性樹脂で形成したチップカバーを熱溶着し、その後に前記ボンディングパッドにボンディングワイヤによる配線を行い、更に前記LEDチップ、チップカバー、ボンディングワイヤを覆って透明樹脂のトランスファモールドによりケーシングを行うことを特徴とする蛍光体一体型LEDランプの製造方法。   A chip cover made of a thermoplastic resin or thermosetting resin to which an appropriate amount of phosphor is added is thermally welded to a portion of the LED chip that is die-mounted on the base except for the bonding pad, and then the bonding is performed. A method of manufacturing a phosphor-integrated LED lamp, wherein wiring is performed on a pad using a bonding wire, and the casing is formed by a transparent resin transfer mold covering the LED chip, the chip cover, and the bonding wire. 前記ボンディングパッドにボンディングワイヤによる配線が行われた後には、前記チップカバーが形成された樹脂の溶融温度に至る再加熱工程が行われることを特徴とする請求項1記載の蛍光体一体型LEDランプの製造方法。   2. The phosphor-integrated LED lamp according to claim 1, wherein after the bonding pad is wired with a bonding wire, a reheating step to a melting temperature of the resin on which the chip cover is formed is performed. Manufacturing method. 基板上に敷設された回路パターン上にLEDチップのダイマウントを行う工程と、前記ダイマウントの後に、適量の蛍光体が添加された熱可塑性樹脂もしくは熱硬化性樹脂で形成した固体状のチップカバーを前記LEDチップに被着し全体の加熱を行うことでLEDチップにチップカバーを熱溶着する工程と、を有することを特徴とするLEDランプの製造方法。 A step of performing die mounting of an LED chip on a circuit pattern laid on a substrate, and a solid chip cover formed of a thermoplastic resin or a thermosetting resin to which an appropriate amount of phosphor is added after the die mounting. And a step of thermally welding the chip cover to the LED chip by heating the entire LED chip and heating the entire LED chip. 前記熱溶着の後に、前記固体状のチップカバーを覆う透明樹脂からなるケースを形成する工程と、を有することを特徴とする請求項3に記載のLEDランプの製造方法。 The method of manufacturing an LED lamp according to claim 3, further comprising: forming a case made of a transparent resin that covers the solid chip cover after the heat welding.
JP2003273627A 2003-07-11 2003-07-11 Method for manufacturing phosphor-integrated LED lamp Expired - Fee Related JP4503950B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003273627A JP4503950B2 (en) 2003-07-11 2003-07-11 Method for manufacturing phosphor-integrated LED lamp

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003273627A JP4503950B2 (en) 2003-07-11 2003-07-11 Method for manufacturing phosphor-integrated LED lamp

Publications (2)

Publication Number Publication Date
JP2005033138A JP2005033138A (en) 2005-02-03
JP4503950B2 true JP4503950B2 (en) 2010-07-14

Family

ID=34210811

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003273627A Expired - Fee Related JP4503950B2 (en) 2003-07-11 2003-07-11 Method for manufacturing phosphor-integrated LED lamp

Country Status (1)

Country Link
JP (1) JP4503950B2 (en)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7915085B2 (en) 2003-09-18 2011-03-29 Cree, Inc. Molded chip fabrication method
JP4971672B2 (en) * 2005-09-09 2012-07-11 パナソニック株式会社 Light emitting device
JP4857735B2 (en) * 2005-11-28 2012-01-18 日亜化学工業株式会社 Light emitting device
KR100658970B1 (en) 2006-01-09 2006-12-19 주식회사 메디아나전자 LED device generating light with multi-wavelengths
KR100723247B1 (en) * 2006-01-10 2007-05-29 삼성전기주식회사 Chip coating type light emitting diode package and fabrication method thereof
US7943952B2 (en) 2006-07-31 2011-05-17 Cree, Inc. Method of uniform phosphor chip coating and LED package fabricated using method
US10295147B2 (en) 2006-11-09 2019-05-21 Cree, Inc. LED array and method for fabricating same
US10505083B2 (en) 2007-07-11 2019-12-10 Cree, Inc. Coating method utilizing phosphor containment structure and devices fabricated using same
US9041285B2 (en) 2007-12-14 2015-05-26 Cree, Inc. Phosphor distribution in LED lamps using centrifugal force
US10546846B2 (en) 2010-07-23 2020-01-28 Cree, Inc. Light transmission control for masking appearance of solid state light sources
US9166126B2 (en) 2011-01-31 2015-10-20 Cree, Inc. Conformally coated light emitting devices and methods for providing the same
JP6932910B2 (en) * 2016-10-27 2021-09-08 船井電機株式会社 Display device
CN114068787A (en) * 2020-07-31 2022-02-18 鸿盛国际有限公司 Light emitting diode packaging structure capable of emitting light laterally

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001230452A (en) * 2000-02-15 2001-08-24 Asahi Rubber:Kk Light emitting diode with cap as well as method and apparatus for packaging of light emitting diode
JP2002076434A (en) * 2000-08-28 2002-03-15 Toyoda Gosei Co Ltd Light emitting device
JP2002134792A (en) * 2000-10-25 2002-05-10 Matsushita Electric Ind Co Ltd Manufacturing method of white semiconductor light- emitting device
JP2003051622A (en) * 2001-08-07 2003-02-21 Rohm Co Ltd White light emitting semiconductor device
JP2003258312A (en) * 2002-03-01 2003-09-12 Citizen Electronics Co Ltd Method for manufacturing light emitting device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001230452A (en) * 2000-02-15 2001-08-24 Asahi Rubber:Kk Light emitting diode with cap as well as method and apparatus for packaging of light emitting diode
JP2002076434A (en) * 2000-08-28 2002-03-15 Toyoda Gosei Co Ltd Light emitting device
JP2002134792A (en) * 2000-10-25 2002-05-10 Matsushita Electric Ind Co Ltd Manufacturing method of white semiconductor light- emitting device
JP2003051622A (en) * 2001-08-07 2003-02-21 Rohm Co Ltd White light emitting semiconductor device
JP2003258312A (en) * 2002-03-01 2003-09-12 Citizen Electronics Co Ltd Method for manufacturing light emitting device

Also Published As

Publication number Publication date
JP2005033138A (en) 2005-02-03

Similar Documents

Publication Publication Date Title
JP4878053B2 (en) Manufacturing method of light emitting diode
JP4503950B2 (en) Method for manufacturing phosphor-integrated LED lamp
CN104078551B (en) Light emitting device and its manufacturing method
JP4676386B2 (en) Side-emitting LED package and manufacturing method thereof
US6909234B2 (en) Package structure of a composite LED
JP3768864B2 (en) Surface mount type light emitting diode and manufacturing method thereof
CN102610599B (en) Light emitting device packaging piece and manufacture method thereof
JP2009117536A (en) Resin-sealed light emitter, and manufacturing method thereof
US11114583B2 (en) Light emitting device encapsulated above electrodes
JP2012074753A (en) Light emitting diode package
CN102751424A (en) Light emitting device module and method of manufacturing the same
CN103210508B (en) Light emitting device and method for manufacturing same
JP2006140197A (en) Method of manufacturing led
JP4003866B2 (en) Surface mount type light emitting diode and manufacturing method thereof
JP2007088060A (en) Light emitting device
JP4039552B2 (en) Manufacturing method of surface mount type light emitting diode
US20110227118A1 (en) Light Emitting Diode Package Structure and Manufacturing Method Thereof
JP3986327B2 (en) Method for manufacturing light emitting device
KR100757825B1 (en) Manufacturing method of light emitting diode
JP3434714B2 (en) Method for manufacturing surface mount light emitting diode
CN107534076A (en) The manufacture method of LED package, light-emitting device and LED package
JP2016086022A (en) Semiconductor light-emitting element mounting substrate and method of manufacturing the same
JP7071631B2 (en) Package, light emitting device and each manufacturing method
US20100219441A1 (en) Light emitting diode package structure
JP2022022598A (en) Led light-emitting device

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20060524

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20090424

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20090428

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20090625

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20090901

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20091029

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20100105

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100113

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20100330

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20100422

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130430

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130430

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140430

Year of fee payment: 4

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees