JP4502931B2 - Ring laser gyro - Google Patents

Description

  The present invention relates to a ring laser gyro provided with a dither mechanism.

FIG. 5 shows the structure of a gyro block 10 of this type of ring laser gyro. An equilateral triangle passage 12 is formed in the glass block 11, and mirrors 13 and 14 are arranged at the apexes of the equilateral triangle of the passage 12. In addition, an optical path length control mirror 15 is disposed, and a ring-shaped optical path is configured by these mirrors 13-15. A laser medium is sealed in the passage 12, and anodes 16 and 17 and a cathode 18 are provided on each side of the passage 12. In FIG. 5, reference numeral 19 denotes an optical path length control actuator for displacing the optical path length control mirror 15.
The dither mechanism 21 is disposed at the center of the glass block 11. In this example, the dither mechanism 21 has a cylindrical movable portion 22, three arm-shaped deformable portions 23 that extend radially from the axial center to reach the movable portion 22, and an axial center. It is composed of a fixed portion 24 having three island-shaped attachment portions 24a that are connected to the deformable portions 23 at positions and project into spaces defined by the deformable portions 23. Piezoelectric elements are provided on both sides of each deformable portion 23. 25 is attached.

The dither mechanism 21 is fitted into and attached to an opening 26 formed in the center of the glass block 11, and the gyro block 10 having the dither mechanism 21 is installed on, for example, a chassis (not shown). This is done by fixing the mounting portion 24a to the chassis with screws. In FIG. 5, reference numeral 27 denotes a countersunk hole for a screw.
In the gyro block 10 having the above-described configuration, a high voltage is applied between the anodes 16 and 17 and the cathode 18 to generate a plasma discharge to excite the laser medium and travel in opposite directions to the ring-shaped optical path. Two laser beams are oscillated. In this state, when an angular velocity centered on the axis of the ring-shaped optical path is input to the gyro block 10, an optical path difference is generated between the two laser beams, and the optical path difference generates an oscillation frequency difference between the two laser beams. Accordingly, an interference fringe is formed by superimposing these two laser beams, and the input angular velocity is detected from the interference fringe.

The laser light is extracted through the mirror 13 with the mirror 13 as a lead-out mirror, for example. In FIG. 5, an optical system and a photodetector for forming and detecting interference fringes are not shown, but two photodetectors are provided, and interference fringe outputs φA and φA are provided from these two photodetectors. In contrast, an interference fringe output φB having a phase difference of 90 ° is output.
The dither mechanism 21 applies an alternating voltage to the piezoelectric element 25 and deforms the deforming portion 23, thereby causing the movable portion 22 to angularly vibrate, whereby the laser block 10 can be angularly vibrated. The occurrence of a lock-in phenomenon can be prevented (see, for example, Patent Document 1).

FIG. 6 shows the signal processing flow of the interference fringe outputs φA and φB extracted from the gyro block 10. The interference fringe output φA and the 90 ° phase difference φB are input to the signal processing circuit 31 for signal processing. The circuit 31 converts these interference fringe outputs φA and φB into rectangular waves, and generates and outputs up / down pulses (pulse outputs) corresponding to angular velocities (gyro rotation direction and rotation angle) from the rectangular waves. The up / down pulse is input to the up / down counter 32 and counted, and the counted value is input to the dither synchronizing means 33.
The dither pick-up signal is input from the dither pick-off 34 to the dither synchronizer 33, and the dither synchronizer 33 outputs the count value of the up / down pulse input from the up / down counter 32 in synchronization with the dither pick-off signal. The dither synchronization means 33 is constituted by, for example, a D flip-flop. The dither pick-off 34 is one piezoelectric element 25 selected for angular vibration detection among the dither driving piezoelectric elements 25 attached to the deforming portion 23 of the dither mechanism 21 described above, and is a dither pick-off signal. Is the output of the piezoelectric element 25.

The output of the dither synchronization means 33 is input to the system clock synchronization means 35, and the input count value is processed in synchronization with the clock of the inertia control system, thereby detecting the input angular velocity.
As described above, conventionally, the count value of the up / down pulse is synchronized and latched by the dither pick-off signal, and the dither component is removed from the detected angular velocity. It is described that a dither component is removed by sampling an output pulse at a timing delayed by a dither period and half of the dither period.
JP 2004-239680 A JP 61-40508 A

As described above, the dither mechanism that uses the piezoelectric element to dither drive uses the resonance of the dither mechanism, and the phase difference between the dither drive signal and the dither pick-off signal detected by the piezoelectric element is 90 °. . However, since the piezoelectric element causes a time delay when changing the strain into a voltage, a phase difference due to this time delay occurs in the actual angular vibration (angular displacement) of the dither and the dither pick-off signal.
If there is a phase difference between the actual dither pick-off signal and the dither pick-off signal, that is, if the dither pick-off signal is out of phase with the actual dither pick-off signal, the count value of the up / down pulse is When latching in synchronization, the latch is shifted and therefore the dither component cannot be properly removed, and the dither component remains and becomes an error, leading to a decrease in detection accuracy. .

  The phase difference between the actual angular vibration of the dither and the dither pick-off signal varies depending on individual differences and mounting states (mounting accuracy) of the piezoelectric elements, and also varies depending on the influence of temperature and the like. Phase differences caused by individual differences or mounting of piezoelectric elements can be dealt with by using a method such as using a phase shift circuit and individually adjusting to compensate for a constant phase value. The phase shift due to cannot be compensated. Furthermore, since the dither frequency and phase shift fluctuate with time, there is also a problem that errors due to fluctuations accumulate.In the past, errors related to residual errors in dither components due to phase shifts and fluctuations due to the effects of temperature, etc. It was in a situation where no such thing was done.

  In view of such circumstances, an object of the present invention is to provide a ring laser gyro capable of eliminating a residual error of a dither component and detecting an input angular velocity with high accuracy.

According to this invention, generation and a dither mechanism for angular oscillation gyro block, a dither pickoff which detects the angular oscillation, a dither pickoff consists of a piezoelectric element, up and down pulses from the interference fringes output of the gyro block The ring laser gyro configured to detect the input angular velocity by counting the up / down pulses with an up / down counter and processing the counted value in synchronization with the dither pick-off signal, It includes a phase control means for matching the phase to the actual the angular frequency of the phase.

Position phase control means and the phase circuit for changing the control voltage signal the phase of the dither pickoff signal, a first analog integrator for generating a dither displacement signal by integrating the up-down pulse, the output of the phase circuit and a dither displacement A multiplier that multiplies the signal, a low-pass filter that smoothes the output of the multiplier to produce a DC output, an adder that adds the DC output of the low-pass filter and a reference value, and an integration of the output of the adder And a second analog integrator for generating the control voltage signal.

  According to the present invention, the phase of the dither pick-off signal that synchronizes with the count value of the up / down pulse can be made to coincide with the phase of the actual angular vibration of the dither. Further, it is possible to eliminate the residual error of the dither component caused by the fluctuation and to detect the input angular velocity with high accuracy.

Embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a block diagram showing the configuration of an embodiment of a ring laser gyro according to the present invention. Parts corresponding to those in FIG. 6 are denoted by the same reference numerals.
In this example, as in FIG. 6, the interference fringe output φA and the 90 ° phase difference φB of the gyro block 10 are converted into rectangular waves by the signal processing circuit 31, and up / down pulses are generated from the rectangular waves. The up / down pulse is counted by the up / down counter 32, and the counted value is synchronized and latched by the dither synchronizing means 33, and then the system clock synchronizing means 35 performs the arithmetic processing in synchronization with the clock of the inertia control system. Detect angular velocity.

In this example, the dither pick-off signal from the dither pick-off 34 is input to the dither synchronization means 33 by the phase control means 40 so that the phase thereof coincides with the phase of the actual angular vibration of the dither. 33 outputs the count value of the up / down pulse input from the up / down counter 32 in synchronism with a dither pick-off signal (hereinafter referred to as a dither synchronization signal) whose phase is matched to the actual angular vibration phase.
Therefore, in this example, by using a dither synchronization signal whose phase is matched to the actual angular vibration of the dither, it is possible to eliminate residual errors of the dither component due to phase shift and fluctuation due to the influence of temperature and the like. It has become.

Hereinafter, the configuration and signal processing of the phase control means 40 will be described.
The phase circuit 41 is configured by a circuit that can change the phase by a control voltage signal from the outside, and the dither pick-off signal from the dither pick-off 34 is input to the phase circuit 41 and phase-controlled. The output of the phase circuit 41 is input to the multiplier 42 and also input to the dither synchronization means 33 as a dither synchronization signal.
The integrator 43 receives the up / down pulse generated by the signal processing circuit 31, and the integrator 43 integrates the up / down pulse. The integrator 43 is an analog integrator. For example, when the up pulse is a positive input and the down pulse is a negative input, the output of the integrator 43 is a dither displacement signal indicating an angle displaced by dither.

The output of the integrator 43 is input to a multiplier 42. The multiplier 42 multiplies the output of the phase circuit 41 and the output of the integrator 43 (dither displacement signal). Hereinafter, the output of the multiplier 42 will be described separately for the case where there is no phase difference and the case where there is a phase difference between the output of the phase circuit 41 and the dither displacement signal.
First, when the output of the phase circuit 41 and the dither displacement signal are in phase, the output of the multiplier 42 becomes a positive full-wave rectified waveform, and the amplitude becomes maximum. The output of the multiplier 42 is input to the low pass filter 44 and smoothed. The DC output after smoothing is set to 1. This DC output is input to the adder 45, and the adder 45 adds the input DC output and the reference value input from the reference voltage generation circuit 46. The reference value is -1. At this time, the addition result is 0.

The output of the adder 45 is input to the integrator 47 and integrated. In this case, the input of the integrator 47 is 0, so the output of the integrator 47 output to the phase circuit 41 as a control voltage signal is 0, and the phase does not change in the phase circuit 41. The initial state of the integrator 47 is 0, that is, the control voltage signal is initially 0.
Next, a case where there is a phase difference between the output of the phase circuit 41 and the dither displacement signal will be described. In this case, the direct current output smoothed by the output of the multiplier 42 being input to the low-pass filter 44 is smaller than the maximum value 1 described above. That is, when the phase difference is −90 °, the phase difference is 0, and when the phase difference is −180 °, the phase difference takes an intermediate value. Therefore, a negative value is always input to the integrator 47 when added to the reference value -1. The integrator 47 is an inverting analog integrator, so that the output of the integrator 47 becomes a positive voltage and is input to the phase circuit 41 as a control voltage signal. When the control voltage becomes larger than 0, the phase circuit 41 changes the phase, that is, controls the phase of the dither pick-off signal so that the phase difference between the dither pick-off signal and the dither displacement signal becomes zero.

As described above, the phase control means 40 detects the phase difference between the dither pick-off signal and the dither displacement signal obtained by integrating the up / down pulses, and the integrated value of the detected phase difference is used as the dither pick-off signal. By performing feedback so as to change the phase, the phase of the dither pick-off signal can be matched with the phase of the actual angular vibration (angular displacement) of the dither.
Fig. 2 shows the relationship between the dither pick-off signal and the up / down pulse in an ideal case where the dither pick-off signal has no phase shift with the actual displacement (angular vibration) of the dither, and the dither angular velocity and the dither pick-off signal. Is shown together with a dither synchronization signal having a rectangular wave. According to the ring laser gyro according to the present invention, the ideal state as shown in FIG. 2 can be realized, and synchronization is performed at the boundary of the up / down pulse, that is, at the point where the dither angular velocity is 0 (extreme value of the dither displacement). You can hang it.

On the other hand, FIG. 3 shows the relationship between the dither pick-off signal and the up / down pulse when the phase of the dither pick-off signal is deviated from the phase of the actual dither displacement (conventional example). As shown in FIG. 4, synchronization is applied at a position deviated from the boundary of the up / down pulse, and the dither component remains to cause an error.
FIG. 4 shows a specific circuit configuration example of the phase circuit 41 in FIG. 1, and Q1 is a P-channel FET.
The operation will be described. When the control voltage signal is 0, the impedance of the DS (drain source) of Q1 is small and almost zero. Therefore, the phase remains at -180 °. Next, when the control voltage signal takes a positive value, the impedance of the DS of Q1 becomes large and becomes a parallel resistance with R3. At this time, the phase advances from −180 ° by a certain value.

For example, C1 = 0.1 μF, R1 = R2 = 10 KΩ, and R3 = R4 = 1 MΩ. The dither frequency is 500 Hz.
When the control voltage signal is 0, the parallel resistance of R3 and Q1 is almost 0, so the phase is −180 °. When the control voltage signal is 3 V, for example, the resistance of Q1 is about 1 KΩ, so the parallel resistance is about 1 KΩ, and the phase is about −160 ° and the phase is about 20 °.

The block diagram which shows one Example of the ring laser gyro by this invention. The figure which shows the relationship between a dither pick-off signal and an up / down pulse (ideal case). The figure which shows the relationship between a dither pick-off signal and an up / down pulse (when the residual error of a dither component arises by phase shift). FIG. 2 is a circuit diagram illustrating a specific configuration example of a phase circuit in FIG. 1. Sectional drawing which shows the structure of the gyro block of a ring laser gyro. The block diagram which shows the conventional signal processing of a ring laser gyro.

Claims (1)

It has a dither mechanism that angularly vibrates the gyro block and a dither pick-off that detects the angular vibration. The dither pick-off is composed of a piezoelectric element, and generates up / down pulses from the interference fringe output of the gyro block. A ring laser gyro configured to detect an input angular velocity by counting a down pulse with an up / down counter and processing the counted value in synchronization with the dither pick-off signal,
Comprising a phase control means for matching the phase of the dither pickoff signal to the actual the bending vibration of the phase,
The phase control means includes a phase circuit that changes the phase of the dither pick-off signal by a control voltage signal;
A first analog integrator that integrates the up / down pulses to generate a dither displacement signal;
A multiplier that multiplies the output of the phase circuit and the dither displacement signal;
A low-pass filter that smoothes the output of the multiplier to produce a DC output;
An adder for adding the DC output of the low-pass filter and the reference value;
A ring laser gyro comprising: a second analog integrator for integrating the output of the adder to generate the control voltage signal.

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