JP4490832B2 - Semiconductor package - Google Patents

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JP4490832B2
JP4490832B2 JP2005010257A JP2005010257A JP4490832B2 JP 4490832 B2 JP4490832 B2 JP 4490832B2 JP 2005010257 A JP2005010257 A JP 2005010257A JP 2005010257 A JP2005010257 A JP 2005010257A JP 4490832 B2 JP4490832 B2 JP 4490832B2
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wave absorber
semiconductor package
radio wave
semiconductor chip
semiconductor
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JP2006202827A (en
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直樹 秋庭
英一 長谷
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Hitachi Kokusai Electric Inc
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Hitachi Kokusai Electric Inc
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

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Description

本発明は、半導体パッケージの構造に関するものである。   The present invention relates to a structure of a semiconductor package.

半導体チップおよびアルミナ、セラミック等の誘電体基板を実装した半導体パッケージ基部に半導体パッケージ蓋を被せることで構成した,従来の半導体モジュールの断面図を、図2に示す(文献公知発明に係るものではない)。   FIG. 2 is a cross-sectional view of a conventional semiconductor module configured by covering a semiconductor package base portion on which a semiconductor chip and a dielectric substrate such as alumina or ceramic are mounted with a semiconductor package lid (not related to a known invention) ).

半導体パッケージ基部1に誘電体基板4、誘電体基板5および半導体チップ3を実装し、入力端子8と誘電体基板4を接続し、誘電体基板4と半導体チップ3をボンディングワイヤ6によって接続し、半導体チップ3と誘電体基板5をボンディングワイヤ7によって接続し、誘電体基板5と出力端子9を接続し、半導体パッケージ蓋2を半導体パッケージ基部1に被せることで、半導体モジュールを構成する。   The dielectric substrate 4, the dielectric substrate 5, and the semiconductor chip 3 are mounted on the semiconductor package base 1, the input terminal 8 and the dielectric substrate 4 are connected, and the dielectric substrate 4 and the semiconductor chip 3 are connected by the bonding wires 6. The semiconductor chip 3 and the dielectric substrate 5 are connected by the bonding wire 7, the dielectric substrate 5 and the output terminal 9 are connected, and the semiconductor package lid 2 is placed on the semiconductor package base 1 to constitute a semiconductor module.

この構成では、半導体チップ3が高出力かつ高利得の増幅器を構成する場合、発振状態になりやすい。実際に動作周波数帯が55GHzから65GHzの範囲においては信号未入力で発信状態になった。   In this configuration, when the semiconductor chip 3 constitutes an amplifier having a high output and a high gain, the oscillation state is likely to occur. Actually, when the operating frequency band was in the range of 55 GHz to 65 GHz, no signal was input and the transmission state was set.

これを防止するために、半導体パッケージ蓋2に一つの電波吸収体12を試行錯誤的に位置を調整して、半導体パッケージ蓋2の内側面に貼付して、半導体チップ3の出力側から入力側へ空間を伝播する電磁波の正帰還ループを減衰することで発振を停止させる。   In order to prevent this, the position of one radio wave absorber 12 is adjusted to the semiconductor package lid 2 by trial and error, and is attached to the inner side surface of the semiconductor package lid 2 so that the output side of the semiconductor chip 3 is connected to the input side. The oscillation is stopped by attenuating the positive feedback loop of the electromagnetic wave propagating through the space.

なお、半導体パッケージの内側面に1つの電波吸収体を貼付した特許文献としては、特許文献1、特許文献2等が挙げられる。   In addition, Patent Literature 1, Patent Literature 2, and the like can be cited as patent literature in which one radio wave absorber is attached to the inner surface of the semiconductor package.

特開2004−22685号公報Japanese Patent Laid-Open No. 2004-22685 特開2003−31988号公報Japanese Patent Laid-Open No. 2003-31988

上記に記載の従来技術の構成では、半導体パッケージ蓋に貼付する一つの電波吸収体の位置を、空間を伝播する電磁波の正帰還ループを減衰することが可能となる位置に調整する必要があり、時間および労力を要する。   In the configuration of the prior art described above, it is necessary to adjust the position of one radio wave absorber attached to the semiconductor package lid to a position where the positive feedback loop of the electromagnetic wave propagating through the space can be attenuated, It takes time and effort.

なお、上記記載の特許文献1、特許文献2では、上記に記載の従来技術とは逆に、半導体パッケージ2の内側面の全面に亘って一つの電波吸収体を貼付してなるので、電波吸収体自体が大きく、したがって貼付するのに、時間および労力を要する。なお、特許文献1、特許文献2には、空間を伝播する電磁波の正帰還ループを分断することについてはなんらふれていない。   In Patent Document 1 and Patent Document 2 described above, in contrast to the conventional technique described above, since one radio wave absorber is pasted over the entire inner surface of the semiconductor package 2, radio wave absorption The body itself is large and therefore takes time and effort to apply. Patent Document 1 and Patent Document 2 do not mention anything about dividing the positive feedback loop of electromagnetic waves propagating in space.

本発明の目的は、半導体チップの出力側から入力側へ空間を伝播する電磁波の正帰還ループを効果的に減衰することが容易な半導体パッケージを提供することにある。   An object of the present invention is to provide a semiconductor package in which it is easy to effectively attenuate a positive feedback loop of electromagnetic waves propagating in space from the output side to the input side of a semiconductor chip.

本発明は、半導体チップを搭載した半導体パッケージ基部と、前記半導体チップを密封するように前記半導体パッケージ基部に被せる半導体パッケージ蓋とより構成された半導体パッケージにおいて、前記半導体パッケージ蓋に複数の電波吸収体片が貼付されたことを特徴とする半導体パッケージである。   The present invention relates to a semiconductor package comprising a semiconductor package base on which a semiconductor chip is mounted and a semiconductor package lid that covers the semiconductor package base so as to seal the semiconductor chip, and the semiconductor package lid has a plurality of radio wave absorbers. A semiconductor package characterized in that a piece is affixed.

また本発明は、上記に記載の半導体パッケージにおいて、前記複数の電波吸収体片は、前記半導体パッケージ蓋の内側面に貼付されたことを特徴とする半導体パッケージである。   According to the present invention, in the semiconductor package described above, the plurality of radio wave absorber pieces are attached to an inner surface of the semiconductor package lid.

また本発明は、上記に記載の半導体パッケージにおいて、前記複数の電波吸収体片は、前記半導体チップの動作周波数帯における実質1波長の間隔で貼付されたことを特徴とする半導体パッケージである。   According to the present invention, in the semiconductor package described above, the plurality of radio wave absorber pieces are affixed at an interval of substantially one wavelength in the operating frequency band of the semiconductor chip.

本発明によれば、半導体チップの出力側から入力側へ空間を伝播する電磁波の正帰還ループを効果的に減衰することが容易な半導体パッケージを得ることができる。   According to the present invention, it is possible to obtain a semiconductor package in which it is easy to effectively attenuate the positive feedback loop of the electromagnetic wave propagating through the space from the output side to the input side of the semiconductor chip.

発明を実施するための最良の形態では、半導体パッケージ内部で増幅器を構成する半導体チップの入力側先端の実質真上における,半導体パッケージ蓋の内側面に第一の電波吸収体を貼付し、出力側から空間を伝播してくる電磁波の電界が半導体パッケージ内部で増幅器を構成する半導体チップの入力端で最大となる正帰還ループを減衰させる。   In the best mode for carrying out the invention, a first radio wave absorber is affixed to the inner surface of the semiconductor package lid, just above the front end of the semiconductor chip constituting the amplifier inside the semiconductor package, and the output side Attenuates the positive feedback loop in which the electric field of the electromagnetic wave propagating through the space becomes maximum at the input end of the semiconductor chip constituting the amplifier inside the semiconductor package.

更に発振周波数の自由空間において第一の電波吸収体から実質一波長離れた位置の内側に第二の電波吸収体を貼付することで、出力側から空間を伝播してくる電磁波のうち半導体パッケージ内部で増幅器を構成する半導体チップの入力端部で電界が最大となる正帰還ループを減衰させる。   Furthermore, by attaching a second electromagnetic wave absorber inside a position substantially one wavelength away from the first electromagnetic wave absorber in free space of the oscillation frequency, the inside of the semiconductor package among the electromagnetic waves propagating through the space from the output side Attenuates the positive feedback loop that maximizes the electric field at the input end of the semiconductor chip constituting the amplifier.

また第一の電波吸収体と第二の電波吸収体に間隔を与えることで、実質一波長の半分の位置で電磁波の電界が強くなる逆移相のループは減衰させないようにして出力側から入力側へ空間を伝播させ、発振状態となる正帰還ループを分断する。   Also, by providing a gap between the first wave absorber and the second wave absorber, the reverse phase-shifting loop where the electric field of the electromagnetic wave becomes strong at a position that is substantially half the wavelength is not attenuated and is input from the output side. The space is propagated to the side, and the positive feedback loop that becomes the oscillation state is divided.

図1は本発明の実施の形態の半導体パッケージの断面図である。   FIG. 1 is a cross-sectional view of a semiconductor package according to an embodiment of the present invention.

半導体パッケージ基部1に誘電体基板4、誘電体基板5および半導体チップ3を実装し、入力端子8と誘電体基板4を接続し、誘電体基板4と半導体チップ3をボンディングワイヤ6によって接続し、半導体チップ3と誘電体基板5をボンディングワイヤ7によって接続し、誘電体基板5と出力端子9を接続し、第一の電波吸収体10および第二の電波吸収体11を内側面に貼付した半導体パッケージ蓋2を、半導体パッケージ基部1に被せることで、半導体モジュールを構成する。   The dielectric substrate 4, the dielectric substrate 5, and the semiconductor chip 3 are mounted on the semiconductor package base 1, the input terminal 8 and the dielectric substrate 4 are connected, and the dielectric substrate 4 and the semiconductor chip 3 are connected by the bonding wires 6. Semiconductor in which semiconductor chip 3 and dielectric substrate 5 are connected by bonding wire 7, dielectric substrate 5 and output terminal 9 are connected, and first radio wave absorber 10 and second radio wave absorber 11 are attached to the inner side surface. By covering the package lid 2 on the semiconductor package base 1, a semiconductor module is configured.

この構成において、第一の電波吸収体10および第二の電波吸収体11を内側面に貼付してない場合は、半導体チップ3が高出力かつ高利得の増幅器を構成する場合、発振状態になり易い。実際、動作周波数が55GHzから65GHzの範囲の高出力かつ高利得の半導体チップ3を用いたとき、前述動作周波数の55GHzから65GHzの範囲において信号未入力で発振状態になった。   In this configuration, when the first radio wave absorber 10 and the second radio wave absorber 11 are not attached to the inner surface, when the semiconductor chip 3 constitutes a high output and high gain amplifier, the oscillation state is established. easy. Actually, when the semiconductor chip 3 with high output and high gain whose operating frequency is in the range of 55 GHz to 65 GHz is used, no oscillation is generated when no signal is input in the operating frequency range of 55 GHz to 65 GHz.

それに対して、本発明の実施の形態では、図1に図示のように、半導体パッケージ蓋2の内側面に第一の電波吸収体10と第二の電波吸収体11が貼付されてなる。第一の電波吸収体10は、その入力側端が半導体チップ3の信号入力側の先端の実質真上に位置して、信号出力側に向かって貼付されている。第二の電波吸収体11は、その出力側端が第一の電波吸収体10の入力側端から,半導体チップ3の動作周波数帯における実質1波長の間隔を離した位置の内側で、信号入力側に向かって貼付されている。   On the other hand, in the embodiment of the present invention, as shown in FIG. 1, the first radio wave absorber 10 and the second radio wave absorber 11 are attached to the inner surface of the semiconductor package lid 2. The first radio wave absorber 10 has its input side end positioned directly above the tip of the semiconductor chip 3 on the signal input side, and is attached toward the signal output side. The second radio wave absorber 11 has a signal input at a position inside the position where the output side end is separated from the input side end of the first radio wave absorber 10 by substantially one wavelength in the operating frequency band of the semiconductor chip 3. It is stuck to the side.

図1において、間隔Aは半導体チップ3の入力側の先端から第一の電波吸収体10までの間隔、幅Bは第一の電波吸収体10の幅、間隔Cは第一の電波吸収体10と第二の電波吸収体11の間隔、幅Dは第二の電波吸収体12の幅を示す。また間隔Aは信号の流れる方向を正の値とする。   In FIG. 1, the interval A is the interval from the input-side tip of the semiconductor chip 3 to the first radio wave absorber 10, the width B is the width of the first radio wave absorber 10, and the interval C is the first radio wave absorber 10. And the width D of the second wave absorber 11 indicates the width of the second wave absorber 12. The interval A is a positive value in the direction of signal flow.

図3は図1において実施して発振停止した電波吸収体の間隔A、幅B、間隔Cおよび幅Dの値を示す図である。図1において、第一の電波吸収体10および第二の電波吸収体11を半導体パッケージ蓋2の内側面に貼付してない場合は、動作周波数が55GHzから65GHzの範囲の高出力かつ高利得の半導体チップ3を用いたとき、前述動作周波数の55GHzから65GHzの範囲において信号未入力で発振状態になった。   FIG. 3 is a diagram showing values of the interval A, the width B, the interval C, and the width D of the radio wave absorber that has been stopped in FIG. In FIG. 1, when the first radio wave absorber 10 and the second radio wave absorber 11 are not attached to the inner surface of the semiconductor package lid 2, a high output and high gain with an operating frequency in the range of 55 GHz to 65 GHz. When the semiconductor chip 3 was used, an oscillation state was generated when no signal was input in the above-mentioned operating frequency range of 55 GHz to 65 GHz.

それに対して、第一の電波吸収体10および第二の電波吸収体11を、図3に示す間隔A、幅B、間隔Cおよび幅Dの値に従って、半導体パッケージ蓋2の内側面に貼付したところ、発振が停止した。サンプル1,2,3のいずれでも発振が停止した。   On the other hand, the first radio wave absorber 10 and the second radio wave absorber 11 are affixed to the inner surface of the semiconductor package lid 2 according to the values of interval A, width B, interval C, and width D shown in FIG. However, the oscillation stopped. Oscillation stopped in any of samples 1, 2, and 3.

図3中の間隔Aから、第一の電波吸収体10は、その入力側端が、半導体チップ3の信号入力側の先端から−0.16[mm]から0.24[mm]の範囲、即ち半導体チップ3の信号入力側の先端と同じ位置の実質真上に位置して、半導体パッケージ蓋2に貼付されているといえる。   From the interval A in FIG. 3, the first wave absorber 10 has an input side end in a range of −0.16 [mm] to 0.24 [mm] from the signal input side tip of the semiconductor chip 3, That is, it can be said that the semiconductor chip 3 is affixed to the semiconductor package lid 2 so as to be located immediately above the same position as the tip of the signal input side.

図4は、図3に示す幅B、間隔Cおよび幅Dを合計した値を示す図である。前述の動作周波数の55GHzから65GHzの中で最高周波数である65GHzの自由空間における一波長は4.6[mm]と算出できるが、図4中の値は、4.26[mm]から4.48[mm]と、実質一波長の範囲なので、第一の電波吸収体10および第二の電波吸収体11は実質一波長の間隔を離した位置の内側に貼付されているといえる。   FIG. 4 is a diagram showing a total value of the width B, the interval C, and the width D shown in FIG. One wavelength in the free space of 65 GHz, which is the highest frequency among the above-mentioned operating frequencies of 55 GHz to 65 GHz, can be calculated as 4.6 [mm], but the value in FIG. 4 is from 4.26 [mm] to 4.GHz. Since it is a range of 48 [mm], which is substantially one wavelength, it can be said that the first radio wave absorber 10 and the second radio wave absorber 11 are affixed to the inside of a position at a distance of substantially one wavelength.

このように、本発明の実施の形態では、半導体チップ3の入力側先端の実質真上に、入力側端が位置した第一の電波吸収体10が貼付され、半導体チップ3の動作周波数帯における実質1波長の間隔を離した位置の内側に第二の電波吸収体11が貼付されることで、第一の電波吸収体10および第二の電波吸収体11の貼付位置が予め決められるので、半導体チップの出力側から入力側へ空間を伝播する電磁波の正帰還ループを効果的に減衰し且つ分断することが容易で、発振状態を停止するための調整にかかる時間および労力を短縮することができる。   As described above, in the embodiment of the present invention, the first radio wave absorber 10 with the input side end located is pasted substantially directly above the input side tip of the semiconductor chip 3, and in the operating frequency band of the semiconductor chip 3. Since the second radio wave absorber 11 is affixed to the inside of a position that is substantially spaced apart by one wavelength, the affixing positions of the first radio wave absorber 10 and the second radio wave absorber 11 are determined in advance. It is easy to effectively attenuate and divide the positive feedback loop of the electromagnetic wave propagating through the space from the output side to the input side of the semiconductor chip, and to reduce the time and labor required for adjustment to stop the oscillation state it can.

本発明の実施の形態の半導体パッケージの断面図である。It is sectional drawing of the semiconductor package of embodiment of this invention. 従来の半導体パッケージの断面図である。It is sectional drawing of the conventional semiconductor package. 図1において実施して発振停止した電波吸収体の間隔A、幅B、間隔Cおよび幅Dの値を示す図である。It is a figure which shows the value of the space | interval A, the width | variety B, the space | interval C, and the width | variety D of the electromagnetic wave absorber which implemented in FIG. 図3に示す幅B、間隔Cおよび幅Dを合計した値を示す図である。It is a figure which shows the value which totaled the width B, the space | interval C, and the width | variety D which were shown in FIG.

符号の説明Explanation of symbols

1:半導体パッケージ基部、2:半導体パッケージ蓋、3:半導体チップ、4:誘電体基板、5:誘電体基板、6:ボンディングワイヤ、7:ボンディングワイヤ、8:入力端子、9:出力端子、10:第一の電波吸収体、11:第二の電波吸収体、12:電波吸収体。   1: semiconductor package base, 2: semiconductor package lid, 3: semiconductor chip, 4: dielectric substrate, 5: dielectric substrate, 6: bonding wire, 7: bonding wire, 8: input terminal, 9: output terminal, 10 : First radio wave absorber, 11: second radio wave absorber, 12: radio wave absorber.

Claims (1)

半導体チップを搭載した半導体パッケージ基部と、前記半導体チップを密封するように前記半導体パッケージ基部に被せる半導体パッケージ蓋とより構成された半導体パッケージにおいて、前記半導体パッケージ蓋に第一の電波吸収体片と第二の電波吸収体片が貼付されると共に、前記第一の電波吸収体片は、前記半導体チップの信号入力側の略真上に位置するよう配置され、前記第二の電波吸収体片は、前記第一の電波吸収体片の幅と前記第二の電波吸収体片の幅とそれらの間隔の合計が前記半導体チップの動作周波数における一波長の範囲となるように配置されることを特徴とする半導体パッケージ。 In a semiconductor package comprising a semiconductor package base on which a semiconductor chip is mounted and a semiconductor package lid that covers the semiconductor package base so as to seal the semiconductor chip, a first radio wave absorber piece and a second second Rutotomoni affixed wave absorber piece, the first wave absorber pieces, the disposed so as to be positioned substantially directly above the signal input side of the semiconductor chip, the second wave absorber piece, The width of the first radio wave absorber piece, the width of the second radio wave absorber piece, and the total distance between them are arranged in a range of one wavelength at the operating frequency of the semiconductor chip, Semiconductor package.
JP2005010257A 2005-01-18 2005-01-18 Semiconductor package Expired - Fee Related JP4490832B2 (en)

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CN109887904A (en) * 2019-04-16 2019-06-14 中国电子科技集团公司第十三研究所 A kind of encapsulating structure and printed circuit board of millimeter wave chip

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JPH11233660A (en) * 1998-02-17 1999-08-27 Kyocera Corp Package for electronic component accommodation
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JPH06236935A (en) * 1993-02-12 1994-08-23 Nippon Telegr & Teleph Corp <Ntt> Package for microwave circuit
JPH11233660A (en) * 1998-02-17 1999-08-27 Kyocera Corp Package for electronic component accommodation
JP2000299397A (en) * 1999-04-16 2000-10-24 Nec Corp Package for microwave integrated circuit
JP2003224218A (en) * 2002-01-29 2003-08-08 Mitsubishi Electric Corp High frequency circuit package
JP2004214577A (en) * 2003-01-09 2004-07-29 Mitsubishi Electric Corp Packaging case for microwave integrated circuit

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