JP4478710B2 - Display device - Google Patents

Description

  The present invention relates to a display device used for a word processor, a personal computer, a television broadcast receiver, and the like. In particular, the present invention relates to a display device such as an active matrix liquid crystal display device and a scanning line driving device that drives scanning lines provided in the display device.

  The liquid crystal display device is a flat display device having excellent features such as high definition, thinness, light weight, and low power consumption. In recent years, the display performance has been improved, the production capacity has been improved, and the price competitiveness with respect to other display devices. With the improvement, the market size is expanding rapidly.

  In such a liquid crystal display device, the display quality has been improved. However, under the circumstances in which the improvement of the display quality is progressing, as a problem relating to the viewing angle characteristic, a problem of the viewing angle dependency of the γ characteristic such as white is newly emerging. The problem of the viewing angle dependency of the γ characteristic is that the γ characteristic at the time of observation from the front direction is different from the γ characteristic at the time of observation from the oblique direction. Here, the γ characteristic means the gradation dependence of display luminance. That is, the fact that the γ characteristic is different between the front direction and the oblique direction means that the gradation display state differs depending on the observation direction. Therefore, the problem of the viewing angle dependency of the γ characteristic is a particularly serious problem when displaying an image such as a photograph or when displaying a television broadcast received by a receiver.

  As a technique for improving the viewing angle dependency problem of the γ characteristic, a technique called multi-picture element driving has been proposed (see Patent Document 1). This multi-picture element driving is a technique for improving the viewing angle dependence of the viewing angle characteristic, that is, the gamma characteristic, by constituting one display picture element with two or more sub picture elements having different luminances.

  First, the principle of multi-picture element driving will be described with reference to FIGS.

  FIG. 11 is a graph showing the γ characteristic of the liquid crystal display panel of the liquid crystal display device. In the graph shown in FIG. 11, the vertical axis represents the luminance ratio. In the graph shown in FIG. 11, the horizontal axis represents gradation (voltage).

  In the graph shown in FIG. 11, a characteristic indicated by a solid line is a γ characteristic when the liquid crystal display panel driven by a normal driving method is observed from the front direction. When having such γ characteristics, the most normal visibility is obtained. Here, the normal driving method is a driving method in which one display picture element is not divided into a plurality of sub-picture elements.

  In the graph shown in FIG. 11, a characteristic indicated by a broken line is a γ characteristic when the liquid crystal display panel driven by a normal driving method is observed from an oblique direction. In the case of having such a γ characteristic, a deviation of the γ characteristic occurs with respect to normal visibility. In addition, the degree of deviation is small at a portion where the luminance ratio is close to 0 or 1, and is large at a portion where the luminance ratio is far from 0 or 1. That is, it can be seen that the degree of the deviation is small in the portion showing the bright luminance and the dark luminance and is large in the portion showing the halftone. From the above, in the visual recognition from the oblique direction, the halftone display luminance becomes very large, and as a result, whitening occurs.

  On the other hand, in the multi-picture element drive, when trying to obtain a target brightness in one display picture element, the average brightness in a plurality of sub-picture elements having different brightness constituting the one display picture element The drive is controlled to achieve a target luminance.

  In the multi-pixel drive, the γ characteristic when observed from the front direction is the same as that when driven by a normal driving method. That is, the γ characteristic when the liquid crystal display panel driven by multi-picture element driving is observed from the front direction is the characteristic indicated by the solid line in the graph shown in FIG. Therefore, the most normal visibility is obtained when observed from the front direction.

  On the other hand, in the multi-pixel drive, the γ characteristic when observed from the oblique direction is the characteristic indicated by the alternate long and short dash line in the graph shown in FIG. This is because when sub-pixels are used to obtain the target luminance in a halftone where the luminance deviation increases with the normal driving method, the areas near the bright luminance and the dark luminance are displayed with a small luminance deviation. And the display pixel as a whole obtains halftone luminance by averaging the luminance of the sub-picture elements. As a result, luminance deviation is reduced.

  Next, FIG. 12 shows a configuration example of display picture elements of a liquid crystal display device driven by multi-picture element driving.

  As shown in FIG. 12, one display picture element 120 is divided into a plurality of sub picture elements 121 and 122. The sub picture element 121 is connected to the scanning line Gn and the signal line Sm via a TFT (Thin Film Transistor) 123. The sub-picture element 122 is connected to the scanning line Gn and the signal line Sm via the TFT 124. That is, the gate electrodes of the TFTs 123 and 124 are connected to the common (same) scanning line Gn. The source electrodes of the TFTs 123 and 124 are connected to a common (same) signal line Sm.

  The sub picture element 121 includes a liquid crystal capacitor CLC100 and an auxiliary capacitor CCS100. One electrode of each of the liquid crystal capacitor CLC100 and the auxiliary capacitor CCS100 is connected to the drain electrode of the TFT 123. The other electrode of the liquid crystal capacitor CLC100 in the sub-picture element 121 is connected to the counter voltage VCOM100. The other electrode of the auxiliary capacitance CCS 100 in the sub-picture element 121 is connected to the auxiliary capacitance wiring 125. As a result, a storage capacitor counter voltage (hereinafter referred to as a CS voltage) can be applied from the storage capacitor wiring 125 to the storage capacitor CCS 100 in the sub-picture element 121.

  The sub-picture element 122 has a liquid crystal capacitor CLC101 and an auxiliary capacitor CCS101. One electrode of each of the liquid crystal capacitor CLC 101 and the auxiliary capacitor CCS 101 is connected to the drain electrode of the TFT 124. The other electrode of the liquid crystal capacitor CLC101 in the sub-picture element 122 is connected to the counter voltage VCOM101. The other electrode of the auxiliary capacitance CCS 101 in the sub-picture element 122 is connected to the auxiliary capacitance wiring 126. As a result, a CS voltage different from the CS voltage that can be supplied to the auxiliary capacitor CCS 100 from the auxiliary capacitor line 126 can be applied to the auxiliary capacitor CCS 101 in the sub-picture element 122.

  FIG. 13 shows an example of waveforms of the source voltage and the CS voltage applied to each of the sub-picture elements 121 and 122 in the liquid crystal display device shown in FIG.

  In the liquid crystal display device having the configuration shown in FIG. 12, different CS voltages are applied to the divided sub-picture elements 121 and 122, respectively. Thereby, the drain voltage in the TFT 123 is different from the drain voltage in the TFT 124. In the sub-picture elements 121 and 122, the gradations displayed are also different from each other. In this case, the CS voltage is driven by AC (alternating current).

  Specifically, the source electrodes of the TFTs 123 and 124 are turned on at the same gate timing. However, the voltages of the CS electrodes (that is, the auxiliary capacitors CCS100 and CCS101) connected to the drain electrodes of the TFTs 123 and 124 are different from each other. Therefore, the actually held voltage differs between the TFT 123 and the TFT 124. As a result, the sub-picture elements 121 and 122 can display different luminances, that is, different gradations.

  Note that the amplitude of the CS voltage in the auxiliary capacitance wiring 125 and the amplitude of the CS voltage in the auxiliary capacitance wiring 126 have substantially the same amplitude and frequency as shown in FIG. . In the next frame, the CS voltage is also inverted in accordance with the inversion of the source voltages of the TFTs 123 and 124. Thus, the CS voltage is driven by AC.

The voltage Va applied to the sub-picture element 121 and the voltage Vb applied to the sub-picture element 122 are compared to the original applied voltage Vm that gives the target luminance.
Vm = (Va + Vb) / 2
Satisfy the relationship. Therefore, the target luminance is obtained by averaging the display luminances of the sub-picture elements 121 and 122.

  Japanese Patent Application Laid-Open No. 2004-228561 discloses a technique for reversing the CS voltage in a cycle longer than the frame cycle for a high-definition panel with a short horizontal scanning period.

  In a high-definition liquid crystal display panel, the horizontal scanning period is shortened and the number of auxiliary capacitors is increased. Therefore, in the liquid crystal display panel, the waveform of the auxiliary capacitor drive signal that gives the CS voltage is dull. Further, the degree of waveform dullness varies depending on the location in the liquid crystal display panel. For this reason, the effective voltage applied to the sub-pixel electrode also varies depending on the location in the liquid crystal display panel. As a result, the liquid crystal display panel has a problem of uneven display brightness.

  In order to solve this problem, in the technique disclosed in Patent Document 2, the oscillation cycle of the CS voltage is lengthened. As a result, in the technique disclosed in Patent Document 2, the unevenness in luminance of the display is reduced.

  For example, as shown in FIG. 13, when the waveform of the CS voltage is inverted every frame, it is necessary to prepare two types of CS voltage waveforms.

  FIGS. 14A and 14B show an example in which the waveform of the CS voltage is inverted every two frames. In such a case, it is necessary to further prepare a waveform whose phase is shifted by one frame. Therefore, in the example shown in FIGS. 14A and 14B, it is necessary to prepare four types of CS voltage waveforms “VCSVtypeA1” to “VCSVtypeA4”. In this case, as shown in FIG. 15, the signal line of the CS voltage on the liquid crystal display panel is a trunk line 151 composed of “CSVtypeA1” to “CSVtypeA4” at both ends of the picture element and in a direction perpendicular to the auxiliary capacitance wiring 150. Is arranged. The CS voltage is supplied to each auxiliary capacitor 152 by the auxiliary capacitor line 150 drawn from the main line 151.

  FIG. 16 shows wiring of auxiliary capacity drive signals on the glass substrate of the liquid crystal display panel.

  A source driver 162 that supplies a display signal to the signal line Sm and a gate driver 163 that supplies a scanning line drive signal (scanning line signal) to the scanning line Gn are mounted on the glass substrate 161 of the liquid crystal display panel 160.

  A signal for controlling the source driver 162, a signal for controlling the gate driver 163, and a storage capacitor drive signal are generated by a controller (not shown) and supplied to the source driver 162. Among these signals, the signal for controlling the gate driver 163 and the auxiliary capacitance driving signal are given to the wiring 165 on the glass substrate 161 through the wiring 164 provided on the package of the source driver 162. Further, among these, a signal for controlling the gate driver 163 is supplied to an input terminal of the gate driver 163A through a wiring 165 on the glass substrate 161.

  The gate driver 163A generates the scanning line drive signal and supplies the control signal to the next-stage gate driver 163B.

The wiring 165 on the glass substrate 161 for supplying the auxiliary capacity driving signal first extends the basic wiring 166 in the direction orthogonal to the scanning line as a basic signal line. The auxiliary capacity drive signal is supplied to each auxiliary capacity CCS through the auxiliary capacity line CSL drawn from the main line 166. In FIG. 16, reference numeral “CLC” in FIG. 16 that has not been described is a liquid crystal capacitor, and reference numeral “VCOM” is a counter voltage.
Japanese Patent Laying-Open No. 2004-62146 (released on February 26, 2004) JP 2005-189804 A (published July 14, 2005)

  In the technique disclosed in Patent Document 1, in order to reduce the unevenness of display brightness in the liquid crystal display panel described above, it is necessary to reduce the impedance of the wiring that supplies the auxiliary capacitance drive signal to the auxiliary capacitance. . In order to reduce the impedance of the wiring, it is necessary to increase the line width of the wiring.

  The wiring is disposed on the same panel as the pixel that performs display, that is, on the same glass substrate as the pixel that performs display. Here, the wiring provided on the glass substrate has a large wiring resistance. Therefore, the line width of the wiring must be sufficiently thick. As a result, in the liquid crystal display panel, the basic wiring becomes very thick, and the area other than the display pixels becomes large. As a result, the liquid crystal display panel has a problem that it is difficult to narrow the frame.

  In the technique disclosed in Patent Document 2, the influence of waveform dullness is suppressed by increasing the oscillation period of the CS voltage, and the unevenness in luminance of the display is reduced.

  However, in this case, the types of CS voltage waveforms to be used increase. For this reason, in a liquid crystal display panel, since many voltage sources for CS voltage generation are needed, areas other than display pixels will become large. As a result, the technique disclosed in Patent Document 2 also has a problem that it is difficult to narrow the frame.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a display device and a scanning line driving device capable of realizing a narrow frame in a display device driven by multi-picture element driving. It is to provide.

  In order to solve the above problem, a display device according to the present invention includes a scanning line driving device and a plurality of sub-picture elements obtained by dividing one display picture element, and the plurality of sub-picture elements are respectively The plurality of sub-pixels are different from each other by driving the auxiliary capacitance based on the auxiliary capacitance drive signal supplied to each of the auxiliary capacitance wirings. A display device capable of displaying in luminance, wherein the scanning line driving device receives an auxiliary capacitance driving signal to be supplied to each auxiliary capacitance wiring, and shapes the waveform of the inputted auxiliary capacitance driving signal. It is characterized by having a buffer for supplying to each auxiliary capacity wiring.

  Here, the process of “shaping the waveform of the auxiliary capacity driving signal” preferably performs driving of the auxiliary capacity by the auxiliary capacity driving signal, such as a process of reducing dullness generated in the auxiliary capacity driving signal. It means a process for improving the driving capacity of the auxiliary capacity. In general, the buffer has a Schmitt trigger function, and such processing can be easily performed.

  According to the above configuration, the storage capacitor driving signal is once input to the buffer provided in the scanning line driving device. Then, the buffer shapes the waveform of the auxiliary capacitance drive signal input to itself and supplies it to each auxiliary capacitance wiring. In this way, the display device according to the present invention drives the storage capacitor by the buffer of the scanning line driving device.

  Accordingly, in the display device according to the present invention, the auxiliary capacitance driving signal is supplied to each auxiliary capacitance wiring through the buffer, whereby the auxiliary capacitance driving signal with reduced waveform dullness is supplied to each auxiliary capacitance wiring. In other words, the driving capacity of the auxiliary capacity can be improved. For this reason, in the display device according to the present invention, even when the line width of the wiring that forms the main wiring is narrowed, it is possible to suppress the influence caused by the occurrence of waveform dullness, unevenness in display luminance, and the like. For this reason, in the display device according to the present invention, it is not necessary to increase the types of waveform of the CS voltage to be used in order to suppress the influence of the waveform dullness and reduce the unevenness of the display luminance.

  From the above, in the display device according to the present invention, it is possible to reduce the area other than the display pixels.

  Therefore, in the display device driven by multi-picture element driving, there is an effect that the frame can be narrowed.

  In the display device according to the present invention, the scanning line driving device further includes a wiring that outputs an auxiliary capacitance driving signal to be supplied to each auxiliary capacitance wiring as it is to the outside separately from the auxiliary capacitance wiring. It is characterized by that. A display device according to the present invention includes a plurality of the scanning line driving devices, and the scanning line driving devices are connected by the wiring.

  According to the above configuration, the scanning line driving device further includes the wiring for outputting the auxiliary capacitance driving signal to the outside, which is different from the auxiliary capacitance wiring. Therefore, in the display device according to the present invention, it is effective to connect a plurality of scanning line driving devices to each other through the wiring. As a result, between the plurality of scanning line driving devices, an auxiliary capacitance driving signal can be input from one scanning line driving device to the other scanning line driving device. In the other scanning line driving device, the auxiliary capacitance driving signal is supplied to each auxiliary capacitance wiring via its own buffer, whereby the auxiliary capacitance driving signal with reduced waveform dullness is supplied to each auxiliary capacitance wiring. In other words, the driving capacity of the auxiliary capacitor can be improved.

  That the plurality of scanning line driving devices drive the auxiliary capacitance means that the auxiliary capacitance is driven using a plurality of buffers. Therefore, in this case, the driving capacity of the auxiliary capacitor can be further improved. For this reason, in the display device according to the present invention, it is possible to further reduce the line width of the wiring configuring the main wiring.

  Further, the display device according to the present invention is characterized in that each of the auxiliary capacitance lines is divided and provided for each of those connected to the buffer in each of the scanning line driving devices.

  According to the above configuration, the auxiliary wiring drive signal is independently supplied for each scanning line driving device, whereby the main wiring can be divided in the display device according to the present invention. Thereby, since the impedance of the basic wiring can be easily reduced, the line width of the wiring constituting the basic wiring can be further reduced.

  In the display device according to the invention, the scanning line driving device includes a plurality of the buffers.

  According to the above configuration, the driving capacity of the auxiliary capacitor can be further improved by driving the auxiliary capacitor using a plurality of buffers. For this reason, in the display device according to the present invention, it is possible to further reduce the line width of the wiring configuring the main wiring.

  The display device according to the present invention is characterized in that each of the auxiliary capacitance lines is divided for each of the plurality of buffers connected to any one of the buffers.

  According to the above configuration, the auxiliary wiring drive signal is supplied independently for each of the plurality of buffers, so that the main wiring can be divided in the display device according to the present invention. As a result, since the impedance of the basic wiring can be easily reduced, the line width of the wiring constituting the basic wiring can be further reduced.

  Further, the display device according to the present invention is characterized in that the buffer of the scanning line driving device supplies the auxiliary capacitance driving signal inputted thereto to each auxiliary capacitance wiring by overshoot driving.

  According to the above configuration, the buffer of the scanning line driving device supplies the auxiliary capacitance driving signal to each auxiliary capacitance wiring by overshoot driving. As a result, the time for charging the auxiliary capacitors connected to the auxiliary capacitor lines can be shortened, so that the plurality of sub-picture elements can be driven quickly. Thus, in the display device according to the present invention, even when the driving time is shortened due to an increase in scanning lines, unevenness in display luminance can be reduced and display variations can be reduced.

  In order to solve the above problem, a display device according to the present invention includes a scanning line driving device and a plurality of sub-picture elements obtained by dividing one display picture element, and the plurality of sub-picture elements are: Each of the plurality of sub-picture elements is driven by driving the auxiliary capacitance based on an auxiliary capacitance drive signal supplied to each auxiliary capacitance wiring. In the display device capable of displaying with different luminance, the scanning line driving device receives at least an auxiliary capacitance driving signal to be supplied to each auxiliary capacitance wiring, and displays a waveform of the inputted auxiliary capacitance driving signal. A first buffer that is shaped and supplied to each auxiliary capacitance line, and an auxiliary capacitance drive signal to be supplied to each auxiliary capacitance line are input, and the waveform of the input auxiliary capacitance drive signal is shaped and each Auxiliary capacitance wiring It is characterized in that it comprises a second buffer for outputting to another external.

  According to the above configuration, the storage capacitor driving signal is once input to the buffer provided in the scanning line driving device. Then, the buffer shapes the waveform of the auxiliary capacitance drive signal input to itself and supplies it to each auxiliary capacitance wiring. In this way, the display device according to the present invention drives the storage capacitor by the buffer of the scanning line driving device.

  Here, in the display device according to the present invention, the storage capacitor driving signal is further once input to a second buffer provided separately from the first buffer in the scanning line driving device. Then, the second buffer shapes the waveform of the auxiliary capacitance driving signal input to the second buffer, and outputs the waveform to the outside different from each auxiliary capacitance wiring.

  Thus, in the display device according to the present invention, the auxiliary capacitance driving signal is supplied to each auxiliary capacitance wiring via the first buffer, whereby the auxiliary capacitance driving signal with reduced waveform dullness is supplied to each auxiliary capacitance wiring. In other words, the driving capacity of the auxiliary capacitor can be improved. For this reason, in the display device according to the present invention, even when the line width of the wiring that forms the main wiring is narrowed, it is possible to suppress the influence caused by the occurrence of waveform dullness, unevenness in display luminance, and the like. For this reason, in the display device according to the present invention, it is not necessary to increase the types of waveform of the CS voltage to be used in order to suppress the influence of the waveform dullness and reduce the unevenness of the display luminance.

  From the above, in the display device according to the present invention, it is possible to reduce the area other than the display pixels.

  Therefore, in the display device driven by multi-picture element driving, there is an effect that the frame can be narrowed.

  Further, according to the above configuration, the auxiliary capacitance driving signal input to the second buffer of the scanning line driving device is output to the outside, so that the auxiliary capacitance driving signal with reduced waveform dullness is output to the external device. Can be entered.

  The display device according to the present invention includes a plurality of stages of the scanning line driving device, and the second buffer of each scanning line driving device provided in the preceding stage of the last scanning line driving apparatus includes each scanning line. It is characterized by being connected to a first buffer of a scanning line driving device provided in the next stage of the driving device.

  According to the above configuration, in the scanning line driving device according to the present invention, the second buffer of each scanning line driving device provided upstream of the last scanning line driving device has the second buffer next to the scanning line driving device. A first buffer of a scanning line driving device provided in the stage is connected. In the display device according to the present invention, it is effective to sequentially connect the scanning line driving devices. As a result, it is possible to sequentially input the storage capacitor driving signal with reduced waveform dullness between the scanning line driving devices to the scanning line driving devices. In each of the scanning line driving devices, the auxiliary capacitance driving signal is supplied to each auxiliary capacitance wiring through the first buffer included in the scanning line driving device. It is possible to supply the auxiliary capacitance wiring, that is, the driving capability of the auxiliary capacitance can be improved.

  That the plurality of scanning line driving devices drive the storage capacitor means that the storage capacitor is driven using a plurality of first buffers. Therefore, in this case, the driving capacity of the auxiliary capacitor can be further improved. For this reason, in the display device according to the present invention, it is possible to further reduce the line width of the wiring configuring the main wiring.

  In addition, according to the above configuration, the storage capacitor drive signal is output to the next-stage scanning line driving device via the second buffer of the scanning line driving device, and thus is caused by the dullness and delay of the storage capacitor driving signal. Thus, fluctuations in the waveform of the storage capacitor driving signal among the plurality of scanning line driving devices can be suppressed.

  In the display device according to the present invention, the first buffer of the scanning line driving device supplies the auxiliary capacitance driving signal input thereto to the auxiliary capacitance lines by overshoot driving. .

  According to the above configuration, the first buffer of the scanning line driving device supplies the auxiliary capacitance driving signal to each auxiliary capacitance wiring by overshoot driving. As a result, the time for charging the auxiliary capacitors connected to the auxiliary capacitor lines can be shortened, so that the plurality of sub-picture elements can be driven quickly. Thus, in the display device according to the present invention, even when the driving time is shortened due to an increase in scanning lines, unevenness in display luminance can be reduced and display variations can be reduced.

  Further, the display device according to the present invention may be characterized in that the scanning line driving device receives an auxiliary capacitance driving signal to be supplied to each auxiliary capacitance wiring.

  In order to solve the above-described problem, the scanning line driving device according to the present invention includes a plurality of sub-picture elements obtained by dividing one display picture element, and the plurality of sub-picture elements are connected to different auxiliary capacitance lines. The plurality of sub-pixels can be displayed with different luminances by driving the auxiliary capacitor based on the auxiliary capacitor driving signal supplied to each auxiliary capacitor wiring. A scanning line driving device that is provided in a display device and drives a scanning line provided in the display device, wherein an auxiliary capacitance driving signal to be supplied to each auxiliary capacitance wiring is inputted, and the inputted auxiliary capacitance A buffer is provided that shapes the waveform of the drive signal and supplies the waveform to each auxiliary capacitance line.

  According to the above configuration, the storage capacitor driving signal is once input to the buffer provided in the scanning line driving device itself. Then, the buffer shapes the waveform of the auxiliary capacitance drive signal input to itself, and supplies it to each auxiliary capacitance line of the display device. Thus, the scanning line driving device according to the present invention drives the auxiliary capacitor by the buffer provided in itself.

  Thus, in the scanning line driving device according to the present invention, the auxiliary capacitor driving signal is supplied to each auxiliary capacitor wiring of the display device via the buffer, whereby the auxiliary capacitor driving signal with reduced waveform dullness is displayed on the display device. It is possible to supply to each auxiliary capacitance line, that is, the driving capability of the auxiliary capacitance in the display device can be improved. Therefore, in the scanning line driving device according to the present invention, even when the line width of the main wiring in the display device is narrowed, the influence due to the occurrence of waveform dullness, display luminance unevenness, etc. is suppressed. can do. For this reason, in the display device including the scanning line driving device according to the present invention, it is not necessary to increase the types of CS voltage waveforms to be used in order to suppress the influence of waveform dullness and reduce unevenness in display luminance.

  As described above, in the scanning line driving device according to the present invention, it is possible to reduce the area other than the display pixel in the display device driven by multi-picture element driving.

  Therefore, in the display device driven by multi-picture element driving, there is an effect that the frame can be narrowed.

  In addition, the scanning line driving device according to the present invention is further characterized by further including a wiring for outputting the auxiliary capacitance driving signal to be supplied to each auxiliary capacitance wiring to the outside as it is, separately from the auxiliary capacitance wiring. .

  According to said structure, it further has the wiring which outputs the input auxiliary capacity drive signal as it is outside the auxiliary capacity wiring as it is. Therefore, the storage capacitor driving signal can be input to the external device by connecting the scanning line driving device according to the present invention and the external device through the wiring.

  In the scanning line driving device according to the present invention, the buffer supplies an auxiliary capacitance driving signal inputted to the buffer to each auxiliary capacitance wiring by overshoot driving.

  According to the above configuration, the buffer supplies the auxiliary capacitance driving signal to each auxiliary capacitance wiring by overshoot driving. As a result, the time for charging the auxiliary capacitors connected to the auxiliary capacitor lines can be shortened, so that the plurality of sub-picture elements can be driven quickly. Thus, in a display device including the scanning line driving device according to the present invention, even when the driving time is shortened due to an increase in scanning lines, unevenness in display luminance is reduced and display variation is reduced. Can be reduced.

  In order to solve the above-described problem, the scanning line driving device according to the present invention includes a plurality of sub-picture elements obtained by dividing one display picture element, and the plurality of sub-picture elements are connected to different auxiliary capacitance lines. The plurality of sub-pixels can be displayed with different luminances by driving the auxiliary capacitor based on the auxiliary capacitor driving signal supplied to each auxiliary capacitor wiring. A scanning line driving device that is provided in a display device and drives a scanning line provided in the display device, and at least an auxiliary capacitance driving signal to be supplied to each auxiliary capacitance wiring is input and the input A first buffer that shapes the waveform of the auxiliary capacitance driving signal and supplies the auxiliary capacitance wiring to the auxiliary capacitance wiring, and an auxiliary capacitance driving signal to be supplied to the auxiliary capacitance wiring are input. wave Is characterized in that the by shaping and a second buffer for outputting a different outside with the respective storage capacitor wires.

  According to the above configuration, the storage capacitor driving signal is once input to the first buffer provided in the scanning line driving device itself. Then, the first buffer shapes the waveform of the auxiliary capacitance driving signal input to itself and supplies it to each auxiliary capacitance wiring. Thus, the scanning line driving device according to the present invention drives the auxiliary capacitor by the first buffer provided in itself.

  Here, in the scanning line driving device according to the present invention, the storage capacitor driving signal is further once inputted to a second buffer provided separately from the first buffer. Then, the second buffer shapes the waveform of the auxiliary capacitance driving signal input to the second buffer, and outputs the waveform to the outside different from each auxiliary capacitance wiring.

  As a result, in the scanning line driving device according to the present invention, the auxiliary capacitance driving signal in which the waveform dullness is reduced by supplying the auxiliary capacitance driving signal to each auxiliary capacitance wiring of the display device via the first buffer. Can be supplied to each auxiliary capacity wiring of the display device, that is, the driving capacity of the auxiliary capacity of the display device can be improved. Therefore, in the scanning line driving device according to the present invention, even when the line width of the main wiring in the display device is narrowed, the influence due to the occurrence of waveform dullness, display luminance unevenness, etc. is suppressed. can do. For this reason, in the display device including the scanning line driving device according to the present invention, it is not necessary to increase the types of CS voltage waveforms to be used in order to suppress the influence of waveform dullness and reduce unevenness in display luminance.

  As described above, in the scanning line driving device according to the present invention, it is possible to reduce the area other than the display pixel in the display device driven by multi-picture element driving.

  Therefore, in the display device driven by multi-picture element driving, there is an effect that the frame can be narrowed.

  Further, according to the above configuration, the auxiliary capacity driving signal input to the second buffer is output to the outside, so that the auxiliary capacity driving signal with reduced waveform dullness can be input to an external device. it can.

  In the scanning line driving device according to the present invention, the first buffer supplies an auxiliary capacitance driving signal input to the first buffer to each auxiliary capacitance wiring by overshoot driving.

  According to the above configuration, the first buffer supplies the auxiliary capacitance driving signal to each auxiliary capacitance wiring by overshoot driving. As a result, the time for charging the auxiliary capacitors connected to the auxiliary capacitor lines can be shortened, so that the plurality of sub-picture elements can be driven quickly. Thus, in a display device including the scanning line driving device according to the present invention, even when the driving time is shortened due to an increase in scanning lines, unevenness in display luminance is reduced and display variation is reduced. Can be reduced.

  Further, the scanning line driving device according to the present invention may be characterized in that an auxiliary capacitance driving signal to be supplied to each auxiliary capacitance wiring is inputted.

  As described above, a display device according to the present invention includes a scanning line driving device and a plurality of sub-picture elements obtained by dividing one display picture element, and the plurality of sub-picture elements are respectively provided with different auxiliary capacitance lines. A plurality of sub-pixels can be displayed with different luminances by driving the auxiliary capacitance based on the auxiliary capacitance driving signal supplied to each auxiliary capacitance wiring. In the display device, the scanning line driving device receives an auxiliary capacitance driving signal to be supplied to each auxiliary capacitance wiring, shapes the waveform of the inputted auxiliary capacitance driving signal, and sets each auxiliary capacitance. In this configuration, a buffer for supplying wiring is provided.

  In addition, a display device according to the present invention includes a scanning line driving device and a plurality of sub-picture elements obtained by dividing one display picture element, and the plurality of sub-picture elements are connected to different auxiliary capacitance lines. The plurality of sub-pixels can be displayed with different luminances by driving the auxiliary capacitor based on the auxiliary capacitor driving signal supplied to each auxiliary capacitor line. In the display device, the scanning line driving device receives at least an auxiliary capacitance driving signal to be supplied to each auxiliary capacitance wiring, shapes the waveform of the inputted auxiliary capacitance driving signal, and sets each auxiliary capacitance. A first buffer supplied to the wiring and an auxiliary capacitance driving signal to be supplied to each auxiliary capacitance wiring are input, and the waveform of the input auxiliary capacitance driving signal is shaped to be different from each auxiliary capacitance wiring. Output to the outside And second buffer is configured to include.

  As described above, the scanning line driving device according to the present invention includes a plurality of sub-picture elements obtained by dividing one display picture element, and the plurality of sub-picture elements are connected to different auxiliary capacity wirings. And a plurality of sub-pixels can be displayed at different brightness levels by driving the auxiliary capacitance based on the auxiliary capacitance driving signal supplied to each auxiliary capacitance wiring. A scanning line driving device for driving a scanning line provided in the display device, wherein an auxiliary capacitance driving signal to be supplied to each auxiliary capacitance wiring is inputted, and a waveform of the inputted auxiliary capacitance driving signal And a buffer that supplies the auxiliary capacitance wiring to the auxiliary capacitance wiring.

  Further, the scanning line driving device according to the present invention includes a plurality of sub-picture elements obtained by dividing one display picture element, and each of the plurality of sub-picture elements has an auxiliary capacity connected to a different auxiliary capacity wiring. In addition, by driving the auxiliary capacitance based on the auxiliary capacitance drive signal supplied to each auxiliary capacitance wiring, the display device is provided with a display device that can display the plurality of sub-picture elements with different luminances. A scanning line driving device for driving a scanning line provided in the display device, wherein at least an auxiliary capacitance driving signal to be supplied to each auxiliary capacitance wiring is inputted, and a waveform of the inputted auxiliary capacitance driving signal The first buffer that is supplied to each auxiliary capacitance wiring and the auxiliary capacitance driving signal to be supplied to each auxiliary capacitance wiring is input, and the waveform of the input auxiliary capacitance driving signal is shaped and Each It is configured to include a second buffer for outputting to another outside the capacitor wiring.

  Therefore, in the display device driven by multi-picture element driving, there is an effect that the frame can be narrowed.

[Embodiment 1]
An embodiment of the present invention will be described below with reference to FIGS.

  FIG. 1 shows an embodiment of the present invention and is a block diagram showing a schematic configuration of a scanning line driving device.

  A gate driver (scanning line driving device) 1 shown in FIG. 1 includes control logics 11A and 11B, a bidirectional shift register 12, a level shifter 13, and an output circuit 14.

  Furthermore, the gate driver 1 is configured to include buffers 21A and 21B.

  1 are terminals provided in the gate driver 1, and the reference numerals (characters) attached to the side of the circular member are provided in the gate driver 1. This is the terminal name of the terminal.

  A terminal “LBR” provided in the gate driver 1 is an input terminal to which a control signal indicating the shift direction of the bidirectional shift register 12 is input. The terminal “LBR” has a state “H” and a state “L”, and the bidirectional shift register 12 is switched by switching between the state “H” and the state “L” according to the control signal. Control the shift direction. As a result, in the gate driver 1, the scanning direction of the scanning line driving signal output from the output circuit 14 is determined.

  Terminals “GSPOI” and “GSPIO” provided in the gate driver 1 are IO (Input / Output) terminals having a function of switching an input terminal and an output terminal according to a control signal input to the terminal “LBR”. is there. When the terminal “LBR” is in the state “H”, the terminal “GSPOI” is an input terminal and the terminal “GSPIO” is an output terminal. On the other hand, when the terminal “LBR” is in the state “L”, the terminal “GSPOI” is an output terminal, and the terminal “GSPIO” is an input terminal. Of the terminals “GSPOI” and “GSPIO”, a terminal having the function of an input terminal receives a signal for starting the operation of the bidirectional shift register 12 (hereinafter referred to as “scanning start signal”). . Of the terminals “GSPOI” and “GSPIO”, the terminal having the function of an output terminal outputs the scanning start signal to a gate driver (not shown) cascade-connected to the gate driver 1. For example, when the gate driver 1 is the gate driver 1A shown in FIG. 4 described later, the “next-stage gate driver” is the gate driver 1B shown in FIG.

  Similarly to the terminals “GSPOI” and “GSPIO”, the terminals “GCKOI” and “GCKIO” provided in the gate driver 1 are connected to the input terminal and the output terminal in accordance with the control signal input to the terminal “LBR”. This is an IO terminal having a switching function. When the terminal “LBR” is in the state “H”, the terminal “GCKOI” is an input terminal, and the terminal “GCKIO” is an output terminal. On the other hand, when the terminal “LBR” is in the state “L”, the terminal “GCKOI” is an output terminal, and the terminal “GCKIO” is an input terminal. Of the terminals “GCKOI” and “GCKIO”, a terminal having a function of an input terminal receives a driving clock signal of the bidirectional shift register 12. Of the terminals “GCKOI” and “GCKIO”, the terminal having the function of an output terminal outputs the drive clock signal to the gate driver in the next stage.

  Terminals “VGL” and “VGH” provided in the gate driver 1 are power supply terminals to which a power supply (not shown) for operating the output circuit 14 is connected. The output circuit 14 outputs a scanning line drive signal to terminals “OG1” to “OG272” which will be described later. When the power supply voltage of the power supply applied to the terminal “VGL” is vgl and the power supply voltage of the power supply applied to the terminal “VGH” is vgh, the output circuit 14 outputs the scanning line drive signal from vgl to vgh. Is output as a signal having the following amplitude.

  A terminal “VCC” provided in the gate driver 1 is a power supply terminal to which a power supply (not shown) for operating the gate driver 1 is connected. A terminal “GND” provided in the gate driver 1 is a ground terminal.

  Further, the gate driver 1 is provided with 272 terminals “OG1” to “OG272”. In all the drawings of the present application, for simplification of the drawing, illustration of 270 terminals from the terminals “OG2” to “OG271” is omitted. These terminals “OG 1” to “OG 272” are output terminals for scanning line driving signals for outputting the scanning line driving signals from the output circuit 14 to the outside of the gate driver 1. The terminals “OG1” to “OG272” are connected to the scanning line Gn (see FIG. 4), so that the scanning line Gn is supplied to the scanning line Gn to drive the scanning line Gn. This is a scanning line drive terminal. In the gate driver 1 shown in FIG. 1, since 272 terminals “OG1” to “OG272” are provided, a maximum of 272 scanning lines can be driven.

  Terminals “CSVtypeA1R” to “CSVtypeA4R” and “CSVtypeA1L” to “CSVtypeA4L” provided in the gate driver 1 are auxiliary capacity drive signal input terminals for inputting the auxiliary capacity drive signals to the buffers 21A and 21B. Terminals “CSVtypeA1′R” to “CSVtypeA4′R” and “CSVtypeA1′L” to “CSVtypeA4′L” provided in the gate driver 1 are connected to the auxiliary capacitance wiring ( For example, it is an output terminal of an auxiliary capacity drive signal for output to the auxiliary capacity wiring 51 in FIG.

  The terminal “CSVtypeA1R” is connected to “CSVtypeA1L”. The terminal “CSVtypeA2R” is connected to “CSVtypeA2L”. The terminal “CSVtypeA3R” is connected to “CSVtypeA3L”. The terminal “CSVtypeA4R” is connected to “CSVtypeA4L”.

  One end (input terminal) of the buffer 21A and one end (input terminal) of the buffer 21B are connected to a connection portion between the terminals “CSVtypeA1R” to “CSVtypeA4R” and the terminals “CSVtypeA1L” to “CSVtypeA4L”. The other end (output terminal) of the buffer 21A is connected to the terminals “CSVtypeA1′R” to “CSVtypeA4′R”, and the other end (output terminal) of the buffer 21B is connected to the terminals “CSVtypeA1′L” to “CSVtypeA4′L”. Connected to.

  The storage capacitor drive signal input to the gate driver 1 is input to the buffers 21A and 21B from the connection portion between the terminals “CSVtypeA1R” to “CSVtypeA4R” and the terminals “CSVtypeA1L” to “CSVtypeA4L”. The buffers 21 </ b> A and 21 </ b> B shape the waveform of the input auxiliary capacitance driving signal and output the waveform to the terminals “CSVtypeA1′R” to “CSVtypeA4′R” and “CSVtypeA1′L” to “CSVtypeA4′L”. In the gate driver 1, the auxiliary capacitance driving signal in which the waveform dullness is reduced by the buffers 21 </ b> A and 21 </ b> B is thus supplied to the auxiliary capacitance wiring, and the auxiliary capacitance (see FIG. 4) connected to the auxiliary capacitance wiring is driven. . Note that the buffer used in the display device and the scanning line driving device according to the present invention is used for adjusting the fan-in number of the input and improving the driving capability of the output. Many of the buffers used for input have a Schmitt trigger function, and perform noise removal and waveform shaping of the input signal. Further, here, the process of “shaping the waveform of the auxiliary capacity drive signal” means the process of reducing the dullness generated in the auxiliary capacity drive signal and the process of amplifying the amplitude of the auxiliary capacity drive signal. It means a process for suitably driving the auxiliary capacity by the drive signal, that is, for improving the driving capacity of the auxiliary capacity. In general, such a buffer can easily perform such processing by the Schmitt trigger function.

Terminals “VCSH” and “VCSL” provided in the gate driver 1 are power supply terminals to which a power supply (not shown) is connected to operate a buffer provided in the scanning line driving device according to the present invention. That is, the terminals “VCSH” and “VCSL” in the gate driver 1 are power terminals connected to a power source (not shown) for operating the buffers 21A and 21B. The power supply voltage from the power supply applied to the terminals “VCSH” and “VCSL” is
The power supply voltage of the terminal “VCSH”> the power supply voltage of the terminal “VCSL”.

  FIG. 2 is a diagram illustrating a circuit configuration of the buffer 21A and the buffer 21B.

  The buffer 210 shown in FIG. 2 is preferably used as the buffer 21A and the buffer 21B. The buffer 210 shown in FIG. 2 has a configuration in which an input terminal 211, two inverters 212A and 212B, and an output terminal 213 are connected in series in this order.

  The buffer 210 shown in FIG. 2 has an input terminal 211 between the terminal “CSVtypeA1R” and the terminal “CSVtypeA1L”, between the terminal “CSVtypeA2R” and the terminal “CSVtypeA2L” in the gate driver 1 shown in FIG. It is connected between “CSVtypeA3R” and the terminal “CSVtypeA3L”, and between the terminal “CSVtypeA4R” and the terminal “CSVtypeA4L”. This is the same whether the buffer 210 shown in FIG. 2 is used as the buffer 21A shown in FIG. 1 or the buffer 21B shown in FIG.

  When used as the buffer 21A shown in FIG. 1, the output terminal 213 of the buffer 210 is connected to the terminals “CSVtypeA1′R” to “CSVtypeA4′R” in the gate driver 1 shown in FIG. When used as the buffer 21B shown in FIG. 1, the output terminal 213 of the buffer 210 is connected to the terminals “CSVtypeA1′L” to “CSVtypeA4′L” in the gate driver 1 shown in FIG.

  In each of the two inverters 212A and 212B provided in the buffer 210 shown in FIG. 2, the power supply line VCSH is connected to the terminal “VCSH” provided in the gate driver 1 shown in FIG. It is connected to a terminal “VCSL” provided in the gate driver 1 shown in FIG.

  The inverter 212A includes a p-channel MOS (Metal Oxide Semiconductor) field effect transistor 212AP to which the voltage from the terminal “VCSH” is applied to the source, and an n-channel type to which the voltage from the terminal “VCSL” is applied to the source. This is an inverter circuit including a MOS field effect transistor 212AN. The inverter 212B includes a p-channel MOS field effect transistor 212BP to which the voltage from the terminal “VCSH” is applied to the source, and an n-channel MOS field effect to which the voltage from the terminal “VCSL” is applied to the source. This is an inverter circuit including a transistor 212BN.

  The buffer 210 shown in FIG. 2 is configured by connecting inverters 212A and 212B in two stages.

  Here, an outline of the principle of generating the scanning line driving signal in the scanning line driving device according to the present invention will be described.

  First, a control signal for setting the terminal “LBR” to the “H” state or the “L” state is supplied to the terminal “LBR” of the gate driver 1 shown in FIG. Thereby, in the gate driver 1, the shift direction of the bidirectional shift register 12 is determined, and the scanning direction of the scanning line driving signal is determined. Here, assuming that the terminal “LBR” is in the “H” state, the above outline will be described. At this time, the scanning direction of the scanning line driving signal output from the output circuit 14, that is, the order of the scanning lines to which the scanning line driving signal is supplied is connected to the scanning line connected to the terminal “OG1” and the terminal “OG2”. ,..., A scanning line connected to the terminal “OG272”.

  When the scan start signal generated based on the vertical synchronization signal is input from the terminal “GSPOI” of the gate driver 1, the bidirectional shift register 12 outputs the drive clock signal input from the terminal “GCKOI” of the gate driver 1. The shift operation is started in synchronization with the first pulse, and a first pulse that is a pulse signal is generated by the shift operation. Note that a signal generated based on the horizontal synchronization signal is used as the drive clock signal.

  The first pulse is level-converted by the level shifter 13 from the voltage vgl to a signal having the amplitude of the voltage vgh, and is output from the output circuit 14 to the scanning line connected to the terminal “OG1”. Next, the bidirectional shift register 12 generates a second pulse, which is a pulse signal different from the first pulse, by the shift operation. The second pulse is level-converted by the level shifter 13 from the voltage vgl to a signal having the amplitude of the voltage vgh, and is output from the output circuit 14 to the scanning line connected to the terminal “OG2”.

  That is, the bidirectional shift register 12 generates the (n + 1) th pulse, which is a pulse signal different from the nth pulse, by the shift operation. The (n + 1) th pulse is level-converted by the level shifter 13 from the voltage vgl to a signal having the amplitude of the voltage vgh, and is output from the output circuit 14 to the scanning line connected to the terminal “OG (n + 1)”. Is output. Next, the bidirectional shift register 12 generates the (n + 2) th pulse, which is a pulse signal different from the (n + 1) th pulse, by the above-described shift operation. The process is repeated until a pulse (the 272nd pulse) is output to the scanning line connected to “OG272”. Here, in the case of the bidirectional shift register 12, “n” is an arbitrary natural number between 1 and 270.

  In the shift operation in the bidirectional shift register 12, a signal synchronized with the horizontal synchronization signal is used. Therefore, the scanning line drive signals output from the terminals “OG1” to “OG272” drive one scanning line for each period of the horizontal synchronization signal.

  When the shift operation is completed, that is, when the scanning line driving signal is output to the scanning line connected to the terminal “OG272”, the gate driver 1 outputs a scanning start signal from the terminal “GSPIO” and also the terminal “GCKIO”. To output a drive clock signal. The scanning start signal and the driving clock signal are input to the next-stage gate driver. As a result, the next-stage gate driver starts the scanning line driving signal generation operation in the scanning line driving device, similar to the gate driver 1. When the gate driver 1 drives 272 scanning lines, in the next stage gate driver, from the 273th scanning line to the 274th scanning line, the 275th scanning line, and so on. A scanning line driving signal is applied to the scanning line.

  FIG. 3 is a view showing the outer shape of the gate driver 1.

  In order to more clearly illustrate the characteristics of the scanning line driving device according to the present invention, the gate driver 1 shown in FIG. 3, the gate driver 2 shown in FIG. 8 described later, and the gate driver 3 shown in FIG. Also, the member through which the auxiliary capacity drive signal passes is shown in a transparent state.

  The gate driver 1 has a configuration in which an integrated circuit 32 including buffers 21A and 21B is mounted on a tape 31. In the gate driver 1 shown in FIG. 3, the reference numerals attached to the terminal portions 33 where various terminals are provided are the terminal names of the tape 31 corresponding to the terminals of the gate driver 1.

  As for the terminal of the gate driver 1, terminals “OG1” to “OG272” are arranged at the center of the terminal portion 33, and terminals “CSVtypeA1′R” to “CSVtypeA4′R”, “CSVtypeA1′L” to “CSVtypeA1′L” to “ “CSVtypeA4′L” is arranged.

  The other terminals are arranged at both ends of the gate driver 1 in the terminal portion 33 with respect to the terminals “CSVtypeA1′R” to “CSVtypeA4′R” and “CSVtypeA1′L” to “CSVtypeA4′L”. Although not shown, two terminals are provided in FIG. 3, the terminal “VGL”, the terminal “VGH”, the terminal “GND”, the terminal “LBR”, the terminal “VCC”, the terminal “VCSH”, and the terminal “ In both “VCSL”, one terminal and the other terminal of the two terminals are connected.

  Terminals “CSVtypeA1R” to “CSVtypeA4R” are connected to terminals “CSVtypeA1L” to “CSVtypeA4L”.

  For convenience, in FIG. 3 and the subsequent drawings, a single thick line indicates a portion where a plurality of wirings through which the storage capacitor driving signal passes (for example, wirings connecting the terminal “CSVtypeA1R” and the terminal “CSVtypeA1L”) exist. Show.

  Note that the terminals “GSPOI” and “GSPIO” have an input / output relationship in which one of the terminals becomes an input terminal and the other becomes an output terminal. That is, the terminals “GSPOI” and “GSPIO” output a signal input from one terminal from the other terminal. The terminals “GSPOI” and “GSPIO” are preferably arranged at both ends of the terminal portion 33. Similarly, the terminals “GCKOI” and “GCKIO” are also preferably arranged at both ends of the terminal portion 33.

  As described above, in the buffers 21A and 21B, the input terminal of the buffer 21A and the input terminal of the buffer 21B are connected to a connection portion between the terminals “CSVtypeA1R” to “CSVtypeA4R” and the terminals “CSVtypeA1L” to “CSVtypeA4L”. Are connected to the terminals “CSVtypeA1′R” to “CSVtypeA4′R”, and the output terminals of the buffer 21B are connected to the terminals “CSVtypeA1′L” to “CSVtypeA4′L”.

  FIG. 4 is a diagram illustrating a state in which the gate driver 1 is mounted on the substrate of the display device.

  In order to more clearly illustrate the characteristics of the display device according to the present invention, the liquid crystal display panel (display device) 40 shown in FIG. 4, the liquid crystal display panel 170 shown in FIG. 17 described later, and the liquid crystal shown in FIG. In each of the display panels 180, the inside of the gate driver provided in each liquid crystal display panel itself is shown in a partially transparent state (that is, a member through which a scanning line driving signal does not pass in the gate driver). .

  Note that FIG. 4, FIG. 17 to be described later, and FIG. 18 to be described later describe an example in which two scanning line driving devices according to the present invention are mounted on a display device as the display device according to the present invention. It is not limited to. That is, only one scanning line driving device according to the present invention may be mounted on the substrate of the display device, or three or more scanning line driving devices may be mounted.

  Hereinafter, the configuration and operation principle of the display device according to the present invention will be described with reference to FIG.

  As shown in FIG. 4, in the liquid crystal display panel 40, one display picture element 41 is divided into a plurality of sub picture elements 42 and 43. The sub-picture element 42 is connected to the scanning line Gn and the signal line (data line) Sm via the TFT 44. The sub picture element 43 is connected to the scanning line Gn and the signal line Sm via the TFT 45. That is, the gate electrodes of the TFTs 44 and 45 are connected to the common (same) scanning line Gn. The source electrodes of the TFTs 44 and 45 are connected to a common (same) signal line Sm.

  The sub-picture elements 42 and 43 have a liquid crystal capacity and an auxiliary capacity. In both the liquid crystal capacitor and the auxiliary capacitor, one electrode is connected to the drain electrodes of the TFTs 44 and 45. The other electrode of the liquid crystal capacitor is connected to a counter voltage. The other electrode of the auxiliary capacitance is connected to auxiliary capacitance wirings 46 and 47. Accordingly, the CS voltage can be applied from the auxiliary capacitance lines 46 and 47 to the auxiliary capacitance in the sub-picture elements 42 and 43. That is, the sub-picture elements 42 and 43 have the same connection relationship as the sub-picture elements 121 and 122 shown in FIG. Therefore, the CS voltage applied to the auxiliary capacitor in the sub-picture element 42 and the CS voltage applied to the auxiliary capacitor in the sub-picture element 43 can be different from each other.

  That is, the display picture element 41 shown in FIG. 4 has the same configuration as the display picture element 120 shown in FIG.

  In the liquid crystal display panel 40, first, a gate driver control signal (scanning start) serving as the basis of the storage capacitor driving signal and the scanning line driving signal is transferred from the controller 48 to the gate driver 1A having the same configuration as the gate driver 1 shown in FIG. Signal and drive clock signal) and various power supply voltages. At this time, the gate driver 1A is fixed to the “H” state by connecting the terminal “LBR” and the terminal “VCC” of the terminal group C1. Note that an auxiliary capacitance drive signal is input to the gate driver 1A from the terminals “CSVtypeA1R” to “CSVtypeA4R” of the terminal group C1. In addition, since the terminal “LBR” of the gate driver 1A is in the “H” state, the gate driver control signal is input from the terminals “GSPOI” and “GCKOI” of the terminal group C1 of the gate driver 1A. Various power supply voltages are input from terminals “VGL”, “VGH”, “GND”, “VCC”, “VCSL”, and “VCSH” of the terminal group C1 of the gate driver 1A.

  In FIG. 4, the terminals “LBR”, “VGL”, “VGH”, “GND”, “VCC”, “VCSL”, and “VCSH” are the gate driver 1A as indicated by the terminal groups C1 and C2. Are provided at both ends of the terminal portion 33 of the tape 31. And these terminals provided in the terminal group C1 and these terminals provided in the terminal group C2 are connected to each other having the same terminal name.

  Also, as shown in FIG. 4, when the terminals “GSPOI” and “GCKOI” are provided in the terminal group C1, the terminals “GSPIO” and “GCKIO” are provided in the terminal group C2. In this case, the terminal “GSPOI” provided in the terminal group C1 is connected to the terminal “GSPIO” provided in the terminal group C2, and the terminal “GCKOI” provided in the terminal group C1 is connected to the terminal “GCKIO” provided in the terminal group C2. Is connected.

  Similarly, as illustrated in FIG. 4, when the terminals “CSVtypeA1R” to “CSVtypeA4R” are provided in the terminal group C1, the terminals “CSVtypeA1L” to “CSVtypeA4L” are provided in the terminal group C2. The terminals “CSVtypeA1R” to “CSVtypeA4R” provided in the terminal group C1 are connected to the terminals “CSVtypeA1L” to “CSVtypeA4L” provided in the terminal group C2.

  Therefore, terminals “CSVtypeA1L” to “CSVtypeA4L” provided in the terminal group C2 of the gate driver 1A, and terminals “CSVtypeA1R” to “CSVtypeA4R” provided in the terminal group C1 of the gate driver 1B having the same configuration as the gate driver 1A, Are connected by wiring on the glass substrate 49, for example, in the liquid crystal display panel 40, the auxiliary capacitor drive signal, the gate driver control signal, and various power supply voltages input to the gate driver 1A are supplied to the gate driver 1A. To the gate driver 1B.

  Next, in the liquid crystal display panel 40, the gate driver 1 </ b> A generates a scanning line driving signal based on the above-described principle using a signal that is a basis of the scanning line driving signal input from the controller 48. Terminals “OG1” to “OG272” of the gate driver 1A are connected to the scanning line Gn of each liquid crystal display panel 40. Then, the gate driver 1A supplies a scanning line driving signal to each scanning line Gn connected to the terminals “OG1” to “OG272”.

  On the other hand, the auxiliary capacitance drive signal input from the controller 48 is subjected to waveform shaping by the buffers 21A and 21B provided in the integrated circuit 32 of the gate driver 1A, and the terminals “CSVtypeA1′R” to “CSVtypeA4′R”, It is output from “CSVtypeA1′L” to “CSVtypeA4′L”. Terminals “CSVtypeA1′R” to “CSVtypeA4′R” and “CSVtypeA1′L” to “CSVtypeA4′L” are connected to a main line (main line) 50 of an auxiliary capacitor in the liquid crystal display panel 40. Further, an auxiliary capacitance line 51 is connected to the main line 50. The auxiliary capacity drive signal with reduced waveform dullness output from the buffers 21A and 21B to the terminals “CSVtypeA1′R” to “CSVtypeA4′R” and “CSVtypeA1′L” to “CSVtypeA4′L” is the terminal “CSVtypeA1”. 'R' to "CSVtypeA4'R" and "CSVtypeA1'L" to "CSVtypeA4'L" are given to all the auxiliary capacitance lines 51 connected to the auxiliary capacitance line 51, and thereby the auxiliary capacitance connected to the auxiliary capacitance line 51 Is driven.

  According to the above configuration, the backbone line 50 is formed by the unit of the auxiliary capacity wiring 51 connected to the terminals “CSVtypeA1′R” to “CSVtypeA4′R” and “CSVtypeA1′L” to “CSVtypeA4′L” of the gate driver 1A. Can be divided. That is, the main line 50 may be divided for each auxiliary capacitance line 51 connected to one specific buffer.

  As described above, the liquid crystal display panel 40 shown in FIG. 4 includes the gate drivers 1A and 1B to which the auxiliary capacitance driving signal is input. Each of the gate drivers 1A and 1B includes buffers 21A and 21B that receive an auxiliary capacitance driving signal and shape the waveform of the auxiliary capacitance driving signal. Further, each of the buffers 21A and 21B shapes the waveform of the auxiliary capacitance drive signal input to itself, and outputs it to each auxiliary capacitance line 51, thereby reducing the waveform dullness in each auxiliary capacitance line 51. The auxiliary capacity drive signal is supplied.

  In the display device according to the present invention, it is necessary to provide the main wiring. However, unlike the display device according to the conventional technology, the main wiring does not need to be provided in an extended state on the entire liquid crystal display panel. That is, in the display device according to the present invention, unlike the display device according to the prior art, it is not necessary to drive the auxiliary capacitor connected to the auxiliary capacitor line of the entire liquid crystal display panel. For this reason, in the display device according to the present invention, the line width of the wiring constituting the main wiring can be made thinner than the line width of the wiring constituting the main wiring of the display device according to the prior art. Although it cannot be generally described because it relates to the size of the buffer, when the display device according to the prior art drives the auxiliary capacitor by four gate drivers, the liquid crystal shown in FIG. 4 is used instead of the display device. By adopting the configuration of the display panel 40, the main wiring of the display device according to the related art can be divided into eight main wirings. For this reason, in the liquid crystal display panel 40 shown in FIG. 4, the line width of the main line 50 can be set to, for example, 1/8 of the main line width of the display device according to the related art.

  Therefore, the display device according to the present invention has an effect that the frame can be narrowed.

  In the display device according to the present invention, one or a plurality of buffers having the above-described functions are provided for each scanning line driving device provided in the display device without dividing the main wiring, and the auxiliary capacitor is provided from each buffer. A drive signal may be supplied to each auxiliary capacitance line. This is because each scanning line driving device is mounted in a distributed manner in the display device, and accordingly, a plurality of buffers provided in each display device are also distributed and mounted. In this case, if the driving capacity of each buffer total is sufficiently high, it is possible to reduce the line width of the lines constituting the main line without dividing the main line.

[Embodiment 2]
An embodiment of the present invention will be described below with reference to FIGS. 5 to 8 and FIG.

  FIG. 5 shows another embodiment of the present invention, and is a block diagram showing a schematic configuration of a scanning line driving device.

  The gate driver 2 shown in FIG. 5 omits the terminals “CSVtypeA1′R” to “CSVtypeA4′R” or the terminals “CSVtypeA1′L” to “CSVtypeA4′L” in the configuration of the gate driver 1 shown in FIG. The That is, the gate driver 2 shown in FIG. 5 is provided with terminals “CSVtypeA1 ′” to “CSVtypeA4 ′” as output terminals of the auxiliary capacitance driving signal. Further, the gate driver 2 shown in FIG. 5 has a configuration in which terminals “OVCSH” and “OVCSL” are added to the configuration of the gate driver 1 shown in FIG.

  The gate driver 2 shown in FIG. 5 includes one buffer 22. Accordingly, in the present embodiment, the terminals “VCSH” and “VCSL” are power supply terminals to which a power supply (not shown) for operating the buffer 22 is connected.

  The terminals “OVCSH” and “OVCSL” are power supply terminals to which a power supply (not shown) for operating the buffer 22 is connected, like the terminals “VCSH” and “VCSL”. Here, the power supply voltage applied to the terminal “OVCSH” from the power supply is several V higher than the power supply voltage applied to the terminal “VCSH” from the power supply. The potential of the voltage from the power supply applied to the terminal “OVCSL” is several V lower than the power supply voltage from the power supply applied to the terminal “VCSL”.

  FIG. 6 is a diagram showing a circuit configuration of a buffer provided in the scanning line driving device shown in FIG.

  The buffer 220 shown in FIG. 6 is suitably used as the buffer 22 and a buffer 23 (see FIG. 9) described later. A buffer 220 illustrated in FIG. 6 includes an inverter circuit 212C instead of the inverter 212B in the configuration of the buffer 210 illustrated in FIG. In the configuration of the inverter 212B, the inverter circuit 212C further includes a switch SW1 at the source of the transistor 212BP and further includes a switch SW2 at the source of the transistor 212BN.

  Both the switches SW1 and SW2 are constituted by, for example, a single-pole changeover switch that performs a c-contact operation. The switch SW1 switches between a state in which the source of the transistor 212BP is connected to the terminal “VCSH” and a state in which the source is connected to the terminal “OVCSH” by switching on and off. The switch SW2 switches on and off to switch between a state in which the source of the transistor 212BN is connected to the terminal “VCSL” and a state in which the source is connected to the terminal “OVCSL”.

  Here, the switch SW1 is in a state in which the source of the transistor 212BP is connected to the terminal “OVCSH” for a predetermined time from the moment of rising of the storage capacitor driving signal input from the input terminal 211, and at other times. In this state, the source of the transistor 212BP is connected to the terminal “VCSH”. Similarly, the switch SW2 is in a state in which the source of the transistor 212BN is connected to the terminal “OVCSL” for a predetermined time from the moment when the auxiliary capacitance drive signal falls, and at other times, the source of the transistor 212BN Is connected to the terminal “VCSL”.

  When the switching operation of the switches SW1 and SW2 is controlled as described above in the buffer 220 shown in FIG. 6, the signal output from the buffer has the waveform shown in FIG.

  FIG. 7 is a graph showing a signal waveform after a so-called overshoot process is performed by the buffer 220. In the graph shown in FIG. 7, the vertical axis represents the level of the auxiliary capacity drive signal, and the horizontal axis represents time.

  The switch SW1 is connected to the source of the transistor 212BP and the terminal “VCSH” during a period T3 from the rising instant T1 of the auxiliary capacitance drive signal whose waveform is shown in FIG. 7 to T2 after a predetermined time has elapsed from the rising instant T1. Is connected to a terminal “OVCSH” having a potential several V higher than the potential. Further, at a time other than T3, the switch SW1 connects the source of the transistor 212BP and the terminal “VCSH”.

  The switch SW2 is connected between the source of the transistor 212BN and the terminal “T” from the falling instant T4 of the storage capacitor drive signal whose waveform is shown in FIG. 7 to T5 after a predetermined time elapses from the falling instant T4. A terminal “OVCSL” having a potential several V lower than the potential of “VCSL” is connected. Further, at a time other than T6, the switch SW2 connects the source of the transistor 212BN and the terminal “VCSL”.

  In the gate driver 2 shown in FIG. 5, the buffer 220 shown in FIG. 6 is used as the buffer 22. In the gate driver 2 shown in FIG. 5, the above-described overshoot process shown in FIG. 7 is performed on the auxiliary capacitance drive signal inputted to the buffer 22 from the terminals “CSVtypeA1R” to “CSVtypeA4R”, and the terminal “CSVtypeA1 ′” To “CSVtypeA4 ′”. As a result, the gate driver 2 shown in FIG. 5 temporarily outputs a potential higher than the voltage to be output at the rising edge of the storage capacitor drive signal by the overshoot process, and then outputs a target potential. Similarly, in the gate driver 2 shown in FIG. 5, by the overshoot process, a potential lower than the voltage to be output is output once at the time of the fall of the auxiliary capacitance drive signal, and then the target potential is output. . Thereby, the charging time of the auxiliary capacitor and the liquid crystal capacitor can be advanced, and the time required to reach the target voltage can be shortened. As a result, the gate driver 2 shown in FIG. 5 can cope with a case where the driving time of the auxiliary capacitor is shortened due to an increase in scanning lines. In other words, the gate driver 2 shown in FIG. 5 can appropriately drive the auxiliary capacitor even when the driving time of the auxiliary capacitor is shortened due to an increase in scanning lines. And display variations can be reduced.

  FIG. 8 is a diagram showing an example of the outer shape of the gate driver 2 shown in FIG.

  The gate driver 2 shown in FIG. 8 has a configuration in which an integrated circuit 62 including a buffer 22 is mounted on a tape 31. Further, the gate driver 2 shown in FIG.

  In the gate driver 2 shown in FIG. 8, the terminals “CSVtypeA1 ′” to “CSVtypeA4 ′” are arranged in the center of the terminal portion 63.

  The terminal “OVCSH” is provided between the terminal “VCSH” and the terminal “VCSL” in the terminal portion 63. One of the terminals “OVCSL” is provided between one of the terminals “VCSL” and the terminal “GSPOI” in the terminal portion 63, and the other of the terminals “OVCSL” is the other of the terminals “VCSL” in the terminal portion 63. And the terminal “GSPIO”.

  Further, as shown in FIG. 17, the gate driver 2 shown in FIG. 8 can be mounted on the liquid crystal display panel 170 as a display device as the gate drivers 2A and 2B in the same manner as in FIG. One of the terminals “OVCSH” and “OVCSL” is a terminal group C11 (a terminal group corresponding to the terminal group C1 of the gate driver 1A shown in FIG. 4) related to the liquid crystal display panel 170 shown in FIG. 17, and the other is a terminal group C12. (A terminal group corresponding to the terminal group C2 of the gate driver 1A shown in FIG. 4). The terminal “OVCSH” provided in the terminal group C11 is connected to the terminal “OVCSH” provided in the terminal group C12, and the terminal “OVCSL” provided in the terminal group C11 is connected to the terminal “OVCSL” provided in the terminal group C12. Connected to. Terminals “CSVtypeA1 ′” to “CSVtypeA4 ′” are connected to the main line 171 of the auxiliary capacitor in the liquid crystal display panel 170. Further, an auxiliary capacitance line such as the auxiliary capacitance line 172 is connected to the main line 171. The auxiliary capacitance driving signal with reduced waveform dullness output from the buffer 22 to the terminals “CSVtypeA1 ′” to “CSVtypeA4 ′” is connected to the terminals “CSVtypeA1 ′” to “CSVtypeA4 ′”. Given to all.

  The configuration of the liquid crystal display panel 170 shown in FIG. 17 also has the same effect as the liquid crystal display panel 40 shown in FIG.

  In the present embodiment, the buffer 220 shown in FIG. 6 is used as the buffer 22, but the present invention is not limited to this, and the buffer 210 shown in FIG. On the other hand, the buffer 220 shown in FIG. 6 may be used as the buffer 21A and / or the buffer 21B in the configuration according to FIG. 1 described above.

[Embodiment 3]
One embodiment of the present invention is described below with reference to FIGS. 9, 10, and 18. FIG.

  FIG. 9, showing another embodiment of the present invention, is a block diagram showing a schematic configuration of a scanning line driving device.

  The gate driver 3 shown in FIG. 9 has a configuration further including a buffer (second buffer) 23 in the configuration of the gate driver 2 shown in FIG. Accordingly, in the present embodiment, the terminals “VCSH” and “VCSL” are power terminals connected to a power source (not shown) for operating the buffer (first buffer) 22 and the buffer 23.

  9 includes terminals “CSVtypeA1I” to “CSVtypeA4I”, “CSVtypeA4I”, “CSVtypeA4I”, “CSVtypeA4I”, “CSVtypeA4I”, “CSVtypeA4I”, “CSVtypeA4I”, “CSVtypeA4I”, “CSVtypeA4I”, “CSVtypeA4I” It is done.

  Terminals “CSVtypeA1I” to “CSVtypeA4” provided in the gate driver 3 are auxiliary capacity drive signal input terminals for inputting the auxiliary capacity drive signal to the buffer 23. Terminals “CSVtypeA1O” to “CSVtypeA4O” provided in the gate driver 3 are the output terminals of the auxiliary capacity driving signal for outputting the auxiliary capacity driving signal input from the buffer 23 to the outside different from the auxiliary capacity wiring. It is.

  That is, the terminals “CSVtypeA1O” to “CSVtypeA4O” provided in the gate driver 3 are connected to the terminals “CSVtypeA1I” to “CSVtypeA4I” provided in the gate driver of the next stage (not shown) having the same configuration as the gate driver 3. As a result, the storage capacitor drive signal can be supplied to the gate driver of the next stage. For example, as the scanning line driving device according to the present invention, two gate drivers 3 shown in FIG. 8 (that is, gate drivers 3A and 3B shown in FIG. 18 described later) are mounted in the same manner as shown in FIG. In this case, the terminals “CSVtypeA1O” to “CSVtypeA4O” provided in the gate driver 3A are connected to the terminals “CSVtypeA1I” to “CSVtypeA4I” provided in the gate driver 3B (see FIG. 18).

  The buffer 23 has one end (input terminal) connected to the terminals “CSVtypeA1I” to “CSVtypeA4I” of the gate driver 3 and the other end (output terminal) connected to the terminals “CSVtypeA1O” to “CSVtypeA4O” of the gate driver 3. The The buffer 23 is closer to the terminals “CSVtypeA1O” to “CSVtypeA4O” than the part to which the buffer 22 is connected between the terminals “CSVtypeA1I” to “CSVtypeA4I” and the terminals “CSVtypeA1O” to “CSVtypeA4O”. Is provided.

  In the gate driver 3 shown in FIG. 9, the auxiliary capacitance driving signals input from the terminals “CSVtypeA1I” to “CSVtypeA4I” are output from the terminals “CSVtypeA1 ′” to “CSVtypeA4 ′” to the auxiliary capacitance wiring via the buffer 22. To do.

  On the other hand, in the gate driver 3 shown in FIG. 9, the auxiliary capacitance driving signals input from the terminals “CSVtypeA1I” to “CSVtypeA4I” are transferred from the terminals “CSVtypeA1O” to “CSVtypeA4O” via the buffer 23 to the auxiliary capacitance wiring. Output to another external device (for example, the gate driver at the next stage).

  Thereby, in a display device including a plurality of scanning line driving devices, fluctuations in the waveform of the auxiliary capacitance driving signal among the plurality of scanning line driving devices due to the dullness and delay of the auxiliary capacitance driving signal are suppressed. can do.

  Therefore, the gate driver 3 shown in FIG. 9 is very effective when a large number of scanning line driving devices are mounted on the display device.

  Naturally, the buffer used as the buffer 23 may be the buffer 210 shown in FIG. 2, but the buffer 220 shown in FIG. 6 is more preferable.

  FIG. 10 is a diagram showing the outer shape of the gate driver 3 shown in FIG.

  The gate driver 3 shown in FIG. 10 has a configuration in which an integrated circuit 72 including buffers 22 and 23 is mounted on a tape 31. Further, the gate driver 3 shown in FIG. 10 has a terminal portion 73. In the gate driver 3 shown in FIG. 10, the terminals “CSVtypeA1I” to “CSVtypeA4I” are provided at one end of the terminal portion 73, and the terminals “CSVtypeA1O” to “CSVtypeA4O” are provided at the other end of the terminal portion 73.

  Further, as shown in FIG. 18, the gate driver 3 shown in FIG. 9 can be mounted on the liquid crystal display panel 180 as a display device as the gate drivers 3A and 3B in the same manner as in FIG.

  The liquid crystal display panel 180 shown in FIG. 18 includes gate drivers 3A and 3B to which auxiliary capacity drive signals are input. Each of the gate drivers 3A and 3B includes buffers 22 and 23 to which auxiliary capacity driving signals input to the gate drivers 3A and 3B are input. The buffer 22 shapes the waveform of the auxiliary capacitance driving signal input to itself, and outputs it from the terminals “CSVtypeA1 ′” to “CSVtypeA4 ′” to the auxiliary capacitance wiring such as the auxiliary capacitance wiring 182 connected to the main line 181. As a result, the auxiliary capacitance driving signal is supplied to the auxiliary capacitance wiring 182. On the other hand, the buffer 23 shapes the waveform of the auxiliary capacitance driving signal input to the buffer 23 and outputs it from the terminals “CSVtypeA1O” to “CSVtypeA4O” to the outside different from the auxiliary capacitance wiring 182. As an example, the buffer 23 of the gate driver 3A receives the auxiliary capacitance drive signal input thereto from the terminals “CSVtypeA1O” to “CSVtypeA4O” of the gate driver 3A, and the terminals “CSVtypeA1I” to “CSVtypeA4I” of the gate driver 3B. Is output.

  Note that in the display device according to the present invention, an auxiliary capacitance drive signal is generated inside the scanning line driving device, and the waveform of the auxiliary capacitance driving signal is shaped by a buffer provided in the scanning line driving device, so that each auxiliary capacitance is shaped. It may be configured to supply the wiring. Similarly, in the scanning line driving device according to the present invention, an auxiliary capacitance driving signal is generated inside itself, and the waveform of the auxiliary capacitance driving signal is shaped by a buffer provided in the scanning line driving device. It may be configured to supply the wiring.

  The present invention is not limited to the above-described embodiments, and various modifications are possible within the scope shown in the claims, and the embodiments can be obtained by appropriately combining technical means disclosed in different embodiments. The form is also included in the technical scope of the present invention.

  The present invention can be suitably used for display devices used in, for example, word processors, personal computers, television broadcast receivers, and the like. Further, the present invention can be suitably used for a display device such as an active matrix liquid crystal display device and a scanning line driving device for driving a scanning line provided in the display device.

1 is a block diagram illustrating a schematic configuration of a scanning line driving device according to an embodiment of the present invention. It is a figure which shows the circuit structure of the buffer provided in the said scanning line drive device. It is a figure which shows the external shape of the scanning-line drive device which concerns on one Embodiment of the said invention. It is a figure which shows the display apparatus which concerns on this invention, and is a figure which shows the state which mounted the said scanning line drive device on the board | substrate of the display apparatus. FIG. 5 is a block diagram illustrating a schematic configuration of a scanning line driving device according to another embodiment of the present invention. It is a figure which shows the circuit structure of the buffer provided in the said scanning line drive device. It is a graph which shows the waveform of an auxiliary capacity drive signal after overshoot processing was performed by the above-mentioned buffer. It is a figure which shows the external shape of the scanning-line drive device which concerns on another embodiment of the said invention. FIG. 5 is a block diagram illustrating a schematic configuration of a scanning line driving device according to another embodiment of the present invention. It is a figure which shows the external shape of the scanning-line drive device which concerns on another embodiment of the said invention. It is a graph which shows the (gamma) characteristic of the liquid crystal display panel of a liquid crystal display device. It is a figure which shows the structural example of the display picture element of the liquid crystal display device driven by multi picture element drive. FIG. 4 is a diagram illustrating an example of waveforms of a source voltage and a storage capacitor counter voltage applied to each sub-picture element in the liquid crystal display device. FIGS. 14A and 14B are graphs showing an example in which the waveform of the auxiliary capacitor counter voltage is inverted every two frames. It is a figure which shows typically the equivalent circuit of the said liquid crystal display device. It is a figure which shows the wiring of the auxiliary capacity drive signal in the glass substrate of a liquid crystal display panel. It is a figure which shows another display apparatus which concerns on this invention, and is a figure which shows the state which mounted the scanning line drive device shown in FIG. 5 on the board | substrate of the display apparatus. It is a figure which shows another display apparatus which concerns on this invention, and is a figure which shows the state which mounted the scanning line drive device shown in FIG. 9 on the board | substrate of a display apparatus.

Explanation of symbols

1-3, 1A, 1B, 2A, 2B, 3A, 3B
Gate driver (scan line driver)
21A, 21B, 22, 23, 210, 220
Buffers 40, 170, 180
Liquid crystal display panel (display device)

Claims (7)

A scanning line driving device and a plurality of sub-picture elements obtained by dividing one display picture element,
Each of the plurality of sub-picture elements has an auxiliary capacity connected to a different auxiliary capacity wiring,
A display device capable of displaying the plurality of sub-picture elements with different luminances by driving the auxiliary capacitance based on an auxiliary capacitance drive signal supplied to each auxiliary capacitance line,
The scanning line driving device includes a plurality of stages and a plurality of stages.
Each of the plurality of scanning line driving devices receives a storage capacitor drive signal to be supplied to each storage capacitor line, shapes the waveform of the input storage capacitor drive signal, and supplies it to each storage capacitor line a buffer to,
Wiring provided in each scanning line driving device provided before the last scanning line driving device, for outputting the inputted auxiliary capacitance driving signal to the outside different from the auxiliary capacitance wiring. Are connected to the scanning line driving device provided in the next stage in order to supply the auxiliary capacity driving signal to the buffer of the scanning line driving device provided in the next stage of the scanning line driving device. Has been
A main line connected to an output terminal of an auxiliary capacitance drive signal whose waveform is shaped by the buffer provided in each of the plurality of scanning line driving devices, and the auxiliary capacitance line is connected The display device is characterized in that the main wiring is divided and provided for each of the one connected to the output terminal provided in one scanning line driving device. The display device according to claim 1, wherein at least one of the plurality of scanning line driving devices includes a plurality of the buffers . The backbone wiring is further divided for each one connected to the output terminal of the auxiliary capacitance driving signal whose waveform is shaped by one buffer provided in the scanning line driving device having a plurality of buffers. it is provided Te display device according to claim 2, wherein. Of the above buffer, at least one is a storage capacitor driving signals inputted thereto, the overshoot drive to any one of claims 1 to 3, characterized that you supplied to the respective storage capacitor wires The display device described. A scanning line driving device and a plurality of sub-picture elements obtained by dividing one display picture element,
Each of the plurality of sub-picture elements has an auxiliary capacity connected to a different auxiliary capacity wiring,
A display device capable of displaying the plurality of sub-picture elements with different luminances by driving the auxiliary capacitance based on an auxiliary capacitance drive signal supplied to each auxiliary capacitance line,
The scanning line driving device includes a plurality of stages and a plurality of stages.
Each of the plurality of scanning line driving devices receives at least an auxiliary capacitance driving signal to be supplied to each auxiliary capacitance wiring, shapes the waveform of the inputted auxiliary capacitance driving signal, and sets each auxiliary capacitance wiring. The auxiliary buffer driving signal to be supplied to the first buffer to be supplied to each auxiliary capacitance wiring is input, and the waveform of the input auxiliary capacitance driving signal is shaped to be external to the auxiliary capacitance wiring. A second buffer for outputting to
The output terminals of the auxiliary capacitance drive signals with shaped waveforms provided in the second buffers of the respective scan line drive devices provided before the last scan line drive device are respectively connected to the respective scan line drive devices. Connected to the input terminal of the auxiliary capacitance driving signal provided in the first buffer of the scanning line driving device provided in the next stage of
A main line connected to an output terminal of an auxiliary capacitance drive signal having a waveform shaped by the first buffer provided in each of the plurality of scanning line driving devices, and the auxiliary capacitance line The display device is characterized in that the main wiring to which is connected is divided for each one connected to the output terminal provided in one scanning line driving device. Among the first buffer, at least one A display device according to storage capacitor driving signals inputted thereto, to claim 5, characterized that you supplied to the respective storage capacitor wires by overshoot drive . The aforementioned scanning line driving device at the first stage, an auxiliary capacitor driving signals to be supplied to the respective storage capacitor wires is, according to any one of claims 1 to 6, wherein that you have been input from the controller Display device.

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