JP4476845B2 - Variable gain amplifier - Google Patents

Description

The present invention relates to a variable gain amplifier that improves reflection characteristics at an input terminal and an output terminal during gain control.

  Conventionally, as a variable gain amplifier, for example, a configuration for controlling a mutual conductance as shown in FIG. 10 or a configuration for controlling a negative feedback amount shown in FIG. 11 is known (“Non-patent Document 1” below). In the circuit configuration of FIG. 10, 31 is an input terminal, 32 is an output terminal, 33 is a field effect transistor (FET), 34 is an input matching circuit, 35 is an output matching circuit, 36 is a gate control terminal, and 37 is a drain control terminal. is there. 9, 41 is an input terminal, 42 is an output terminal, 43 is a field effect transistor, 44 is an input matching circuit, 45 is an output matching circuit, 46 is a variable resistance element, 47 is a capacitive element, and 48 is a gate control terminal. 49 are drain control terminals.

  In the configuration for controlling the transconductance shown in FIG. 10, the characteristic that the mutual conductance of the transistor depends on the bias point on the static characteristics is used, and in the case of a field effect transistor, the gate-source voltage of the transistor is brought close to the pinch-off voltage. Thus, the mutual conductance is suppressed, the gain of the amplifier is lowered, and the gain is variable.

  Further, in the configuration for controlling the negative feedback amount shown in FIG. 11, a feedback circuit in which the input stage and the output stage are composed of variable resistance elements by utilizing the fact that the phase difference between the input signal and the output signal of the amplifier is reversed. Are connected, and the resistance value of the variable resistance element is changed, and the rate at which the output signal and the input signal cancel each other out of phase is changed, thereby reducing the gain of the amplifier and realizing variable gain.

"Monolithic Microwave Integrated Circuit (MMIC)" by Masayoshi Aikawa, Takashi Ohira, Tsuneo Tokumitsu, Tetsuo Hirota and Masahiro Muraguchi pp. 170-171, IEICE, January 1997

By the way, in the configuration for controlling the mutual conductance (g _m ) shown in FIG. 10, the input / output impedance of the variable gain amplifier is proportional to A / (B + g _m ) (A and B are coefficients depending on the parasitic elements). Is reduced, the mutual conductance (g _m ) decreases, and the input / output impedance of the variable gain amplifier increases. As a result, when gain control is performed, input / output impedances change, matching conditions fluctuate, and reflection characteristics deteriorate.

  In the configuration for controlling the amount of negative feedback shown in FIG. 11, when the gain is lowered, the impedance of the variable resistance element becomes low and the impedance of the input / output of the variable gain amplifier is low because it is connected in parallel with the active element. . As a result, when gain control is performed, as in the case of FIG. 8, the input / output impedance changes, the matching conditions fluctuate, and the reflection characteristics deteriorate.

In order to solve the above problems, according to a first aspect of the present invention, in a variable gain amplifier having a main amplifier and a variable resistance element, the input terminal of the main amplifier is connected to the input terminal of the variable gain amplifier and the variable resistance. A variable gain amplifier connected to one end of an element, and an output terminal of the main amplifier connected to an output terminal of the variable gain amplifier and the other end of the variable resistance element, and an input impedance of the variable gain amplifier; A table storing combinations of the control voltage value of the main amplifier and the control voltage value of the variable resistance element so that the output impedance is a constant value during gain control, respectively. The combination of the value of the control voltage of the main amplifier and the value of the control voltage of the variable resistance element is read, and these values are set as the value of the control voltage of the main amplifier. It defines the variable gain amplifier and sets the value of the control voltage of the serial variable resistance element.

The variable gain amplifier according to claim 1, wherein the main amplifier includes a field effect transistor, and the variable gain amplifier further includes an input matching circuit and an output matching circuit. One end of the input matching circuit and one end of the variable resistance element are connected to the gate terminal of the amplifier, the source terminal of the field effect transistor is grounded, and one end of the output matching circuit and the variable terminal are connected to the drain terminal of the field effect transistor. The other end of the resistor element is connected, the other end of the input matching circuit is connected to the input terminal of the variable gain amplifier, the other end of the output matching circuit is connected to the output terminal of the variable gain amplifier, and the input matching The bias terminal of the circuit is connected to the gate control terminal of the variable gain amplifier, and the bias terminal of the output matching circuit is connected to the drain control terminal of the variable gain amplifier. Continued and connects the bias terminal of the variable resistor element to the variable resistive element control terminal of the variable gain amplifier, the input impedance of said variable gain amplifier with the output impedance, at the time of the gain control, so that each becomes a constant value A table storing a combination of a value of the gate control voltage applied to the gate control terminal and a value of the variable resistance element control voltage applied to the variable resistance element control terminal , and from the table, the value of the gate control voltage A variable gain amplifier is characterized in that the combination of the value of the variable resistance element control voltage and the value of the variable resistance element control voltage is read and the value is set as the value of the gate control voltage and the value of the variable resistance element control voltage. Yes.

The variable gain amplifier according to claim 1, wherein the main amplifier includes a first field effect transistor and a second field effect transistor, and the variable gain amplifier includes an input matching circuit, An output matching circuit; connecting a gate terminal of the first field effect transistor to one end of the input matching circuit and one end of the variable resistance element; grounding a source terminal of the first field effect transistor; The drain terminal of the first field effect transistor is connected to the source terminal of the second field effect transistor, and the gate terminal of the second field effect transistor is connected to the second gate control terminal of the variable gain amplifier. , Connecting the drain terminal of the second field effect transistor to one end of the output matching circuit and the other end of the variable resistance element, One end is connected to the input terminal of the variable gain amplifier, the other end of the output matching circuit is connected to the output terminal of the variable gain amplifier, and the bias terminal of the input matching circuit is the first gate control of the variable gain amplifier. A bias terminal of the output matching circuit is connected to a drain control terminal of the variable gain amplifier, a bias terminal of the variable resistance element is connected to a variable resistance element control terminal of the variable gain amplifier, and the variable gain is connected. applied and an input and output impedances of the amplifier, at the time of the gain control, so that each becomes a constant value, the first value and the variable resistance element control terminal of the gate control voltage applied to said first gate control terminal has a table storing a combination of values of the variable resistive element control voltage, the value of the first gate control voltage from the table Reads the combination of the value of the variable resistive element control voltage, defines the variable gain amplifier and sets these values as values of said variable resistive element control voltage of the first gate control voltage ing.

The variable gain amplifier according to claim 1, wherein the main amplifier includes a first field effect transistor and a second field effect transistor, and the variable gain amplifier includes an input matching circuit, An output matching circuit, connecting a gate terminal of the first field effect transistor to one end of the input matching circuit and one end of a variable resistance element, and grounding a source terminal of the first field effect transistor, The drain terminal of the first field effect transistor is connected to the source terminal of the second field effect transistor, and the gate terminal of the second field effect transistor is connected to the second gate control terminal of the variable gain amplifier. A drain terminal of the second field effect transistor is connected to one end of the output matching circuit and the other end of the variable resistance element; Is connected to the input terminal of the variable gain amplifier, the other end of the output matching circuit is connected to the output terminal of the variable gain amplifier, and the bias terminal of the input matching circuit is connected to the first gate control terminal of the variable gain amplifier. A bias terminal of the output matching circuit is connected to a drain control terminal of the variable gain amplifier, a bias terminal of the variable resistance element is connected to a variable resistance element control terminal of the variable gain amplifier, and the variable gain amplifier input impedance and the output impedance, at the time of the gain control, so that each becomes a constant value, and applies the value of the second gate control voltage applied to said second gate control terminal and to said variable resistive element control terminal has a table storing a combination of values of the variable resistive element control voltage, the friendly and value of the second gate control voltage from the table Reads the combination of the value of the resistance element control voltage, defines the variable gain amplifier and sets these values as values of said variable resistive element control voltage of the second gate control voltage Yes.

The variable gain amplifier according to claim 2, wherein the field effect transistor of the main amplifier is replaced with a bipolar transistor, the gate terminal is a base terminal, the drain terminal is a collector terminal, the source terminal to the emitter terminal, the gate control terminal to the base control terminal, said replacing respectively the drain control terminal to the collector control terminal, the input impedance of said variable gain amplifier with the output impedance, at the time of gain control, constant values, respectively and so that has a table storing a combination of values of the variable resistive element control voltage applied value of the base control voltage applied to the base control terminal and to said variable resistive element control terminal, said base from said table The combination of the control voltage value and the variable resistance element control voltage value Out look defines the variable gain amplifier and sets these values as values of said variable resistive element control voltage of the base control voltage.

The variable gain amplifier according to claim 3, wherein the first and second field effect transistors of the main amplifier are replaced with first and second bipolar transistors, respectively. a second field effect transistor each of the respective gate terminals to a base terminal, said collector terminal each drain terminal, replacing each of the respective source terminals to the emitter terminal, and the first and second gate control terminal the first and second base control terminals respectively, replacing respectively the first and second drain control terminal to the first and second collector control terminals respectively, and the input and output impedances of the variable gain amplifier, during the gain control, so that each becomes a constant value, applied to the first base control terminal Having a first base control voltage value as the variable resistive element table combination storing values of the variable resistive element control voltage applied to the control terminal of that, the value of the first base control voltage from the table A variable gain amplifier is characterized in that a combination with a value of a variable resistance element control voltage is read and these values are set as a value of the first base control voltage and a value of the variable resistance element control voltage. ing.

The variable gain amplifier circuit according to claim 4, wherein the first and second field effect transistors of the main amplifier are replaced with first and second bipolar transistors, respectively. The first and second gate control terminals are replaced with the gate terminals of the first and second field effect transistors as base terminals, the drain terminals as collector terminals, and the source terminals as emitter terminals, respectively. Are respectively replaced by first and second base control terminals, and the first and second drain control terminals are respectively replaced by first and second collector control terminals, and the input impedance and output impedance of the variable gain amplifier are sign at the time gain control, so that each becomes a constant value, the second base control terminal A second base control voltage value as the table storing a combination of values of the variable resistive element control voltage applied to the variable resistive element control terminal of which, the value of the second base control voltage from the table A variable gain amplifier is characterized in that a combination with the value of the variable resistance element control voltage is read and these values are set as the value of the second base control voltage and the value of the variable resistance element control voltage. is doing.
In this way, in the conventional variable gain amplifier, the fluctuations of the input impedance and the output impedance that occur when changing the gain can be suppressed to a low level, and the reflection characteristics of the input and output can be improved. Yes.

  According to the present invention, it is possible to realize a variable gain amplifier with little deterioration in reflection characteristics at the input terminal and the output terminal even during gain control, and when used in a transmitter or receiver that requires gain control in the high frequency band. The dynamic range can be expanded.

(Embodiment 1)
FIG. 1 is a block diagram showing a basic configuration of a variable gain amplifier according to Embodiment 1 of the present invention. In the figure, 1 is an input terminal, 2 is an output terminal, 3 is a main amplifier, 4 is a variable resistance element, 5 is a main amplifier control terminal for controlling the gain of the main amplifier, and 6 is a variable for controlling the resistance value of the variable resistance element. This is a resistance element control terminal. The input terminal 1 of the variable gain amplifier and one end of the variable resistance element 4 are connected to the input terminal of the main amplifier 3, and the output terminal 2 and the variable resistance element of the variable gain amplifier are also connected to the output terminal of the main amplifier 3. 4, the main amplifier control terminal 5 is connected to the control terminal of the main amplifier 3, and the variable resistance element control terminal 6 is connected to the control terminal of the variable resistance element 4.

Here, the operation when a high-frequency signal is input will be described with reference to FIG. FIG. 2 is an equivalent circuit diagram in which the field effect transistor (hereinafter referred to as FET) constituting the variable gain amplifier according to the first embodiment of the present invention is simplified and the input / output matching circuit and the bias circuit are omitted. In the figure, 51 is an input terminal, 52 is an output terminal, 53 is a gate-source capacitance, 54 is a current source having a value obtained by multiplying a voltage applied to the gate-source capacitance by mutual conductance, and 55 is a drain-source. A resistor 56 is a variable resistance element. Here, the input impedance Z _in and the output impedance Z _out of the equivalent circuit of FIG. 2 are as follows using the gate-source capacitance C _gs , the mutual conductance g _m , the drain-source resistance R _ds , and the variable resistance element R _FB. It can be expressed as

可変利得増幅器を構成するＦＥＴでは
ＲＦＢ＞＞１／ｊωＣ_ｇｓ、 Ｒ_ＦＢ＞＞Ｒ_ｄｓ、 Ｒ_ＦＢ＞＞ｇ_ｍ
であるので、（数１）式中の（Ｒ_ｄｓｇ_ｍ＋１）／（Ｒ_ｄｓ＋Ｒ_ＦＢ）および（数２）式中の｛（ｇ_ｍ／ｊωＣ_ｇｓ）＋１｝／｛（１／ｊωＣ_ｇｓ）＋Ｒ_ＦＢ｝の変動はＲ_ＦＢの変動に依存する。
よって、

In the FET constituting the variable gain amplifier, RFB >> 1 / jωC _gs , R _FB >> R _ds , R _FB >> g _m
Therefore, (R _ds g _m +1) / (R _ds + R _FB ) in equation (1) and {(g _m / jωC _gs ) +1} / {(1 / jωC _{gs in} equation (2) ) + R _FB } varies depending on the variation of R _FB .
Therefore,

と置くと、（数１）式と（数２）式は

Then, (Equation 1) and (Equation 2) are

と置ける。ゲート電圧を制御することにより相互コンダクタンスｇ_ｍを制御することにより主増幅器の利得を下げると、ＦＥＴの特性からｊωＣ_ｇｓと１／Ｒ_ｄｓとは小さくなる。一方、帰還回路を制御し可変抵抗素子の抵抗値Ｒ_ＦＢを下げると（数３）式および（数４）式で与えられるｆ(Ｒ_ＦＢ)とｇ(Ｒ_ＦＢ)とは大きくなる。従って、可変利得増幅器の利得制御に際して、入力インピーダンスＺ_ｉｎ、出力インピーダンスＺ_ｏｕｔが共に実質的に一定値と看做し得る範囲にあるように、すなわち

I can put it. Reducing the gain of the main amplifier by controlling the transconductance _{g m} by controlling the gate voltage decreases and j [omega] C _gs and 1 _{/ R ds} from the characteristics of the FET. On the other hand, when the feedback circuit is controlled and the resistance value R _FB of the variable resistance element is lowered, f (R _FB ) and g (R _FB ) given by the equations (3) and (4) increase. Therefore, in the gain control of the variable gain amplifier, the input impedance Z _in and the output impedance Z _out are both in a range that can be regarded as a substantially constant value, that is,

となるよう、可変抵抗素子制御端子６に印加する可変抵抗素子の抵抗値制御電圧および主増幅器制御端子５に印加する主増幅器の利得制御電圧を同時に制御することにより、可変利得時の入力インピーダンスＺ_ｉｎおよび出力インピーダンスＺ_ｏｕｔの変動を抑えることが出来、入力および出力の反射特性を改善することが出来る。

By simultaneously controlling the resistance value control voltage of the variable resistance element applied to the variable resistance element control terminal 6 and the gain control voltage of the main amplifier applied to the main amplifier control terminal 5 such that the input impedance Z at the time of variable gain is it is possible to suppress the fluctuation of the _in and output impedance Z _out, it is possible to improve the reflection characteristics of the input and output.

FIG. 3 shows another basic circuit configuration of the variable gain amplifier according to the present invention. In FIG. 3, 101 is an FET constituting the main amplifier, 102 is a variable resistance element, 103 is a variable resistance element control terminal, which is connected to a bias terminal for resistance value control of the variable resistance element 102, and 104 is an input matching circuit. , 105 are gate control terminals connected to the bias terminal of the input matching circuit, 106 is an output matching circuit, and 107 is a drain control terminal connected to the bias terminal of the output matching circuit. That is, the mutual conductance (g _m ) of the FET 101 constituting the main amplifier is adjusted by the voltage applied to the gate control terminal 105, and the negative feedback amount from the output side controls the resistance value of the variable resistance element 102. Adjustment is made according to the voltage applied to the terminal 103. As described above, the gain of the main amplifier 101 is changed by simultaneously controlling both the voltage applied to the gate control terminal 105 and the voltage applied to the variable resistance element control terminal 103.

  FIG. 4 is a circuit diagram showing a specific example of a variable gain amplifier according to the present invention. In the figure, 11 is an input terminal, 12 is an output terminal, 13, 14 and 15 are FETs, 16, 17, 18, 19 and 20 are capacitive elements, 21, 22, 23 and 24 are inductor elements, and 25 is a first element. A gate control terminal 26 is a second gate control terminal and is connected to the gate terminal of the first FET 13 via the inductor 21 and the inductor 22. That is, the bias terminal to which the voltage for gate control is applied is on the first gate control terminal side of the inductor 21. 27 is a drain control terminal, and 28 is a variable resistance element control terminal. In FIG. 4, the main amplifier 3 is configured by cascode-connecting FETs 13 and 14, and the gain of the main amplifier 3 is controlled by the voltage applied to the first and second gate control terminals. The voltage variable resistance element is also configured to change the conductance by controlling the voltage applied to the variable resistance element control terminal of the gate voltage of the FET 15.

  FIG. 5 shows an example in which GaAs MESFETs having a gate length of 0.3 μm and a gate width of 100 μm are used as the FETs 13, 14, and 15 in FIG. Here, the capacitance of the capacitive element 16 is 5 pF, the capacitance of the capacitive element 17 is 0.3 pF, the capacitance of the capacitive element 18 is 0.5 pF, the capacitance of the capacitive element 19 is 1.28 pF, the capacitance of the capacitive element 20 is 3 pF, and the inductor The inductance of the element 21 is 5 nH, the inductance of the inductor element 22 is 5.7 nH, the inductance of the inductor element 23 is 3.1 nH, and the inductance of the inductor element 24 is 3.2 nH.

FIG. 5 shows the variable resistance element control voltage (V _C ) of the variable resistance element (FET 15) and the first gate control voltage (V _g1 ) of the FET forming the main amplifier by the gain control method of the present invention. It is a simulation result of S parameter at the time of controlling. 5A shows the input reflection characteristic S ₁₁ , FIG. 5B shows the _transmission characteristic S ₂₁ , and FIG. 5C shows the output reflection characteristic S ₂₂ . As the variable voltage generator, for example, a combination of the variable resistance element control voltage (V _C ) shown in FIG. 5 and the first gate control voltage (V _g1 ) of the FET forming the main amplifier. Are configured in advance as a table on the memory, and the variation of the reflection characteristics of the input and output is suppressed by reading these voltage sets corresponding to the gain adjustment.
At this time, when the control gain becomes −3.7 dB, which is 0 dB or less, the input reflection characteristic S _ll is −12.5 dB, and the output reflection characteristic S ₂₂ is −23.9 dB. I understand.

6 has the same circuit configuration as that of FIG. 4 and uses the same parameters as those of FIG. 5, and the second gate control voltage of the variable resistance element and the main amplifier, that is, the gate control voltage of the FET 14 is the same as that of FIG. It is the simulation result of S parameter at the time of controlling by the gain control method of. _6A shows the input reflection characteristic S _ll , FIG. 6B shows the _transmission characteristic S ₂₁ , and FIG. 6C shows the output reflection characteristic S ₂₂ .
At this time, when the control gain becomes −5.2 dB which is 0 dB or less, the input reflection characteristic S _ll is −23.1 dB, and the output reflection characteristic S ₂₂ is −19.0 dB.

  7 and 8 are S parameters for comparing the difference in effect between the case of FIG. 5 and FIG. 6 described above, that is, the case where both the gain of the main amplifier and the resistance value of the variable resistance element are controlled simultaneously. This is a simulation result.

FIG. 7 is a simulation result of the S parameter when the gain control is performed using only the variable resistance element with the same circuit configuration as FIG. 4 and the same parameters as FIG. 7A shows the input reflection characteristic S _ll , FIG. 7B shows the _transmission characteristic S ₂₁ , and FIG. 7C shows the output reflection characteristic S _22. Negative feedback is achieved by changing the resistance value of the variable resistance element. It corresponds to a conventional gain control method for controlling the amount.

At this time, when the control gain becomes −3.3 dB, which is 0 dB or less, the input reflection characteristic S ₁₁ is −5.9 dB, the output reflection characteristic S ₂₂ is −6.1 dB, and −10 dB or less. 5 and FIG. 6, it can be seen that the suppression ratio of the input reflected wave and the output reflected wave is lower. Further, the input reflection characteristic S ₁₁ is reflected wave characteristics with changes in gain has changed significantly, it can be seen that shifting the frequency which gives the minimum reflected waves with changes in the gain is also the output reflection characteristic S ₂₂ .

8 has the same circuit configuration as FIG. 4 and uses the same parameters as FIG. 5, and uses only the control voltage of the first gate in the main amplifier (voltage applied to the control terminal 25 in FIG. 4) to control the gain. It is a simulation result of S parameter at the time of performing. 8A shows the input reflection characteristic S _ll , FIG. 8B shows the transmission characteristic S ₂₁ , and FIG. 8C shows the output reflection characteristic S ₂₂ , and the first gate voltage approaches the pinch-off voltage of the FET 13. It corresponds to the conventional configuration for controlling the transconductance g _m by.

At this time, when the control gain is 0.5 dB, the input reflection characteristic S ₁₁ is −6.0 dB, the output reflection characteristic S ₂₂ is −7.9 dB, and −10 dB or less, which is compared with the variable gain amplifier of the present invention. It can be seen that the characteristics are inferior. Further, it can be seen that the input reflection characteristic S11 and the output reflection characteristic S22 also change significantly with the change of the control gain S21.

9 has the same circuit configuration as FIG. 4 and uses the same parameters as FIG. 5, and uses only the control voltage of the second gate in the main amplifier (the voltage at the gate control voltage terminal 26 in FIG. 4) to control the gain. It is a simulation result of S parameter at the time of performing. 9A shows the input reflection characteristic S _ll , FIG. 9B shows the _transmission characteristic S ₂₁ , and FIG. 9C shows the output reflection characteristic S ₂₂ , and the first gate voltage is controlled by controlling the second gate voltage. This corresponds to a conventional configuration in which the drain voltage of the field effect transistor is changed to control the mutual conductance.

At this time, when the control gain becomes −0.8 dB below 0 dB, the input reflection characteristic S ₁₁ becomes −7.2 dB, and the output reflection characteristic S ₂₂ becomes −11.3 dB and −12 dB or less. It can be seen that the characteristics are inferior to those of the variable gain amplifier according to the present invention shown in FIG.
As described above, with the configuration of the variable gain amplifier according to the present invention, both the input reflection characteristic and the output reflection characteristic can be improved.
(Embodiment 2)

  In the present embodiment, a circuit using a cascode-connected FET as a main amplifier has been described as an example. However, it goes without saying that the same effect can be obtained even if the cascode-connected FET is replaced with a circuit configuration in which the source is grounded.

In each of the embodiments described above, a circuit using a field effect transistor as an example has been described. However, the field effect transistor is replaced with a bipolar transistor, the gate terminal is used as a base terminal, the source terminal is used as an emitter terminal, It goes without saying that the same effect can be obtained even if the drain terminal is configured to correspond to the collector terminal.
Moreover, all the embodiments described above are illustrative of the embodiments of the present invention and are not intended to be limiting, and the present invention can be implemented in various other modifications and changes. it can. Therefore, the scope of the present invention is defined only by the claims and their equivalents.

1 is a block diagram showing a basic configuration of a variable gain amplifier according to a first embodiment. FIG. 4 is a block diagram showing another configuration example of the variable gain amplifier according to the first embodiment. FIG. 3 is a simplified equivalent circuit diagram of a field effect transistor used in the variable gain amplifier according to the first embodiment. FIG. 3 is a circuit diagram showing a configuration example of a variable gain amplifier according to the first embodiment. FIG. 5 is an S parameter characteristic diagram by simulation of a variable gain amplifier when gain control is performed by simultaneously changing a first gate control voltage and a variable resistance element control voltage in the circuit of FIG. FIG. 5 is an S parameter characteristic diagram by simulation of a variable gain amplifier when gain control is performed by simultaneously changing a second gate control voltage and a variable resistance element control voltage in the circuit of FIG. FIG. 5 is an S parameter characteristic diagram by simulation of the variable gain amplifier when gain control is performed by changing only the variable resistance element control voltage in the circuit of FIG. FIG. 5 is an S parameter characteristic diagram by simulation of a variable gain amplifier when gain control is performed by changing only the first gate control voltage in the circuit of FIG. FIG. 6 is an S parameter characteristic diagram by simulation of a variable gain amplifier when gain control is performed by changing only the second gate control voltage in the circuit of FIG. 4. The circuit diagram of the variable gain amplifier of the structure which controls the conventional mutual conductance. The circuit diagram of the variable gain amplifier of the structure which controls the amount of conventional negative feedback.

Claims (7)

In a variable gain amplifier having a main amplifier and a variable resistance element,
Connecting the input terminal of the main amplifier to the input terminal of the variable gain amplifier and one end of the variable resistance element;
The variable gain amplifier in which an output terminal of the main amplifier is connected to an output terminal of the variable gain amplifier and the other end of the variable resistance element,
The combination of the value of the control voltage of the main amplifier and the value of the control voltage of the variable resistance element was stored so that the input impedance and the output impedance of the variable gain amplifier were respectively constant values during gain control . A table, a combination of the control voltage value of the main amplifier and the control voltage value of the variable resistance element is read from the table, and these values are used as the control voltage value of the main amplifier and the variable resistance element. A variable gain amplifier, characterized in that it is set as the value of the control voltage . The variable gain amplifier according to claim 1, wherein
The main amplifier includes a field effect transistor, and the variable gain amplifier includes an input matching circuit and an output matching circuit,
One end of the input matching circuit and one end of the variable resistance element are connected to the gate terminal of the main amplifier,
Grounding the source terminal of the field effect transistor;
One end of the output matching circuit and the other end of the variable resistance element are connected to the drain terminal of the field effect transistor,
Connecting the other end of the input matching circuit to the input terminal of the variable gain amplifier;
Connecting the other end of the output matching circuit to the output terminal of the variable gain amplifier;
Connecting the bias terminal of the input matching circuit to the gate control terminal of the variable gain amplifier;
Connecting the bias terminal of the output matching circuit to the drain control terminal of the variable gain amplifier;
Connecting the bias terminal of the variable resistance element to the variable resistance element control terminal of the variable gain amplifier;
Variable resistor and the input and output impedances of the variable gain amplifier, at the time of the gain control, so that each becomes a constant value, to be applied value of the gate control voltage applied to the gate control terminal and to said variable resistive element control terminal A table storing combinations of element control voltage values, reading combinations of the gate control voltage values and variable resistance element control voltage values from the table, and reading these values of the gate control voltage values; The variable gain amplifier is set as a value and a value of the variable resistance element control voltage . The variable gain amplifier according to claim 1, wherein
The main amplifier has a first field effect transistor and a second field effect transistor;
The variable gain amplifier has an input matching circuit and an output matching circuit,
A gate terminal of the first field effect transistor is connected to one end of the input matching circuit and one end of the variable resistance element;
Grounding the source terminal of the first field effect transistor;
Connecting a drain terminal of the first field effect transistor to a source terminal of the second field effect transistor;
Connecting a gate terminal of the second field effect transistor to a second gate control terminal of the variable gain amplifier;
A drain terminal of the second field effect transistor is connected to one end of the output matching circuit and the other end of the variable resistance element;
Connecting the other end of the input matching circuit to the input terminal of the variable gain amplifier;
Connecting the other end of the output matching circuit to the output terminal of the variable gain amplifier;
Connecting a bias terminal of the input matching circuit to a first gate control terminal of the variable gain amplifier;
Connecting the bias terminal of the output matching circuit to the drain control terminal of the variable gain amplifier;
Connecting the bias terminal of the variable resistance element to the variable resistance element control terminal of the variable gain amplifier;
Wherein the input impedance of the variable gain amplifier and the output impedance, at the time of the gain control, so that each becomes a constant value, the value and the variable resistance element control of the first gate control voltage applied to said first gate control terminal A table storing combinations of variable resistance element control voltage values to be applied to the terminals, and reading the combination of the first gate control voltage value and the variable resistance element control voltage value from the table; These values are set as the value of the first gate control voltage and the value of the variable resistance element control voltage . A variable gain amplifier, characterized in that: The variable gain amplifier according to claim 1, wherein
The main amplifier has a first field effect transistor and a second field effect transistor;
The variable gain amplifier has an input matching circuit and an output matching circuit,
A gate terminal of the first field effect transistor is connected to one end of the input matching circuit and one end of a variable resistance element;
Grounding the source terminal of the first field effect transistor;
Connecting a drain terminal of the first field effect transistor to a source terminal of the second field effect transistor;
Connecting a gate terminal of the second field effect transistor to a second gate control terminal of the variable gain amplifier;
A drain terminal of the second field effect transistor is connected to one end of the output matching circuit and the other end of the variable resistance element;
Connecting the other end of the input matching circuit to the input terminal of the variable gain amplifier;
Connecting the other end of the output matching circuit to the output terminal of the variable gain amplifier;
Connecting a bias terminal of the input matching circuit to a first gate control terminal of the variable gain amplifier;
Connecting the bias terminal of the output matching circuit to the drain control terminal of the variable gain amplifier;
Connecting the bias terminal of the variable resistance element to the variable resistance element control terminal of the variable gain amplifier;
Wherein the input impedance of the variable gain amplifier and the output impedance, at the time of the gain control, so that each becomes a constant value, the value and the variable resistance element control of the second gate control voltage applied to said second gate control terminal A table storing combinations of variable resistance element control voltage values to be applied to the terminals, and reading combinations of the second gate control voltage values and the variable resistance element control voltage values from the table; These values are set as the value of the second gate control voltage and the value of the variable resistance element control voltage . A variable gain amplifier, characterized in that: A variable gain amplifier according to claim 2,
Replacing the field effect transistor of the main amplifier with a bipolar transistor;
The gate terminal as a base terminal,
The drain terminal as a collector terminal,
The source terminal as an emitter terminal,
The gate control terminal as a base control terminal,
Replacing the drain control terminal with a collector control terminal,
Variable resistor and the input and output impedances of the variable gain amplifier, at the time of the gain control, so that each becomes a constant value, to be applied value of the base control voltage applied to the base control terminal and to said variable resistive element control terminal A table storing combinations of values of the element control voltages , reading combinations of the values of the base control voltage and the values of the variable resistance element control voltages from the table, and reading these values of the base control voltages; The variable gain amplifier is set as a value and a value of the variable resistance element control voltage . The variable gain amplifier according to claim 3,
The first and second field effect transistors of the main amplifier are replaced with first and second bipolar transistors, respectively, and the gate terminals of the first and second field effect transistors are used as base terminals,
Each drain terminal as a collector terminal,
Replacing each of the respective source terminals to the emitter terminal,
And, said first and second gate control terminal to the first and second base control terminals respectively,
Replacing the first and second drain control terminals with first and second collector control terminals, respectively;
Wherein the input impedance of the variable gain amplifier and the output impedance, at the time of the gain control, so that each becomes a constant value, the value and the variable resistance element control of the first base control voltage applied to the first base control terminal A table storing combinations of variable resistance element control voltage values to be applied to the terminals, and reading out the combinations of the first base control voltage value and the variable resistance element control voltage value from the table; Is set as the value of the first base control voltage and the value of the variable resistance element control voltage . The variable gain amplifier circuit according to claim 4,
The first and second field effect transistors of the main amplifier are replaced with first and second bipolar transistors, respectively, and the gate terminals of the first and second field effect transistors are used as base terminals,
Each drain terminal as a collector terminal,
Replacing each of the respective source terminals to the emitter terminal,
And the first and second gate control terminals are respectively the first and second base control terminals,
Replacing the first and second drain control terminals with first and second collector control terminals, respectively ;
Wherein the input impedance of the variable gain amplifier and the output impedance, at the time of the gain control, so that each becomes a constant value, the value and the variable resistance element control of the second base control voltage applied to the second base control terminal A table storing combinations of variable resistance element control voltage values applied to the terminals, and reading out combinations of the second base control voltage values and the variable resistance element control voltage values from the table; These values are set as the value of the second base control voltage and the value of the variable resistance element control voltage . A variable gain amplifier, characterized in that:

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