JP4471668B2 - Capacitor and nonvolatile memory device using the capacitor - Google Patents

Capacitor and nonvolatile memory device using the capacitor Download PDF

Info

Publication number
JP4471668B2
JP4471668B2 JP2004009291A JP2004009291A JP4471668B2 JP 4471668 B2 JP4471668 B2 JP 4471668B2 JP 2004009291 A JP2004009291 A JP 2004009291A JP 2004009291 A JP2004009291 A JP 2004009291A JP 4471668 B2 JP4471668 B2 JP 4471668B2
Authority
JP
Japan
Prior art keywords
insulating film
film
capacitor
silicon
pzt
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2004009291A
Other languages
Japanese (ja)
Other versions
JP2005203613A (en
Inventor
紅コウ 鄒
浩 西岡
有典 宮口
勲 木村
径夫 谷村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ulvac Inc
Original Assignee
Ulvac Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ulvac Inc filed Critical Ulvac Inc
Priority to JP2004009291A priority Critical patent/JP4471668B2/en
Publication of JP2005203613A publication Critical patent/JP2005203613A/en
Application granted granted Critical
Publication of JP4471668B2 publication Critical patent/JP4471668B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Description

本発明は、LSIのキャパシタ、強誘電体不揮発メモリ、圧電焦電センサ、マイクロアクチュエータ、バイパスコンデンサなどで強誘電体膜をキャパシタの構成材として有する素子に関するものである。   The present invention relates to an LSI capacitor, a ferroelectric nonvolatile memory, a piezoelectric pyroelectric sensor, a microactuator, a bypass capacitor, etc., and an element having a ferroelectric film as a component of the capacitor.

代表的な強誘電体膜素子として、近年、駆動電力を遮断しても、記憶内容が保持される不揮発性メモリ素子において、キャパシタ膜に強誘電体膜を用いる強誘電体メモリが提案されている。   As a typical ferroelectric film element, in recent years, a ferroelectric memory using a ferroelectric film as a capacitor film has been proposed in a nonvolatile memory element that retains stored contents even when drive power is cut off. .

しかしながら、Pb(Zr,Ti)O3(以下、PZTと略す)やSrBi2Ta29(以下SBTと略す)のような強誘電体材料で構成された従来型の強誘電体膜をメモリキャパシタ膜として導入することは、強誘電体膜の結晶化のために高温下での成膜または熱処理を必要とすること、ならびに、リーク電流が多大であることなどの問題があった。
特表2001-527281号公報 特開平5-259391号公報 特開平5-243525号公報
However, a conventional ferroelectric film made of a ferroelectric material such as Pb (Zr, Ti) O 3 (hereinafter abbreviated as PZT) or SrBi 2 Ta 2 O 9 (hereinafter abbreviated as SBT) is used as a memory. The introduction of the capacitor film has problems such as requiring film formation or heat treatment at a high temperature for crystallization of the ferroelectric film and a large leak current.
Special table 2001-527281 Japanese Unexamined Patent Publication No. 5-259391 Japanese Patent Laid-Open No. 5-235525

本発明は上記従来技術の不都合を解決するために創作されたものであり、その目的は、残留分極の低下を抑制し、結晶化温度の低温化や、リーク電流の増加を抑制することにより、キャパシタ強誘電体膜の強誘電特性を向上させ、強誘電体メモリ素子の高速化、大容量化に寄与するPZT膜またはSBT膜を用いたキャパシタ強誘電体膜を提供することを課題とする。   The present invention was created to solve the disadvantages of the prior art described above, and its purpose is to suppress a decrease in remanent polarization, to lower a crystallization temperature and to prevent an increase in leakage current, It is an object of the present invention to provide a capacitor ferroelectric film using a PZT film or an SBT film that improves the ferroelectric characteristics of the capacitor ferroelectric film and contributes to speeding up and capacity increase of the ferroelectric memory element.

上記課題を解決するために、本発明者等はこの点に関し鋭意研究を進め、各種実験を行った結果、二酸化ケイ素をPZT膜やSBT膜のような誘電体膜に添加することにより、キャパシタ絶縁膜の誘電特性が改善され、かつ、結晶化温度の低減化、リーク電流の低減が達成されることを確認し、本発明を完成するに至った。   In order to solve the above-mentioned problems, the present inventors have conducted extensive research on this point, and as a result of various experiments, by adding silicon dioxide to a dielectric film such as a PZT film or an SBT film, capacitor insulation is achieved. It was confirmed that the dielectric properties of the film were improved, the crystallization temperature was reduced, and the leakage current was reduced, and the present invention was completed.

上記知見に基づいてなされた請求項1記載の発明は、基台と、前記基台上に配置された第一の電極膜と、前記第一の電極膜の表面に配置された絶縁膜と、前記絶縁膜の表面に配置された第二の電極膜とを有し、前記絶縁膜は強誘電体材料を主成分とするコンデンサであって、前記絶縁膜は二酸化ケイ素を含有し、前記絶縁膜は、Pb(Zr,Ti)O 3 と、SrBi 2 Ta 2 9 と、Bi 3 Ti 4 12 からなる群より選択される強誘電体材料のうち、少なくとも1種類の強誘電体材料を含有し、前記絶縁膜中のケイ素の原子濃度が20%であるコンデンサである。
請求項2記載の発明は、請求項1記載のコンデンサであって、前記絶縁膜の膜厚は25nm以上1000nm以下のコンデンサである。
請求項3記載の発明は、請求項1又は請求項2のいずれか1項記載のコンデンサであって、前記第一、第二の電極は、Ptと、Irと、Ruと、SrRuO3と、LaNiO3からなる群より選択されるいずれか1種類の導電性材料を含有するコンデンサである。
請求項4記載の発明は、不揮発性記憶装置であって、請求項1乃至請求項のいずれか1項記載のコンデンサを有し、前記コンデンサに蓄積する電荷によってデータを記憶する不揮発性記憶装置である。
Invention of Claim 1 made | formed based on the said knowledge, The base, The 1st electrode film arrange | positioned on the said base, The insulating film arrange | positioned on the surface of said 1st electrode film, A second electrode film disposed on a surface of the insulating film, the insulating film being a capacitor mainly composed of a ferroelectric material, the insulating film containing silicon dioxide, and the insulating film Contains at least one ferroelectric material selected from the group consisting of Pb (Zr, Ti) O 3 , SrBi 2 Ta 2 O 9 and Bi 3 Ti 4 O 12 In addition, the capacitor has an atomic concentration of silicon of 20% in the insulating film.
According to a second aspect of the invention, a capacitor of claim 1, wherein the thickness of the insulating film is a 1000nm or less of the capacitor more than 25 nm.
According to a third aspect of the invention, a capacitor of any one of claims 1 or claim 2, wherein the first, second electrodes, and Pt, and Ir, and Ru, and SrRuO 3, It is a capacitor containing any one type of conductive material selected from the group consisting of LaNiO 3 .
According to a fourth aspect of the present invention, there is provided a non-volatile memory device comprising the capacitor according to any one of the first to third aspects, wherein the non-volatile memory device stores data by the electric charge accumulated in the capacitor. It is.

本発明は上記のように構成されており、絶縁膜に二酸化ケイ素が添加されることで、絶縁膜の膜の平滑化が促進され、かつPZTやSBTのような強誘電体材料の結晶化が促進される。従って、従来よりも低温で強誘電体材料が結晶化されるため、基台が熱損傷され難いだけではなく、結晶の配向性が向上するため絶縁膜の自発分極性が高くなる。   The present invention is configured as described above. By adding silicon dioxide to the insulating film, smoothing of the insulating film is promoted, and crystallization of a ferroelectric material such as PZT or SBT is facilitated. Promoted. Accordingly, since the ferroelectric material is crystallized at a temperature lower than that of the prior art, the base is not easily damaged by heat, and the orientation of the crystal is improved, so that the spontaneous polarization of the insulating film is increased.

また、絶縁膜中では、少なくとも強誘電体材料の結晶粒子の表面に二酸化ケイ素の粒子が存在し、結晶粒子の粒界でSi−O結合を形成するため、強誘電体材料の粒子間の電子のすり抜けが起こらず、絶縁膜のリーク電流が低減される。   Further, in the insulating film, at least silicon dioxide particles are present on the surface of the crystal grains of the ferroelectric material, and Si—O bonds are formed at the grain boundaries of the crystal grains. No slipping occurs, and the leakage current of the insulating film is reduced.

二酸化ケイ素が添加され、ケイ素の原子濃度が5%以上25%以下であるターゲットを用い、ケイ素の原子濃度が同じになるようにスパッタリングを行えば、二酸化ケイ素を含有し、ケイ素の原子濃度が5%以上25%以下の絶縁膜を得ることができる。   When sputtering is performed using a target to which silicon dioxide is added and the atomic concentration of silicon is 5% or more and 25% or less and the atomic concentration of silicon is the same, silicon dioxide is contained and the atomic concentration of silicon is 5 % Or more and 25% or less of an insulating film can be obtained.

本発明によれば、PZTやSBTのような強誘電体材料の膜中に二酸化ケイ素を添加したものを用いて、作成した強誘電体膜を利用することにより、絶縁膜のリーク電流増加の抑制、ならびに低温結晶化が達成され、良好な強誘電体キャパシタ特性を有する記憶素子を実現することができる。さらに、従来公知のMOCVD法等他の成膜方法で作製した強誘電体材料の膜についても適用可能であり、その有用性は絶大である。   According to the present invention, an increase in leakage current of an insulating film is suppressed by using a ferroelectric film prepared by adding silicon dioxide to a film of a ferroelectric material such as PZT or SBT. In addition, low temperature crystallization is achieved, and a memory element having good ferroelectric capacitor characteristics can be realized. Furthermore, the present invention can be applied to a film of a ferroelectric material manufactured by another film forming method such as a conventionally known MOCVD method, and its usefulness is tremendous.

上述した絶縁膜15を成膜する工程について説明する。先ず、金属酸化物の粉末に二酸化ケイ素(SiO2)の粉末をケイ素の原子濃度が5%以上25%以下になるよう所望割合で添加し、それらの粉末をボールミルにより混合し、ターゲット材料とした。ここでは、金属酸化物として酸化鉛(PbO)と、酸化ジルコニウム(ZrO2)と、酸化チタンとを用いた。 A process of forming the insulating film 15 described above will be described. First, silicon dioxide (SiO 2 ) powder is added to the metal oxide powder at a desired ratio so that the atomic concentration of silicon is 5% to 25%, and these powders are mixed by a ball mill to obtain a target material. . Here, lead oxide (PbO), zirconium oxide (ZrO 2 ), and titanium oxide were used as metal oxides.

そのターゲット材料を仮焼成して水分を除去した後、細かく粉砕し、CIP(冷間等方圧加圧成形)法により成形した後、仮焼成よりも高温で焼成し(本焼成)、ターゲットを得た。   After the target material is temporarily fired to remove moisture, it is finely pulverized and formed by a CIP (cold isostatic pressing) method, and then fired at a temperature higher than the temporary firing (main firing). Obtained.

上述した製造方法により作製されたターゲット5を図1に示すスパッタリング装置3の真空槽31内に搬入し、基板ホルダ36と対向するように配置する。次に、処理対象物である基台の片面に、別のスパッタリング装置で導電膜(ここでは膜厚100nmのプラチナ膜)からなる第一の電極膜14を形成した後、その基台を、真空槽31内に搬入する。   The target 5 produced by the manufacturing method described above is carried into the vacuum chamber 31 of the sputtering apparatus 3 shown in FIG. 1 and arranged so as to face the substrate holder 36. Next, after the first electrode film 14 made of a conductive film (here, a platinum film having a thickness of 100 nm) is formed on one surface of the base, which is the object to be processed, by another sputtering apparatus, the base is vacuumed. Carry into the tank 31.

基台19はシリコンからなる基板11と、基板11表面に配置され、熱処理によって形成されたシリコン酸化膜12と、該シリコン酸化膜12の表面に形成された酸化チタン膜13とを有しており、第一の電極膜14は酸化チタン膜13の表面に形成されている。この基台19を、第一の電極膜14が形成された面をターゲット5と対向させた状態で基板ホルダ36に保持させる。   The base 19 has a substrate 11 made of silicon, a silicon oxide film 12 disposed on the surface of the substrate 11 and formed by heat treatment, and a titanium oxide film 13 formed on the surface of the silicon oxide film 12. The first electrode film 14 is formed on the surface of the titanium oxide film 13. The base 19 is held by the substrate holder 36 with the surface on which the first electrode film 14 is formed facing the target 5.

真空槽31に接続された真空排気系39により真空槽31内を真空排気しながら、スパッタガス導入系37から真空槽31内にスパッタガスを導入する。真空槽31内が所定圧力で安定したところで、ターゲット5に接続された電源35を起動すると、ターゲット5がスパッタリングされ、PZT(Pb(Zr,Ti)O3)の粒子の少なくとも表面に、二酸化ケイ素の粒子が形成された絶縁膜15が成長する。その絶縁膜が25nm以上1000nm以下の所定膜厚(ここでは膜厚100nm)まで成長したところで、スパッタリングを停止する。 Sputtering gas is introduced into the vacuum chamber 31 from the sputtering gas introduction system 37 while the vacuum chamber 31 is evacuated by the evacuation system 39 connected to the vacuum chamber 31. When the power supply 35 connected to the target 5 is activated when the inside of the vacuum chamber 31 is stabilized at a predetermined pressure, the target 5 is sputtered, and at least the surface of the PZT (Pb (Zr, Ti) O 3 ) particles has silicon dioxide. The insulating film 15 on which the particles are formed grows. Sputtering is stopped when the insulating film has grown to a predetermined thickness of 25 nm to 1000 nm (here, a thickness of 100 nm).

絶縁膜が形成された状態の基台19をスパッタリング装置3から他のスパッタリング装置へ搬入し、その絶縁膜の表面に導電膜であるプラチナ膜(膜厚100nm)を形成し、第二の電極膜を形成する。絶縁膜15がPZTを有する場合は450℃以上の温度で加熱すると、絶縁膜15中のPZTが結晶成長する。   The base 19 on which the insulating film is formed is carried from the sputtering apparatus 3 to another sputtering apparatus, and a platinum film (film thickness: 100 nm) as a conductive film is formed on the surface of the insulating film, and the second electrode film Form. When the insulating film 15 has PZT, when heated at a temperature of 450 ° C. or higher, the PZT in the insulating film 15 grows.

図2の符号1は加熱処理が終了した状態のコンデンサを示しており、同図の符号15は絶縁膜を、同図の符号16は第二の電極膜を示している。上述したように、絶縁膜15は強誘電体材料であるPZTを有しており、第一、第二の電極膜14、16間に電圧を印加し、その電圧印加を終了した後に絶縁膜15中に電荷が残るようになっている。   Reference numeral 1 in FIG. 2 indicates the capacitor after the heat treatment, reference numeral 15 in FIG. 2 indicates an insulating film, and reference numeral 16 in FIG. 2 indicates a second electrode film. As described above, the insulating film 15 has PZT which is a ferroelectric material, and a voltage is applied between the first and second electrode films 14 and 16, and after the voltage application is finished, the insulating film 15 Charges are left inside.

二酸化ケイ素を含有することで、絶縁膜15のリーク電流が小さくなっているので、電圧の印加を終了した後も絶縁膜15中の電荷が長時間維持される。従って、このコンデンサ1を記憶素子として用いた不揮発性メモリは長時間、記録の保存が可能である。   By containing silicon dioxide, the leakage current of the insulating film 15 is reduced, so that the charge in the insulating film 15 is maintained for a long time even after the voltage application is finished. Therefore, a nonvolatile memory using the capacitor 1 as a storage element can store a record for a long time.

本発明のコンデンサ1について下記に示すスイッチング電荷量を測定した。
<スイッチング電荷量>
二酸化ケイ素の添加量を変えた7種類のターゲット5を用い、各ターゲットのケイ素の原子濃度と、絶縁膜のケイ素の原子濃度とが同じになるようにスパッタリングを行い、7種類のコンデンサ1を作製した。各ターゲット5のケイ素の原子濃度は0%、5%、10%、15%、20%、25%、30%であり、各絶縁膜15のケイ素濃度は0%、5%、10%、15%、20%、25%、30%であった。また、各第二の電極膜16は直径5mmの円形であった。
For the capacitor 1 of the present invention, the following switching charge amount was measured.
<Switching charge amount>
Using seven types of targets 5 with different amounts of silicon dioxide added, sputtering is performed so that the silicon atomic concentration of each target is the same as the silicon atomic concentration of the insulating film, and seven types of capacitors 1 are produced. did. The silicon atomic concentration of each target 5 is 0%, 5%, 10%, 15%, 20%, 25%, 30%, and the silicon concentration of each insulating film 15 is 0%, 5%, 10%, 15 %, 20%, 25%, and 30%. Each second electrode film 16 was circular with a diameter of 5 mm.

これとは別に、金属酸化物として酸化ストロンチウムと酸化ビスマスと酸化タンタルとを用いた以外は、上記の工程で二酸化ケイ素の添加量が異なる7種類のターゲット5を作製し、これらのターゲット5を用いて、各ターゲット5のケイ素の原子濃度と絶縁膜の原子濃度とが同じになるようにスパッタリングを行い、7種類のコンデンサ1を作製した。尚、これらのコンデンサ1の絶縁膜15中には強誘電体材料であるSrBi2Ta29(SBT)が形成されている。 Separately, except that strontium oxide, bismuth oxide and tantalum oxide were used as metal oxides, seven types of targets 5 having different silicon dioxide addition amounts were produced in the above-described steps, and these targets 5 were used. Then, sputtering was performed so that the silicon atomic concentration of each target 5 and the atomic concentration of the insulating film were the same, and seven types of capacitors 1 were produced. In the insulating film 15 of these capacitors 1, SrBi 2 Ta 2 O 9 (SBT), which is a ferroelectric material, is formed.

各コンデンサ1の第一、第二の電極膜14、16間に電圧を印加し、電圧の印加を終了した。電圧印加終了から一定時間経過後にコンデンサ1に残る単位面積当たりの電荷を測定し、スイッチング電荷量とした。   A voltage was applied between the first and second electrode films 14 and 16 of each capacitor 1, and the voltage application was completed. The charge per unit area remaining in the capacitor 1 after a lapse of a certain time from the end of voltage application was measured and used as the switching charge amount.

絶縁膜15の強誘電体材料がそれぞれPZT、SBTであった場合の測定結果を図3、4のグラフに示す。図3、4の縦軸と横軸は、それぞれはスイッチング電荷量と絶縁膜15中のケイ素の原子濃度を示している。   The measurement results when the ferroelectric material of the insulating film 15 is PZT and SBT are shown in the graphs of FIGS. The vertical and horizontal axes in FIGS. 3 and 4 respectively indicate the switching charge amount and the atomic concentration of silicon in the insulating film 15.

図3、4から分かるように、絶縁膜15の強誘電体材料がPZTとSBTのいずれの場合でも、ケイ素の原子濃度が5%以上25%以下である場合は、ケイ素が無添加(原子濃度0%)の場合と、ケイ素の原子濃度が30%であった場合に比べてスイッチング電荷量が大きく、ケイ素濃度が20%であったときにスイッチング電荷量が最大となった。   As can be seen from FIGS. 3 and 4, when the ferroelectric material of the insulating film 15 is either PZT or SBT, when the atomic concentration of silicon is 5% or more and 25% or less, silicon is not added (atomic concentration 0%) and the amount of switching charge was larger than when the atomic concentration of silicon was 30%, and the amount of switching charge was maximized when the silicon concentration was 20%.

スイッチング電荷量が大きい程、絶縁膜15の自発分極性が高いことを示しているので、これらのことから、強誘電体材料がPZTとSBTの両方の場合で、絶縁膜15中のケイ素濃度が5%以上25%以下であれば、不揮発性記憶装置の記憶素子としての適性が高いコンデンサ1が得られることが分かる。   As the switching charge amount is larger, the spontaneous polarization of the insulating film 15 is higher. Therefore, when the ferroelectric material is both PZT and SBT, the silicon concentration in the insulating film 15 is higher. It can be seen that the capacitor 1 having high suitability as the storage element of the nonvolatile storage device can be obtained when the ratio is 5% or more and 25% or less.

次に、上述した14種類のコンデンサ1を用いて下記に示す「リーク電流」を測定した。
<リーク電流>
各コンデンサ1の第一、第二の電極膜14、16間に5Vの電圧を印加したときの単位面積当たりのリーク電流をそれぞれ測定した。絶縁膜15の強誘電体材料がPZTであった場合と、SBTであった場合の測定結果を図5、6に示す。
Next, the “leakage current” shown below was measured using the 14 types of capacitors 1 described above.
<Leakage current>
The leakage current per unit area when a voltage of 5 V was applied between the first and second electrode films 14 and 16 of each capacitor 1 was measured. The measurement results when the ferroelectric material of the insulating film 15 is PZT and when it is SBT are shown in FIGS.

図5、6の縦軸はリーク電流を示し、横軸は絶縁膜15中のケイ素の原子濃度を示している。
図5、6から明らかなように、ケイ素濃度がゼロであった場合に比べ、絶縁膜15のケイ素濃度が5%以上であった場合にはリーク電流が低かった。ケイ素濃度は高いほどリーク電流が低下する傾向が見られたが、ケイ素濃度が25%を超えるとそれ以上リーク電流の低下が見られなかった。これらのことから、PZTとSBTの両方の場合で、絶縁膜15のケイ素が5%以上であれば、リーク電流が低くなることが分かった。
5 and 6, the vertical axis represents leakage current, and the horizontal axis represents the atomic concentration of silicon in the insulating film 15.
As is clear from FIGS. 5 and 6, the leakage current was lower when the silicon concentration of the insulating film 15 was 5% or more than when the silicon concentration was zero. The higher the silicon concentration, the lower the leakage current. However, when the silicon concentration exceeded 25%, no further reduction in the leakage current was observed. From these results, it was found that in both cases of PZT and SBT, if the silicon of the insulating film 15 is 5% or more, the leakage current is lowered.

<X線回析>
プラチナ膜の表面に、PZTを有し、ケイ素濃度が20%の絶縁膜15を成膜した後、その絶縁膜15を450℃、500℃、550℃の各温度で加熱処理し、3種類の試験片を作製し、各試験片の絶縁膜15のX線回析を行った。また、比較例として、PZTからなり、二酸化ケイ素が添加されていない絶縁膜を形成、同様に加熱処理を施した後、X線回析を行った。
<X-ray diffraction>
After forming an insulating film 15 having PZT and a silicon concentration of 20% on the surface of the platinum film, the insulating film 15 is subjected to heat treatment at temperatures of 450 ° C., 500 ° C., and 550 ° C. Test pieces were prepared, and X-ray diffraction of the insulating film 15 of each test piece was performed. Further, as a comparative example, an insulating film made of PZT and not added with silicon dioxide was formed. Similarly, after heat treatment, X-ray diffraction was performed.

二酸化ケイ素を添加しないチャートと、二酸化ケイ素を添加した場合のチャートをそれぞれ図7、8に示す。図7、8の横軸は回析角を示し、縦軸は強度を示しており、図7、8中の符号a〜cはそれぞれ加熱処理の温度を示している。   A chart in which no silicon dioxide is added and a chart in the case where silicon dioxide is added are shown in FIGS. 7 and 8, the horizontal axis indicates the diffraction angle, the vertical axis indicates the intensity, and the symbols a to c in FIGS. 7 and 8 indicate the temperature of the heat treatment, respectively.

図7から明らかなように、二酸化ケイ素が添加されておらずケイ素の原子濃度がゼロである絶縁膜では、加熱温度が500℃未満では、PZTのペロブスカイト層を示す(111)面のピークが観察されなかったが、図8を見るとケイ素が添加された絶縁膜15では、加熱温度が450℃であってもPZTのペロブスカイト層を示す(111)面のピークが観察された。また、ケイ素の原子濃度がゼロである場合に比べ、二酸化ケイ素が添加された場合には、加熱温度が同じであってもPZTのペロブスカイト層を示す(111)面のピーク強度が高かった。これらのことから、二酸化ケイ素を添加すればPZTの結晶化がより低温で行え、かつ、結晶成長が促進されることがわかる。   As is clear from FIG. 7, in the insulating film in which no silicon dioxide is added and the atomic concentration of silicon is zero, a peak on the (111) plane showing a PZT perovskite layer is observed when the heating temperature is less than 500 ° C. Although not shown in FIG. 8, in the insulating film 15 to which silicon was added, a peak on the (111) plane showing a PZT perovskite layer was observed even when the heating temperature was 450 ° C. In addition, when silicon dioxide was added, the peak intensity of the (111) plane showing the PZT perovskite layer was higher when silicon dioxide was added than when the silicon atomic concentration was zero. From these facts, it can be seen that if silicon dioxide is added, crystallization of PZT can be performed at a lower temperature and crystal growth is promoted.

次に、プラチナ膜の表面に、SBTを有し、ケイ素濃度が20%の絶縁膜15を成膜した後、650℃、700℃、750℃、800℃の各温度で加熱処理して4種類の試験片を作製し、各試験片の絶縁膜15のX線回析を行った。また、比較例としてSBTからなり、二酸化ケイ素が添加されていない絶縁膜を同様に加熱処理し、X線回析を行った。二酸化ケイ素を添加しない場合のチャートと、二酸化ケイ素を添加した場合のチャートをそれぞれ図9、10に示す。尚、図9、10の符号a〜eは加熱処理の温度を示している。   Next, after forming an insulating film 15 having SBT and having a silicon concentration of 20% on the surface of the platinum film, heat treatment is performed at each temperature of 650 ° C., 700 ° C., 750 ° C., and 800 ° C. to obtain four types These test pieces were prepared, and X-ray diffraction of the insulating film 15 of each test piece was performed. Further, as a comparative example, an insulating film made of SBT and not added with silicon dioxide was similarly heat-treated and X-ray diffraction was performed. FIGS. 9 and 10 show a chart when no silicon dioxide is added and a chart when silicon dioxide is added, respectively. 9 and 10 indicate the temperature of the heat treatment.

プラチナ膜(第一の導電膜14)上でSBT膜を結晶成長させた場合、層状のBi構造のピークが(115)面に見られることが知られている。図9を見ると、二酸化ケイ素を添加しない場合は、加熱温度が750℃未満では(115)面のピークが現れないが、図10を見ると二酸化ケイ素を添加した場合は、加熱温度が650℃で(115)面のピークが確認された。これらのことから、SBTにケイ素が添加されていれば、SBTの結晶化がより低い温度で進行することがわかる。   It is known that when an SBT film is grown on a platinum film (first conductive film 14), a peak of a layered Bi structure is seen on the (115) plane. Referring to FIG. 9, when silicon dioxide is not added, the peak of the (115) plane does not appear when the heating temperature is less than 750 ° C., but when silicon dioxide is added, the heating temperature is 650 ° C. (115) plane peak was confirmed. From these, it can be seen that if silicon is added to SBT, crystallization of SBT proceeds at a lower temperature.

<その他の実施例>
以上は、絶縁膜15の強誘電体材料としてPZTとSBTを用いる場合について説明したが、強誘電体材料の種類は特に限定されず、例えばBi3412を用いることができる。
<Other examples>
The case where PZT and SBT are used as the ferroelectric material of the insulating film 15 has been described above. However, the type of the ferroelectric material is not particularly limited, and for example, Bi 3 T 4 O 12 can be used.

Bi3Ti412を有する絶縁膜15を成膜する場合は、金属酸化物である酸化ビスマスと酸化チタンに、二酸化ケイ素を添加、混合してターゲット材料を作製し、PZTの場合と同様に該ターゲット材料を成形した後、焼成してターゲット5を作製する。 In the case of forming the insulating film 15 having Bi 3 Ti 4 O 12 , silicon dioxide is added to and mixed with bismuth oxide and titanium oxide, which are metal oxides, and a target material is prepared, as in the case of PZT. After the target material is molded, the target 5 is manufactured by firing.

以上は、絶縁膜15をスパッタリング法により形成する場合について説明したが、本発明はこれに限定されるものではなく、例えばPZTやSBTのような強誘電体材料に二酸化ケイ素を添加、混合して絶縁膜材料を作製し、該絶縁膜材料を溶媒に分散した塗工液を、第一の電極膜14の表面に塗布、乾燥するコーティング法や、MOCVD(Metal Organic Chemical Vapor Deposition、有機金属化学気相蒸着法)法により成膜することもできる。   In the above, the case where the insulating film 15 is formed by the sputtering method has been described. However, the present invention is not limited to this. For example, silicon dioxide is added to and mixed with a ferroelectric material such as PZT or SBT. An insulating film material is prepared, and a coating solution in which the insulating film material is dispersed in a solvent is applied to the surface of the first electrode film 14 and dried, or MOCVD (Metal Organic Chemical Vapor Deposition) A film can also be formed by a phase deposition method.

上記実施例では、第一、第二の電極膜14、16の膜厚をそれぞれ100nmとしたが、表面荒さが大きくなり、PZTまたはSBTの強誘電体膜の特性に影響を与えることが無ければ、それらの膜厚は特に制限されるものではない。   In the above embodiment, the film thicknesses of the first and second electrode films 14 and 16 are 100 nm, respectively, but the surface roughness is increased so long as it does not affect the characteristics of the PZT or SBT ferroelectric film. The film thickness is not particularly limited.

第一、第二の電極膜14、16の構成材料もプラチナに限定されず、Ir(インジウム)、Ru(ルテニウム)、SrRuO3,LaNiO3などの金属やこれらの合金からなる膜や、これらの酸化膜導電体でも、所望の目的を達成するために適用可能である。また、第一、第二の電極膜14、16をそれぞれ異なる種類の導電体で構成することもできる。 The constituent materials of the first and second electrode films 14 and 16 are not limited to platinum, and films made of metals such as Ir (indium), Ru (ruthenium), SrRuO 3 , LaNiO 3 , and alloys thereof, An oxide film conductor can also be applied to achieve a desired purpose. Also, the first and second electrode films 14 and 16 can be made of different types of conductors.

また、上記実施例では、絶縁膜15の膜厚が100nmであったが、この膜厚は、強誘電体メモリ素子の構造上要求される許容値であれば、特に制限は設けない。しかし、絶縁膜15の膜厚が25nm未満だと十分なスイッチング電荷量が得られず、またその膜厚が1000nmを超えると、絶縁膜15を分極させるため過大な電力が必要なことから、絶縁膜15の膜厚は25nm以上1000nm以下であることが好ましい。   In the above embodiment, the thickness of the insulating film 15 is 100 nm. However, this thickness is not particularly limited as long as it is an allowable value required for the structure of the ferroelectric memory element. However, if the film thickness of the insulating film 15 is less than 25 nm, a sufficient amount of switching charge cannot be obtained, and if the film thickness exceeds 1000 nm, excessive power is required to polarize the insulating film 15. The film 15 preferably has a thickness of 25 nm to 1000 nm.

本発明に用いるスパッタリング装置の一例を説明する断面図Sectional drawing explaining an example of the sputtering device used for this invention 本発明のコンデンサの一例を説明する断面図Sectional drawing explaining an example of the capacitor | condenser of this invention PZTを含有する絶縁膜のスイッチング電荷量と、ケイ素の原子濃度との関係を示すグラフA graph showing the relationship between the switching charge amount of an insulating film containing PZT and the atomic concentration of silicon SBTを含有する絶縁膜のスイッチング電荷量と、ケイ素の原子濃度との関係を示すグラフThe graph which shows the relationship between the switching charge amount of the insulating film containing SBT, and the atomic concentration of silicon PZTを含有する絶縁膜のリーク電流と、ケイ素の原子濃度との関係を示すグラフThe graph which shows the relationship between the leakage current of the insulating film containing PZT, and the atomic concentration of silicon SBTを含有する絶縁膜のリーク電流と、ケイ素の原子濃度との関係を示すグラフThe graph which shows the relationship between the leakage current of the insulating film containing SBT, and the atomic concentration of silicon PZTからなる絶縁膜のX線回析チャートX-ray diffraction chart of insulating film made of PZT PZTと二酸化ケイ素の両方を含有する絶縁膜のX線回析チャートX-ray diffraction chart of insulating film containing both PZT and silicon dioxide SBTからなる絶縁膜のX線回析チャートX-ray diffraction chart of insulating film made of SBT SBTと二酸化ケイ素の両方を含有する絶縁膜のX線回析チャートX-ray diffraction chart of insulating film containing both SBT and silicon dioxide

符号の説明Explanation of symbols

1……コンデンサ 3……スパッタリング装置 5……ターゲット 11……基板 12……シリコン酸化膜 13……チタン酸化膜 14……第一の電極膜 15……絶縁膜 16……第二の電極膜 19……基台 31……真空槽 35……電源 36……基板ホルダ 37……ガス供給系 39……真空排気系   DESCRIPTION OF SYMBOLS 1 ... Capacitor 3 ... Sputtering device 5 ... Target 11 ... Substrate 12 ... Silicon oxide film 13 ... Titanium oxide film 14 ... First electrode film 15 ... Insulating film 16 ... Second electrode film 19 …… Base 31 …… Vacuum chamber 35 …… Power supply 36 …… Substrate holder 37 …… Gas supply system 39 …… Vacuum exhaust system

Claims (4)

基台と、前記基台上に配置された第一の電極膜と、前記第一の電極膜の表面に配置された絶縁膜と、前記絶縁膜の表面に配置された第二の電極膜とを有し、前記絶縁膜は強誘電体材料を主成分とするコンデンサであって、
前記絶縁膜は二酸化ケイ素を含有し、
前記絶縁膜は、Pb(Zr,Ti)O 3 と、SrBi 2 Ta 2 9 と、Bi 3 Ti412からなる群より選択される強誘電体材料のうち、少なくとも1種類の強誘電体材料を含有し、
前記絶縁膜中のケイ素の原子濃度が20%であるコンデンサ。
A base, a first electrode film disposed on the base, an insulating film disposed on a surface of the first electrode film, and a second electrode film disposed on a surface of the insulating film; And the insulating film is a capacitor mainly composed of a ferroelectric material,
The insulating film contains silicon dioxide ;
The insulating film is at least one ferroelectric material selected from the group consisting of Pb (Zr, Ti) O 3 , SrBi 2 Ta 2 O 9 and Bi 3 Ti 4 O 12. Containing materials,
A capacitor in which an atomic concentration of silicon in the insulating film is 20%.
前記絶縁膜の膜厚は25nm以上1000nm以下である請求項1記載のコンデンサ。 The capacitor according to claim 1 , wherein the insulating film has a thickness of 25 nm to 1000 nm. 前記第一、第二の電極は、Ptと、Irと、Ruと、SrRuO3と、LaNiO3からなる群より選択されるいずれか1種類の導電性材料を含有する請求項1又は請求項2のいずれか1項記載のコンデンサ。 Wherein the first, the second electrode, Pt and, Ir and, Ru and a SrRuO 3, claim containing any one of a conductive material selected from the group consisting of LaNiO 3 1 or claim 2 The capacitor | condenser of any one of these. 請求項1乃至請求項のいずれか1項記載のコンデンサを有し、前記コンデンサに蓄積する電荷によってデータを記憶する不揮発性記憶装置。 Claim 1 has a capacitor according to any one of claims 3, nonvolatile memory device for storing data by accumulating charges in the capacitor.
JP2004009291A 2004-01-16 2004-01-16 Capacitor and nonvolatile memory device using the capacitor Expired - Lifetime JP4471668B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2004009291A JP4471668B2 (en) 2004-01-16 2004-01-16 Capacitor and nonvolatile memory device using the capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004009291A JP4471668B2 (en) 2004-01-16 2004-01-16 Capacitor and nonvolatile memory device using the capacitor

Publications (2)

Publication Number Publication Date
JP2005203613A JP2005203613A (en) 2005-07-28
JP4471668B2 true JP4471668B2 (en) 2010-06-02

Family

ID=34822376

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004009291A Expired - Lifetime JP4471668B2 (en) 2004-01-16 2004-01-16 Capacitor and nonvolatile memory device using the capacitor

Country Status (1)

Country Link
JP (1) JP4471668B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4793568B2 (en) 2005-07-08 2011-10-12 セイコーエプソン株式会社 Actuator device, liquid jet head, and liquid jet device
EP2053642A4 (en) * 2006-08-02 2011-01-05 Ulvac Inc Film-forming method and film-forming apparatus
CN104671755B (en) * 2015-02-10 2017-01-18 中国科学院物理研究所 Preparation method of magneto-electric coupling multi-ferroic material BiMn3Cr4O12
CN109809493B (en) * 2017-11-22 2020-08-04 清华大学 Bismuth ferrite room-temperature multiferromagnetic coupling material, preparation method and electronic device

Also Published As

Publication number Publication date
JP2005203613A (en) 2005-07-28

Similar Documents

Publication Publication Date Title
US7349195B2 (en) Thin film capacitor and method for manufacturing the same
JP3188179B2 (en) Method of manufacturing ferroelectric thin film element and method of manufacturing ferroelectric memory element
JP2877618B2 (en) Method of forming ferroelectric film
US11145665B2 (en) Electrical storage device with negative capacitance
JP6296207B2 (en) Dielectric thin film, capacitive element and electronic component
JP2001007299A (en) Lead germanate ferroelectric structure of multilayer electrode and deposition method thereof
JP2002261251A (en) Ferroelectric capacitor with amorphous iridium oxide barrier layer and electrodes, integrated semiconductor device and integrated semiconductor device manufacturing method
JP2002151656A (en) Semiconductor device and manufacturing method therefor
JP4471668B2 (en) Capacitor and nonvolatile memory device using the capacitor
KR20070089638A (en) Semiconductor apparatus and method of manufacturing said semiconductor apparatus
JP2002094023A (en) Method for forming ferroelectric film, and method for manufacturing ferroelectric capacitor element
JP3595098B2 (en) Thin film capacitors
JPH08139292A (en) Thin film capacitor and semiconductor memory
JPH11261028A (en) Thin film capacitor
JP2000355760A (en) Sputtering target, barrier film and electronic parts
JPH1187634A (en) Thin-film capacitor
JP6282735B2 (en) Manufacturing method of PZT thin film laminate
JP2007048765A (en) Semiconductor storage device and method of forming insulator layer
JPH1093029A (en) Thin-film dielectric element
KR100637770B1 (en) Ferroelectric thin film capacitor and the manufacturing method thereof
JPH1192922A (en) Sputtering target for formation of dielectric film, its production and production of ferroelectric memory
JPH10223847A (en) Manufacture of ferroelectric thin film element, ferroelectric thin film element and ferroelectric memory device
JP3249653B2 (en) Capacitor
JPH09312381A (en) Semiconductor device and manufacture thereof
JPH0974169A (en) Thin film capacitor

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20061120

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20090605

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20090616

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20090817

Free format text: JAPANESE INTERMEDIATE CODE: A821

Effective date: 20090817

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20100302

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20100302

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130312

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Ref document number: 4471668

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130312

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20160312

Year of fee payment: 6

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

EXPY Cancellation because of completion of term